This is a series of patches that add support for the SPARC M7 cpu to

[deliverable/binutils-gdb.git] / opcodes / sparc-dis.c

diff --git a/opcodes/sparc-dis.c b/opcodes/sparc-dis.c
index db09c442c7a7209197db47337ea5e9733995e72d..9f0b96ee17e1dc382d6a0a8b91985b6304cfca4f 100644 (file)
--- a/opcodes/sparc-dis.c
+++ b/opcodes/sparc-dis.c
@@ -106,7 +106,7 @@ static char *v9a_asr_reg_names[] =
 {
   "pcr", "pic", "dcr", "gsr", "set_softint", "clear_softint",
   "softint", "tick_cmpr", "stick", "stick_cmpr", "cfr",
-  "pause", "cps"
+  "pause", "mwait"
 };
 
 /* Macros used to extract instruction fields.  Not all fields have
@@ -656,6 +656,7 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info)
                    break;
                  case 'H':     /* Double/even.  */
                  case 'J':     /* Quad/multiple of 4.  */
+                 case '}':     /* Double/even.  */
                    fregx (X_RD (insn));
                    break;
 #undef freg
@@ -793,6 +794,10 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info)
                    (*info->fprintf_func) (stream, "%%fprs");
                    break;
 
+                 case '{':
+                   (*info->fprintf_func) (stream, "%%mcdper");
+                   break;
+
                  case 'o':
                    (*info->fprintf_func) (stream, "%%asi");
                    break;