gdb: add target_ops::supports_displaced_step

[deliverable/binutils-gdb.git] / sim / ChangeLog

diff --git a/sim/ChangeLog b/sim/ChangeLog
index 253b91ed2aa66669583264964d08f769d7c48365..72d4d4eb36ba25ae9cd6f1514b1e6adc315b1a60 100644 (file)
--- a/sim/ChangeLog
+++ b/sim/ChangeLog
@@ -1,3 +1,113 @@
+2019-12-19  Tom Tromey  <tromey@adacore.com>
+
+       PR build/24572:
+       * Makefile.in (install-strip): New target.
+
+2019-09-23  Dimitar Dimitrov  <dimitar@dinux.eu>
+
+       * MAINTAINERS: Add myself as PRU maintainer.
+       * configure: Regenerated.
+       * configure.tgt: Add PRU.
+
+2019-09-20  Alan Modra  <amodra@gmail.com>
+
+       * ppc/emul_generic.c (emul_add_tree_options): Delete old bfd code.
+
+2019-09-18  Alan Modra  <amodra@gmail.com>
+
+       * common/sim-load.c, * common/sim-utils.c, * cris/sim-if.c,
+       * erc32/func.c, * lm32/sim-if.c, * m32c/load.c, * m32c/trace.c,
+       * m68hc11/interp.c, * ppc/hw_htab.c, * ppc/hw_init.c,
+       * rl78/load.c, * rl78/trace.c, * rx/gdb-if.c, * rx/load.c,
+       * rx/trace.c: Update throughout for bfd section macro changes.
+
+2019-06-13  Stafford Horne  <shorne@gmail.com>
+
+       * or1k/cpu.c: Regenerate.
+       * or1k/cpu.h: Regenerate.
+       * or1k/decode.c: Regenerate.
+       * or1k/decode.h: Regenerate.
+       * or1k/model.c: Regenerate.
+       * or1k/sem-switch.c: Regenerate.
+       * or1k/sem.c: Regenerate.
+
+2019-02-28  Joel Brobecker  <brobecker@adacore.com>
+
+       * MAINTAINERS: Move Mike Frysinger to past maintainers' section.
+
+2019-02-13  Simon Marchi  <simon.marchi@ericsson.com>
+
+       * MAINTAINERS: Add Andrew Burgess as global maintainer.
+
+2019-01-03  Pavel I. Kryukov  <kryukov@frtk.ru>
+
+       * sim-base.h: Add 'extern C' if header is compiled with C++.
+
+2018-12-06  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+       * common/acinclude.m4 (enable-cgen-maint): Support passing path to
+       cgen source tree.
+       * cris/configure: Regenerate.
+       * frv/configure: Regenerate.
+       * iq2000/configure: Regenerate.
+       * lm32/configure: Regenerate.
+       * m32r/configure: Regenerate.
+       * or1k/configure: Regenerate.
+       * sh64/configure: Regenerate.
+
+2018-10-05  Stafford Horne  <shorne@gmail.com>
+
+       * or1k/cpu.h: Regenerate.
+       * or1k/decode.c: Regenerate.
+       * or1k/decode.h: Regenerate.
+       * or1k/model.c: Regenerate.
+       * or1k/sem-switch.c: Regenerate.
+       * or1k/sem.c: Regenerate:
+
+2018-07-20  Maciej W. Rozycki  <macro@mips.com>
+
+       * MAINTAINERS: Update my e-mail address, downgrade to MIPS I-IV
+       ISA maintenance.
+
+2018-07-19  DJ Delorie  <dj@redhat.com>
+
+       * MAINTAINERS (rl78, m32c, rx, v850): Remove myself as maintainer.
+
+2018-07-14  Stafford Horne  <shorne@gmail.com>
+
+       * MAINTAINERS (or1k): Add myself as or1k maintainer.
+
+2018-06-19  Simon Marchi  <simon.marchi@ericsson.com>
+
+       * All configure.ac: Remove AC_PREREQ.
+       * All configure: Re-generate.
+
+2018-01-22  Maciej W. Rozycki  <macro@mips.com>
+
+       * MAINTAINERS: Update my company e-mail address.
+
+2017-12-12  Stafford Horne  <shorne@gmail.com>
+           Peter Gavin  <pgavin@gmail.com>
+
+       * configure: Regenerated.
+       * or1k/aclocal.m4: Generated.
+       * or1k/config.in: Generated.
+       * or1k/configure: Generated.
+
+2017-12-12  Stafford Horne  <shorne@gmail.com>
+           Peter Gavin  <pgavin@gmail.com>
+
+       * or1k/arch.c: Generated.
+       * or1k/arch.h: Generated.
+       * or1k/cpu.c: Generated.
+       * or1k/cpu.h: Generated.
+       * or1k/cpuall.h: Generated.
+       * or1k/decode.c: Generated.
+       * or1k/decode.h: Generated.
+       * or1k/model.c: Generated.
+       * or1k/sem-switch.c: Generated.
+       * or1k/sem.c: Generated.
+
 2017-12-12  Stafford Horne  <shorne@gmail.com>
            Peter Gavin  <pgavin@gmail.com>