X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gdb%2Fgo32-nat.c;h=94972a2f5c281e705ea72a0d5c648c5dc94eb767;hb=ff8577f64987a898e1dc5eb6afb66a404fb7bb16;hp=980180b23a1e84783b2e3e0a764a85b588c68c73;hpb=d9f719f1adb653ab40a55e4c1b8c300215b400ff;p=deliverable%2Fbinutils-gdb.git diff --git a/gdb/go32-nat.c b/gdb/go32-nat.c index 980180b23a..94972a2f5c 100644 --- a/gdb/go32-nat.c +++ b/gdb/go32-nat.c @@ -1,5 +1,5 @@ /* Native debugging support for Intel x86 running DJGPP. - Copyright (C) 1997-2018 Free Software Foundation, Inc. + Copyright (C) 1997-2019 Free Software Foundation, Inc. Written by Robert Hoehne. This file is part of GDB. @@ -89,12 +89,12 @@ #include "inferior.h" #include "infrun.h" #include "gdbthread.h" -#include "gdb_wait.h" +#include "gdbsupport/gdb_wait.h" #include "gdbcore.h" #include "command.h" #include "gdbcmd.h" #include "floatformat.h" -#include "buildsym.h" +#include "buildsym-legacy.h" #include "i387-tdep.h" #include "i386-tdep.h" #include "nat/x86-cpuid.h" @@ -377,7 +377,7 @@ struct go32_nat_target final : public x86_nat_target bool thread_alive (ptid_t ptid) override; - const char *pid_to_str (ptid_t) override; + std::string pid_to_str (ptid_t) override; }; static go32_nat_target the_go32_nat_target; @@ -507,7 +507,8 @@ go32_nat_target::wait (ptid_t ptid, struct target_waitstatus *status, } getcwd (child_cwd, sizeof (child_cwd)); /* in case it has changed */ - chdir (current_directory); + if (current_directory != NULL) + chdir (current_directory); if (a_tss.tss_irqn == 0x21) { @@ -533,7 +534,7 @@ go32_nat_target::wait (ptid_t ptid, struct target_waitstatus *status, } } } - return pid_to_ptid (SOME_PID); + return ptid_t (SOME_PID); } static void @@ -541,8 +542,8 @@ fetch_register (struct regcache *regcache, int regno) { struct gdbarch *gdbarch = regcache->arch (); if (regno < gdbarch_fp0_regnum (gdbarch)) - regcache_raw_supply (regcache, regno, - (char *) &a_tss + regno_mapping[regno].tss_ofs); + regcache->raw_supply (regno, + (char *) &a_tss + regno_mapping[regno].tss_ofs); else if (i386_fp_regnum_p (gdbarch, regno) || i386_fpc_regnum_p (gdbarch, regno)) i387_supply_fsave (regcache, regno, &npx); @@ -571,8 +572,8 @@ store_register (const struct regcache *regcache, int regno) { struct gdbarch *gdbarch = regcache->arch (); if (regno < gdbarch_fp0_regnum (gdbarch)) - regcache_raw_collect (regcache, regno, - (char *) &a_tss + regno_mapping[regno].tss_ofs); + regcache->raw_collect (regno, + (char *) &a_tss + regno_mapping[regno].tss_ofs); else if (i386_fp_regnum_p (gdbarch, regno) || i386_fpc_regnum_p (gdbarch, regno)) i387_collect_fsave (regcache, regno, &npx); @@ -655,9 +656,9 @@ go32_nat_target::xfer_partial (enum target_object object, return go32_xfer_memory (readbuf, writebuf, offset, len, xfered_len); default: - return this->beneath->xfer_partial (object, annex, - readbuf, writebuf, offset, len, - xfered_len); + return this->beneath ()->xfer_partial (object, annex, + readbuf, writebuf, offset, len, + xfered_len); } } @@ -752,7 +753,7 @@ go32_nat_target::create_inferior (const char *exec_file, save_npx (); #endif - inferior_ptid = pid_to_ptid (SOME_PID); + inferior_ptid = ptid_t (SOME_PID); inf = current_inferior (); inferior_appeared (inf, SOME_PID); @@ -788,7 +789,6 @@ go32_nat_target::mourn_inferior () ptid = inferior_ptid; inferior_ptid = null_ptid; - delete_thread_silent (ptid); prog_has_started = 0; generic_mourn_inferior (); @@ -990,10 +990,10 @@ go32_nat_target::pass_ctrlc () bool go32_nat_target::thread_alive (ptid_t ptid) { - return !ptid_equal (ptid, null_ptid); + return ptid != null_ptid; } -const char * +std::string go32_nat_target::pid_to_str (ptid_t ptid) { return normal_pid_to_str (ptid); @@ -1163,6 +1163,7 @@ go32_sysinfo (const char *arg, int from_tty) unsigned brand_idx; int intel_p = strcmp (cpuid_vendor, "GenuineIntel") == 0; int amd_p = strcmp (cpuid_vendor, "AuthenticAMD") == 0; + int hygon_p = strcmp (cpuid_vendor, "HygonGenuine") == 0; unsigned cpu_family, cpu_model; #if 0 @@ -1262,12 +1263,12 @@ go32_sysinfo (const char *arg, int from_tty) } } xsnprintf (cpu_string, sizeof (cpu_string), "%s%s Model %d Stepping %d", - intel_p ? "Pentium" : (amd_p ? "AMD" : "ix86"), + intel_p ? "Pentium" : (amd_p ? "AMD" : (hygon_p ? "Hygon" : "ix86")), cpu_brand, cpu_model, cpuid_eax & 0xf); printfi_filtered (31, "%s\n", cpu_string); if (((cpuid_edx & (6 | (0x0d << 23))) != 0) || ((cpuid_edx & 1) == 0) - || (amd_p && (cpuid_edx & (3 << 30)) != 0)) + || ((amd_p || hygon_p) && (cpuid_edx & (3 << 30)) != 0)) { puts_filtered ("CPU Features..................."); /* We only list features which might be useful in the DPMI @@ -1286,7 +1287,7 @@ go32_sysinfo (const char *arg, int from_tty) puts_filtered ("SSE "); if ((cpuid_edx & (1 << 26)) != 0) puts_filtered ("SSE2 "); - if (amd_p) + if (amd_p || hygon_p) { if ((cpuid_edx & (1 << 31)) != 0) puts_filtered ("3DNow! "); @@ -1877,13 +1878,13 @@ get_cr3 (void) cr3 = _farnspeekl (taskbase + 0x1c) & ~0xfff; if (cr3 > 0xfffff) { -#if 0 /* Not fullly supported yet. */ +#if 0 /* Not fully supported yet. */ /* The Page Directory is in UMBs. In that case, CWSDPMI puts the first Page Table right below the Page Directory. Thus, the first Page Table's entry for its own address and the Page Directory entry for that Page Table will hold the same physical address. The loop below searches the entire UMB - range of addresses for such an occurence. */ + range of addresses for such an occurrence. */ unsigned long addr, pte_idx; for (addr = 0xb0000, pte_idx = 0xb0;