X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=libringbuffer%2Frseq-arm.h;h=d4731c96f424cd10a1fffe16f878320b01f5c0c2;hb=6b31d6698e018b0a6b5154af662f673f795d3688;hp=656b87ef9039cb080098f9f12daa527b8b8cd195;hpb=6fd21280083aa3a69348275cd00b21c0396967a5;p=deliverable%2Flttng-ust.git

diff --git a/libringbuffer/rseq-arm.h b/libringbuffer/rseq-arm.h
index 656b87ef..d4731c96 100644
--- a/libringbuffer/rseq-arm.h
+++ b/libringbuffer/rseq-arm.h
@@ -28,11 +28,6 @@
 /*
  * The __rseq_table section can be used by debuggers to better handle
  * single-stepping through the restartable critical sections.
- *
- * Load the immediate value 0 into register r1 right after the ldr
- * instruction to improve instruction-level parallelism: load the
- * constant while the processor is stalled waiting for the load to
- * complete, which is required by the following comparison and branch.
  */
 
 #define RSEQ_FINISH_ASM(_target_final, _to_write_final, _start_value, \
@@ -53,7 +48,6 @@ do { \
 		"str r0, [%[rseq_cs]]\n\t" \
 		RSEQ_INJECT_ASM(2) \
 		"ldr r0, %[current_event_counter]\n\t" \
-		"mov r1, #0\n\t" \
 		"cmp %[start_event_counter], r0\n\t" \
 		"bne 5f\n\t" \
 		RSEQ_INJECT_ASM(3) \
@@ -61,15 +55,12 @@ do { \
 		_final_store \
 		"2:\n\t" \
 		RSEQ_INJECT_ASM(5) \
-		"str r1, [%[rseq_cs]]\n\t" \
 		_teardown \
 		"b 4f\n\t" \
 		".balign 32\n\t" \
 		"3:\n\t" \
 		".word 1b, 0x0, 2b, 0x0, 5f, 0x0, 0x0, 0x0\n\t" \
 		"5:\n\t" \
-		"mov r1, #0\n\t" \
-		"str r1, [%[rseq_cs]]\n\t" \
 		_teardown \
 		"b %l[failure]\n\t" \
 		"4:\n\t" \
@@ -80,7 +71,7 @@ do { \
 		  _spec_input \
 		  _final_input \
 		  RSEQ_INJECT_INPUT \
-		: "r0", "r1", "memory", "cc" \
+		: "r0", "memory", "cc" \
 		  _extra_clobber \
 		  RSEQ_INJECT_CLOBBER \
 		: _failure \