x86: Add support for Intel HWP feature detection.
authorDirk Brandewie <dirk.j.brandewie@intel.com>
Thu, 6 Nov 2014 17:40:46 +0000 (09:40 -0800)
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>
Tue, 11 Nov 2014 23:04:37 +0000 (00:04 +0100)
commit77873887729aaddec5cd27203a6ce8c4987733e4
tree85d104df9e3b6417d52a7801c55b0cdd4a579f80
parent619c144c84bd240487204e91dff88247cde68d92
x86: Add support for Intel HWP feature detection.

Add support of Hardware Managed Performance States (HWP) described in Volume 3
section 14.4 of the SDM.

One bit CPUID.06H:EAX[bit 7] expresses the presence of the HWP feature on
the processor. The remaining bits CPUID.06H:EAX[bit 8-11] denote the
presense of various HWP features.

Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
arch/x86/include/asm/cpufeature.h
arch/x86/kernel/cpu/scattered.c
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