[AArch64] Fix off by one error in instruction relaxation mask.
authorMarcus Shawcroft <marcus.shawcroft@arm.com>
Tue, 15 Apr 2014 16:46:07 +0000 (17:46 +0100)
committerMarcus Shawcroft <marcus.shawcroft@arm.com>
Tue, 15 Apr 2014 16:46:07 +0000 (17:46 +0100)
commitfa85fb9a1bf35209a149d07ebefb2a8970e4a27a
tree4e4455bee3ca3273be5aee30927d9e59ede303ab
parent35e5d2f0f81d97f9bd41586b1979345072b7989d
[AArch64] Fix off by one error in instruction relaxation mask.

The AArch64 TLSDESC to IE relaxation code uses a bit mask intended to
ensure that destination register in a relaxed ldr instruction is
always X0.  The mask has an off by one error resulting in the most
significant bit of the destination register being retained in the
relaxed instruction.  The issue generally appears when the compiler
emits TLS accesses code under high register pressure resulting in a
broken code sequence.
bfd/ChangeLog
bfd/elfnn-aarch64.c
ld/testsuite/ChangeLog
ld/testsuite/ld-aarch64/tls-relax-gdesc-ie.s
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