x86: Properly encode vmovd with 64-bit memeory
authorH.J. Lu <hjl.tools@gmail.com>
Mon, 8 Jan 2018 12:36:59 +0000 (04:36 -0800)
committerH.J. Lu <hjl.tools@gmail.com>
Mon, 8 Jan 2018 12:37:20 +0000 (04:37 -0800)
commit704a705d7aaab8041df76e2981e2a1efc014aad0
tree8792c8a27852863446dabab83c4fc53e558a24a4
parent605fd3c6590fbed834107a2e1d1df0ba58834576
x86: Properly encode vmovd with 64-bit memeory

For historical reason, we allow movd/vmovd with 64-bit register and
memeory operands.  But for vmovd, we failed to handle 64-bit memeory
operand.  This has been gone unnoticed since AT&T syntax always treats
memory operand as 32-bit memory.  This patch properly encodes vmovd
with 64-bit memeory operands.  It also removes AVX512 vmovd with 64-bit
operands since GCC has

    case TYPE_SSEMOV:
      switch (get_attr_mode (insn))
        {
        case MODE_DI:
          /* Handle broken assemblers that require movd instead of movq.  */
          if (!HAVE_AS_IX86_INTERUNIT_MOVQ
              && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1])))
            return "%vmovd\t{%1, %0|%0, %1}";
          return "%vmovq\t{%1, %0|%0, %1}";

and all AVX512 GNU assemblers set HAVE_AS_IX86_INTERUNIT_MOVQ, GCC won't
generate AVX512 vmovd with 64-bit operand.

gas/

PR gas/22681
* testsuite/gas/i386/i386.exp: Run x86-64-movd and
x86-64-movd-intel.
* testsuite/gas/i386/x86-64-movd-intel.d: New file.
* testsuite/gas/i386/x86-64-movd.d: Likewise.
* testsuite/gas/i386/x86-64-movd.s: Likewise.

opcodes/

PR gas/22681
* i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
Remove AVX512 vmovd with 64-bit operands.
* i386-tbl.h: Regenerated.
gas/ChangeLog
gas/testsuite/gas/i386/i386.exp
gas/testsuite/gas/i386/x86-64-movd-intel.d [new file with mode: 0644]
gas/testsuite/gas/i386/x86-64-movd.d [new file with mode: 0644]
gas/testsuite/gas/i386/x86-64-movd.s [new file with mode: 0644]
opcodes/ChangeLog
opcodes/i386-opc.tbl
opcodes/i386-tbl.h
This page took 0.037488 seconds and 4 git commands to generate.