Support aligning text section from odd addresses

Support aligning text section from odd addresses

Previously, the alignment directives were not correctly supported
in the text section when current alignment was only 1 byte (i.e.,
when the address was odd).  Since there are no 1-byte instructions
in RISC-V, this patch resolves the bug by writing a zero byte to
obtain 2-byte alignment, at which point a 2-byte NOP can be used
to obtain 4-byte alignment.

Resolves https://github.com/riscv/riscv-gnu-toolchain/issues/205

	* config/tc-riscv.c (riscv_make_nops): Emit 2-byte NOPs.
	(riscv_frag_align_code): Correct frag_align_code arg.