[AArch64][PATCH 1/2] Add support for ARMv8.2 DC CVAP instruction.
authorMatthew Wahab <matthew.wahab@arm.com>
Thu, 10 Dec 2015 16:31:35 +0000 (16:31 +0000)
committerMatthew Wahab <matthew.wahab@arm.com>
Thu, 10 Dec 2015 16:40:44 +0000 (16:40 +0000)
commitea2deeec92695c33045d71ffa73add6305b17b9a
tree9b7409e50eb39a3fe3be00374cee8d36ac247b42
parent762f774785f4ef878ac4c831e1f4733dc957234d
[AArch64][PATCH 1/2] Add support for ARMv8.2 DC CVAP instruction.

ARMv8.2 adds the new system instruction DC CVAP. This patch series adds
support for this instruction to binutils, enabled when -march=armv8.2-a
is selected.

The AArch64 binutils record of some system registers uses a boolean
value to hold the single flag currently supported for them. To allow
these registers to be limited to specific architectures, the first patch
in this series replaces the boolean flag with a bitset and feature test.

include/opcode/
2015-12-10  Matthew Wahab  <matthew.wahab@arm.com>

* aarch64.h (aarch64_sys_ins_reg): Replace has_xt with flags.
(aarch64_sys_ins_reg_has_xt): Declare.

opcodes/
2015-12-10  Matthew Wahab  <matthew.wahab@arm.com>

* aarch64-dis.c (aarch64_ext_regrt_sysins): Replace use of has_xt
with aarch64_sys_ins_reg_has_xt.
(aarch64_ext_sysins_op): Likewise.
* aarch64-opc.c (operand_general_constraint_met_p): Likewise.
(F_HASXT): New.
(aarch64_sys_regs_ic): Update for changes to aarch64_sys_ins_reg.
(aarch64_sys_regs_dc): Likewise.
(aarch64_sys_regs_at): Likewise.
(aarch64_sys_regs_tlbi): Likewise.
(aarch64_sys_ins_reg_has_xt): New.

Change-Id: I363637a6c3f54d7ffff953b3a0734e8139cae819
include/opcode/ChangeLog
include/opcode/aarch64.h
opcodes/ChangeLog
opcodes/aarch64-dis.c
opcodes/aarch64-opc.c
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