Stripping .rela.branch_lt is easy enough but messes with the
testsuite due to stub symbols (that use section id) changing. Tests
that run on more than one target variant can be tricky to fix, this
renaming happened to work.
bfd/
* elf64-ppc.c (ppc64_elf_size_stubs): Strip relbrlt too.
ld/
* testsuite/ld-powerpc/tlsopt5.s: Rename foo to aaaaa.
* testsuite/ld-powerpc/tlsopt5.d: Adjust to suit.
* testsuite/ld-powerpc/tlsopt6.d: Likewise.
+2020-04-20 Alan Modra <amodra@gmail.com>
+
+ * elf64-ppc.c (ppc64_elf_size_stubs): Strip relbrlt too.
+
2020-04-18 Alan Modra <amodra@gmail.com>
* section.c (bfd_is_const_section): Correct test for special
2020-04-18 Alan Modra <amodra@gmail.com>
* section.c (bfd_is_const_section): Correct test for special
}
maybe_strip_output (info, htab->brlt);
}
maybe_strip_output (info, htab->brlt);
+ if (htab->relbrlt != NULL)
+ maybe_strip_output (info, htab->relbrlt);
if (htab->glink_eh_frame != NULL)
maybe_strip_output (info, htab->glink_eh_frame);
if (htab->glink_eh_frame != NULL)
maybe_strip_output (info, htab->glink_eh_frame);
+2020-04-20 Alan Modra <amodra@gmail.com>
+
+ * testsuite/ld-powerpc/tlsopt5.s: Rename foo to aaaaa.
+ * testsuite/ld-powerpc/tlsopt5.d: Adjust to suit.
+ * testsuite/ld-powerpc/tlsopt6.d: Likewise.
+
2020-04-18 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
* testsuite/ld-elf/warn1.d: Don't xfail on 64-bit Solaris/SPARC.
2020-04-18 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
* testsuite/ld-elf/warn1.d: Don't xfail on 64-bit Solaris/SPARC.
Disassembly of section \.text:
Disassembly of section \.text:
+.* <.*\.plt_call\.aaaaa>:
.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
-.*: (28 80 82 e9|e9 82 80 28) ld r12,-32728\(r2\)
+.*: (30 80 82 e9|e9 82 80 30) ld r12,-32720\(r2\)
.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
.*: (20 04 80 4e|4e 80 04 20) bctr
\.\.\.
.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
.*: (20 04 80 4e|4e 80 04 20) bctr
\.\.\.
.*: (a6 02 08 7c|7c 08 02 a6) mflr r0
.*: (08 00 01 f8|f8 01 00 08) std r0,8\(r1\)
.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
.*: (a6 02 08 7c|7c 08 02 a6) mflr r0
.*: (08 00 01 f8|f8 01 00 08) std r0,8\(r1\)
.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
-.*: (30 80 82 e9|e9 82 80 30) ld r12,-32720\(r2\)
+.*: (28 80 82 e9|e9 82 80 28) ld r12,-32728\(r2\)
.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
.*: (21 04 80 4e|4e 80 04 21) bctrl
.*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\)
.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
.*: (21 04 80 4e|4e 80 04 21) bctrl
.*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\)
.*: (08 80 62 38|38 62 80 08) addi r3,r2,-32760
.*: (9d ff ff 4b|4b ff ff 9d) bl .* <.*\.plt_call\.__tls_get_addr_opt@@GLIBC_2\.22>
.*: (00 00 00 60|60 00 00 00) nop
.*: (08 80 62 38|38 62 80 08) addi r3,r2,-32760
.*: (9d ff ff 4b|4b ff ff 9d) bl .* <.*\.plt_call\.__tls_get_addr_opt@@GLIBC_2\.22>
.*: (00 00 00 60|60 00 00 00) nop
-.*: (75 ff ff 4b|4b ff ff 75) bl .* <.*\.plt_call\.foo>
+.*: (75 ff ff 4b|4b ff ff 75) bl .* <.*\.plt_call\.aaaaa>
.*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\)
.*: (00 00 00 60|60 00 00 00) nop
.*
.*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\)
.*: (00 00 00 60|60 00 00 00) nop
.*
.*: (08 00 6b e9|e9 6b 00 08) ld r11,8\(r11\)
.*: (20 04 80 4e|4e 80 04 20) bctr
.*: (08 00 6b e9|e9 6b 00 08) ld r11,8\(r11\)
.*: (20 04 80 4e|4e 80 04 20) bctr
+.* <__tls_get_addr_opt@plt>:
.* (c8 ff ff 4b|4b ff ff c8) b .*
.* (c8 ff ff 4b|4b ff ff c8) b .*
-.* <__tls_get_addr_opt@plt>:
.*: (c4 ff ff 4b|4b ff ff c4) b .*
.*: (c4 ff ff 4b|4b ff ff c4) b .*
_start:
.cfi_startproc
addi 3,2,gd@got@tlsgd
bl __tls_get_addr(gd@tlsgd)
nop
_start:
.cfi_startproc
addi 3,2,gd@got@tlsgd
bl __tls_get_addr(gd@tlsgd)
nop
Disassembly of section \.text:
Disassembly of section \.text:
+.* <.*\.plt_call\.aaaaa>:
.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
-.*: (28 80 82 e9|e9 82 80 28) ld r12,-32728\(r2\)
+.*: (30 80 82 e9|e9 82 80 30) ld r12,-32720\(r2\)
.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
.*: (20 04 80 4e|4e 80 04 20) bctr
\.\.\.
.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
.*: (20 04 80 4e|4e 80 04 20) bctr
\.\.\.
.*: (f8 ff 61 f9|f9 61 ff f8) std r11,-8\(r1\)
.*: (a1 ff 21 f8|f8 21 ff a1) stdu r1,-96\(r1\)
.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
.*: (f8 ff 61 f9|f9 61 ff f8) std r11,-8\(r1\)
.*: (a1 ff 21 f8|f8 21 ff a1) stdu r1,-96\(r1\)
.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
-.*: (30 80 82 e9|e9 82 80 30) ld r12,-32720\(r2\)
+.*: (28 80 82 e9|e9 82 80 28) ld r12,-32728\(r2\)
.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
.*: (21 04 80 4e|4e 80 04 21) bctrl
.*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\)
.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
.*: (21 04 80 4e|4e 80 04 21) bctrl
.*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\)
.*: (08 80 62 38|38 62 80 08) addi r3,r2,-32760
.*: (5d ff ff 4b|4b ff ff 5d) bl .* <.*\.plt_call\.__tls_get_addr_opt@@GLIBC_2\.22>
.*: (00 00 00 60|60 00 00 00) nop
.*: (08 80 62 38|38 62 80 08) addi r3,r2,-32760
.*: (5d ff ff 4b|4b ff ff 5d) bl .* <.*\.plt_call\.__tls_get_addr_opt@@GLIBC_2\.22>
.*: (00 00 00 60|60 00 00 00) nop
-.*: (35 ff ff 4b|4b ff ff 35) bl .* <.*\.plt_call\.foo>
+.*: (35 ff ff 4b|4b ff ff 35) bl .* <.*\.plt_call\.aaaaa>
.*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\)
.*: (00 00 00 60|60 00 00 00) nop
.*
.*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\)
.*: (00 00 00 60|60 00 00 00) nop
.*
.*: (08 00 6b e9|e9 6b 00 08) ld r11,8\(r11\)
.*: (20 04 80 4e|4e 80 04 20) bctr
.*: (08 00 6b e9|e9 6b 00 08) ld r11,8\(r11\)
.*: (20 04 80 4e|4e 80 04 20) bctr
+.* <__tls_get_addr_opt@plt>:
.* (c8 ff ff 4b|4b ff ff c8) b .*
.* (c8 ff ff 4b|4b ff ff c8) b .*
-.* <__tls_get_addr_opt@plt>:
.*: (c4 ff ff 4b|4b ff ff c4) b .*
.*: (c4 ff ff 4b|4b ff ff c4) b .*