sim/erc32: Perform pseudo-init if binary linked to non-zero address.

Binaries produced by most erc32 tool-chains do not include
system initialization. sis will detect this and initialize
necessary registers for memory and timer control.

diff --git a/sim/erc32/ChangeLog b/sim/erc32/ChangeLog
index 3757e5b1858f6bb2e3a2973107cfb2b6b5ebd415..38c3a322870e95427a83f3a1d2d90dab2e6b6208 100644 (file)
--- a/sim/erc32/ChangeLog
+++ b/sim/erc32/ChangeLog
@@ -1,3 +1,12 @@
+2015-02-21  Jiri Gaisler  <jiri@gaisler.se>
+
+       * erc32.c (mec_read): Allow simulator memory size to be read
+       by application.
+       (boot_init): initialize memory and timers if start address is
+       not 0.
+       * func.c (exe_cmd): Call boot_init if start address not 0.
+       * interf.c (run_sim): Likewise.
+
 2015-02-21  Jiri Gaisler  <jiri@gaisler.se>
 
        * exec.c (init_regs): erc32 has vendor ID 1 and version ID 1 in %psr.

diff --git a/sim/erc32/erc32.c b/sim/erc32/erc32.c
index 4d4177e8fd454d47128c330fcdcbf6b18218558c..428d6c461c312a1a20c6fb45936981e7e777a067 100644 (file)
--- a/sim/erc32/erc32.c
+++ b/sim/erc32/erc32.c
@@ -743,6 +743,14 @@ mec_read(addr, asi, data)
        *data = read_uart(addr);
        break;
 
+    case 0xF4:         /* simulator RAM size in bytes */
+       *data = 4096*1024;
+       break;
+
+    case 0xF8:         /* simulator ROM size in bytes */
+       *data = 1024*1024;
+       break;
+
     default:
        set_sfsr(MEC_ACC, addr, asi, 1);
        return (1);
@@ -1887,3 +1895,19 @@ sis_memory_read(addr, data, length)
     memcpy(data, mem, length);
     return (length);
 }
+
+extern struct pstate sregs;
+
+void
+boot_init (void)
+{
+    mec_write(MEC_WCR, 0);     /* zero waitstates */
+    mec_write(MEC_TRAPD, 0);   /* turn off watch-dog */
+    mec_write(MEC_RTC_SCALER, sregs.freq - 1); /* generate 1 MHz RTC tick */
+    mec_write(MEC_MEMCFG, (3 << 18) | (4 << 10)); /* 1 MB ROM, 4 MB RAM */
+    sregs.wim = 2;
+    sregs.psr = 0x110010e0;
+    sregs.r[30] = RAM_END;
+    sregs.r[14] = sregs.r[30] - 96 * 4;
+    mec_mcr |= 1;              /* power-down enabled */
+}

diff --git a/sim/erc32/func.c b/sim/erc32/func.c
index e6744eef9e4603a9b24c6622bcc00afe41eebe8d..652608510be22c78190838aef9cd737da6121b6a 100644 (file)
--- a/sim/erc32/func.c
+++ b/sim/erc32/func.c
@@ -468,6 +468,8 @@ exec_cmd(sregs, cmd)
            }
            sregs->pc = len & ~3;
            sregs->npc = sregs->pc + 4;
+           if ((sregs->pc != 0) && (ebase.simtime == 0))
+               boot_init();
            printf("resuming at 0x%08x\n",sregs->pc);
            if ((cmd2 = strtok(NULL, " \t\n\r")) != NULL) {
                stat = run_sim(sregs, VAL(cmd2), 0);

diff --git a/sim/erc32/interf.c b/sim/erc32/interf.c
index 63b3f38c97e7cefc809f7c75acd4f9e6408970a6..ca1a29af7e1f1ae2a1ca2a0242ac09c1635c4f01 100644 (file)
--- a/sim/erc32/interf.c
+++ b/sim/erc32/interf.c
@@ -78,6 +78,8 @@ run_sim(sregs, icount, dis)
    init_stdio();
    sregs->starttime = time(NULL);
    irq = 0;
+   if ((sregs->pc != 0) && (ebase.simtime == 0))
+       boot_init();
    while (!sregs->err_mode & (icount > 0)) {
 
        sregs->fhold = 0;