2012-08-19 Andrew Pinski <apinski@cavium.com>

	* mips-tdep.c (mips32_next_pc): Consolidate calls to itype_op.

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 33845f40ff16f1d62b39b0b1b2d4999ab2a4e5cc..0b52582eaa51de15075c48bac719e40d29b1966a 100644 (file)
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,7 @@
+2012-08-19  Andrew Pinski  <apinski@cavium.com>
+
+       * mips-tdep.c (mips32_next_pc): Consolidate calls to itype_op.
+
 2012-08-19  Keith Seitz  <keiths@redhat.com>
 
        PR c++/14365

diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index a001424241eca13cb7a4e752fc8704f1874e4fec..07ae4053c1eb09014370b683bbeb3bd81c013b27 100644 (file)
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -1475,14 +1475,14 @@ mips32_next_pc (struct frame_info *frame, CORE_ADDR pc)
   unsigned long inst;
   int op;
   inst = mips_fetch_instruction (gdbarch, ISA_MIPS, pc, NULL);
+  op = itype_op (inst);
   if ((inst & 0xe0000000) != 0)                /* Not a special, jump or branch
                                           instruction.  */
     {
-      if (itype_op (inst) >> 2 == 5)
+      if (op >> 2 == 5)
        /* BEQL, BNEL, BLEZL, BGTZL: bits 0101xx */
        {
-         op = (itype_op (inst) & 0x03);
-         switch (op)
+         switch (op & 0x03)
            {
            case 0:             /* BEQL */
              goto equal_branch;
@@ -1496,18 +1496,18 @@ mips32_next_pc (struct frame_info *frame, CORE_ADDR pc)
              pc += 4;
            }
        }
-      else if (itype_op (inst) == 17 && itype_rs (inst) == 8)
+      else if (op == 17 && itype_rs (inst) == 8)
        /* BC1F, BC1FL, BC1T, BC1TL: 010001 01000 */
        pc = mips32_bc1_pc (gdbarch, frame, inst, pc + 4, 1);
-      else if (itype_op (inst) == 17 && itype_rs (inst) == 9
+      else if (op == 17 && itype_rs (inst) == 9
               && (itype_rt (inst) & 2) == 0)
        /* BC1ANY2F, BC1ANY2T: 010001 01001 xxx0x */
        pc = mips32_bc1_pc (gdbarch, frame, inst, pc + 4, 2);
-      else if (itype_op (inst) == 17 && itype_rs (inst) == 10
+      else if (op == 17 && itype_rs (inst) == 10
               && (itype_rt (inst) & 2) == 0)
        /* BC1ANY4F, BC1ANY4T: 010001 01010 xxx0x */
        pc = mips32_bc1_pc (gdbarch, frame, inst, pc + 4, 4);
-      else if (itype_op (inst) == 29)
+      else if (op == 29)
        /* JALX: 011101 */
        /* The new PC will be alternate mode.  */
        {
@@ -1524,7 +1524,7 @@ mips32_next_pc (struct frame_info *frame, CORE_ADDR pc)
     {                          /* This gets way messy.  */
 
       /* Further subdivide into SPECIAL, REGIMM and other.  */
-      switch (op = itype_op (inst) & 0x07)     /* Extract bits 28,27,26.  */
+      switch (op & 0x07)       /* Extract bits 28,27,26.  */
        {
        case 0:         /* SPECIAL */
          op = rtype_funct (inst);