sim: arm: add support for MOVW and MOVT instructions

From: Jayant R. Sonar <Jayant.Sonar@kpitcummins.com>

This patch adds simulator support for handling the armv7 instructions
'movw (immediate)' and 'movt'.

Compiler frequently use these instructions to load the 32bit addresses of
global variables, string pointers etc. into the general registers.

In absence of support of these instructions:
1. GDB run simulator fails to print even simple "hello world" string
   on console.
2. Loading of global variable addresses into the registers fail causing
   arithmetic operation failures.

Patch has been regression tested for arm-none-eabi (-march=armv7-a).

diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog
index 78f0f3bf49f22c4f7de721dea3f464a71e432030..8babf095f473a21342b5e8f03890685130f34c60 100644 (file)
--- a/sim/arm/ChangeLog
+++ b/sim/arm/ChangeLog
@@ -1,3 +1,8 @@
+2013-05-07  Jayant Sonar  <jayant.sonar@kpitcummins.com>
+           Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
+
+       * armemu.c (ARMul_Emulate32): Emulate instructions MOVW and MOVT.
+
 2012-12-19  Joel Brobecker  <brobecker@adacore.com>
 
        * COPYING: Update to GPL version 3.

diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c
index e728813642fb3ad03dc137f46e3d13762dc3fe4d..20a36bca7b6f4b8efbed131bf87b1c24e046dfdd 100644 (file)
--- a/sim/arm/armemu.c
+++ b/sim/arm/armemu.c
@@ -2315,8 +2315,10 @@ check_PMUintr:
              WRITESDEST (dest);
              break;
 
-           case 0x30:          /* TST immed */
-             UNDEF_Test;
+           case 0x30:          /* MOVW immed */
+             dest = BITS (0, 11);
+             dest |= (BITS (16, 19) << 12);
+             WRITEDEST (dest);
              break;
 
            case 0x31:          /* TSTP immed */
@@ -2368,8 +2370,10 @@ check_PMUintr:
                }
              break;
 
-           case 0x34:          /* CMP immed */
-             UNDEF_Test;
+           case 0x34:          /* MOVT immed */
+             dest  = BITS (0, 11);
+             dest |= (BITS (16, 19) << 12);
+             DEST |= (dest << 16);
              break;
 
            case 0x35:          /* CMPP immed */

diff --git a/sim/testsuite/sim/arm/ChangeLog b/sim/testsuite/sim/arm/ChangeLog
index 6b909badbd4bef2bc692c28f14b77dcdf0ef8965..1237d81fe67b2530d412b5a05c66d8ef40d96dac 100644 (file)
--- a/sim/testsuite/sim/arm/ChangeLog
+++ b/sim/testsuite/sim/arm/ChangeLog
@@ -1,3 +1,8 @@
+2013-05-07  Jayant Sonar  <jayant.sonar@kpitcummins.com>
+           Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
+
+       * movw-movt.ms: New file: Test movw & movt instructions.
+
 2011-07-01  Nick Clifton  <nickc@redhat.com>
 
        PR sim/12737

diff --git a/sim/testsuite/sim/arm/movw-movt.ms b/sim/testsuite/sim/arm/movw-movt.ms
new file mode 100644 (file)
index 0000000..1be815d
--- /dev/null
+++ b/sim/testsuite/sim/arm/movw-movt.ms
@@ -0,0 +1,53 @@
+# output(): Hello, world.\n
+# mach(): all
+
+# This is a test for movw & movt instructions.
+# It emits hello world if movw & movt works appropriately.
+
+       .macro invalid
+# This is "undefined" but it's not properly decoded yet.
+       .word 0x07ffffff
+# This is stc which isn't recognized yet.
+       stc 0,cr0,[r0]
+       .endm
+
+       .global _start
+_start:
+# Run some simple insns to confirm the engine is at least working.
+       nop
+
+# Skip over output text.
+
+       bl skip_output
+
+hello_text:
+       .asciz "Hello, world.\n"
+
+       .p2align 2
+skip_output:
+       movw r4, #:lower16:hello_text
+       movt r4, #:upper16:hello_text
+
+output_next:
+# Output a character
+       mov r0,#3
+       mov r1,r4
+       swi #0x123456
+
+# Load next character, see if done.
+       add r4,r4,#1
+       sub r3,r3,r3
+       ldrb r5,[r4,r3]
+       teq r5,#0
+       bne output_next
+
+done:
+       mov r0,#0x18
+       ldr r1,exit_code
+       swi #0x123456
+
+# If that fails, try to die with an invalid insn.
+       invalid
+
+exit_code:
+       .word 0x20026