MIPS/opcodes: Correctly combine ASE flags for ASE_MIPS16E2_MT calculation

Correct a commit 25499ac7ee92 ("MIPS16e2: Add MIPS16e2 ASE support")
disassembler bug with the handling of the ASE_MIPS16E2_MT combination
ASE flag, where the calculation uses MIPS ABI Flags directly rather than
calculated internal ASE flags.  Consequently code does not correctly set
the ASE_MIPS16E2_MT flag when the MIPS16e2 ASE flag and the MT ASE flag
come from different sources, i.e. one from the BFD chosen and the other
one from MIPS ABI Flags.

Fix this by using internal ASE_MT and ASE_MIPS16E2 flags in a separate
subsequent step, factored out to a dedicated function for use with
future combination ASE flags.  Adjust the `mips16e2@mips16e2-mt-sub.d'
test case accordingly, where the MT flag comes from the BFD selected for
the disassembler and the MIPS16e2 flag comes from the ELF binary itself.

	opcodes/
	* mips-dis.c (mips_calculate_combination_ases): New function.
	(mips_convert_abiflags_ases): Factor out ASE_MIPS16E2_MT
	calculation to the new function.
	(set_default_mips_dis_options): Call the new function.

	gas/
	* testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: Adjust for the
	ASE_MIPS16E2_MT flag disassembler fix.
	* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d:
	Likewise.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 43a752841d8d2504efcd97e6dbfa0239bc52568c..d1529099480b48cc4e522860b5beb5765da9e52a 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,10 @@
+2017-06-29  Maciej W. Rozycki  <macro@imgtec.com>
+
+       * testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: Adjust for the
+       ASE_MIPS16E2_MT flag disassembler fix.
+       * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d:
+       Likewise.
+
 2017-06-29  Maciej W. Rozycki  <macro@imgtec.com>
 
        * config/tc-mips.c (mips_set_ase): Clear the ASE_MIPS16E2_MT

diff --git a/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d b/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d
index 85abe627ea96f9a90ccfce0a5bab1a0fd52f3d2b..b3a4146fb52f1ec7f4d9e9f0738811d5852df6f0 100644 (file)
--- a/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d
+++ b/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d
@@ -2,21 +2,4 @@
 #name: MIPS16e2 MT ASE subset disassembly
 #as: -32 -I$srcdir/$subdir
 #source: mips16e2-mt-sub.s
-
-.*: +file format .*mips.*
-
-Disassembly of section \.text:
-[0-9a-f]+ <[^>]*> f0c0 3010    ehb
-[0-9a-f]+ <[^>]*> f026 6701    dmt
-[0-9a-f]+ <[^>]*> f026 6701    dmt
-[0-9a-f]+ <[^>]*> f022 6741    dmt     v0
-[0-9a-f]+ <[^>]*> f027 6701    emt
-[0-9a-f]+ <[^>]*> f027 6701    emt
-[0-9a-f]+ <[^>]*> f023 6741    emt     v0
-[0-9a-f]+ <[^>]*> f026 6700    dvpe
-[0-9a-f]+ <[^>]*> f026 6700    dvpe
-[0-9a-f]+ <[^>]*> f022 6740    dvpe    v0
-[0-9a-f]+ <[^>]*> f027 6700    evpe
-[0-9a-f]+ <[^>]*> f027 6700    evpe
-[0-9a-f]+ <[^>]*> f023 6740    evpe    v0
-       \.\.\.
+#dump: mips16e2@mips16e2-mt-sub.d

diff --git a/gas/testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d b/gas/testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d
index a7498f6129705e743fd571461f6ffcbca8773482..85abe627ea96f9a90ccfce0a5bab1a0fd52f3d2b 100644 (file)
--- a/gas/testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d
+++ b/gas/testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d
@@ -7,28 +7,16 @@
 
 Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> f0c0 3010    ehb
-[0-9a-f]+ <[^>]*> f026         extend  0x26
-[0-9a-f]+ <[^>]*> 6701         move    s0,at
-[0-9a-f]+ <[^>]*> f026         extend  0x26
-[0-9a-f]+ <[^>]*> 6701         move    s0,at
-[0-9a-f]+ <[^>]*> f022         extend  0x22
-[0-9a-f]+ <[^>]*> 6741         move    v0,at
-[0-9a-f]+ <[^>]*> f027         extend  0x27
-[0-9a-f]+ <[^>]*> 6701         move    s0,at
-[0-9a-f]+ <[^>]*> f027         extend  0x27
-[0-9a-f]+ <[^>]*> 6701         move    s0,at
-[0-9a-f]+ <[^>]*> f023         extend  0x23
-[0-9a-f]+ <[^>]*> 6741         move    v0,at
-[0-9a-f]+ <[^>]*> f026         extend  0x26
-[0-9a-f]+ <[^>]*> 6700         move    s0,zero
-[0-9a-f]+ <[^>]*> f026         extend  0x26
-[0-9a-f]+ <[^>]*> 6700         move    s0,zero
-[0-9a-f]+ <[^>]*> f022         extend  0x22
-[0-9a-f]+ <[^>]*> 6740         move    v0,zero
-[0-9a-f]+ <[^>]*> f027         extend  0x27
-[0-9a-f]+ <[^>]*> 6700         move    s0,zero
-[0-9a-f]+ <[^>]*> f027         extend  0x27
-[0-9a-f]+ <[^>]*> 6700         move    s0,zero
-[0-9a-f]+ <[^>]*> f023         extend  0x23
-[0-9a-f]+ <[^>]*> 6740         move    v0,zero
+[0-9a-f]+ <[^>]*> f026 6701    dmt
+[0-9a-f]+ <[^>]*> f026 6701    dmt
+[0-9a-f]+ <[^>]*> f022 6741    dmt     v0
+[0-9a-f]+ <[^>]*> f027 6701    emt
+[0-9a-f]+ <[^>]*> f027 6701    emt
+[0-9a-f]+ <[^>]*> f023 6741    emt     v0
+[0-9a-f]+ <[^>]*> f026 6700    dvpe
+[0-9a-f]+ <[^>]*> f026 6700    dvpe
+[0-9a-f]+ <[^>]*> f022 6740    dvpe    v0
+[0-9a-f]+ <[^>]*> f027 6700    evpe
+[0-9a-f]+ <[^>]*> f027 6700    evpe
+[0-9a-f]+ <[^>]*> f023 6740    evpe    v0
        \.\.\.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 325cd8461eaa21b892bac22a4356fce427ccda05..e4b24705af2e153380335d2d1cc428e60b4733af 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,10 @@
+2017-06-29  Maciej W. Rozycki  <macro@imgtec.com>
+
+       * mips-dis.c (mips_calculate_combination_ases): New function.
+       (mips_convert_abiflags_ases): Factor out ASE_MIPS16E2_MT
+       calculation to the new function.
+       (set_default_mips_dis_options): Call the new function.
+
 2017-06-29  Anton Kolesov  <Anton.Kolesov@synopsys.com>
 
        * arc-dis.c (parse_disassembler_options): Use

diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index e19d59a703df28adfb768e13fc2509bc9152d6a0..588247a9bb47e999954e4f1bf7be8b3183474883 100644 (file)
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -805,12 +805,21 @@ mips_convert_abiflags_ases (unsigned long afl_ases)
     opcode_ases |= ASE_DSPR3;
   if (afl_ases & AFL_ASE_MIPS16E2)
     opcode_ases |= ASE_MIPS16E2;
-  if ((afl_ases & (AFL_ASE_MIPS16E2 | AFL_ASE_MT))
-      == (AFL_ASE_MIPS16E2 | AFL_ASE_MT))
-    opcode_ases |= ASE_MIPS16E2_MT;
   return opcode_ases;
 }
 
+/* Calculate combination ASE flags from regular ASE flags.  */
+
+static unsigned long
+mips_calculate_combination_ases (unsigned long opcode_ases)
+{
+  unsigned long combination_ases = 0;
+
+  if ((opcode_ases & (ASE_MIPS16E2 | ASE_MT)) == (ASE_MIPS16E2 | ASE_MT))
+    combination_ases |= ASE_MIPS16E2_MT;
+  return combination_ases;
+}
+
 static void
 set_default_mips_dis_options (struct disassemble_info *info)
 {
@@ -880,6 +889,7 @@ set_default_mips_dis_options (struct disassemble_info *info)
        mips_ase |= ASE_MDMX;
     }
 #endif
+  mips_ase |= mips_calculate_combination_ases (mips_ase);
 }
 
 static void