2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
authorTomer Levi <Tomer.Levi@nsc.com>
Mon, 25 Oct 2004 09:44:27 +0000 (09:44 +0000)
committerTomer Levi <Tomer.Levi@nsc.com>
Mon, 25 Oct 2004 09:44:27 +0000 (09:44 +0000)
* opcode/crx.h (operand_type): Remove redundant types i3, i4, i5, i8, i12.
Add new unsigned immediate types us3, us4, us5, us16.

include/ChangeLog
include/opcode/crx.h

index 53935eccf18a08f315f661096d836bd13e8a8211..48398d7b7ec67d81c1de80c65434fcbb2572d179 100644 (file)
@@ -1,3 +1,9 @@
+2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
+
+       * opcode/crx.h (operand_type): Remove redundant types i3, i4,
+       i5, i8, i12.
+       Add new unsigned immediate types us3, us4, us5, us16.
+
 2004-10-21  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR 463
index 58db2f8b3e4b5dbaaeed5362387a02f6f32a19e8..378d68673db2dfe149edef8c849e7fec4e03c04a 100644 (file)
@@ -136,12 +136,20 @@ argtype;
 typedef enum
   {
     dummy, cst4, disps9,
-    i3, i4, i5, i8, i12, i16, i32,
+    /* Immediate operands.  */
+    i16, i32,
+    /* Unsigned immediate operands.  */
+    us3, us4, us5, us16,
+    /* Signed displacement operands.  */
     d5, d9, d17, d25, d33,
+    /* Absolute operands.  */
     abs16, abs32,
+    /* Register relative operands.  */
     rbase, rbase_cst4,
     rbase_dispu8, rbase_dispu12, rbase_dispu16, rbase_dispu28, rbase_dispu32,
+    /* Index operands.  */
     rbase_ridx_scl2_dispu6, rbase_ridx_scl2_dispu22,
+    /* Register and processor register operands.  */
     regr, regr8, copregr,copregr8,copsregr,
     /* Not an operand.  */
     nulloperand,
@@ -390,7 +398,5 @@ extern const inst *instruction;
 /* Replace all appearances of 'long long int' with LONGLONG.  */
 typedef long long int LONGLONG;
 typedef unsigned long long ULONGLONG;
-/* A mask for the upper 31 bits of a 64 bits type.  */
-#define UPPER31_MASK   0xFFFFFFFE00000000LL
 
 #endif /* _CRX_H_ */
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