* ppc/altivec.igen (vperm): Latch inputs into temporaries.

diff --git a/sim/ChangeLog b/sim/ChangeLog
index ea3b30693369c040cd7d8b02de31ca46c58c28fe..521ccfb5e35a4af9c74223b32447a13bdb52a24d 100644 (file)
--- a/sim/ChangeLog
+++ b/sim/ChangeLog
@@ -1,3 +1,7 @@
+2008-05-09  Olivier Hainque  <hainque@adacore.com>
+
+       * ppc/altivec.igen (vperm): Latch inputs into temporaries.
+
 2008-03-25  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 
        * MAINTAINERS: Add myself as maintainer of cr16 port.

diff --git a/sim/ppc/altivec.igen b/sim/ppc/altivec.igen
index d933f569eb83c0e28063edd763b7a0f1f42bbb6c..3a224cc016c53d61146b5d175883d2bb86fa0e3c 100644 (file)
--- a/sim/ppc/altivec.igen
+++ b/sim/ppc/altivec.igen
@@ -1634,12 +1634,17 @@ unsigned32::model-function::altivec_unsigned_saturate_32:signed64 val, int *sat
 
 0.4,6.VS,11.VA,16.VB,21.VC,26.43:VX:av:vperm %VD, %VA, %VB, %VC:Vector Permute
        int i, who;
+       /* The permutation vector might have us read into the source vectors
+          back at positions before the iteration index, so we must latch the
+          sources to prevent early-clobbering in case the destination vector
+          is the same as one of them.  */
+       vreg myvA = (*vA), myvB = (*vB);
        for (i = 0; i < 16; i++) {
          who = (*vC).b[AV_BINDEX(i)] & 0x1f;
          if (who & 0x10)
-           (*vS).b[AV_BINDEX(i)] = (*vB).b[AV_BINDEX(who & 0xf)];
+           (*vS).b[AV_BINDEX(i)] = myvB.b[AV_BINDEX(who & 0xf)];
          else
-           (*vS).b[AV_BINDEX(i)] = (*vA).b[AV_BINDEX(who & 0xf)];
+           (*vS).b[AV_BINDEX(i)] = myvA.b[AV_BINDEX(who & 0xf)];
        }
        PPC_INSN_VR(VS_BITMASK, VA_BITMASK | VB_BITMASK | VC_BITMASK);