Improve warning message for $0 constraint on MIPSR6 branches

gas/
	* config/tc-mips.c (match_non_zero_reg_operand): Update
	warning message.
	* testsuite/gas/mips/r6-branch-constraints.l: Likewise.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 922ffebcc0f7bc40100d87b036d04895d0e523c9..5488ef21dfe7397522d29de5b08415de46261601 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2019-04-18  Matthew Fortune  <matthew.fortune@mips.com>
+
+       * config/tc-mips.c (match_non_zero_reg_operand): Update
+       warning message.
+       * testsuite/gas/mips/r6-branch-constraints.l: Likewise.
+
 2019-04-18  Jozef Lawrynowicz  <jozef.l@mittosystems.com>
 
        * config/tc-msp430.c (msp430_make_init_symbols): Define

diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 94141e937ea5ff9c3f3430d4beed62000ac059c3..f3e33410d7fa1f50866df539e18178ea82652f95 100644 (file)
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -6014,7 +6014,10 @@ match_non_zero_reg_operand (struct mips_arg_info *arg,
     return FALSE;
 
   if (regno == 0)
-    return FALSE;
+    {
+      set_insn_error (arg->argnum, _("the source register must not be $0"));
+      return FALSE;
+    }
 
   arg->last_regno = regno;
   insn_insert_operand (arg->insn, operand, regno);

diff --git a/gas/testsuite/gas/mips/r6-branch-constraints.l b/gas/testsuite/gas/mips/r6-branch-constraints.l
index 819a09a8a06d66fa1440b7207864e08e352c6a8f..bdeea9f160c0bcc3cdcdae3022c86adea00791f7 100644 (file)
--- a/gas/testsuite/gas/mips/r6-branch-constraints.l
+++ b/gas/testsuite/gas/mips/r6-branch-constraints.l
@@ -1,25 +1,25 @@
 .*: Assembler messages:
-.*:2: Error: invalid operands `blezc \$0,.'
+.*:2: Error: the source register must not be \$0 `blezc \$0,.'
 .*:3: Error: the source register must not be \$0 `bgezc \$0,.'
-.*:4: Error: invalid operands `bgtzc \$0,.'
+.*:4: Error: the source register must not be \$0 `bgtzc \$0,.'
 .*:5: Error: the source register must not be \$0 `bltzc \$0,.'
-.*:6: Error: invalid operands `beqzc \$0,.'
-.*:7: Error: invalid operands `bnezc \$0,.'
-.*:8: Error: invalid operands `bgec \$0,\$2,.'
+.*:6: Error: the source register must not be \$0 `beqzc \$0,.'
+.*:7: Error: the source register must not be \$0 `bnezc \$0,.'
+.*:8: Error: the source register must not be \$0 `bgec \$0,\$2,.'
 .*:9: Error: invalid operands `bgec \$2,\$0,.'
 .*:10: Error: invalid operands `bgec \$2,\$2,.'
-.*:11: Error: invalid operands `bgeuc \$0,\$2,.'
+.*:11: Error: the source register must not be \$0 `bgeuc \$0,\$2,.'
 .*:12: Error: invalid operands `bgeuc \$2,\$0,.'
 .*:13: Error: invalid operands `bgeuc \$2,\$2,.'
-.*:14: Error: invalid operands `bltc \$0,\$2,.'
+.*:14: Error: the source register must not be \$0 `bltc \$0,\$2,.'
 .*:15: Error: invalid operands `bltc \$2,\$0,.'
 .*:16: Error: invalid operands `bltc \$2,\$2,.'
-.*:17: Error: invalid operands `bltuc \$0,\$2,.'
+.*:17: Error: the source register must not be \$0 `bltuc \$0,\$2,.'
 .*:18: Error: invalid operands `bltuc \$2,\$0,.'
 .*:19: Error: invalid operands `bltuc \$2,\$2,.'
-.*:20: Error: invalid operands `beqc \$0,\$2,.'
+.*:20: Error: the source register must not be \$0 `beqc \$0,\$2,.'
 .*:21: Error: invalid operands `beqc \$2,\$0,.'
 .*:22: Error: invalid operands `beqc \$2,\$2,.'
-.*:23: Error: invalid operands `bnec \$0,\$2,.'
+.*:23: Error: the source register must not be \$0 `bnec \$0,\$2,.'
 .*:24: Error: invalid operands `bnec \$2,\$0,.'
 .*:25: Error: invalid operands `bnec \$2,\$2,.'