2002-03-05 Chris Demetriou <cgd@broadcom.com>

        * mips.igen: Fix formatting of all SignalException calls.

diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 7d3eb9bd8d4fee71d5ee2f127e6f71a05a9d930c..c6075ea2f68b32b13b61bfd7f0e955b5098d818c 100644 (file)
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,7 @@
+2002-03-05  Chris Demetriou  <cgd@broadcom.com>
+
+       * mips.igen: Fix formatting of all SignalException calls.
+
 2002-02-05  Chris Demetriou  <cgd@broadcom.com>
 
        * sim-main.h (SIGNEXTEND): Remove.

diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index da55b8c069c27d45a360e380b945f6f279097da6..9b20a6bcf44fec69a761dcba7469027a4a836ccf 100644 (file)
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -825,14 +825,14 @@
         PC = cia - 4; /* reference the branch instruction */
       else
         PC = cia;
-      SignalException(BreakPoint, instruction_0);
+      SignalException (BreakPoint, instruction_0);
     }
 
   else
     {
       /* If we get this far, we're not an instruction reserved by the sim.  Raise
         the exception. */
-      SignalException(BreakPoint, instruction_0);
+      SignalException (BreakPoint, instruction_0);
     }
 }
 
@@ -2746,7 +2746,7 @@
 *vr5000:
 *r3900:
 {
-  SignalException(SystemCall, instruction_0);
+  SignalException (SystemCall, instruction_0);
 }
 
 
@@ -2760,7 +2760,7 @@
 *vr5000:
 {
   if ((signed_word) GPR[RS] == (signed_word) GPR[RT])
-    SignalException(Trap, instruction_0);
+    SignalException (Trap, instruction_0);
 }
 
 
@@ -2774,7 +2774,7 @@
 *vr5000:
 {
   if ((signed_word) GPR[RS] == (signed_word) EXTEND16 (IMMEDIATE))
-    SignalException(Trap, instruction_0);
+    SignalException (Trap, instruction_0);
 }
 
 
@@ -2788,7 +2788,7 @@
 *vr5000:
 {
   if ((signed_word) GPR[RS] >= (signed_word) GPR[RT])
-    SignalException(Trap, instruction_0);
+    SignalException (Trap, instruction_0);
 }
 
 
@@ -2802,7 +2802,7 @@
 *vr5000:
 {
   if ((signed_word) GPR[RS] >= (signed_word) EXTEND16 (IMMEDIATE))
-    SignalException(Trap, instruction_0);
+    SignalException (Trap, instruction_0);
 }
 
 
@@ -2816,7 +2816,7 @@
 *vr5000:
 {
   if ((unsigned_word) GPR[RS] >= (unsigned_word) EXTEND16 (IMMEDIATE))
-    SignalException(Trap, instruction_0);
+    SignalException (Trap, instruction_0);
 }
 
 
@@ -2830,7 +2830,7 @@
 *vr5000:
 {
   if ((unsigned_word) GPR[RS] >= (unsigned_word) GPR[RT])
-    SignalException(Trap, instruction_0);
+    SignalException (Trap, instruction_0);
 }
 
 
@@ -2844,7 +2844,7 @@
 *vr5000:
 {
   if ((signed_word) GPR[RS] < (signed_word) GPR[RT])
-    SignalException(Trap, instruction_0);
+    SignalException (Trap, instruction_0);
 }
 
 
@@ -2858,7 +2858,7 @@
 *vr5000:
 {
   if ((signed_word) GPR[RS] < (signed_word) EXTEND16 (IMMEDIATE))
-    SignalException(Trap, instruction_0);
+    SignalException (Trap, instruction_0);
 }
 
 
@@ -2872,7 +2872,7 @@
 *vr5000:
 {
   if ((unsigned_word) GPR[RS] < (unsigned_word) EXTEND16 (IMMEDIATE))
-    SignalException(Trap, instruction_0);
+    SignalException (Trap, instruction_0);
 }
 
 
@@ -2886,7 +2886,7 @@
 *vr5000:
 {
   if ((unsigned_word) GPR[RS] < (unsigned_word) GPR[RT])
-    SignalException(Trap, instruction_0);
+    SignalException (Trap, instruction_0);
 }
 
 
@@ -2900,7 +2900,7 @@
 *vr5000:
 {
   if ((signed_word) GPR[RS] != (signed_word) GPR[RT])
-    SignalException(Trap, instruction_0);
+    SignalException (Trap, instruction_0);
 }
 
 
@@ -2914,7 +2914,7 @@
 *vr5000:
 {
   if ((signed_word) GPR[RS] != (signed_word) EXTEND16 (IMMEDIATE))
-    SignalException(Trap, instruction_0);
+    SignalException (Trap, instruction_0);
 }
 
 
@@ -3380,7 +3380,7 @@
   check_fpu (SD_);
   {
     if ((fmt == fmt_double) | 0)
-      SignalException(ReservedInstruction,instruction_0);
+      SignalException (ReservedInstruction, instruction_0);
     else
       StoreFPR(FD,fmt_double,Convert(GETRM(),ValueFPR(FS,fmt),fmt,fmt_double));
   }
@@ -3400,7 +3400,7 @@
   check_fpu (SD_);
   {
     if ((fmt == fmt_long) | ((fmt == fmt_long) || (fmt == fmt_word)))
-      SignalException(ReservedInstruction,instruction_0);
+      SignalException (ReservedInstruction, instruction_0);
     else
       StoreFPR(FD,fmt_long,Convert(GETRM(),ValueFPR(FS,fmt),fmt,fmt_long));
   }
@@ -3425,7 +3425,7 @@
   check_fpu (SD_);
   {
     if ((fmt == fmt_single) | 0)
-      SignalException(ReservedInstruction,instruction_0);
+      SignalException (ReservedInstruction, instruction_0);
     else
       StoreFPR(FD,fmt_single,Convert(GETRM(),ValueFPR(FS,fmt),fmt,fmt_single));
   }
@@ -3447,7 +3447,7 @@
   check_fpu (SD_);
   {
     if ((fmt == fmt_word) | ((fmt == fmt_long) || (fmt == fmt_word)))
-      SignalException(ReservedInstruction,instruction_0);
+      SignalException (ReservedInstruction, instruction_0);
     else
       StoreFPR(FD,fmt_word,Convert(GETRM(),ValueFPR(FS,fmt),fmt,fmt_word));
   }