sim: bfin: unify se_all helpers more

Now that we have the se_all helpers together and working, we can see
what pieces are duplicated in each test and unify them in the common
header file.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

diff --git a/sim/testsuite/sim/bfin/ChangeLog b/sim/testsuite/sim/bfin/ChangeLog
index fa3aa11829b7477f43a8a705da07ae7997019bfc..4efd6d39c7e8820c0ac2f3e0293fb1603263e6c9 100644 (file)
--- a/sim/testsuite/sim/bfin/ChangeLog
+++ b/sim/testsuite/sim/bfin/ChangeLog
@@ -1,3 +1,25 @@
+2012-04-08  Mike Frysinger  <vapier@gentoo.org>
+
+       * se_all16bitopcodes.S (SE_ALL_BITS): Define to 16.
+       (SE_ALL_NEW_INSN_STUB): Define.
+       (se_all_load_table): Delete.
+       (se_all_new_insn_log): Likewise.
+       * se_all32bitopcodes.S: Add more details on slowness.
+       (SE_ALL_BITS): Define to 13.
+       (se_all_load_table): Delete.
+       (se_all_new_insn_stub, se_all_new_insn_log): Likewise.
+       * se_all64bitg0opcodes.S: Add more details on slowness.
+       (se_all_new_insn_stub): Delete.
+       * se_all64bitg1opcodes.S: See mach to bfin.
+       (se_all_new_insn_stub): Delete.
+       * se_all64bitg2opcodes.S: See mach to bfin.
+       (se_all_new_insn_stub): Delete.
+       * se_allopcodes.h (LOAD_PFX): Define based on SE_ALL_BITS.
+       (se_all_new_16bit_insn_log, se_all_new_32bit_insn_log): Unify
+       into new se_all_new_insn_log helper.
+       (se_all_load_table): New helper.
+       (se_all_new_insn_stub): Likewise.
+
 2012-03-25  Mike Frysinger  <vapier@gentoo.org>
 
        * c_dsp32mac_dr_a1a0.s: Change 0x12efbc5569 to 0xefbc5569.

diff --git a/sim/testsuite/sim/bfin/se_all16bitopcodes.S b/sim/testsuite/sim/bfin/se_all16bitopcodes.S
index 6a6d76c27ea0a4b0a200e9e1ec1e374e732f2985..042621e3ef0bc02cf18cefe5644f04c34fa5c162 100644 (file)
--- a/sim/testsuite/sim/bfin/se_all16bitopcodes.S
+++ b/sim/testsuite/sim/bfin/se_all16bitopcodes.S
@@ -12,6 +12,9 @@
 # sim: --environment operating
 
 #include "test.h"
+
+#define SE_ALL_BITS 16
+#define SE_ALL_NEW_INSN_STUB
 #include "se_allopcodes.h"
        .include "testutils.inc"
 
@@ -19,11 +22,6 @@
        R2 = W[P5];
        R0 = R2;
 .endm
-.macro se_all_load_table
-       R7 = W[P1++];
-       R6 = W[P1++];
-       R5 = W[P1++];
-.endm
 
 .macro se_all_next_insn
        /* increment, and go again. */
@@ -41,9 +39,6 @@
 .macro se_all_new_insn_stub
        jump _legal_instruction;
 .endm
-.macro se_all_new_insn_log
-       se_all_new_16bit_insn_log
-.endm
 
 .macro se_all_insn_init
        .dw 0x0000;

diff --git a/sim/testsuite/sim/bfin/se_all32bitopcodes.S b/sim/testsuite/sim/bfin/se_all32bitopcodes.S
index 90b1ff6b4c98374b19ee156e8c1fab9961ec39eb..6178e529d3047b2d60b56245968bd78c82ceeaa8 100644 (file)
--- a/sim/testsuite/sim/bfin/se_all32bitopcodes.S
+++ b/sim/testsuite/sim/bfin/se_all32bitopcodes.S
@@ -8,12 +8,16 @@
  * and walk every instruction from 0x00000000 to 0xffffffff (and have 0xc000 set)
  */
 
-# don't try to run normally as it takes way too long in sim
+# Don't want to enable for normal `make check` as it takes way too long in
+# the sim -- executes over 3 billion insns, and even at 10 MIPS, that's 10+
+# minutes :(.  Useful for directed testing, but that's about it.
 # mach: none
 # sim: --environment operating
 # xfail: too many invalid insns are decoded as valid
 
 #include "test.h"
+
+#define SE_ALL_BITS 32
 #include "se_allopcodes.h"
        .include "testutils.inc"
 
@@ -23,11 +27,6 @@
        R1 = R2 >> 16;
        R0 = R0 | R1;
 .endm
-.macro se_all_load_table
-       R7 = [P1++];
-       R6 = [P1++];
-       R5 = [P1++];
-.endm
 
 .macro se_all_next_insn
        /* increment, and go again. */
@@ -68,13 +67,6 @@
        [P5] = R0;
 .endm
 
-.macro se_all_new_insn_stub
-       jump fail_lvl;
-.endm
-.macro se_all_new_insn_log
-       se_all_new_32bit_insn_log
-.endm
-
 .macro se_all_insn_init
        .dw 0xc000;
        .dw 0x0000;

diff --git a/sim/testsuite/sim/bfin/se_all64bitg0opcodes.S b/sim/testsuite/sim/bfin/se_all64bitg0opcodes.S
index dee80378361abeaccb8145a2493889669044df0b..9e08afe5cbcef18bcd7e255d4d639a04f403b450 100644 (file)
--- a/sim/testsuite/sim/bfin/se_all64bitg0opcodes.S
+++ b/sim/testsuite/sim/bfin/se_all64bitg0opcodes.S
@@ -7,7 +7,9 @@
  * (and have 0x8000000 set)
  */
 
-# don't try to run normally as it takes way too long in sim
+# Don't want to enable for normal `make check` as it takes way too long in
+# the sim -- executes over 3 billion insns, and even at 10 MIPS, that's 10+
+# minutes :(.  Useful for directed testing, but that's about it.
 # mach: none
 # sim: --environment operating
 # xfail: too many invalid insns are decoded as valid
@@ -64,10 +66,6 @@
        [P5] = R0;
 .endm
 
-.macro se_all_new_insn_stub
-       jump fail_lvl;
-.endm
-
 .macro se_all_insn_init
        .dw 0xc800;     /* 32bit */
        .dw 0x0000;     /* insn */

diff --git a/sim/testsuite/sim/bfin/se_all64bitg1opcodes.S b/sim/testsuite/sim/bfin/se_all64bitg1opcodes.S
index ec4d1453e4fde7f8b2ada389e616c7053daee129..b3b47f8e13411676b7f0183a8cf6b68ce5fbb956 100644 (file)
--- a/sim/testsuite/sim/bfin/se_all64bitg1opcodes.S
+++ b/sim/testsuite/sim/bfin/se_all64bitg1opcodes.S
@@ -6,7 +6,7 @@
  * and walk every instruction from 0x0000 to 0xffff
  */
 
-# mach: none
+# mach: bfin
 # sim: --environment operating
 # xfail: wrong excause (0x21 instead of 0x22)
 
@@ -34,10 +34,6 @@
        W[P5 + 4] = R0;
 .endm
 
-.macro se_all_new_insn_stub
-       jump fail_lvl;
-.endm
-
 .macro se_all_insn_init
        MNOP || NOP || NOP;
 .endm

diff --git a/sim/testsuite/sim/bfin/se_all64bitg2opcodes.S b/sim/testsuite/sim/bfin/se_all64bitg2opcodes.S
index 68c16c696822bbf8f419fd5bd72b0dbfc927346b..6ec8aec95319274ae9d307a927da68c1ad57afa5 100644 (file)
--- a/sim/testsuite/sim/bfin/se_all64bitg2opcodes.S
+++ b/sim/testsuite/sim/bfin/se_all64bitg2opcodes.S
@@ -6,7 +6,7 @@
  * and walk every instruction from 0x0000 to 0xffff
  */
 
-# mach: none
+# mach: bfin
 # sim: --environment operating
 # xfail: wrong excause (0x21 instead of 0x22)
 
@@ -34,10 +34,6 @@
        W[P5 + 6] = R0;
 .endm
 
-.macro se_all_new_insn_stub
-       jump fail_lvl;
-.endm
-
 .macro se_all_insn_init
        MNOP || NOP || NOP;
 .endm

diff --git a/sim/testsuite/sim/bfin/se_allopcodes.h b/sim/testsuite/sim/bfin/se_allopcodes.h
index 2e4567373d3f3c954681675685e5ef4b5cf07382..7ff8d2b9fa0b55d1e6877236de8b06314128386e 100644 (file)
--- a/sim/testsuite/sim/bfin/se_allopcodes.h
+++ b/sim/testsuite/sim/bfin/se_allopcodes.h
@@ -10,6 +10,14 @@
        b0 = r0; b1 = r0; b2 = r0; b3 = r0;
 .endm
 
+#if SE_ALL_BITS == 32
+# define LOAD_PFX
+#elif SE_ALL_BITS == 16
+# define LOAD_PFX W
+#else
+# error "Please define SE_ALL_BITS"
+#endif
+
 /*
  * execute a test of an opcode space.  host test
  * has to fill out a number of callbacks.
@@ -176,36 +184,39 @@ _table:
 _table_end:
 .endm
 
-.macro se_all_new_16bit_insn_log
-.ifdef BFIN_JTAG_xxxxx
-       R1 = R0;
-       R0 = 0x4;
-       call __emu_out;
-       R0 = R1 << 16;
-       R0 = R0 | R3;
-       call __emu_out;
-.else
-       loadsym P0, _next_location;
-       P1 = [P0];
-       W[P1++] = R0;
-       W[P1++] = R3;
-       [P0] = P1;
-.endif
+.macro se_all_load_table
+       R7 = LOAD_PFX[P1++];
+       R6 = LOAD_PFX[P1++];
+       R5 = LOAD_PFX[P1++];
+.endm
+
+#ifndef SE_ALL_NEW_INSN_STUB
+.macro se_all_new_insn_stub
+       jump fail_lvl;
 .endm
-.macro se_all_new_32bit_insn_log
+#endif
+
+.macro se_all_new_insn_log
 .ifdef BFIN_JTAG_xxxxx
        R1 = R0;
+#if SE_ALL_BITS == 32
        R0 = 0x8;
        call __emu_out;
        R0 = R1;
        call __emu_out;
        R0 = R3;
+#else
+       R0 = 0x4;
+       call __emu_out;
+       R0 = R1 << 16;
+       R0 = R0 | R3;
+#endif
        call __emu_out;
 .else
        loadsym P0, _next_location;
        P1 = [P0];
-       [P1++] = R0;
-       [P1++] = R3;
+       LOAD_PFX[P1++] = R0;
+       LOAD_PFX[P1++] = R3;
        [P0] = P1;
 .endif
 .endm