* doc/as.texinfo (Target TIC6X options): Don't mention "-matomic".
* doc/c-tic6x.texi (TIC6X Directives): Don't mention ".atomic".
(TIC6X Options): Don't mention "-matomic".
* config/tc-tic6x.c (OPTION_MATOMIC, OPTION_MNO_ATOMIC): Delete.
(md_longopts): Remove corresponding entries.
(md_parse_option): Don't handle them.
(md_show_usage): Don't document them.
(tic6x_atomic): Delete variable.
(tic6x_update_features): Always copy tic6x_arch_enable to
tic6x_features.
(tic6x_arch_enable): Remove references to TIC6X_INSN_ATOMIC.
(s_tic6x_atomic, s_tic6x_noatomic): Remove functions.
(md_pseudo_table): Remove ".atomic" and ".noatomic".
gas/testsuite/
* gas/tic6x/dir-junk.l: Remove tests for .atomic and .noatomic.
* gas/tic6x/dir-junk.s: Likewise.
* gas/tic6x/insns-c674x-bad.d: Remove test.
* gas/tic6x/insns-c674x-bad.l: Likewise.
* gas/tic6x/insns-atomic.d: Remove "-matomic" switch.
include/opcode/
* tic6x-opcode-table.h (cmtl, ll, sl): Available on C64XP.
* tic6x.h (TIC6X_INSN_ATOMIC): Remove.
+2011-02-04 Bernd Schmidt <bernds@codesourcery.com>
+
+ * doc/as.texinfo (Target TIC6X options): Don't mention "-matomic".
+ * doc/c-tic6x.texi (TIC6X Directives): Don't mention ".atomic".
+ (TIC6X Options): Don't mention "-matomic".
+ * config/tc-tic6x.c (OPTION_MATOMIC, OPTION_MNO_ATOMIC): Delete.
+ (md_longopts): Remove corresponding entries.
+ (md_parse_option): Don't handle them.
+ (md_show_usage): Don't document them.
+ (tic6x_atomic): Delete variable.
+ (tic6x_update_features): Always copy tic6x_arch_enable to
+ tic6x_features.
+ (tic6x_arch_enable): Remove references to TIC6X_INSN_ATOMIC.
+ (s_tic6x_atomic, s_tic6x_noatomic): Remove functions.
+ (md_pseudo_table): Remove ".atomic" and ".noatomic".
+
2011-01-31 Nick Clifton <nickc@redhat.com>
* write.c (write_contents): Include output file name and bfd error
/* TI C6X assembler.
- Copyright 2010
+ Copyright 2010, 2011
Free Software Foundation, Inc.
Contributed by Joseph Myers <joseph@codesourcery.com>
Bernd Schmidt <bernds@codesourcery.com>
enum
{
OPTION_MARCH = OPTION_MD_BASE,
- OPTION_MATOMIC,
- OPTION_MNO_ATOMIC,
OPTION_MBIG_ENDIAN,
OPTION_MLITTLE_ENDIAN,
OPTION_MDSBT,
struct option md_longopts[] =
{
{ "march", required_argument, NULL, OPTION_MARCH },
- { "matomic", no_argument, NULL, OPTION_MATOMIC },
- { "mno-atomic", no_argument, NULL, OPTION_MNO_ATOMIC },
{ "mbig-endian", no_argument, NULL, OPTION_MBIG_ENDIAN },
{ "mlittle-endian", no_argument, NULL, OPTION_MLITTLE_ENDIAN },
{ "mdsbt", no_argument, NULL, OPTION_MDSBT },
};
size_t md_longopts_size = sizeof (md_longopts);
-/* Whether to enable atomic instructions. 1 to enable them, 0 to
- disable, -1 to default from architecture. */
-static int tic6x_atomic = -1;
-
/* The instructions enabled based only on the selected architecture
- (all instructions, if no architecture specified). Atomic
- instructions may be enabled or disabled separately. */
+ (all instructions, if no architecture specified). */
static unsigned short tic6x_arch_enable = (TIC6X_INSN_C62X
| TIC6X_INSN_C64X
| TIC6X_INSN_C64XP
| TIC6X_INSN_C67X
| TIC6X_INSN_C67XP
- | TIC6X_INSN_C674X
- | TIC6X_INSN_ATOMIC);
+ | TIC6X_INSN_C674X);
/* The instructions enabled based on the current set of features
(architecture, as modified by other options). */
tic6x_use_arch (arg);
break;
- case OPTION_MATOMIC:
- tic6x_atomic = 1;
- break;
-
- case OPTION_MNO_ATOMIC:
- tic6x_atomic = 0;
- break;
-
case OPTION_MBIG_ENDIAN:
target_big_endian = 1;
break;
fputc ('\n', stream);
fprintf (stream, _("TMS320C6000 options:\n"));
fprintf (stream, _(" -march=ARCH enable instructions from architecture ARCH\n"));
- fprintf (stream, _(" -matomic enable atomic operation instructions\n"));
- fprintf (stream, _(" -mno-atomic disable atomic operation instructions\n"));
fprintf (stream, _(" -mbig-endian generate big-endian code\n"));
fprintf (stream, _(" -mlittle-endian generate little-endian code\n"));
fprintf (stream, _(" -mdsbt code uses DSBT addressing\n"));
static void
tic6x_update_features (void)
{
- switch (tic6x_atomic)
- {
- case -1:
- tic6x_features = tic6x_arch_enable;
- break;
-
- case 0:
- tic6x_features = tic6x_arch_enable & ~TIC6X_INSN_ATOMIC;
- break;
-
- case 1:
- tic6x_features = tic6x_arch_enable | TIC6X_INSN_ATOMIC;
- break;
-
- default:
- abort ();
- }
+ tic6x_features = tic6x_arch_enable;
tic6x_num_registers
= (tic6x_arch_enable & (TIC6X_INSN_C64X | TIC6X_INSN_C67XP)) ? 32 : 16;
demand_empty_rest_of_line ();
}
-/* Parse a .atomic directive. */
-
-static void
-s_tic6x_atomic (int ignored ATTRIBUTE_UNUSED)
-{
- tic6x_atomic = 1;
- tic6x_update_features ();
- demand_empty_rest_of_line ();
-}
-
-/* Parse a .noatomic directive. */
-
-static void
-s_tic6x_noatomic (int ignored ATTRIBUTE_UNUSED)
-{
- tic6x_atomic = 0;
- tic6x_update_features ();
- demand_empty_rest_of_line ();
-}
-
/* Parse a .nocmp directive. */
static void
const pseudo_typeS md_pseudo_table[] =
{
{ "arch", s_tic6x_arch, 0 },
- { "atomic", s_tic6x_atomic, 0 },
{ "c6xabi_attribute", s_tic6x_c6xabi_attribute, 0 },
- { "noatomic", s_tic6x_noatomic, 0 },
{ "nocmp", s_tic6x_nocmp, 0 },
{ "word", cons, 4 },
{ 0, 0, 0 }
@ifset TIC6X
@emph{Target TIC6X options:}
- [@b{-march=@var{arch}}] [@b{-matomic}|@b{-mno-atomic}]
- [@b{-mbig-endian}|@b{-mlittle-endian}] [@b{-mdsbt}|@b{-mno-dsbt}]
- [@b{-mpid=no}|@b{-mpid=near}|@b{-mpid=far}] [@b{-mpic}|@b{-mno-pic}]
+ [@b{-march=@var{arch}}] [@b{-mbig-endian}|@b{-mlittle-endian}]
+ [@b{-mdsbt}|@b{-mno-dsbt}] [@b{-mpid=no}|@b{-mpid=near}|@b{-mpid=far}]
+ [@b{-mpic}|@b{-mno-pic}]
@end ifset
@ifset XTENSA
The following values of @var{arch} are accepted: @code{c62x},
@code{c64x}, @code{c64x+}, @code{c67x}, @code{c67x+}, @code{c674x}.
-@cindex @code{-matomic} command line option, TIC6X
-@cindex @code{-mno-atomic} command line option, TIC6X
-@item -matomic
-@itemx -mno-atomic
-Enable or disable the optional C64x+ atomic operation instructions.
-By default, they are enabled if no @option{-march} option is given, or
-if an architecture is specified with @option{-march} that implies
-these instructions are present (currently, there are no such
-architectures); they are disabled if an architecture is specified with
-@option{-march} on which the instructions are optional or not
-present. This option overrides such a default from the architecture,
-independent of the order in which the @option{-march} or
-@option{-matomic} or @option{-mno-atomic} options are passed.
-
@cindex @code{-mdsbt} command line option, TIC6X
@cindex @code{-mno-dsbt} command line option, TIC6X
@item -mdsbt
@item .arch @var{arch}
This has the same effect as @option{-march=@var{arch}}.
-@cindex @code{.atomic} directive, TIC6X
-@cindex @code{.noatomic} directive, TIC6X
-@item .atomic
-@itemx .noatomic
-These have the same effects as @option{-matomic} and
-@option{-mno-atomic}.
-
@cindex @code{.c6xabi_attribute} directive, TIC6X
@item .c6xabi_attribute @var{tag}, @var{value}
Set the C6000 EABI build attribute @var{tag} to @var{value}.
+2011-02-04 Bernd Schmidt <bernds@codesourcery.com>
+
+ * gas/tic6x/dir-junk.l: Remove tests for .atomic and .noatomic.
+ * gas/tic6x/dir-junk.s: Likewise.
+ * gas/tic6x/insns-c674x-bad.d: Remove test.
+ * gas/tic6x/insns-c674x-bad.l: Likewise.
+ * gas/tic6x/insns-c674x-bad.s: Likewise.
+ * gas/tic6x/insns-atomic.d: Remove "-matomic" switch.
+
2011-01-31 Nick Clifton <nickc@redhat.com>
* gas/all/align.d: Skip for the RX.
[^:]*: Assembler messages:
[^:]*:2: Error: junk at end of line, first unrecognized character is `c'
-[^:]*:3: Error: junk at end of line, first unrecognized character is `f'
-[^:]*:6: Error: junk at end of line, first unrecognized character is `b'
-[^:]*:7: Error: junk at end of line, first unrecognized character is `x'
+[^:]*:3: Error: junk at end of line, first unrecognized character is `x'
.arch c64x
.arch c64x c64x
-.atomic foo
-.atomic ; comment OK
-.noatomic
-.noatomic bar
.nocmp x
#objdump: -dr --prefix-addresses --show-raw-insn
#name: C6X atomic instructions
-#as: -march=c674x -matomic -mlittle-endian
+#as: -march=c674x -mlittle-endian
.*: *file format elf32-tic6x-le
+++ /dev/null
-#name: C674x bad instructions
-#as: -march=c674x
-#error-output: insns-c674x-bad.l
+++ /dev/null
-[^:]*: Assembler messages:
-[^:]*:6: Error: 'cmtl' instruction not supported on this architecture
-[^:]*:7: Error: 'll' instruction not supported on this architecture
-[^:]*:8: Error: 'sl' instruction not supported on this architecture
-[^:]*:14: Error: 'cmtl' instruction not supported on this architecture
-[^:]*:15: Error: 'll' instruction not supported on this architecture
-[^:]*:16: Error: 'sl' instruction not supported on this architecture
+++ /dev/null
-# Test instructions not present on C674x.
-.text
-.nocmp
-.globl f
-f:
- cmtl .D2T2 *b0,b1
- ll .D2T2 *b0,b1
- sl .D2T2 b0,*b1
-.atomic
- cmtl .D2T2 *b0,b1
- ll .D2T2 *b0,b1
- sl .D2T2 b0,*b1
-.noatomic
- cmtl .D2T2 *b0,b1
- ll .D2T2 *b0,b1
- sl .D2T2 b0,*b1
+2011-02-04 Bernd Schmidt <bernds@codesourcery.com>
+
+ * tic6x-opcode-table.h (cmtl, ll, sl): Available on C64XP.
+ * tic6x.h (TIC6X_INSN_ATOMIC): Remove.
+
2010-12-31 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
PR gas/11395
/* TI C6X opcode table.
- Copyright 2010
+ Copyright 2010, 2011
Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0),
ENC(src2, reg, 1), ENC(dst, reg, 2)))
-INSN(cmtl, d, 1_or_2_src, load, ATOMIC,
+INSN(cmtl, d, 1_or_2_src, load, C64XP,
TIC6X_FLAG_LOAD|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_SIDE_T2_ONLY|TIC6X_FLAG_NO_CROSS,
FIX3(FIX(s, 1), FIX(op, 0xe), FIX(src1, 0)),
OP2(ORMEMDW, OWDREG5),
ENC4(ENC(s, data_fu, 0), ENC(y, areg, 0), ENC(offsetR, ulcst_dpr_word, 0),
ENC(dst, reg, 1)))
-INSN(ll, d, 1_or_2_src, load, ATOMIC,
+INSN(ll, d, 1_or_2_src, load, C64XP,
TIC6X_FLAG_LOAD|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_SIDE_T2_ONLY|TIC6X_FLAG_NO_CROSS,
FIX3(FIX(s, 1), FIX(op, 0xc), FIX(src1, 0)),
OP2(ORMEMDW, OWDREG5),
ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0),
ENC(src1, ucst, 1), ENC(dst, reg, 2)))
-INSN(sl, d, 1_or_2_src, store, ATOMIC,
+INSN(sl, d, 1_or_2_src, store, C64XP,
TIC6X_FLAG_STORE|TIC6X_FLAG_SIDE_B_ONLY|TIC6X_FLAG_SIDE_T2_ONLY|TIC6X_FLAG_NO_CROSS,
FIX3(FIX(s, 1), FIX(op, 0xd), FIX(src1, 0)),
OP2(ORDREG1, OWMEMDW),
/* TI C6X opcode information.
- Copyright 2010
+ Copyright 2010, 2011
Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
#define TIC6X_INSN_C67X 0x0008
#define TIC6X_INSN_C67XP 0x0010
#define TIC6X_INSN_C674X 0x0020
-#define TIC6X_INSN_ATOMIC 0x0040
/* Flags with further information about an opcode table entry. */
projects / deliverable / binutils-gdb.git / commitdiff
