ARM: 7436/1: Do not map the vectors page as write-through on UP systems

The vectors page has been traditionally mapped as WT on UP systems but
this creates a mismatched alias with the directly mapped RAM that is
using WB attributes. On newer processors like Cortex-A15 this has
implications on the data/instructions coherency at the point of
unification (usually L2).

This patch removes such restriction.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index e5dad60b558b468315294b2c8b95c70193b6f74d..f37dc1856a692804a4e65d9c0ff981069170e07e 100644 (file)
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -421,12 +421,6 @@ static void __init build_mem_type_table(void)
        cp = &cache_policies[cachepolicy];
        vecs_pgprot = kern_pgprot = user_pgprot = cp->pte;
 
-       /*
-        * Only use write-through for non-SMP systems
-        */
-       if (!is_smp() && cpu_arch >= CPU_ARCH_ARMv5 && cachepolicy > CPOLICY_WRITETHROUGH)
-               vecs_pgprot = cache_policies[CPOLICY_WRITETHROUGH].pte;
-
        /*
         * Enable CPU-specific coherency if supported.
         * (Only available on XSC3 at the moment.)