* v850-opc.c (v850_operands): I16 inserts at offset 16!

Should get immediate 16bit operands into the right place

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 41521e89b76c8f244c7a9b998878a9a15b46027e..704b513057316e3a3a4b16ce7bf3a51f9e248c56 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,6 +1,8 @@
 start-sanitize-v850
 Fri Aug 23 00:27:01 1996  Jeffrey A Law  (law@cygnus.com)
 
+       * v850-opc.c (v850_operands): I16 inserts at offset 16!
+
        * v850-opc.c (v850_operands): Add "SR1" and "SR2" for system
        register source and destination operands.
        (v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".

diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c
index 90477019145198caa86103b01b88c861c438398e..39cb57ba151d1417998806ff191088aee5c963d2 100644 (file)
--- a/opcodes/v850-opc.c
+++ b/opcodes/v850-opc.c
@@ -42,7 +42,7 @@ const struct v850_operand v850_operands[] = {
 
 /* The IMM16 field in a format 6 insn. */
 #define I16    (I5U+1)
-  { 16, 0, 0, 0, 0 }, 
+  { 16, 16, 0, 0, 0 }, 
 
 /* The signed DISP7 field in a format 4 insn. */
 #define D7S    (I16+1)