ARM64: dts: Add PSCI cpuidle support for MSM8916

Add device bindings for CPUs to suspend using PSCI as the enable-method.

Cc: <devicetree@vger.kernel.org>
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Tested-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 96812007850ecf0be584528dcd6bb3ca8e063866..30297730545f428a9af8fd7a53d0e47356cd79cb 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -62,6 +62,8 @@
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x0>;
                        next-level-cache = <&L2_0>;
+                       enable-method = "psci";
+                       cpu-idle-states = <&CPU_SPC>;
                };
 
                CPU1: cpu@1 {
@@ -69,6 +71,8 @@
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x1>;
                        next-level-cache = <&L2_0>;
+                       enable-method = "psci";
+                       cpu-idle-states = <&CPU_SPC>;
                };
 
                CPU2: cpu@2 {
@@ -76,6 +80,8 @@
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x2>;
                        next-level-cache = <&L2_0>;
+                       enable-method = "psci";
+                       cpu-idle-states = <&CPU_SPC>;
                };
 
                CPU3: cpu@3 {
@@ -83,12 +89,30 @@
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x3>;
                        next-level-cache = <&L2_0>;
+                       enable-method = "psci";
+                       cpu-idle-states = <&CPU_SPC>;
                };
 
                L2_0: l2-cache {
                      compatible = "cache";
                      cache-level = <2>;
                };
+
+               idle-states {
+                       CPU_SPC: spc {
+                               compatible = "arm,idle-state";
+                               arm,psci-suspend-param = <0x40000002>;
+                               entry-latency-us = <130>;
+                               exit-latency-us = <150>;
+                               min-residency-us = <2000>;
+                               local-timer-stop;
+                       };
+               };
+       };
+
+       psci {
+               compatible = "arm,psci-1.0";
+               method = "smc";
        };
 
        timer {