* elf32-spu.c (spu_elf_size_stubs): Split out section placement to..
(spu_elf_place_overlay_data): ..here. New function.
* elf32-spu.h (spu_elf_place_overlay_data): Declare.
ld/
* emultempl/spuelf.em (spu_before_allocation): Call
spu_elf_place_overlay_data.
ld/testsuite/
* ld-spu/icache1.d: Update for changed overlay manager placement.
* ld-spu/ovl.d: Likewise.
* ld-spu/ovl2.d: Likewise.
+2009-05-14 Alan Modra <amodra@bigpond.net.au>
+
+ * elf32-spu.c (spu_elf_size_stubs): Split out section placement to..
+ (spu_elf_place_overlay_data): ..here. New function.
+ * elf32-spu.h (spu_elf_place_overlay_data): Declare.
+
2009-05-13 Andrew Jenner <andrew@codesourcery.com>
* elf32-arm.c: Move sysdep.h to start of file.
flagword flags;
unsigned int i;
asection *stub;
- const char *ovout;
if (!process_stubs (info, FALSE))
return 0;
if (htab->params->ovly_flavour == ovly_soft_icache)
/* Extra space for linked list entries. */
stub->size += htab->stub_count[0] * 16;
- (*htab->params->place_spu_section) (stub, NULL, ".text");
for (i = 0; i < htab->num_overlays; ++i)
{
ovl_stub_size_log2 (htab->params)))
return 0;
stub->size = htab->stub_count[ovl] * ovl_stub_size (htab->params);
- (*htab->params->place_spu_section) (stub, osec, NULL);
}
flags = (SEC_ALLOC | SEC_LOAD
return 0;
htab->init->size = 16;
- (*htab->params->place_spu_section) (htab->init, NULL, ".ovl.init");
}
else
{
htab->ovtab->size = htab->num_overlays * 16 + 16 + htab->num_buf * 4;
}
- ovout = ".data";
- if (htab->params->ovly_flavour == ovly_soft_icache)
- ovout = ".data.icache";
- (*htab->params->place_spu_section) (htab->ovtab, NULL, ovout);
htab->toe = bfd_make_section_anyway_with_flags (ibfd, ".toe", SEC_ALLOC);
if (htab->toe == NULL
|| !bfd_set_section_alignment (ibfd, htab->toe, 4))
return 0;
htab->toe->size = htab->params->ovly_flavour == ovly_soft_icache ? 256 : 16;
- (*htab->params->place_spu_section) (htab->toe, NULL, ".toe");
return 2;
}
+/* Called from ld to place overlay manager data sections. This is done
+ after the overlay manager itself is loaded, mainly so that the
+ linker's htab->init section is placed after any other .ovl.init
+ sections. */
+
+void
+spu_elf_place_overlay_data (struct bfd_link_info *info)
+{
+ struct spu_link_hash_table *htab = spu_hash_table (info);
+ unsigned int i;
+ const char *ovout;
+
+ if (htab->stub_count == NULL)
+ return;
+
+ (*htab->params->place_spu_section) (htab->stub_sec[0], NULL, ".text");
+
+ for (i = 0; i < htab->num_overlays; ++i)
+ {
+ asection *osec = htab->ovl_sec[i];
+ unsigned int ovl = spu_elf_section_data (osec)->u.o.ovl_index;
+ (*htab->params->place_spu_section) (htab->stub_sec[ovl], osec, NULL);
+ }
+
+ if (htab->params->ovly_flavour == ovly_soft_icache)
+ (*htab->params->place_spu_section) (htab->init, NULL, ".ovl.init");
+
+ ovout = ".data";
+ if (htab->params->ovly_flavour == ovly_soft_icache)
+ ovout = ".data.icache";
+ (*htab->params->place_spu_section) (htab->ovtab, NULL, ovout);
+
+ (*htab->params->place_spu_section) (htab->toe, NULL, ".toe");
+}
+
/* Functions to handle embedded spu_ovl.o object. */
static void *
extern bfd_boolean spu_elf_create_sections (struct bfd_link_info *);
extern int spu_elf_find_overlays (struct bfd_link_info *);
extern int spu_elf_size_stubs (struct bfd_link_info *);
+extern void spu_elf_place_overlay_data (struct bfd_link_info *);
extern asection *spu_elf_check_vma (struct bfd_link_info *);
+2009-05-14 Alan Modra <amodra@bigpond.net.au>
+
+ * emultempl/spuelf.em (spu_before_allocation): Call
+ spu_elf_place_overlay_data.
+
2009-05-14 Alan Modra <amodra@bigpond.net.au>
* ldlang.c (lang_insert_orphan): Add __start_<section> symbol
einfo ("%X%P: can not size overlay stubs: %E\n");
else if (ret == 2)
spu_elf_load_ovl_mgr ();
+
+ spu_elf_place_overlay_data (&link_info);
}
/* We must not cache anything from the preliminary sizing. */
+2009-05-14 Alan Modra <amodra@bigpond.net.au>
+
+ * ld-spu/icache1.d: Update for changed overlay manager placement.
+ * ld-spu/ovl.d: Likewise.
+ * ld-spu/ovl2.d: Likewise.
+
2009-05-05 Paul Brook <paul@codesourcery.com>
* ld-arm/arm.ld: Add .ARM.exidx and .ARM.extab.
fa0: 00 00 00 02.*
fa4: 00 04 11 04.*
fa8: a0 00 0c 10.*
- fac: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
+ fac: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
fb0: 00 00 ed 00.*
\.\.\.
fc0: 00 00 00 02.*
fc4: 00 04 10 00.*
fc8: a0 00 0c 14.*
- fcc: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
+ fcc: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
fd0: 00 00 00 00.*
fd4: 00 00 0a 80.*
\.\.\.
fe4: 00 04 08 00.*
fe8: 20 00 0f 38.*
- fec: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
+ fec: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
\.\.\.
ff8: 00 7f 0f 80.*
ffc: 00 00 00 00.*
.* 1c 80 00 81 ai \$1,\$1,-512
.* 33 7f fe 80 brsl \$0,1400 <f5> # 1400
\.\.\.
-.* 42 01 00 03 ila \$3,200 <__icache_linked_list\+0x1c0>
+.* 42 01 00 03 ila \$3,200.*
.* 18 00 c0 81 a \$1,\$1,\$3
.* 34 00 40 80 lqd \$0,16\(\$1\)
.* 35 00 00 00 bi \$0
be0: 00 00 00 03.*
be4: 00 04 14 00.*
be8: a0 00 0b 2c.*
- bec: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
+ bec: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
\.\.\.
bfc: 00 03 fd 80.*
fa0: 00 00 00 07.*
fa4: 00 08 14 00.*
fa8: a0 00 0c 00.*
- fac: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
+ fac: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
fb0: 00 03 75 80.*
\.\.\.
fc0: 00 00 00 07.*
fc4: 00 08 14 00.*
fc8: a0 00 0c 04.*
- fcc: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
+ fcc: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
fd0: 00 00 00 00.*
fd4: 00 00 86 80.*
\.\.\.
fe0: 00 00 00 04.*
fe4: 00 08 08 00.*
fe8: 20 00 0f 28.*
- fec: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
+ fec: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
\.\.\.
ff8: 00 7f 03 80.*
ffc: 00 00 00 00.*
13a0: 00 00 00 03.*
13a4: 00 04 14 00.*
13a8: a0 00 10 18.*
- 13ac: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
+ 13ac: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
\.\.\.
13b8: 00 00 0f 80.*
13bc: 00 00 00 00.*
13c0: 00 00 00 07.*
13c4: 00 08 14 00.*
13c8: a0 00 10 1c.*
- 13cc: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
+ 13cc: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
\.\.\.
13dc: 00 00 0a 80.*
13e0: 00 00 00 05.*
13e4: 00 08 0c 00.*
13e8: 20 00 13 44.*
- 13ec: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
+ 13ec: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
13f0: 00 00 00 00.*
13f4: 00 7f 02 80.*
\.\.\.
17c0: 00 00 00 02.*
17c4: 00 04 11 04.*
17c8: a0 00 14 0c.*
- 17cc: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
+ 17cc: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
\.\.\.
17dc: 00 00 d9 00.*
17e0: 00 00 00 06.*
17e4: 00 08 10 00.*
17e8: 20 00 17 30.*
- 17ec: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
+ 17ec: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
17f0: 00 7f 0d 80.*
\.\.\.
.* 41 00 02 03 ilhu \$3,4
.* 60 8a 00 03 iohl \$3,5120 # 1400
.* 32 00 04 80 br 182c.*
+0000180c <__icache_br_handler>:
+ 180c: 00 00 00 00 stop
+00001810 <__icache_call_handler>:
\.\.\.
1820: 00 00 00 01.*
1824: 00 04 0c 00.*
1828: a0 00 18 08.*
- 182c: 31 03 0a cb brasl \$75,1854 <__icache_call_handler>
+ 182c: 31 03 02 4b brasl \$75,1810 <__icache_call_handler>
\.\.\.
1838: 00 7e 7b 80.*
\.\.\.
-00001850 <__icache_br_handler>:
#pass
.*SPU_REL16 f2_a1
.* brsl \$0,.* <00000000\.ovl_call\.f1_a2>.*
.*SPU_REL16 f1_a2
-#.* ila \$9,328 # 148
-.* ila \$9,352 # 160
+.* ila \$9,.*
.*SPU_ADDR18 f2_a2
.* bisl \$0,\$9
.* ai \$1,\$1,32 # 20
0000012c <f0>:
.* bi \$0
-#00000130 <00000000\.ovl_call\.f1_a1>:
-#.* bra?sl \$75,.* <__ovly_load>.*
-#.*00 04 04 00.*
-#
-#00000138 <00000000\.ovl_call\.f2_a1>:
-#.* bra?sl \$75,.* <__ovly_load>.*
-#.*00 04 04 04.*
-#
-#00000140 <00000000\.ovl_call\.f1_a2>:
-#.* bra?sl \$75,.* <__ovly_load>.*
-#.*00 08 04 00.*
-#
-#00000148 <00000000\.ovl_call\.f2_a2>:
-#.* bra?sl \$75,.* <__ovly_load>.*
-#.*00 08 04 24.*
-#
-#00000150 <00000000\.ovl_call\.f4_a1>:
-#.* bra?sl \$75,.* <__ovly_load>.*
-#.*00 04 04 10.*
-#
-#00000158 <00000000.ovl_call.14:8>:
-#.* bra?sl \$75,.* <__ovly_load>.*
-#.*00 08 04 34.*
-
-00000130 <00000000\.ovl_call\.f1_a1>:
+#...
+[0-9a-f]+ <__ovly_return>:
+#...
+[0-9a-f]+ <__ovly_load>:
+#...
+[0-9a-f]+ <_ovly_debug_event>:
+#...
+00000330 <00000000\.ovl_call\.f1_a1>:
.* ila \$78,1
.* lnop
.* ila \$79,1024 # 400
.* bra? .* <__ovly_load>.*
-00000140 <00000000\.ovl_call\.f2_a1>:
+00000340 <00000000\.ovl_call\.f2_a1>:
.* ila \$78,1
.* lnop
.* ila \$79,1028 # 404
.* bra? .* <__ovly_load>.*
-00000150 <00000000.ovl_call.f1_a2>:
+00000350 <00000000.ovl_call.f1_a2>:
.* ila \$78,2
.* lnop
.* ila \$79,1024 # 400
.* bra? .* <__ovly_load>.*
-00000160 <00000000\.ovl_call\.f2_a2>:
+00000360 <00000000\.ovl_call\.f2_a2>:
.* ila \$78,2
.* lnop
.* ila \$79,1060 # 424
.* bra? .* <__ovly_load>.*
-00000170 <00000000\.ovl_call\.f4_a1>:
+00000370 <00000000\.ovl_call\.f4_a1>:
.* ila \$78,1
.* lnop
.* ila \$79,1040 # 410
.* bra? .* <__ovly_load>.*
-00000180 <00000000.ovl_call.14:8>:
+00000380 <00000000.ovl_call.14:8>:
.* ila \$78,2
.* lnop
.* ila \$79,1076 # 434
.* bra? .* <__ovly_load>.*
-#...
-[0-9a-f]+ <__ovly_return>:
-#...
-[0-9a-f]+ <__ovly_load>:
-#...
-[0-9a-f]+ <_ovly_debug_event>:
-#...
+#00000330 <00000000\.ovl_call\.f1_a1>:
+#.* bra?sl \$75,.* <__ovly_load>.*
+#.*00 04 04 00.*
+#
+#00000338 <00000000\.ovl_call\.f2_a1>:
+#.* bra?sl \$75,.* <__ovly_load>.*
+#.*00 04 04 04.*
+#
+#00000340 <00000000\.ovl_call\.f1_a2>:
+#.* bra?sl \$75,.* <__ovly_load>.*
+#.*00 08 04 00.*
+#
+#00000348 <00000000\.ovl_call\.f2_a2>:
+#.* bra?sl \$75,.* <__ovly_load>.*
+#.*00 08 04 24.*
+#
+#00000350 <00000000\.ovl_call\.f4_a1>:
+#.* bra?sl \$75,.* <__ovly_load>.*
+#.*00 04 04 10.*
+#
+#00000358 <00000000.ovl_call.14:8>:
+#.* bra?sl \$75,.* <__ovly_load>.*
+#.*00 08 04 34.*
+
Disassembly of section \.ov_a1:
00000400 <f1_a1>:
.*SPU_REL16 f3_a1
00000404 <f2_a1>:
-#.* ila \$3,336 # 150
-.* ila \$3,368 # 170
+.* ila \$3,.*
.*SPU_ADDR18 f4_a1
.* bi \$0
.* ai \$1,\$1,-32
.* brsl \$0,12c <f0> # 12c
.*SPU_REL16 f0
-.* brsl \$0,130 <00000000\.ovl_call\.f1_a1> # 130
+.* brsl \$0,.* <00000000\.ovl_call\.f1_a1>.*
.*SPU_REL16 f1_a1
-.* brsl \$0,430 <f3_a2> # 430
+.* brsl \$0,.* <f3_a2>.*
.*SPU_REL16 f3_a2
.* lqd \$0,48\(\$1\) # 30
.* ai \$1,\$1,32 # 20
.* bi \$0
00000424 <f2_a2>:
-.* ilhu \$3,0
+.* ilhu \$3,.*
.*SPU_ADDR16_HI f4_a2
-#.* iohl \$3,344 # 158
-.* iohl \$3,384 # 180
+.* iohl \$3,.*
.*SPU_ADDR16_LO f4_a2
.* bi \$0
00000110 <longjmp>:
.* bi \$0
-.*00 00 01 40.*
+
+.*00 00 03 40.*
.*SPU_ADDR32 \.ov_a1\+0x14
\.\.\.
-
-#00000118 <00000000\.ovl_call.f1_a1>:
-#.* bra?sl \$75,.* <__ovly_load>.*
-#.*00 04 04 00.*
-#
-#00000120 <00000000\.ovl_call.setjmp>:
-#.* bra?sl \$75,.* <__ovly_load>.*
-#.*00 00 01 0c.*
-#
-#00000128 <_SPUEAR_f1_a2>:
-#.* bra?sl \$75,.* <__ovly_load>.*
-#.*00 08 04 00.*
-
-00000120 <00000000\.ovl_call.f1_a1>:
+#...
+00000320 <00000000\.ovl_call.f1_a1>:
.* ila \$78,1
.* lnop
.* ila \$79,1040 # 410
.* bra? .* <__ovly_load>.*
-00000130 <00000000\.ovl_call.setjmp>:
+00000330 <00000000\.ovl_call.setjmp>:
.* ila \$78,0
.* lnop
.* ila \$79,268 # 10c
.* bra? .* <__ovly_load>.*
-00000140 <00000000\.ovl_call\.13:5>:
+00000340 <00000000\.ovl_call\.13:5>:
.* ila \$78,1
.* lnop
.* ila \$79,1044 # 414
.* bra? .* <__ovly_load>.*
-00000150 <_SPUEAR_f1_a2>:
+00000350 <_SPUEAR_f1_a2>:
.* ila \$78,2
.* lnop
.* ila \$79,1040 # 410
.* bra? .* <__ovly_load>.*
-#...
+#00000318 <00000000\.ovl_call.f1_a1>:
+#.* bra?sl \$75,.* <__ovly_load>.*
+#.*00 04 04 00.*
+#
+#00000320 <00000000\.ovl_call.setjmp>:
+#.* bra?sl \$75,.* <__ovly_load>.*
+#.*00 00 01 0c.*
+#
+#00000328 <_SPUEAR_f1_a2>:
+#.* bra?sl \$75,.* <__ovly_load>.*
+#.*00 08 04 00.*
+
Disassembly of section \.ov_a1:
00000400 <00000001\.ovl_call\.14:6>:
projects / deliverable / binutils-gdb.git / commitdiff
