gas/

2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 658
	* config/tc-i386.c (SCALE1_WHEN_NO_INDEX): Removed.
	(set_allow_index_reg): New.
	(allow_index_reg): Likewise.
	(md_pseudo_table): Add "allow_index_reg" and
	"disallow_index_reg".
	(build_modrm_byte): Set i.sib.index to NO_INDEX_REGISTER for
	fake index registers.
	(i386_scale): Updated.
	(i386_index_check): Support fake index registers.
	(parse_real_register): Return NULL on eiz/riz if fake index
	registers aren't allowed.

gas/testsuite/

2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 658
	* gas/i386/i386.exp: Run sib-intel, x86-64-sib and
	x86-64-sib-intel.

	* gas/i386/nops-1-i386-i686.d: Updated.
	* gas/i386/nops-1-i386.d: Likewise.
	* gas/i386/nops-1.d: Likewise.
	* gas/i386/nops-2-i386.d: Likewise.
	* gas/i386/nops-2-merom.d: Likewise.
	* gas/i386/nops-2.d: Likewise.
	* gas/i386/nops-3-i386.d: Likewise.
	* gas/i386/nops-3.d : Likewise.
	* gas/i386/sib.d: Likewise.

	* gas/i386/sib.s: Use %eiz in testcases.

	* gas/i386/sib-intel.d: New.
	* gas/i386/x86-64-sib-intel.d: Likewise.
	* gas/i386/x86-64-sib.d: Likewise.
	* gas/i386/x86-64-sib.s: Likewise.

ld/testsuite/

2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 658
	* ld-i386/tlsbin.dd: Updated.
	* ld-i386/tlsld1.dd: Likewise.

opcodes/

2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 658
	* 386-dis.c (index64): New.
	(index32): Likewise.
	(intel_index64): Likewise.
	(intel_index32): Likewise.
	(att_index64): Likewise.
	(att_index32): Likewise.
	(print_insn): Set index64 and index32.
	(OP_E_extended): Use index64/index32 for index register for
	SIB with INDEX == 4.

	* i386-opc.h (RegEiz): New.
	(RegRiz): Likewise.

	* i386-reg.tbl: Add eiz and riz.
	* i386-tbl.h: Regenerated.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index f61cc8e251b4b83f16d1d1d03e0bc8e26e42c89a..a5e79913550bf2a3e632205e0499e80fc81cfb4d 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,18 @@
+2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR 658
+       * config/tc-i386.c (SCALE1_WHEN_NO_INDEX): Removed.
+       (set_allow_index_reg): New.
+       (allow_index_reg): Likewise.
+       (md_pseudo_table): Add "allow_index_reg" and
+       "disallow_index_reg".
+       (build_modrm_byte): Set i.sib.index to NO_INDEX_REGISTER for
+       fake index registers.
+       (i386_scale): Updated.
+       (i386_index_check): Support fake index registers.
+       (parse_real_register): Return NULL on eiz/riz if fake index
+       registers aren't allowed.
+
 2007-09-19  Nick Clifton  <nickc@redhat.com>
 
        * config/tc-h8300.c (md_apply_fix): Do not abort or handle 8 byte

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 17bde043b0cad4347e15b9b123e8521689933af0..7192c66a67554d9677891eec5d67149ca2451c59 100644 (file)
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -43,14 +43,6 @@
 #define INFER_ADDR_PREFIX 1
 #endif
 
-#ifndef SCALE1_WHEN_NO_INDEX
-/* Specifying a scale factor besides 1 when there is no index is
-   futile.  eg. `mov (%ebx,2),%al' does exactly the same as
-   `mov (%ebx),%al'.  To slavishly follow what the programmer
-   specified, set SCALE1_WHEN_NO_INDEX to 0.  */
-#define SCALE1_WHEN_NO_INDEX 1
-#endif
-
 #ifndef DEFAULT_ARCH
 #define DEFAULT_ARCH "i386"
 #endif
@@ -66,6 +58,7 @@
 static void set_code_flag (int);
 static void set_16bit_gcc_code_flag (int);
 static void set_intel_syntax (int);
+static void set_allow_index_reg (int);
 static void set_cpu_arch (int);
 #ifdef TE_PE
 static void pe_directive_secrel (int);
@@ -294,6 +287,9 @@ static int intel_syntax = 0;
 /* 1 if register prefix % not required.  */
 static int allow_naked_reg = 0;
 
+/* 1 if fake index register, eiz/riz, is allowed .  */
+static int allow_index_reg = 0;
+
 /* Register prefix used for error message.  */
 static const char *register_prefix = "%";
 
@@ -539,6 +535,8 @@ const pseudo_typeS md_pseudo_table[] =
   {"code64", set_code_flag, CODE_64BIT},
   {"intel_syntax", set_intel_syntax, 1},
   {"att_syntax", set_intel_syntax, 0},
+  {"allow_index_reg", set_allow_index_reg, 1},
+  {"disallow_index_reg", set_allow_index_reg, 0},
 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
   {"largecomm", handle_large_common, 0},
 #else
@@ -1507,6 +1505,12 @@ set_intel_syntax (int syntax_flag)
   register_prefix = allow_naked_reg ? "" : "%";
 }
 
+static void
+set_allow_index_reg (int flag)
+{
+  allow_index_reg = flag;
+}
+
 static void
 set_cpu_arch (int dummy ATTRIBUTE_UNUSED)
 {
@@ -4517,7 +4521,11 @@ build_modrm_byte (void)
                }
              else /* !i.base_reg && i.index_reg  */
                {
-                 i.sib.index = i.index_reg->reg_num;
+                 if (i.index_reg->reg_num == RegEiz
+                     || i.index_reg->reg_num == RegRiz)
+                   i.sib.index = NO_INDEX_REGISTER;
+                 else
+                   i.sib.index = i.index_reg->reg_num;
                  i.sib.base = NO_BASE_REGISTER;
                  i.sib.scale = i.log2_scale_factor;
                  i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
@@ -4625,16 +4633,14 @@ build_modrm_byte (void)
                     Any base register besides %esp will not use the
                     extra modrm byte.  */
                  i.sib.index = NO_INDEX_REGISTER;
-#if !SCALE1_WHEN_NO_INDEX
-                 /* Another case where we force the second modrm
-                    byte.  */
-                 if (i.log2_scale_factor)
-                   i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
-#endif
                }
              else
                {
-                 i.sib.index = i.index_reg->reg_num;
+                 if (i.index_reg->reg_num == RegEiz
+                     || i.index_reg->reg_num == RegRiz)
+                   i.sib.index = NO_INDEX_REGISTER;
+                 else
+                   i.sib.index = i.index_reg->reg_num;
                  i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
                  if ((i.index_reg->reg_flags & RegRex) != 0)
                    i.rex |= REX_X;
@@ -5740,9 +5746,7 @@ i386_scale (char *scale)
     {
       as_warn (_("scale factor of %d without an index register"),
               1 << i.log2_scale_factor);
-#if SCALE1_WHEN_NO_INDEX
       i.log2_scale_factor = 0;
-#endif
     }
   scale = input_line_pointer;
   input_line_pointer = save;
@@ -5980,8 +5984,11 @@ i386_index_check (const char *operand_string)
          || (i.index_reg
              && (!i.index_reg->reg_type.bitfield.baseindex
                  || (i.prefix[ADDR_PREFIX] == 0
-                     && !i.index_reg->reg_type.bitfield.reg64)
+                     && i.index_reg->reg_num != RegRiz
+                     && !i.index_reg->reg_type.bitfield.reg64
+                     )
                  || (i.prefix[ADDR_PREFIX]
+                     && i.index_reg->reg_num != RegEiz
                      && !i.index_reg->reg_type.bitfield.reg32))))
        ok = 0;
     }
@@ -6008,7 +6015,8 @@ i386_index_check (const char *operand_string)
          if ((i.base_reg
               && !i.base_reg->reg_type.bitfield.reg32)
              || (i.index_reg
-                 && (!i.index_reg->reg_type.bitfield.reg32
+                 && ((!i.index_reg->reg_type.bitfield.reg32
+                      && i.index_reg->reg_num != RegEiz)
                      || !i.index_reg->reg_type.bitfield.baseindex)))
            ok = 0;
        }
@@ -6904,6 +6912,12 @@ parse_real_register (char *reg_string, char **end_op)
        }
     }
 
+  /* Don't allow fake index register unless allow_index_reg isn't 0. */
+  if (r != NULL
+      && !allow_index_reg
+      && (r->reg_num == RegEiz || r->reg_num == RegRiz))
+    return (const reg_entry *) NULL;
+
   if (r != NULL
       && ((r->reg_flags & (RegRex64 | RegRex))
          || r->reg_type.bitfield.reg64)

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 2995298c8852be88e000fa05ab3032f119638ac9..279a5d879f2e42aa35db971f32ffbeffa8c2680c 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,26 @@
+2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR 658
+       * gas/i386/i386.exp: Run sib-intel, x86-64-sib and
+       x86-64-sib-intel.
+
+       * gas/i386/nops-1-i386-i686.d: Updated.
+       * gas/i386/nops-1-i386.d: Likewise.
+       * gas/i386/nops-1.d: Likewise.
+       * gas/i386/nops-2-i386.d: Likewise.
+       * gas/i386/nops-2-merom.d: Likewise.
+       * gas/i386/nops-2.d: Likewise.
+       * gas/i386/nops-3-i386.d: Likewise.
+       * gas/i386/nops-3.d : Likewise.
+       * gas/i386/sib.d: Likewise.
+
+       * gas/i386/sib.s: Use %eiz in testcases.
+
+       * gas/i386/sib-intel.d: New.
+       * gas/i386/x86-64-sib-intel.d: Likewise.
+       * gas/i386/x86-64-sib.d: Likewise.
+       * gas/i386/x86-64-sib.s: Likewise.
+
 2007-09-19  H.J. Lu  <hongjiu.lu@intel.com>
 
        * gas/i386/intelok.s: Add tests for memory without base.

diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 38bed74873ad1edfcee1f78374762527ae4a06fd..9807432f7a42e6dbaa4dc8b88c469e8b406e5305 100644 (file)
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -46,6 +46,7 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "sub"
     run_dump_test "prescott"
     run_dump_test "sib"
+    run_dump_test "sib-intel"
     run_dump_test "vmx"
     run_dump_test "suffix"
     run_dump_test "immed32"
@@ -196,6 +197,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-mem-intel"
     run_dump_test "x86-64-reg"
     run_dump_test "x86-64-reg-intel"
+    run_dump_test "x86-64-sib"
+    run_dump_test "x86-64-sib-intel"
 
     if { ![istarget "*-*-aix*"]
       && ![istarget "*-*-beos*"]

diff --git a/gas/testsuite/gas/i386/nops-1-i386-i686.d b/gas/testsuite/gas/i386/nops-1-i386-i686.d
index 011266255c60d934f5fc917be47c5154854c5aea..7b0cd4731d99feae21c92f0b27695ea4f892b5cf 100644 (file)
--- a/gas/testsuite/gas/i386/nops-1-i386-i686.d
+++ b/gas/testsuite/gas/i386/nops-1-i386-i686.d
@@ -27,15 +27,15 @@ Disassembly of section .text:
 0+10 <nop14>:
 [       ]*10:[  ]+90[   ]+nop[         ]*
 [       ]*11:[  ]+90[   ]+nop[         ]*
-[       ]*12:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*19:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*12:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
+[       ]*19:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+20 <nop13>:
 [       ]*20:[  ]+90[   ]+nop[         ]*
 [       ]*21:[  ]+90[   ]+nop[         ]*
 [       ]*22:[  ]+90[   ]+nop[         ]*
 [       ]*23:[  ]+8d b6 00 00 00 00[    ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*29:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*29:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+30 <nop12>:
 [       ]*30:[  ]+90[   ]+nop[         ]*
@@ -51,8 +51,8 @@ Disassembly of section .text:
 [       ]*42:[  ]+90[   ]+nop[         ]*
 [       ]*43:[  ]+90[   ]+nop[         ]*
 [       ]*44:[  ]+90[   ]+nop[         ]*
-[       ]*45:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*49:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*45:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
+[       ]*49:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+50 <nop10>:
 [       ]*50:[  ]+90[   ]+nop[         ]*
@@ -62,7 +62,7 @@ Disassembly of section .text:
 [       ]*54:[  ]+90[   ]+nop[         ]*
 [       ]*55:[  ]+90[   ]+nop[         ]*
 [       ]*56:[  ]+8d 76 00[     ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*59:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*59:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+60 <nop9>:
 [       ]*60:[  ]+90[   ]+nop[         ]*
@@ -73,7 +73,7 @@ Disassembly of section .text:
 [       ]*65:[  ]+90[   ]+nop[         ]*
 [       ]*66:[  ]+90[   ]+nop[         ]*
 [       ]*67:[  ]+89 f6[        ]+mov[         ]+%esi,%esi
-[       ]*69:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*69:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+70 <nop8>:
 [       ]*70:[  ]+90[   ]+nop[         ]*
@@ -85,7 +85,7 @@ Disassembly of section .text:
 [       ]*76:[  ]+90[   ]+nop[         ]*
 [       ]*77:[  ]+90[   ]+nop[         ]*
 [       ]*78:[  ]+90[   ]+nop[         ]*
-[       ]*79:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*79:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+80 <nop7>:
 [       ]*80:[  ]+90[   ]+nop[         ]*
@@ -97,7 +97,7 @@ Disassembly of section .text:
 [       ]*86:[  ]+90[   ]+nop[         ]*
 [       ]*87:[  ]+90[   ]+nop[         ]*
 [       ]*88:[  ]+90[   ]+nop[         ]*
-[       ]*89:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*89:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+90 <nop6>:
 [       ]*90:[  ]+90[   ]+nop[         ]*
@@ -125,7 +125,7 @@ Disassembly of section .text:
 [       ]*a9:[  ]+90[   ]+nop[         ]*
 [       ]*aa:[  ]+90[   ]+nop[         ]*
 [       ]*ab:[  ]+90[   ]+nop[         ]*
-[       ]*ac:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*ac:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+b0 <nop4>:
 [       ]*b0:[  ]+90[   ]+nop[         ]*
@@ -140,7 +140,7 @@ Disassembly of section .text:
 [       ]*b9:[  ]+90[   ]+nop[         ]*
 [       ]*ba:[  ]+90[   ]+nop[         ]*
 [       ]*bb:[  ]+90[   ]+nop[         ]*
-[       ]*bc:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*bc:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+c0 <nop3>:
 [       ]*c0:[  ]+90[   ]+nop[         ]*

diff --git a/gas/testsuite/gas/i386/nops-1-i386.d b/gas/testsuite/gas/i386/nops-1-i386.d
index a3432f042207fe9fc70c3dfa6dfab6ea35eb9a5e..f9e1541a7be345315d4ca2cec05e8affae364605 100644 (file)
--- a/gas/testsuite/gas/i386/nops-1-i386.d
+++ b/gas/testsuite/gas/i386/nops-1-i386.d
@@ -27,15 +27,15 @@ Disassembly of section .text:
 0+10 <nop14>:
 [       ]*10:[  ]+90[   ]+nop[         ]*
 [       ]*11:[  ]+90[   ]+nop[         ]*
-[       ]*12:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*19:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*12:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
+[       ]*19:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+20 <nop13>:
 [       ]*20:[  ]+90[   ]+nop[         ]*
 [       ]*21:[  ]+90[   ]+nop[         ]*
 [       ]*22:[  ]+90[   ]+nop[         ]*
 [       ]*23:[  ]+8d b6 00 00 00 00[    ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*29:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*29:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+30 <nop12>:
 [       ]*30:[  ]+90[   ]+nop[         ]*
@@ -51,8 +51,8 @@ Disassembly of section .text:
 [       ]*42:[  ]+90[   ]+nop[         ]*
 [       ]*43:[  ]+90[   ]+nop[         ]*
 [       ]*44:[  ]+90[   ]+nop[         ]*
-[       ]*45:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*49:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*45:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
+[       ]*49:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+50 <nop10>:
 [       ]*50:[  ]+90[   ]+nop[         ]*
@@ -62,7 +62,7 @@ Disassembly of section .text:
 [       ]*54:[  ]+90[   ]+nop[         ]*
 [       ]*55:[  ]+90[   ]+nop[         ]*
 [       ]*56:[  ]+8d 76 00[     ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*59:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*59:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+60 <nop9>:
 [       ]*60:[  ]+90[   ]+nop[         ]*
@@ -73,7 +73,7 @@ Disassembly of section .text:
 [       ]*65:[  ]+90[   ]+nop[         ]*
 [       ]*66:[  ]+90[   ]+nop[         ]*
 [       ]*67:[  ]+89 f6[        ]+mov[         ]+%esi,%esi
-[       ]*69:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*69:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+70 <nop8>:
 [       ]*70:[  ]+90[   ]+nop[         ]*
@@ -85,7 +85,7 @@ Disassembly of section .text:
 [       ]*76:[  ]+90[   ]+nop[         ]*
 [       ]*77:[  ]+90[   ]+nop[         ]*
 [       ]*78:[  ]+90[   ]+nop[         ]*
-[       ]*79:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*79:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+80 <nop7>:
 [       ]*80:[  ]+90[   ]+nop[         ]*
@@ -97,7 +97,7 @@ Disassembly of section .text:
 [       ]*86:[  ]+90[   ]+nop[         ]*
 [       ]*87:[  ]+90[   ]+nop[         ]*
 [       ]*88:[  ]+90[   ]+nop[         ]*
-[       ]*89:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*89:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+90 <nop6>:
 [       ]*90:[  ]+90[   ]+nop[         ]*
@@ -125,7 +125,7 @@ Disassembly of section .text:
 [       ]*a9:[  ]+90[   ]+nop[         ]*
 [       ]*aa:[  ]+90[   ]+nop[         ]*
 [       ]*ab:[  ]+90[   ]+nop[         ]*
-[       ]*ac:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*ac:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+b0 <nop4>:
 [       ]*b0:[  ]+90[   ]+nop[         ]*
@@ -140,7 +140,7 @@ Disassembly of section .text:
 [       ]*b9:[  ]+90[   ]+nop[         ]*
 [       ]*ba:[  ]+90[   ]+nop[         ]*
 [       ]*bb:[  ]+90[   ]+nop[         ]*
-[       ]*bc:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*bc:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+c0 <nop3>:
 [       ]*c0:[  ]+90[   ]+nop[         ]*

diff --git a/gas/testsuite/gas/i386/nops-1.d b/gas/testsuite/gas/i386/nops-1.d
index 4e81e9554585995049dd7fbd96a4502565e4f940..010f4908cff819654873d40076c0170fa38816e2 100644 (file)
--- a/gas/testsuite/gas/i386/nops-1.d
+++ b/gas/testsuite/gas/i386/nops-1.d
@@ -26,15 +26,15 @@ Disassembly of section .text:
 0+10 <nop14>:
 [       ]*10:[  ]+90[   ]+nop[         ]*
 [       ]*11:[  ]+90[   ]+nop[         ]*
-[       ]*12:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*19:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*12:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
+[       ]*19:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+20 <nop13>:
 [       ]*20:[  ]+90[   ]+nop[         ]*
 [       ]*21:[  ]+90[   ]+nop[         ]*
 [       ]*22:[  ]+90[   ]+nop[         ]*
 [       ]*23:[  ]+8d b6 00 00 00 00[    ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*29:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*29:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+30 <nop12>:
 [       ]*30:[  ]+90[   ]+nop[         ]*
@@ -50,8 +50,8 @@ Disassembly of section .text:
 [       ]*42:[  ]+90[   ]+nop[         ]*
 [       ]*43:[  ]+90[   ]+nop[         ]*
 [       ]*44:[  ]+90[   ]+nop[         ]*
-[       ]*45:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*49:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*45:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
+[       ]*49:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+50 <nop10>:
 [       ]*50:[  ]+90[   ]+nop[         ]*
@@ -61,7 +61,7 @@ Disassembly of section .text:
 [       ]*54:[  ]+90[   ]+nop[         ]*
 [       ]*55:[  ]+90[   ]+nop[         ]*
 [       ]*56:[  ]+8d 76 00[     ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*59:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*59:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+60 <nop9>:
 [       ]*60:[  ]+90[   ]+nop[         ]*
@@ -72,7 +72,7 @@ Disassembly of section .text:
 [       ]*65:[  ]+90[   ]+nop[         ]*
 [       ]*66:[  ]+90[   ]+nop[         ]*
 [       ]*67:[  ]+89 f6[        ]+mov[         ]+%esi,%esi
-[       ]*69:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*69:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+70 <nop8>:
 [       ]*70:[  ]+90[   ]+nop[         ]*
@@ -84,7 +84,7 @@ Disassembly of section .text:
 [       ]*76:[  ]+90[   ]+nop[         ]*
 [       ]*77:[  ]+90[   ]+nop[         ]*
 [       ]*78:[  ]+90[   ]+nop[         ]*
-[       ]*79:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*79:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+80 <nop7>:
 [       ]*80:[  ]+90[   ]+nop[         ]*
@@ -96,7 +96,7 @@ Disassembly of section .text:
 [       ]*86:[  ]+90[   ]+nop[         ]*
 [       ]*87:[  ]+90[   ]+nop[         ]*
 [       ]*88:[  ]+90[   ]+nop[         ]*
-[       ]*89:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*89:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+90 <nop6>:
 [       ]*90:[  ]+90[   ]+nop[         ]*
@@ -124,7 +124,7 @@ Disassembly of section .text:
 [       ]*a9:[  ]+90[   ]+nop[         ]*
 [       ]*aa:[  ]+90[   ]+nop[         ]*
 [       ]*ab:[  ]+90[   ]+nop[         ]*
-[       ]*ac:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*ac:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+b0 <nop4>:
 [       ]*b0:[  ]+90[   ]+nop[         ]*
@@ -139,7 +139,7 @@ Disassembly of section .text:
 [       ]*b9:[  ]+90[   ]+nop[         ]*
 [       ]*ba:[  ]+90[   ]+nop[         ]*
 [       ]*bb:[  ]+90[   ]+nop[         ]*
-[       ]*bc:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*bc:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+c0 <nop3>:
 [       ]*c0:[  ]+90[   ]+nop[         ]*

diff --git a/gas/testsuite/gas/i386/nops-2-i386.d b/gas/testsuite/gas/i386/nops-2-i386.d
index d9106539b0c2b1731155efdc70aca55c52ec3a78..57f8ddadd85c970be3490bed46f98bd2a508a442 100644 (file)
--- a/gas/testsuite/gas/i386/nops-2-i386.d
+++ b/gas/testsuite/gas/i386/nops-2-i386.d
@@ -10,7 +10,7 @@ Disassembly of section .text:
 0+ <nop>:
 [       ]*0:[   ]+0f 44 c0[     ]+cmove[       ]+%eax,%eax
 [       ]*3:[   ]+8d b6 00 00 00 00[    ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*9:[   ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*9:[   ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+10 <nop15>:
 [       ]*10:[  ]+90[   ]+nop[         ]*
@@ -32,15 +32,15 @@ Disassembly of section .text:
 0+20 <nop14>:
 [       ]*20:[  ]+90[   ]+nop[         ]*
 [       ]*21:[  ]+90[   ]+nop[         ]*
-[       ]*22:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*29:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*22:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
+[       ]*29:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+30 <nop13>:
 [       ]*30:[  ]+90[   ]+nop[         ]*
 [       ]*31:[  ]+90[   ]+nop[         ]*
 [       ]*32:[  ]+90[   ]+nop[         ]*
 [       ]*33:[  ]+8d b6 00 00 00 00[    ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*39:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*39:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+40 <nop12>:
 [       ]*40:[  ]+90[   ]+nop[         ]*
@@ -56,8 +56,8 @@ Disassembly of section .text:
 [       ]*52:[  ]+90[   ]+nop[         ]*
 [       ]*53:[  ]+90[   ]+nop[         ]*
 [       ]*54:[  ]+90[   ]+nop[         ]*
-[       ]*55:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*59:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*55:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
+[       ]*59:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+60 <nop10>:
 [       ]*60:[  ]+90[   ]+nop[         ]*
@@ -67,7 +67,7 @@ Disassembly of section .text:
 [       ]*64:[  ]+90[   ]+nop[         ]*
 [       ]*65:[  ]+90[   ]+nop[         ]*
 [       ]*66:[  ]+8d 76 00[     ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*69:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*69:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+70 <nop9>:
 [       ]*70:[  ]+90[   ]+nop[         ]*
@@ -78,7 +78,7 @@ Disassembly of section .text:
 [       ]*75:[  ]+90[   ]+nop[         ]*
 [       ]*76:[  ]+90[   ]+nop[         ]*
 [       ]*77:[  ]+89 f6[        ]+mov[         ]+%esi,%esi
-[       ]*79:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*79:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+80 <nop8>:
 [       ]*80:[  ]+90[   ]+nop[         ]*
@@ -90,7 +90,7 @@ Disassembly of section .text:
 [       ]*86:[  ]+90[   ]+nop[         ]*
 [       ]*87:[  ]+90[   ]+nop[         ]*
 [       ]*88:[  ]+90[   ]+nop[         ]*
-[       ]*89:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*89:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+90 <nop7>:
 [       ]*90:[  ]+90[   ]+nop[         ]*
@@ -102,7 +102,7 @@ Disassembly of section .text:
 [       ]*96:[  ]+90[   ]+nop[         ]*
 [       ]*97:[  ]+90[   ]+nop[         ]*
 [       ]*98:[  ]+90[   ]+nop[         ]*
-[       ]*99:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*99:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+a0 <nop6>:
 [       ]*a0:[  ]+90[   ]+nop[         ]*
@@ -130,7 +130,7 @@ Disassembly of section .text:
 [       ]*b9:[  ]+90[   ]+nop[         ]*
 [       ]*ba:[  ]+90[   ]+nop[         ]*
 [       ]*bb:[  ]+90[   ]+nop[         ]*
-[       ]*bc:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*bc:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+c0 <nop4>:
 [       ]*c0:[  ]+90[   ]+nop[         ]*
@@ -145,7 +145,7 @@ Disassembly of section .text:
 [       ]*c9:[  ]+90[   ]+nop[         ]*
 [       ]*ca:[  ]+90[   ]+nop[         ]*
 [       ]*cb:[  ]+90[   ]+nop[         ]*
-[       ]*cc:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*cc:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+d0 <nop3>:
 [       ]*d0:[  ]+90[   ]+nop[         ]*

diff --git a/gas/testsuite/gas/i386/nops-2-merom.d b/gas/testsuite/gas/i386/nops-2-merom.d
index c6ea559761e0ea93e31443050c648d9f8e66abd0..7a544112d972128a18526bfa70a6e48b45193b9b 100644 (file)
--- a/gas/testsuite/gas/i386/nops-2-merom.d
+++ b/gas/testsuite/gas/i386/nops-2-merom.d
@@ -10,7 +10,7 @@ Disassembly of section .text:
 0+ <nop>:
 [       ]*0:[   ]+0f 44 c0[     ]+cmove[       ]+%eax,%eax
 [       ]*3:[   ]+8d b6 00 00 00 00[    ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*9:[   ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*9:[   ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+10 <nop15>:
 [       ]*10:[  ]+90[   ]+nop[         ]*
@@ -32,15 +32,15 @@ Disassembly of section .text:
 0+20 <nop14>:
 [       ]*20:[  ]+90[   ]+nop[         ]*
 [       ]*21:[  ]+90[   ]+nop[         ]*
-[       ]*22:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*29:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*22:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
+[       ]*29:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+30 <nop13>:
 [       ]*30:[  ]+90[   ]+nop[         ]*
 [       ]*31:[  ]+90[   ]+nop[         ]*
 [       ]*32:[  ]+90[   ]+nop[         ]*
 [       ]*33:[  ]+8d b6 00 00 00 00[    ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*39:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*39:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+40 <nop12>:
 [       ]*40:[  ]+90[   ]+nop[         ]*
@@ -56,8 +56,8 @@ Disassembly of section .text:
 [       ]*52:[  ]+90[   ]+nop[         ]*
 [       ]*53:[  ]+90[   ]+nop[         ]*
 [       ]*54:[  ]+90[   ]+nop[         ]*
-[       ]*55:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*59:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*55:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
+[       ]*59:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+60 <nop10>:
 [       ]*60:[  ]+90[   ]+nop[         ]*
@@ -67,7 +67,7 @@ Disassembly of section .text:
 [       ]*64:[  ]+90[   ]+nop[         ]*
 [       ]*65:[  ]+90[   ]+nop[         ]*
 [       ]*66:[  ]+8d 76 00[     ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*69:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*69:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+70 <nop9>:
 [       ]*70:[  ]+90[   ]+nop[         ]*
@@ -78,7 +78,7 @@ Disassembly of section .text:
 [       ]*75:[  ]+90[   ]+nop[         ]*
 [       ]*76:[  ]+90[   ]+nop[         ]*
 [       ]*77:[  ]+89 f6[        ]+mov[         ]+%esi,%esi
-[       ]*79:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*79:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+80 <nop8>:
 [       ]*80:[  ]+90[   ]+nop[         ]*
@@ -90,7 +90,7 @@ Disassembly of section .text:
 [       ]*86:[  ]+90[   ]+nop[         ]*
 [       ]*87:[  ]+90[   ]+nop[         ]*
 [       ]*88:[  ]+90[   ]+nop[         ]*
-[       ]*89:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*89:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+90 <nop7>:
 [       ]*90:[  ]+90[   ]+nop[         ]*
@@ -102,7 +102,7 @@ Disassembly of section .text:
 [       ]*96:[  ]+90[   ]+nop[         ]*
 [       ]*97:[  ]+90[   ]+nop[         ]*
 [       ]*98:[  ]+90[   ]+nop[         ]*
-[       ]*99:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*99:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+a0 <nop6>:
 [       ]*a0:[  ]+90[   ]+nop[         ]*
@@ -130,7 +130,7 @@ Disassembly of section .text:
 [       ]*b9:[  ]+90[   ]+nop[         ]*
 [       ]*ba:[  ]+90[   ]+nop[         ]*
 [       ]*bb:[  ]+90[   ]+nop[         ]*
-[       ]*bc:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*bc:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+c0 <nop4>:
 [       ]*c0:[  ]+90[   ]+nop[         ]*
@@ -145,7 +145,7 @@ Disassembly of section .text:
 [       ]*c9:[  ]+90[   ]+nop[         ]*
 [       ]*ca:[  ]+90[   ]+nop[         ]*
 [       ]*cb:[  ]+90[   ]+nop[         ]*
-[       ]*cc:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*cc:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+d0 <nop3>:
 [       ]*d0:[  ]+90[   ]+nop[         ]*

diff --git a/gas/testsuite/gas/i386/nops-2.d b/gas/testsuite/gas/i386/nops-2.d
index 6382f7e3772a2b1d004c64bb85c580aecd1bc4e2..003a4eb282b2547fb04245b605d1199d65b19dec 100644 (file)
--- a/gas/testsuite/gas/i386/nops-2.d
+++ b/gas/testsuite/gas/i386/nops-2.d
@@ -9,7 +9,7 @@ Disassembly of section .text:
 0+ <nop>:
 [       ]*0:[   ]+0f 44 c0[     ]+cmove[       ]+%eax,%eax
 [       ]*3:[   ]+8d b6 00 00 00 00[    ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*9:[   ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*9:[   ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+10 <nop15>:
 [       ]*10:[  ]+90[   ]+nop[         ]*
@@ -31,15 +31,15 @@ Disassembly of section .text:
 0+20 <nop14>:
 [       ]*20:[  ]+90[   ]+nop[         ]*
 [       ]*21:[  ]+90[   ]+nop[         ]*
-[       ]*22:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*29:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*22:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
+[       ]*29:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+30 <nop13>:
 [       ]*30:[  ]+90[   ]+nop[         ]*
 [       ]*31:[  ]+90[   ]+nop[         ]*
 [       ]*32:[  ]+90[   ]+nop[         ]*
 [       ]*33:[  ]+8d b6 00 00 00 00[    ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*39:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*39:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+40 <nop12>:
 [       ]*40:[  ]+90[   ]+nop[         ]*
@@ -55,8 +55,8 @@ Disassembly of section .text:
 [       ]*52:[  ]+90[   ]+nop[         ]*
 [       ]*53:[  ]+90[   ]+nop[         ]*
 [       ]*54:[  ]+90[   ]+nop[         ]*
-[       ]*55:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*59:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*55:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
+[       ]*59:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+60 <nop10>:
 [       ]*60:[  ]+90[   ]+nop[         ]*
@@ -66,7 +66,7 @@ Disassembly of section .text:
 [       ]*64:[  ]+90[   ]+nop[         ]*
 [       ]*65:[  ]+90[   ]+nop[         ]*
 [       ]*66:[  ]+8d 76 00[     ]+lea[         ]+0x0\(%esi\),%esi
-[       ]*69:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*69:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+70 <nop9>:
 [       ]*70:[  ]+90[   ]+nop[         ]*
@@ -77,7 +77,7 @@ Disassembly of section .text:
 [       ]*75:[  ]+90[   ]+nop[         ]*
 [       ]*76:[  ]+90[   ]+nop[         ]*
 [       ]*77:[  ]+89 f6[        ]+mov[         ]+%esi,%esi
-[       ]*79:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi\),%edi
+[       ]*79:[  ]+8d bc 27 00 00 00 00[         ]+lea[         ]+0x0\(%edi,%eiz,1\),%edi
 
 0+80 <nop8>:
 [       ]*80:[  ]+90[   ]+nop[         ]*
@@ -89,7 +89,7 @@ Disassembly of section .text:
 [       ]*86:[  ]+90[   ]+nop[         ]*
 [       ]*87:[  ]+90[   ]+nop[         ]*
 [       ]*88:[  ]+90[   ]+nop[         ]*
-[       ]*89:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*89:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+90 <nop7>:
 [       ]*90:[  ]+90[   ]+nop[         ]*
@@ -101,7 +101,7 @@ Disassembly of section .text:
 [       ]*96:[  ]+90[   ]+nop[         ]*
 [       ]*97:[  ]+90[   ]+nop[         ]*
 [       ]*98:[  ]+90[   ]+nop[         ]*
-[       ]*99:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*99:[  ]+8d b4 26 00 00 00 00[         ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+a0 <nop6>:
 [       ]*a0:[  ]+90[   ]+nop[         ]*
@@ -129,7 +129,7 @@ Disassembly of section .text:
 [       ]*b9:[  ]+90[   ]+nop[         ]*
 [       ]*ba:[  ]+90[   ]+nop[         ]*
 [       ]*bb:[  ]+90[   ]+nop[         ]*
-[       ]*bc:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*bc:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+c0 <nop4>:
 [       ]*c0:[  ]+90[   ]+nop[         ]*
@@ -144,7 +144,7 @@ Disassembly of section .text:
 [       ]*c9:[  ]+90[   ]+nop[         ]*
 [       ]*ca:[  ]+90[   ]+nop[         ]*
 [       ]*cb:[  ]+90[   ]+nop[         ]*
-[       ]*cc:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi\),%esi
+[       ]*cc:[  ]+8d 74 26 00[  ]+lea[         ]+0x0\(%esi,%eiz,1\),%esi
 
 0+d0 <nop3>:
 [       ]*d0:[  ]+90[   ]+nop[         ]*

diff --git a/gas/testsuite/gas/i386/nops-3-i386.d b/gas/testsuite/gas/i386/nops-3-i386.d
index 4184362ba89e0492242df80c75f1aac761e4c5af..6ab3fab356d4c6a07fbc9b12d1c0f94a6131e34a 100644 (file)
--- a/gas/testsuite/gas/i386/nops-3-i386.d
+++ b/gas/testsuite/gas/i386/nops-3-i386.d
@@ -40,6 +40,6 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    90                      nop    
 [      ]*[a-f0-9]+:    90                      nop    
 [      ]*[a-f0-9]+:    89 c3                   mov    %eax,%ebx
-[      ]*[a-f0-9]+:    8d b4 26 00 00 00 00    lea    0x0\(%esi\),%esi
-[      ]*[a-f0-9]+:    8d bc 27 00 00 00 00    lea    0x0\(%edi\),%edi
+[      ]*[a-f0-9]+:    8d b4 26 00 00 00 00    lea    0x0\(%esi,%eiz,1\),%esi
+[      ]*[a-f0-9]+:    8d bc 27 00 00 00 00    lea    0x0\(%edi,%eiz,1\),%edi
 #pass

diff --git a/gas/testsuite/gas/i386/nops-3.d b/gas/testsuite/gas/i386/nops-3.d
index 17640691e5c1d1f382a19a529c55d9e9a20af6c7..77ce744bbb61c9ce55d2d2e9f1453c92c5ab8588 100644 (file)
--- a/gas/testsuite/gas/i386/nops-3.d
+++ b/gas/testsuite/gas/i386/nops-3.d
@@ -39,6 +39,6 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    90                      nop    
 [      ]*[a-f0-9]+:    90                      nop    
 [      ]*[a-f0-9]+:    89 c3                   mov    %eax,%ebx
-[      ]*[a-f0-9]+:    8d b4 26 00 00 00 00    lea    0x0\(%esi\),%esi
-[      ]*[a-f0-9]+:    8d bc 27 00 00 00 00    lea    0x0\(%edi\),%edi
+[      ]*[a-f0-9]+:    8d b4 26 00 00 00 00    lea    0x0\(%esi,%eiz,1\),%esi
+[      ]*[a-f0-9]+:    8d bc 27 00 00 00 00    lea    0x0\(%edi,%eiz,1\),%edi
 #pass

diff --git a/gas/testsuite/gas/i386/sib-intel.d b/gas/testsuite/gas/i386/sib-intel.d
new file mode 100644 (file)
index 0000000..707f74a
--- /dev/null
+++ b/gas/testsuite/gas/i386/sib-intel.d
@@ -0,0 +1,20 @@
+#source: sib.s
+#objdump: -dw -Mintel
+#name: i386 SIB (Intel mode)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[      ]*[a-f0-9]+:    8b 03                   mov    eax,DWORD PTR \[ebx\]
+[      ]*[a-f0-9]+:    8b 04 23                mov    eax,DWORD PTR \[ebx\+eiz\*1\]
+[      ]*[a-f0-9]+:    8b 04 63                mov    eax,DWORD PTR \[ebx\+eiz\*2\]
+[      ]*[a-f0-9]+:    8b 04 a3                mov    eax,DWORD PTR \[ebx\+eiz\*4\]
+[      ]*[a-f0-9]+:    8b 04 e3                mov    eax,DWORD PTR \[ebx\+eiz\*8\]
+[      ]*[a-f0-9]+:    8b 04 24                mov    eax,DWORD PTR \[esp\]
+[      ]*[a-f0-9]+:    8b 04 24                mov    eax,DWORD PTR \[esp\]
+[      ]*[a-f0-9]+:    8b 04 64                mov    eax,DWORD PTR \[esp\+eiz\*2\]
+[      ]*[a-f0-9]+:    8b 04 a4                mov    eax,DWORD PTR \[esp\+eiz\*4\]
+[      ]*[a-f0-9]+:    8b 04 e4                mov    eax,DWORD PTR \[esp\+eiz\*8\]
+#pass

diff --git a/gas/testsuite/gas/i386/sib.d b/gas/testsuite/gas/i386/sib.d
index 2a5dbb6c9c9abee9e79abeca48fee554e08cd908..574a308e6f1fe6eb0824fc83ce07df93273fb7a3 100644 (file)
--- a/gas/testsuite/gas/i386/sib.d
+++ b/gas/testsuite/gas/i386/sib.d
@@ -5,11 +5,15 @@
 
 Disassembly of section .text:
 
-0+000 <foo>:
-   0:  8b 04 23 [      ]*mov [         ]*\(%ebx\),%eax
-   3:  8b 04 63 [      ]*mov [         ]*\(%ebx\),%eax
-   6:  8b 04 a3 [      ]*mov [         ]*\(%ebx\),%eax
-   9:  8b 04 e3 [      ]*mov [         ]*\(%ebx\),%eax
-   c:  90 [    ]*nop [         ]*
-   d:  90 [    ]*nop [         ]*
-       ...
+0+ <foo>:
+[      ]*[a-f0-9]+:    8b 03                   mov    \(%ebx\),%eax
+[      ]*[a-f0-9]+:    8b 04 23                mov    \(%ebx,%eiz,1\),%eax
+[      ]*[a-f0-9]+:    8b 04 63                mov    \(%ebx,%eiz,2\),%eax
+[      ]*[a-f0-9]+:    8b 04 a3                mov    \(%ebx,%eiz,4\),%eax
+[      ]*[a-f0-9]+:    8b 04 e3                mov    \(%ebx,%eiz,8\),%eax
+[      ]*[a-f0-9]+:    8b 04 24                mov    \(%esp\),%eax
+[      ]*[a-f0-9]+:    8b 04 24                mov    \(%esp\),%eax
+[      ]*[a-f0-9]+:    8b 04 64                mov    \(%esp,%eiz,2\),%eax
+[      ]*[a-f0-9]+:    8b 04 a4                mov    \(%esp,%eiz,4\),%eax
+[      ]*[a-f0-9]+:    8b 04 e4                mov    \(%esp,%eiz,8\),%eax
+#pass

diff --git a/gas/testsuite/gas/i386/sib.s b/gas/testsuite/gas/i386/sib.s
index 25d88b75a6da95c2b174ea7df01c519b2bb82313..f11d6d2480f7b2ea78015803d0cb743e11fe7f1f 100644 (file)
--- a/gas/testsuite/gas/i386/sib.s
+++ b/gas/testsuite/gas/i386/sib.s
@@ -1,11 +1,16 @@
 #Test the special case of the index bits, 0x4, in SIB.
 
        .text
+       .allow_index_reg
 foo:
-       .byte   0x8B, 0x04, 0x23        # effect is: movl (%ebx), %eax
-       .byte   0x8B, 0x04, 0x63        # effect is: movl (%ebx), %eax  
-       .byte   0x8B, 0x04, 0xA3        # effect is: movl (%ebx), %eax
-       .byte   0x8B, 0x04, 0xE3        # effect is: movl (%ebx), %eax
-       nop
-       nop
-       .p2align        4,0
+       mov     (%ebx),%eax
+       mov     (%ebx,%eiz,1),%eax
+       mov     (%ebx,%eiz,2),%eax
+       mov     (%ebx,%eiz,4),%eax
+       mov     (%ebx,%eiz,8),%eax
+       mov     (%esp),%eax
+       mov     (%esp,%eiz,1),%eax
+       mov     (%esp,%eiz,2),%eax
+       mov     (%esp,%eiz,4),%eax
+       mov     (%esp,%eiz,8),%eax
+       .p2align 4

diff --git a/gas/testsuite/gas/i386/x86-64-sib-intel.d b/gas/testsuite/gas/i386/x86-64-sib-intel.d
new file mode 100644 (file)
index 0000000..0dce66f
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-sib-intel.d
@@ -0,0 +1,21 @@
+#source: x86-64-sib.s
+#as: -J
+#objdump: -dw -Mintel
+#name: x86-64 SIB (Intel mode)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[      ]*[a-f0-9]+:    8b 03                   mov    eax,DWORD PTR \[rbx\]
+[      ]*[a-f0-9]+:    8b 04 23                mov    eax,DWORD PTR \[rbx\+riz\*1\]
+[      ]*[a-f0-9]+:    8b 04 63                mov    eax,DWORD PTR \[rbx\+riz\*2\]
+[      ]*[a-f0-9]+:    8b 04 a3                mov    eax,DWORD PTR \[rbx\+riz\*4\]
+[      ]*[a-f0-9]+:    8b 04 e3                mov    eax,DWORD PTR \[rbx\+riz\*8\]
+[      ]*[a-f0-9]+:    8b 04 24                mov    eax,DWORD PTR \[rsp\]
+[      ]*[a-f0-9]+:    8b 04 24                mov    eax,DWORD PTR \[rsp\]
+[      ]*[a-f0-9]+:    8b 04 64                mov    eax,DWORD PTR \[rsp\+riz\*2\]
+[      ]*[a-f0-9]+:    8b 04 a4                mov    eax,DWORD PTR \[rsp\+riz\*4\]
+[      ]*[a-f0-9]+:    8b 04 e4                mov    eax,DWORD PTR \[rsp\+riz\*8\]
+#pass

diff --git a/gas/testsuite/gas/i386/x86-64-sib.d b/gas/testsuite/gas/i386/x86-64-sib.d
new file mode 100644 (file)
index 0000000..32e02be
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-sib.d
@@ -0,0 +1,20 @@
+#as: -J
+#objdump: -dw
+#name: x86-64 SIB
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[      ]*[a-f0-9]+:    8b 03                   mov    \(%rbx\),%eax
+[      ]*[a-f0-9]+:    8b 04 23                mov    \(%rbx,%riz,1\),%eax
+[      ]*[a-f0-9]+:    8b 04 63                mov    \(%rbx,%riz,2\),%eax
+[      ]*[a-f0-9]+:    8b 04 a3                mov    \(%rbx,%riz,4\),%eax
+[      ]*[a-f0-9]+:    8b 04 e3                mov    \(%rbx,%riz,8\),%eax
+[      ]*[a-f0-9]+:    8b 04 24                mov    \(%rsp\),%eax
+[      ]*[a-f0-9]+:    8b 04 24                mov    \(%rsp\),%eax
+[      ]*[a-f0-9]+:    8b 04 64                mov    \(%rsp,%riz,2\),%eax
+[      ]*[a-f0-9]+:    8b 04 a4                mov    \(%rsp,%riz,4\),%eax
+[      ]*[a-f0-9]+:    8b 04 e4                mov    \(%rsp,%riz,8\),%eax
+#pass

diff --git a/gas/testsuite/gas/i386/x86-64-sib.s b/gas/testsuite/gas/i386/x86-64-sib.s
new file mode 100644 (file)
index 0000000..26ab395
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-sib.s
@@ -0,0 +1,16 @@
+#Test the special case of the index bits, 0x4, in SIB.
+
+       .text
+       .allow_index_reg
+foo:
+       mov     (%rbx),%eax
+       mov     (%rbx,%riz,1),%eax
+       mov     (%rbx,%riz,2),%eax
+       mov     (%rbx,%riz,4),%eax
+       mov     (%rbx,%riz,8),%eax
+       mov     (%rsp),%eax
+       mov     (%rsp,%riz,1),%eax
+       mov     (%rsp,%riz,2),%eax
+       mov     (%rsp,%riz,4),%eax
+       mov     (%rsp,%riz,8),%eax
+       .p2align 4

diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index 9c606826c0768781329dc3e05353036ec0e5be30..cc46a65ff27f8c1d3293ec1523073f817a0dc5b3 100644 (file)
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR 658
+       * ld-i386/tlsbin.dd: Updated.
+       * ld-i386/tlsld1.dd: Likewise.
+
 2007-09-19  Nick Clifton  <nickc@redhat.com>
 
        * ld-scripts/crossref.exp: Compile test source with -mtiny=0 in

diff --git a/ld/testsuite/ld-i386/tlsbin.dd b/ld/testsuite/ld-i386/tlsbin.dd
index e399f867d4e98582f284042c86b6097e382d4954..9cf14a5379b4903fd09c8d7b3185c2ab5162c727 100644 (file)
--- a/ld/testsuite/ld-i386/tlsbin.dd
+++ b/ld/testsuite/ld-i386/tlsbin.dd
@@ -92,7 +92,7 @@ Disassembly of section .text:
 #  LD -> LE
  8049085:      65 a1 00 00 00 00[      ]+mov    %gs:0x0,%eax
  804908b:      90[     ]+nop *
- 804908c:      8d 74 26 00[    ]+lea    0x0\(%esi\),%esi
+ 804908c:      8d 74 26 00[    ]+lea    0x0\(%esi,%eiz,1\),%esi
  8049090:      90[     ]+nop *
  8049091:      90[     ]+nop *
  8049092:      8d 90 20 f0 ff ff[      ]+lea    -0xfe0\(%eax\),%edx
@@ -108,7 +108,7 @@ Disassembly of section .text:
 #  LD -> LE against hidden variables
  80490a4:      65 a1 00 00 00 00[      ]+mov    %gs:0x0,%eax
  80490aa:      90[     ]+nop *
- 80490ab:      8d 74 26 00[    ]+lea    0x0\(%esi\),%esi
+ 80490ab:      8d 74 26 00[    ]+lea    0x0\(%esi,%eiz,1\),%esi
  80490af:      90[     ]+nop *
  80490b0:      90[     ]+nop *
  80490b1:      8d 90 40 f0 ff ff[      ]+lea    -0xfc0\(%eax\),%edx

diff --git a/ld/testsuite/ld-i386/tlsld1.dd b/ld/testsuite/ld-i386/tlsld1.dd
index 782eb5afdb6d03e402b02abbda18a6cf5b8752ca..2ad49ffa97022736373c77a5928f11cb9822a840 100644 (file)
--- a/ld/testsuite/ld-i386/tlsld1.dd
+++ b/ld/testsuite/ld-i386/tlsld1.dd
@@ -11,5 +11,5 @@ Disassembly of section .text:
 [a-f0-9]+ <_start>:
 [      ]*[a-f0-9]+:    65 a1 00 00 00 00       mov    %gs:0x0,%eax
 [      ]*[a-f0-9]+:    90                      nop    
-[      ]*[a-f0-9]+:    8d 74 26 00             lea    0x0\(%esi\),%esi
+[      ]*[a-f0-9]+:    8d 74 26 00             lea    0x0\(%esi,%eiz,1\),%esi
 #pass

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 1434860a2896c10226751f02a96472fd5fb00772..88be05e9a91a3c8ab3fa527db4d833d18d2797e0 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,22 @@
+2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR 658
+       * 386-dis.c (index64): New.
+       (index32): Likewise.
+       (intel_index64): Likewise.
+       (intel_index32): Likewise.
+       (att_index64): Likewise.
+       (att_index32): Likewise.
+       (print_insn): Set index64 and index32.
+       (OP_E_extended): Use index64/index32 for index register for
+       SIB with INDEX == 4.
+
+       * i386-opc.h (RegEiz): New.
+       (RegRiz): Likewise.
+
+       * i386-reg.tbl: Add eiz and riz.
+       * i386-tbl.h: Regenerated.
+
 2007-09-19  H.J. Lu  <hongjiu.lu@intel.com>
 
        * i386-dis.c (OP_E_extended): Always display scale for memory.

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 19b13d0dad4f293ad242cc8e06fd91f0ce8f2594..9a45e9100d8eb9361c0845c09f9c9ccb7495d7a8 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1353,6 +1353,8 @@ static const char **names16;
 static const char **names8;
 static const char **names8rex;
 static const char **names_seg;
+static const char *index64;
+static const char *index32;
 static const char **index16;
 
 static const char *intel_names64[] = {
@@ -1377,6 +1379,8 @@ static const char *intel_names8rex[] = {
 static const char *intel_names_seg[] = {
   "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
 };
+static const char *intel_index64 = "riz";
+static const char *intel_index32 = "eiz";
 static const char *intel_index16[] = {
   "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
 };
@@ -1403,6 +1407,8 @@ static const char *att_names8rex[] = {
 static const char *att_names_seg[] = {
   "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
 };
+static const char *att_index64 = "%riz";
+static const char *att_index32 = "%eiz";
 static const char *att_index16[] = {
   "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
 };
@@ -5001,6 +5007,8 @@ print_insn (bfd_vma pc, disassemble_info *info)
       names8 = intel_names8;
       names8rex = intel_names8rex;
       names_seg = intel_names_seg;
+      index64 = intel_index64;
+      index32 = intel_index32;
       index16 = intel_index16;
       open_char = '[';
       close_char = ']';
@@ -5015,6 +5023,8 @@ print_insn (bfd_vma pc, disassemble_info *info)
       names8 = att_names8;
       names8rex = att_names8rex;
       names_seg = att_names_seg;
+      index64 = att_index64;
+      index32 = att_index32;
       index16 = att_index16;
       open_char = '(';
       close_char =  ')';
@@ -6318,9 +6328,7 @@ OP_E_extended (int bytemode, int sizeflag, int has_drex)
          havesib = 1;
          FETCH_DATA (the_info, codep + 1);
          index = (*codep >> 3) & 7;
-         if (address_mode == mode_64bit || index != 0x4)
-           /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored.  */
-           scale = (*codep >> 6) & 3;
+         scale = (*codep >> 6) & 3;
          base = *codep & 7;
          USED_REX (REX_X);
          if (rex & REX_X)
@@ -6391,19 +6399,26 @@ OP_E_extended (int bytemode, int sizeflag, int has_drex)
                     ? names64[base] : names32[base]);
          if (havesib)
            {
-             if (haveindex)
+             /* ESP/RSP won't allow index.  If base isn't ESP/RSP,
+                print index to tell base + index from base.  */
+             if (scale != 0
+                 || haveindex
+                 || (havebase && base != ESP_REG_NUM))
                {
                  if (!intel_syntax || havebase)
                    {
                      *obufp++ = separator_char;
                      *obufp = '\0';
                    }
-                 oappend (address_mode == mode_64bit 
-                          && (sizeflag & AFLAG)
-                          ? names64[index] : names32[index]);
-               }
-             if (scale != 0 || haveindex)
-               {
+                 if (haveindex)
+                   oappend (address_mode == mode_64bit 
+                            && (sizeflag & AFLAG)
+                            ? names64[index] : names32[index]);
+                 else
+                   oappend (address_mode == mode_64bit 
+                            && (sizeflag & AFLAG)
+                            ? index64 : index32);
+
                  *obufp++ = scale_char;
                  *obufp = '\0';
                  sprintf (scratchbuf, "%d", 1 << scale);
@@ -6413,7 +6428,7 @@ OP_E_extended (int bytemode, int sizeflag, int has_drex)
          if (intel_syntax
              && (disp || modrm.mod != 0 || (base & 7) == 5))
            {
-             if ((bfd_signed_vma) disp >= 0)
+             if (!havedisp || (bfd_signed_vma) disp >= 0)
                {
                  *obufp++ = '+';
                  *obufp = '\0';
@@ -6425,7 +6440,10 @@ OP_E_extended (int bytemode, int sizeflag, int has_drex)
                  disp = - (bfd_signed_vma) disp;
                }
 
-             print_displacement (scratchbuf, disp);
+             if (havedisp)
+               print_displacement (scratchbuf, disp);
+             else
+               print_operand_value (scratchbuf, 1, disp);
              oappend (scratchbuf);
            }
 

diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 00fbe1c3ebaf8762c84a02ca2c3e6480b9fe973f..0dda2a47bdf9368c9123e38ed46f1997e6c0353d 100644 (file)
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -444,6 +444,9 @@ typedef struct
 #define RegRex64    0x2  /* Extended 8 bit register.  */
   unsigned int reg_num;
 #define RegRip ((unsigned int ) ~0)
+/* EIZ and RIZ are fake index registers.  */
+#define RegEiz (RegRip - 1)
+#define RegRiz (RegEiz - 1)
 }
 reg_entry;
 

diff --git a/opcodes/i386-reg.tbl b/opcodes/i386-reg.tbl
index 28debd7610ba9850ef9997dddc2beabb18a95706..373aba7c6ae181980251f2eb380aaf2f5dab2b64 100644 (file)
--- a/opcodes/i386-reg.tbl
+++ b/opcodes/i386-reg.tbl
@@ -190,6 +190,10 @@ xmm15, RegXMM, RegRex, 7
 // No type will make this register rejected for all purposes except
 // for addressing.  This saves creating one extra type for RIP.
 rip, BaseIndex, 0, RegRip
+// No type will make these registers rejected for all purposes except
+// for addressing.
+eiz, BaseIndex, 0, RegEiz
+riz, BaseIndex, 0, RegRiz
 // fp regs.
 st(0), FloatReg|FloatAcc, 0, 0
 st(1), FloatReg, 0, 1

diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index 2f18422c9661b6bc45856f45b002dd76be9b1322..fe585db4e0a92b9a5fb4452b710ba200845e696d 100644 (file)
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -13279,6 +13279,14 @@ const reg_entry i386_regtab[] =
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 
        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     0, RegRip },
+  { "eiz",
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 
+       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    0, RegEiz },
+  { "riz",
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 
+       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    0, RegRiz },
   { "st(0)",
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
        0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 } },