unsigned long *best_parent_rate,
u8 width, unsigned long flags)
{
+ struct clk_multiplier *mult = to_clk_multiplier(hw);
unsigned long orig_parent_rate = *best_parent_rate;
unsigned long parent_rate, current_rate, best_rate = ~0;
unsigned int i, bestmult = 0;
+ unsigned int maxmult = (1 << width) - 1;
+
+ if (!(clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT)) {
+ bestmult = rate / orig_parent_rate;
+
+ /* Make sure we don't end up with a 0 multiplier */
+ if ((bestmult == 0) &&
+ !(mult->flags & CLK_MULTIPLIER_ZERO_BYPASS))
+ bestmult = 1;
- if (!(clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT))
- return rate / *best_parent_rate;
+ /* Make sure we don't overflow the multiplier */
+ if (bestmult > maxmult)
+ bestmult = maxmult;
+
+ return bestmult;
+ }
- for (i = 1; i < ((1 << width) - 1); i++) {
+ for (i = 1; i < maxmult; i++) {
if (rate == orig_parent_rate * i) {
/*
* This is the best case for us if we have a
if (--core->enable_count > 0)
return;
- trace_clk_disable(core);
+ trace_clk_disable_rcuidle(core);
if (core->ops->disable)
core->ops->disable(core->hw);
- trace_clk_disable_complete(core);
+ trace_clk_disable_complete_rcuidle(core);
clk_core_disable(core->parent);
}
if (ret)
return ret;
- trace_clk_enable(core);
+ trace_clk_enable_rcuidle(core);
if (core->ops->enable)
ret = core->ops->enable(core->hw);
- trace_clk_enable_complete(core);
+ trace_clk_enable_complete_rcuidle(core);
if (ret) {
clk_core_disable(core->parent);