opcodes:
authorJoern Rennecke <joern.rennecke@embecosm.com>
Thu, 12 Feb 1998 03:56:57 +0000 (03:56 +0000)
committerJoern Rennecke <joern.rennecke@embecosm.com>
Thu, 12 Feb 1998 03:56:57 +0000 (03:56 +0000)
* d10v-opc.c (d10v_predefined_registers, d10v_operands, d10v_opcodes):
Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1.
Introduce OPERAND_GPR.
* d10v-dis.c (print_operand): Likewise.
include/opcode:
* d10v.h (OPERAND_ACC): Split into:
(OPERAND_ACC0, OPERAND_ACC1) .
(OPERAND_GPR): Define.
gas/config:
* tc-d10v.c (parallel_ok, find_opcode):
Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1.
Introduce OPERAND_GPR.

gas/ChangeLog
gas/config/tc-d10v.c
include/opcode/ChangeLog
opcodes/ChangeLog

index 8b2e4e6dd75e67cf671b874c55a1de6679f1a8ac..9506cb7aad952aa3ac855048fbededa495ba48d0 100644 (file)
@@ -1,3 +1,10 @@
+Thu Feb 12 03:41:00 1998  J"orn Rennecke  <amylaar@cygnus.co.uk>
+
+Fix rac to accept only a0:
+       * tc-d10v.c (parallel_ok, find_opcode):
+       Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1.
+       Introduce OPERAND_GPR.
+
 Wed Feb 11 16:28:13 1998  Richard Henderson  <rth@cygnus.com>
 
        * read.c (s_fill): Handle non-constant repeat counts by creating
index f5065f66fc7f8a738604676c33e68e9c50ec12f9..3db85289391b7c2ebb9e6673d1573789b60fb923 100644 (file)
@@ -1,6 +1,6 @@
 /* tc-d10v.c -- Assembler code for the Mitsubishi D10V
 
-   Copyright (C) 1996, 1997 Free Software Foundation.
+   Copyright (C) 1996, 1997, 1998 Free Software Foundation.
 
    This file is part of GAS, the GNU Assembler.
 
@@ -895,7 +895,7 @@ parallel_ok (op1, insn1, op2, insn2, exec_type)
          if (flags & OPERAND_REG)
            {
              regno = (ins >> shift) & mask;
-             if (flags & OPERAND_ACC)     
+             if (flags & (OPERAND_ACC0|OPERAND_ACC1))
                regno += 16;
              else if (flags & OPERAND_CONTROL) /* mvtc or mvfc */
                { 
@@ -904,7 +904,7 @@ parallel_ok (op1, insn1, op2, insn2, exec_type)
                  else
                    regno = 18; 
                }
-             else if (flags & (OPERAND_FFLAG|OPERAND_CFLAG))  
+             else if (flags & (OPERAND_FFLAG|OPERAND_CFLAG))
                regno = 19;
              
              if ( flags & OPERAND_DEST )
@@ -1148,10 +1148,9 @@ find_opcode (opcode, myops)
          int num = myops[0].X_add_number;
 
          if (X_op != O_register
-             || (flags & OPERAND_ACC) != (num & OPERAND_ACC)
-             || (flags & OPERAND_FFLAG) != (num & OPERAND_FFLAG)
-             || (flags & OPERAND_CFLAG) != (num & OPERAND_CFLAG)
-             || (flags & OPERAND_CONTROL) != (num & OPERAND_CONTROL))
+             || (num & ~flags
+                 & (OPERAND_GPR | OPERAND_ACC0 | OPERAND_ACC1
+                    | OPERAND_FFLAG | OPERAND_CFLAG | OPERAND_CONTROL)))
            {
              as_bad ("bad opcode or operands");
              return 0;
@@ -1232,11 +1231,11 @@ find_opcode (opcode, myops)
              
              if (flags & OPERAND_REG)
                {
-                 if ((X_op != O_register) ||
-                     ((flags & OPERAND_ACC) != (num & OPERAND_ACC)) ||
-                     ((flags & OPERAND_FFLAG) != (num & OPERAND_FFLAG)) ||
-                     ((flags & OPERAND_CFLAG) != (num & OPERAND_CFLAG)) ||
-                     ((flags & OPERAND_CONTROL) != (num & OPERAND_CONTROL)))
+                 if ((X_op != O_register)
+                     || (num & ~flags
+                         & (OPERAND_GPR | OPERAND_ACC0 | OPERAND_ACC1
+                            | OPERAND_FFLAG | OPERAND_CFLAG
+                            | OPERAND_CONTROL)))
                    {
                      match=0;
                      break;
index 7c79fa18ab80a757efef91bb7ce29f70fcf0baf8..65ff1376aad6e646cd3128293bfba68778331b39 100644 (file)
@@ -1,3 +1,10 @@
+Thu Feb 12 03:41:00 1998  J"orn Rennecke  <amylaar@cygnus.co.uk>
+
+Fix rac to accept only a0:
+       * d10v.h (OPERAND_ACC): Split into:
+       (OPERAND_ACC0, OPERAND_ACC1) .
+       (OPERAND_GPR): Define.
+
 Wed Feb 11 17:31:53 1998  Doug Evans  <devans@seba.cygnus.com>
 
        * cgen.h (CGEN_FIELDS): Define here.
index be2e312ed7ff41a4add0ce0d51ec48ac2861a7ee..4198167d492e94183c1444065988f575e76e8155 100644 (file)
@@ -1,3 +1,11 @@
+Thu Feb 12 03:41:00 1998  J"orn Rennecke  <amylaar@cygnus.co.uk>
+
+Fix rac to accept only a0:
+       * d10v-opc.c (d10v_predefined_registers, d10v_operands, d10v_opcodes):
+       Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1.
+       Introduce OPERAND_GPR.
+       * d10v-dis.c (print_operand): Likewise.
+
 Wed Feb 11 18:58:34 1998  Doug Evans  <devans@seba.cygnus.com>
 
        * cgen-opc.in: New file.
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