From: Andrew Cagney Date: Fri, 19 Sep 1997 02:16:41 +0000 (+0000) Subject: Correct ordering of args for cmov insn. X-Git-Url: http://git.efficios.com/?a=commitdiff_plain;h=1379884be1c0d2a8083228a0bedeaf45a4b8874d;p=deliverable%2Fbinutils-gdb.git Correct ordering of args for cmov insn. --- diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index fe75e9d245..c836b2a4b2 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +start-sanitize-v850e +Fri Sep 19 11:45:49 1997 Andrew Cagney + + * v850-opc.c ("cmov"): Order reg param r1, r2 not r2, r2. + +end-sanitize-v850e Thu Sep 18 11:21:43 1997 Doug Evans * sparc-opc.c (sparclet_cpreg_table): Add %ccsr2, %cccrr, %ccrstr. diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c index bafb985af2..5376bdc09a 100644 --- a/opcodes/v850-opc.c +++ b/opcodes/v850-opc.c @@ -638,7 +638,7 @@ const struct v850_opcode v850_opcodes[] = /* arithmetic operation instructions */ { "setf", two (0x07e0, 0x0000), two (0x07f0, 0xffff), {CCCC, R2}, 0, PROCESSOR_ALL }, /* start-sanitize-v850e */ -{ "cmov", two (0x07e0, 0x0320), two (0x07e0, 0x07e1), {MOVCC, R2, R1, R3}, 0, PROCESSOR_NOT_V850 }, +{ "cmov", two (0x07e0, 0x0320), two (0x07e0, 0x07e1), {MOVCC, R1, R2, R3}, 0, PROCESSOR_NOT_V850 }, { "cmov", two (0x07e0, 0x0300), two (0x07e0, 0x07e1), {MOVCC, I5, R2, R3}, 0, PROCESSOR_NOT_V850 }, { "mul", two (0x07e0, 0x0220), two (0x07e0, 0x07ff), {R1, R2, R3}, 0, PROCESSOR_NOT_V850 },