From: Matthew Malcomson Date: Thu, 7 Nov 2019 16:18:51 +0000 (+0000) Subject: [gas][aarch64] Armv8.6-a option [1/X] X-Git-Url: http://git.efficios.com/?a=commitdiff_plain;h=8ae2d3d9eabfd3dff6a540e7789e368e8d75fbce;p=deliverable%2Fbinutils-gdb.git [gas][aarch64] Armv8.6-a option [1/X] Hi, This patch is part of a series that adds support for Armv8.6-A to binutils. This first patch adds the Armv8.6-A flag to binutils. No instructions are behind it at the moment. Commited on behalf of Mihail Ionescu. gas/ChangeLog: 2019-11-07 Mihail Ionescu 2019-11-07 Matthew Malcomson * config/tc-aarch64.c (armv8.6-a): New arch. * doc/c-aarch64.texi (armv8.6-a): Document new arch. include/ChangeLog: 2019-11-07 Mihail Ionescu 2019-11-07 Matthew Malcomson * opcode/aarch64.h (AARCH64_FEATURE_V8_6): New. (AARCH64_ARCH_V8_6): New. opcodes/ChangeLog: 2019-11-07 Mihail Ionescu 2019-11-07 Matthew Malcomson * aarch64-tbl.h (ARMV8_6): New macro. Is it ok for trunk? Regards, Mihail --- diff --git a/gas/ChangeLog b/gas/ChangeLog index e59f3d9bcc..40481d26b4 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2019-11-07 Mihail Ionescu +2019-11-07 Matthew Malcomson + + * config/tc-aarch64.c (armv8.6-a): New arch. + * doc/c-aarch64.texi (armv8.6-a): Document new arch. + 2019-11-07 Jan Beulich * config/tc-i386.c (cpu_arch): Add .rdpru and .mcommit entries. diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index b4ee0625ce..fb1ec0bcc3 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -8918,6 +8918,7 @@ static const struct aarch64_arch_option_table aarch64_archs[] = { {"armv8.3-a", AARCH64_ARCH_V8_3}, {"armv8.4-a", AARCH64_ARCH_V8_4}, {"armv8.5-a", AARCH64_ARCH_V8_5}, + {"armv8.6-a", AARCH64_ARCH_V8_6}, {NULL, AARCH64_ARCH_NONE} }; diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index 2c236e2c84..a83a859e4d 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -100,7 +100,7 @@ issue an error message if an attempt is made to assemble an instruction which will not execute on the target architecture. The following architecture names are recognized: @code{armv8-a}, @code{armv8.1-a}, @code{armv8.2-a}, @code{armv8.3-a}, @code{armv8.4-a} -and @code{armv8.5-a}. +@code{armv8.5-a}, and @code{armv8.6-a}. If both @option{-mcpu} and @option{-march} are specified, the assembler will use the setting for @option{-mcpu}. If neither are diff --git a/include/ChangeLog b/include/ChangeLog index 64e59d9b7c..246dc49031 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,9 @@ +2019-11-07 Mihail Ionescu +2019-11-07 Matthew Malcomson + + * opcode/aarch64.h (AARCH64_FEATURE_V8_6): New. + (AARCH64_ARCH_V8_6): New. + 2019-11-07 Alan Modra * elf/cr16c.h: Delete. diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index d0bbe01be6..493e8f8655 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -63,6 +63,7 @@ typedef uint32_t aarch64_insn; #define AARCH64_FEATURE_DOTPROD 0x080000000 /* Dot Product instructions. */ #define AARCH64_FEATURE_F16_FML 0x1000000000ULL /* v8.2 FP16FML ins. */ #define AARCH64_FEATURE_V8_5 0x2000000000ULL /* ARMv8.5 processors. */ +#define AARCH64_FEATURE_V8_6 0x00000002 /* ARMv8.6 processors. */ /* Flag Manipulation insns. */ #define AARCH64_FEATURE_FLAGMANIP 0x4000000000ULL @@ -129,7 +130,8 @@ typedef uint32_t aarch64_insn; | AARCH64_FEATURE_SCXTNUM \ | AARCH64_FEATURE_ID_PFR2 \ | AARCH64_FEATURE_SSBS) - +#define AARCH64_ARCH_V8_6 AARCH64_FEATURE (AARCH64_ARCH_V8_5, \ + AARCH64_FEATURE_V8_6) #define AARCH64_ARCH_NONE AARCH64_FEATURE (0, 0) #define AARCH64_ANY AARCH64_FEATURE (-1, 0) /* Any basic core. */ diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 41f5d0cb82..e357230e31 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2019-11-07 Mihail Ionescu +2019-11-07 Matthew Malcomson + + * aarch64-tbl.h (ARMV8_6): New macro. + 2019-11-07 Jan Beulich * i386-dis.c (prefix_table): Add mcommit. diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index 00168dd12e..cdebac3f10 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -2343,6 +2343,8 @@ static const aarch64_feature_set aarch64_feature_sve2sm4 = AARCH64_FEATURE (AARCH64_FEATURE_SVE2 | AARCH64_FEATURE_SVE2_SM4, 0); static const aarch64_feature_set aarch64_feature_sve2bitperm = AARCH64_FEATURE (AARCH64_FEATURE_SVE2 | AARCH64_FEATURE_SVE2_BITPERM, 0); +static const aarch64_feature_set aarch64_feature_v8_6 = + AARCH64_FEATURE (AARCH64_FEATURE_V8_6, 0); #define CORE &aarch64_feature_v8 @@ -2384,6 +2386,7 @@ static const aarch64_feature_set aarch64_feature_sve2bitperm = #define SVE2_SHA3 &aarch64_feature_sve2sha3 #define SVE2_SM4 &aarch64_feature_sve2sm4 #define SVE2_BITPERM &aarch64_feature_sve2bitperm +#define ARMV8_6 &aarch64_feature_v8_6 #define CORE_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \ { NAME, OPCODE, MASK, CLASS, OP, CORE, OPS, QUALS, FLAGS, 0, 0, NULL }