From: Claudiu Zissulescu Date: Tue, 3 May 2016 11:44:13 +0000 (+0200) Subject: [ARC] Add SYNTAX_NOP and SYNTAX_1OP for extension instructions X-Git-Url: http://git.efficios.com/?a=commitdiff_plain;h=945e0f82dad31db89a107b496532886fe215c011;p=deliverable%2Fbinutils-gdb.git [ARC] Add SYNTAX_NOP and SYNTAX_1OP for extension instructions gas/ 2016-05-03 Claudiu Zissulescu * config/tc-arc.c (syntaxclass): Add SYNTAX_NOP and SYNTAX_1OP. (arc_extinsn): Handle new introduced syntax. * testsuite/gas/arc/textinsn1op.d: New file. * testsuite/gas/arc/textinsn1op.s: Likewise. * doc/c-arc.texi: Document SYNTAX_NOP and SYNTAX_1OP. opcodes/ 2016-05-03 Claudiu Zissulescu * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP. (arcExtMap_genOpcode): Likewise. * arc-opc.c (arg_32bit_rc): Define new variable. (arg_32bit_u6): Likewise. (arg_32bit_limm): Likewise. include/ 2016-05-03 Claudiu Zissulescu * opcode/arc.h (ARC_SYNTAX_1OP): Declare (ARC_SYNTAX_NOP): Likewsie. (ARC_OP1_MUST_BE_IMM): Update defined value. (ARC_OP1_IMM_IMPLIED): Likewise. (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare. --- diff --git a/gas/ChangeLog b/gas/ChangeLog index 4edb8a2785..4786e81d64 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,11 @@ +2016-05-03 Claudiu Zissulescu + + * config/tc-arc.c (syntaxclass): Add SYNTAX_NOP and SYNTAX_1OP. + (arc_extinsn): Handle new introduced syntax. + * testsuite/gas/arc/textinsn1op.d: New file. + * testsuite/gas/arc/textinsn1op.s: Likewise. + * doc/c-arc.texi: Document SYNTAX_NOP and SYNTAX_1OP. + 2016-05-03 Pitchumani Sivanupandi * testsuite/gas/lns/lns.exp: Add avr to list of targets using diff --git a/gas/config/tc-arc.c b/gas/config/tc-arc.c index 169b05c348..b64174fb1c 100644 --- a/gas/config/tc-arc.c +++ b/gas/config/tc-arc.c @@ -337,7 +337,9 @@ static const attributes_t suffixclass[] = static const attributes_t syntaxclass[] = { { "SYNTAX_3OP", 10, ARC_SYNTAX_3OP }, - { "SYNTAX_2OP", 10, ARC_SYNTAX_2OP } + { "SYNTAX_2OP", 10, ARC_SYNTAX_2OP }, + { "SYNTAX_1OP", 10, ARC_SYNTAX_1OP }, + { "SYNTAX_NOP", 10, ARC_SYNTAX_NOP } }; /* Extension instruction syntax classes modifiers. */ @@ -4233,13 +4235,15 @@ arc_extinsn (int ignore ATTRIBUTE_UNUSED) && (einsn.major != 5) && (einsn.major != 9)) as_fatal (_("minor opcode not in range [0x00 - 0x3f]")); - switch (einsn.syntax & (ARC_SYNTAX_3OP | ARC_SYNTAX_2OP)) + switch (einsn.syntax & ARC_SYNTAX_MASK) { case ARC_SYNTAX_3OP: if (einsn.modsyn & ARC_OP1_IMM_IMPLIED) as_fatal (_("Improper use of OP1_IMM_IMPLIED")); break; case ARC_SYNTAX_2OP: + case ARC_SYNTAX_1OP: + case ARC_SYNTAX_NOP: if (einsn.modsyn & ARC_OP1_MUST_BE_IMM) as_fatal (_("Improper use of OP1_MUST_BE_IMM")); break; diff --git a/gas/doc/c-arc.texi b/gas/doc/c-arc.texi index 36d3ec0b1a..4852c3d602 100644 --- a/gas/doc/c-arc.texi +++ b/gas/doc/c-arc.texi @@ -485,6 +485,12 @@ Two Operand Instruction; @item SYNTAX_3OP Three Operand Instruction. + +@item SYNTAX_1OP +One Operand Instruction. + +@item SYNTAX_NOP +No Operand Instruction. @end table The syntax class may be followed by @samp{|} and one of the following diff --git a/gas/testsuite/gas/arc/textinsn1op.d b/gas/testsuite/gas/arc/textinsn1op.d new file mode 100644 index 0000000000..1bf155929c --- /dev/null +++ b/gas/testsuite/gas/arc/textinsn1op.d @@ -0,0 +1,17 @@ +#objdump: -dr + +.*: +file format .*arc.* + + + +Disassembly of section .text: + +[0-9a-f]+ <.text>: + 0: 3e2f 703f myinsn r0 + 4: 3e6f 7ebf myinsn 0x3a + 8: 3e2f 7fbf dead beef myinsn 0xdeadbeef + 10: 3e2f 7fbf 0000 0000 myinsn 0 + 14: R_ARC_32_ME label + 18: 3e2f 7fbf 0000 0000 myinsn 0 + 1c: R_ARC_PC32 label + 20: 386f 203f noop diff --git a/gas/testsuite/gas/arc/textinsn1op.s b/gas/testsuite/gas/arc/textinsn1op.s new file mode 100644 index 0000000000..f14b39aada --- /dev/null +++ b/gas/testsuite/gas/arc/textinsn1op.s @@ -0,0 +1,12 @@ +# Test 1OP and NOP syntax + + .extInstruction noop, 0x07, 0x10, SUFFIX_FLAG, SYNTAX_NOP + .extInstruction myinsn, 0x07, 0x3E, SUFFIX_FLAG, SYNTAX_1OP + + myinsn r0 + myinsn 0x3A + myinsn 0xdeadbeef + myinsn @label + myinsn @label@pcl + + noop diff --git a/include/ChangeLog b/include/ChangeLog index df2ebb391d..2f4a96a711 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,11 @@ +2016-05-03 Claudiu Zissulescu + + * opcode/arc.h (ARC_SYNTAX_1OP): Declare + (ARC_SYNTAX_NOP): Likewsie. + (ARC_OP1_MUST_BE_IMM): Update defined value. + (ARC_OP1_IMM_IMPLIED): Likewise. + (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare. + 2016-04-28 Nick Clifton PR target/19722 diff --git a/include/opcode/arc.h b/include/opcode/arc.h index 1d4a844aac..d10e311404 100644 --- a/include/opcode/arc.h +++ b/include/opcode/arc.h @@ -516,8 +516,12 @@ extern const unsigned arc_num_relax_opcodes; /* Various constants used when defining an extension instruction. */ #define ARC_SYNTAX_3OP (1 << 0) #define ARC_SYNTAX_2OP (1 << 1) -#define ARC_OP1_MUST_BE_IMM (1 << 2) -#define ARC_OP1_IMM_IMPLIED (1 << 3) +#define ARC_SYNTAX_1OP (1 << 2) +#define ARC_SYNTAX_NOP (1 << 3) +#define ARC_SYNTAX_MASK (0x0F) + +#define ARC_OP1_MUST_BE_IMM (1 << 0) +#define ARC_OP1_IMM_IMPLIED (1 << 1) #define ARC_SUFFIX_NONE (1 << 0) #define ARC_SUFFIX_COND (1 << 1) @@ -566,4 +570,8 @@ extern const unsigned char arg_32bit_limmu6[MAX_INSN_ARGS + 1]; extern const unsigned char arg_32bit_limms12[MAX_INSN_ARGS + 1]; extern const unsigned char arg_32bit_limmlimm[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_rc[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_u6[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_limm[MAX_INSN_ARGS + 1]; + #endif /* OPCODE_ARC_H */ diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index d1663252c9..0313e12eb5 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,11 @@ +2016-05-03 Claudiu Zissulescu + + * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP. + (arcExtMap_genOpcode): Likewise. + * arc-opc.c (arg_32bit_rc): Define new variable. + (arg_32bit_u6): Likewise. + (arg_32bit_limm): Likewise. + 2016-05-03 Szabolcs Nagy * aarch64-gen.c (VERIFIER): Define. diff --git a/opcodes/arc-ext.c b/opcodes/arc-ext.c index 1d6381315d..f7d2191f8d 100644 --- a/opcodes/arc-ext.c +++ b/opcodes/arc-ext.c @@ -474,12 +474,24 @@ dump_ARC_extmap (void) insn != NULL; insn = insn->next) { printf ("INST: 0x%02x 0x%02x ", insn->major, insn->minor); - if (insn->flags & ARC_SYNTAX_2OP) - printf ("SYNTAX_2OP"); - else if (insn->flags & ARC_SYNTAX_3OP) - printf ("SYNTAX_3OP"); - else - printf ("SYNTAX_UNK"); + switch (insn->flags & ARC_SYNTAX_MASK) + { + case ARC_SYNTAX_2OP: + printf ("SYNTAX_2OP"); + break; + case ARC_SYNTAX_3OP: + printf ("SYNTAX_3OP"); + break; + case ARC_SYNTAX_1OP: + printf ("SYNTAX_1OP"); + break; + case ARC_SYNTAX_NOP: + printf ("SYNTAX_NOP"); + break; + default: + printf ("SYNTAX_UNK"); + break; + } if (insn->flags & 0x10) printf ("|MODIFIER"); @@ -517,7 +529,7 @@ arcExtMap_genOpcode (const extInstruction_t *einsn, int count; /* Check for the class to see how many instructions we generate. */ - switch (einsn->flags & (ARC_SYNTAX_3OP | ARC_SYNTAX_2OP)) + switch (einsn->flags & ARC_SYNTAX_MASK) { case ARC_SYNTAX_3OP: count = (einsn->modsyn & ARC_OP1_MUST_BE_IMM) ? 10 : 20; @@ -525,6 +537,12 @@ arcExtMap_genOpcode (const extInstruction_t *einsn, case ARC_SYNTAX_2OP: count = (einsn->flags & 0x10) ? 7 : 6; break; + case ARC_SYNTAX_1OP: + count = 3; + break; + case ARC_SYNTAX_NOP: + count = 1; + break; default: count = 0; break; @@ -755,6 +773,35 @@ arcExtMap_genOpcode (const extInstruction_t *einsn, INSN3OP_C0LL (einsn->major, einsn->minor), MINSN3OP_C0LL, arc_target, arg_32bit_zalimmlimm, lflags_ccf); } + else if (einsn->flags & ARC_SYNTAX_1OP) + { + if (einsn->suffix & ARC_SUFFIX_COND) + *errmsg = "Suffix SUFFIX_COND ignored"; + + INSERT_XOP (q, einsn->name, + INSN2OP (einsn->major, 0x3F) | FIELDB (einsn->minor), + MINSN2OP_0C, arc_target, arg_32bit_rc, lflags_f); + + INSERT_XOP (q, einsn->name, + INSN2OP (einsn->major, 0x3F) | FIELDB (einsn->minor) + | (0x01 << 22), MINSN2OP_0U, arc_target, arg_32bit_u6, + lflags_f); + + INSERT_XOP (q, einsn->name, + INSN2OP (einsn->major, 0x3F) | FIELDB (einsn->minor) + | FIELDC (62), MINSN2OP_0L, arc_target, arg_32bit_limm, + lflags_f); + + } + else if (einsn->flags & ARC_SYNTAX_NOP) + { + if (einsn->suffix & ARC_SUFFIX_COND) + *errmsg = "Suffix SUFFIX_COND ignored"; + + INSERT_XOP (q, einsn->name, + INSN2OP (einsn->major, 0x3F) | FIELDB (einsn->minor) + | (0x01 << 22), MINSN2OP_0L, arc_target, arg_none, lflags_f); + } else { *errmsg = "Unknown syntax"; diff --git a/opcodes/arc-opc.c b/opcodes/arc-opc.c index 9effbaf90d..bbefb60262 100644 --- a/opcodes/arc-opc.c +++ b/opcodes/arc-opc.c @@ -1722,6 +1722,10 @@ const unsigned char arg_32bit_limmu6[] = { LIMM, UIMM6_20 }; const unsigned char arg_32bit_limms12[] = { LIMM, SIMM12_20 }; const unsigned char arg_32bit_limmlimm[] = { LIMM, LIMMdup }; +const unsigned char arg_32bit_rc[] = { RC }; +const unsigned char arg_32bit_u6[] = { UIMM6_20 }; +const unsigned char arg_32bit_limm[] = { LIMM }; + /* The opcode table. The format of the opcode table is: