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[deliverable/binutils-gdb.git] / include / opcode / riscv.h

2021-02-05	Nelson Chu	RISC-V: PR27348, Remove the obsolete OP_*CUSTOM_IMM.	blob \| commitdiff \| raw
2021-02-04	Nelson Chu	RISC-V: Removed the v0.93 bitmanip ZBA/ZBB/ZBC instruct...	blob \| commitdiff \| raw \| diff to current
2021-01-15	Nelson Chu	RISC-V: Indent and GNU coding standards tidy, also...	blob \| commitdiff \| raw \| diff to current
2021-01-15	Nelson Chu	RISC-V: Comments tidy and improvement.	blob \| commitdiff \| raw \| diff to current
2021-01-07	Philipp Tomsich	RISC-V: Add pause hint instruction.	blob \| commitdiff \| raw \| diff to current
2021-01-07	Claire Xenia Wolf	RISC-V: Support riscv bitmanip frozen ZBA/ZBB/ZBC instr...	blob \| commitdiff \| raw \| diff to current
2021-01-01	Alan Modra	Update year range in copyright notice of binutils files	blob \| commitdiff \| raw \| diff to current
2020-12-10	Nelson Chu	RISC-V: Add sext.[bh] and zext.[bhw] pseudo instructions.	blob \| commitdiff \| raw \| diff to current
2020-12-10	Nelson Chu	RISC-V: Control fence.i and csr instructions by zifence...	blob \| commitdiff \| raw \| diff to current
2020-12-01	Nelson Chu	RISC-V: Support to add implicit extensions for G.	blob \| commitdiff \| raw \| diff to current
2020-12-01	Nelson Chu	RISC-V: Improve the version parsing for arch string.	blob \| commitdiff \| raw \| diff to current
2020-08-31	Alan Modra	PR26493 UBSAN: elfnn-riscv.c left shift of negative...	blob \| commitdiff \| raw \| diff to current
2020-06-30	Nelson Chu	RISC-V: Support debug and float CSR as the unprivileged...	blob \| commitdiff \| raw \| diff to current
2020-06-22	Nelson Chu	RISC-V: Report warning when linking the objects with...	blob \| commitdiff \| raw \| diff to current
2020-06-12	Nelson Chu	RISC-V: Drop the privileged spec v1.9 support.	blob \| commitdiff \| raw \| diff to current
2020-06-03	Nelson Chu	RISC-V: Fix the error when building RISC-V linux native...	blob \| commitdiff \| raw \| diff to current
2020-05-20	Nelson Chu	[PATCH v2 0/9] RISC-V: Support version controling for...	blob \| commitdiff \| raw \| diff to current
2020-01-01	Alan Modra	Update year range in copyright notice of binutils files	blob \| commitdiff \| raw \| diff to current
2019-09-18	Jim Wilson	RISC-V: Gate opcode tables by enum rather than string.	blob \| commitdiff \| raw \| diff to current
2019-01-01	Alan Modra	Update year range in copyright notice of binutils files	blob \| commitdiff \| raw \| diff to current
2018-12-06	Andrew Burgess	opcodes/riscv: Hide '.L0 ' fake symbols	blob \| commitdiff \| raw \| diff to current
2018-12-03	Jim Wilson	RISC-V: Accept version, supervisor ext and more than...	blob \| commitdiff \| raw \| diff to current
2018-11-27	Jim Wilson	RISC-V: Add .insn CA support.	blob \| commitdiff \| raw \| diff to current
2018-08-30	Jim Wilson	RISC-V: Allow instruction require more than one extension	blob \| commitdiff \| raw \| diff to current
2018-07-30	Jim Wilson	RISC-V: Set insn info fields correctly when disassembling.	blob \| commitdiff \| raw \| diff to current
2018-03-14	Jim Wilson	RISC-V: Add .insn support.	blob \| commitdiff \| raw \| diff to current
2018-01-03	Alan Modra	Update year range in copyright notice of binutils files	blob \| commitdiff \| raw \| diff to current
2017-10-24	Andrew Waterman	RISC-V: Only relax to C.LUI when imm != 0 and rd !...	blob \| commitdiff \| raw \| diff to current
2017-01-03	Kito Cheng	Add support for the Q extension to the RISCV ISA.	blob \| commitdiff \| raw \| diff to current
2017-01-02	Alan Modra	Update year range in copyright notice of all files.	blob \| commitdiff \| raw \| diff to current
2016-11-01	Nick Clifton	Add support for RISC-V architecture.	blob \| commitdiff \| raw \| diff to current

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