Correct AArch64 crypto dependencies.
[deliverable/binutils-gdb.git] / opcodes / aarch64-tbl.h
2017-11-16  Tamar ChristinaCorrect AArch64 crypto dependencies.
2017-11-16  Tamar ChristinaAdd assembler and disassembler support for the new...
2017-11-09  Tamar ChristinaAdd the operand encoding types for the new Armv8.2...
2017-11-09  Tamar ChristinaAdds the new Fields and Operand types for the new instr...
2017-11-09  Tamar ChristinaSplit the ARM Crypto ISA extensions for AES and SHA1...
2017-11-08  Nick CliftonSplit the AArch64 Crypto instructions for AES and SHA1...
2017-06-28  Tamar Christina[AArch64] Add dot product support for AArch64 to binutils
2017-04-21  Nick CliftonFix detection of illegal AArch64 opcodes that resemble...
2017-02-24  Richard Sandiford[AArch64] Additional SVE instructions
2017-02-24  Richard Sandiford[AArch64] Add a "compnum" feature
2017-01-04  Szabolcs Nagy[AArch64] Add separate feature flag for weaker release...
2017-01-02  Alan ModraUpdate year range in copyright notice of all files.
2016-12-13  Renlin Li[Binutils][AARCH64]Remove Cn register for coprocessor...
2016-11-18  Szabolcs Nagy[AArch64] Add ARMv8.3 FCMLA and FCADD instructions
2016-11-18  Szabolcs Nagy[AArch64] Add ARMv8.3 weaker release consistency load...
2016-11-18  Szabolcs Nagy[AArch64] Add ARMv8.3 javascript floating-point convers...
2016-11-18  Szabolcs Nagy[AArch64] Add ARMv8.3 combined pointer authentication...
2016-11-11  Szabolcs Nagy[AArch64] Add ARMv8.3 combined pointer authentication...
2016-11-11  Szabolcs Nagy[AArch64] Add ARMv8.3 PACGA instruction
2016-11-11  Szabolcs Nagy[AArch64] Add ARMv8.3 single source PAC instructions
2016-11-11  Szabolcs Nagy[AArch64] Add ARMv8.3 instructions which are in the...
2016-09-30  Jiong Wang[AArch64] PR target/20553, fix opcode mask for SIMD...
2016-09-21  Richard Sandiford[AArch64][SVE 31/32] Add SVE instructions
2016-09-21  Richard Sandiford[AArch64][SVE 29/32] Add new SVE core & FP register...
2016-09-21  Richard Sandiford[AArch64][SVE 28/32] Add SVE FP immediate operands
2016-09-21  Richard Sandiford[AArch64][SVE 27/32] Add SVE integer immediate operands
2016-09-21  Richard Sandiford[AArch64][SVE 26/32] Add SVE MUL VL addressing modes
2016-09-21  Richard Sandiford[AArch64][SVE 25/32] Add support for SVE addressing...
2016-09-21  Richard Sandiford[AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALED
2016-09-21  Richard Sandiford[AArch64][SVE 23/32] Add SVE pattern and prfop operands
2016-09-21  Richard Sandiford[AArch64][SVE 21/32] Add Zn and Pn registers
2016-09-21  Richard Sandiford[AArch64][SVE 20/32] Add support for tied operands
2016-09-21  Richard Sandiford[AArch64][SVE 16/32] Use specific insert/extract method...
2016-08-23  Richard Sandiford[AArch64] Add V8_2_INSN macro
2016-08-23  Richard Sandiford[AArch64] Make more use of CORE/FP/SIMD_INSN
2016-08-23  Richard Sandiford[AArch64] Add OP parameter to aarch64-tbl.h macros
2016-05-03  Szabolcs NagyFix generation of AArhc64 instruction table.
2016-04-28  Nick CliftonAdd support to AArch64 disassembler for verifying instr...
2016-03-18  Nick CliftonFix the disassembly of the AArch64's OOR instruction...
2016-01-01  Alan ModraCopyright update for binutils
2015-12-14  Matthew Wahab[AArch64][PATCH 14/14] Support FP16 Adv.SIMD Scalar...
2015-12-14  Matthew Wahab[AArch64][PATCH 13/14] Support FP16 Adv.SIMD Shift...
2015-12-14  Matthew Wahab[AArch64][PATCH 12/14] Support FP16 Adv.SIMD Scalar...
2015-12-14  Matthew Wahab[AArch64][PATCH 9/14] Support FP16 Adv.SIMD Modified...
2015-12-14  Matthew Wahab[AArch64][PATCH 8/14] Support FP16 Adv.SIMD Across...
2015-12-14  Matthew Wahab[AArch64][PATCH 7/14] Support FP16 Scalar Indexed Eleme...
2015-12-14  Matthew Wahab[AArch64][PATCH 6/14] Support FP16 Vector Indexed Eleme...
2015-12-14  Matthew Wahab[AArch64][PATCH 5/14] Support FP16 Scalar Two Register...
2015-12-14  Matthew Wahab[AArch64][PATCH 4/14] Support FP16 Vector Two Register...
2015-12-14  Matthew Wahab[AArch64][PATCH 3/14] Support ARMv8.2 FP16 Scalar Three...
2015-12-14  Matthew Wahab[AArch64][PATCH 2/14] Support ARMv8.2 FP16 Vector Three...
2015-12-14  Matthew Wahab[AArch64][PATCH 1/14] Support ARMv8.2 FP16 Adv.SIMD...
2015-12-11  Matthew Wahab[AArch64][Patch 5/5] Add instruction PSB CSYNC
2015-12-11  Matthew Wahab[AArch64][Patch 4/5] Support HINT aliases taking operands.
2015-12-10  Matthew Wahab[AArch64][PATCH 1/2] Add support for RAS instruction...
2015-11-27  Matthew Wahab[AArch64][PATCH 3/3] Add floating-point FP16 instructions
2015-11-27  Matthew Wahab[AArch64][PATCH 1/3] Support ARMv8.2 FP16 floating...
2015-11-27  Matthew Wahab[AArch64] Add ARMv8.2 instruction alias REV64.
2015-11-27  Matthew Wahab[AArch64] Add ARMv8.2 instructions BFC and REV64.
2015-08-11  Nick CliftonFix the disassembly of the AArch64 SIMD EXT instruction.
2015-06-02  Matthew Wahab[AArch64] Support for ARMv8.1a Adv.SIMD instructions
2015-06-02  Matthew Wahab[AArch64] Support for ARMv8.1a Limited Ordering Regions...
2015-03-10  Jiong Wang[AARCH64] Remove Load/Store register (unscaled immediat...
2015-01-01  Alan ModraChangeLog rotatation and copyright year update
2014-09-03  Jiong Wang[PATCH/AArch64] Generic support for all system register...
2014-09-03  Jiong Wang[PATCH/AArch64] Implement LSE feature
2014-03-05  Alan ModraUpdate copyright years
2014-02-27  Yufeng Zhangopcodes/
2013-11-05  Yufeng Zhanggas/
2013-02-28  Yufeng Zhanginclude/opcode/
2013-01-30  Yufeng Zhanginclude/opcode/
2013-01-17  Yufeng Zhanginclude/opcode/
2013-01-04  Yufeng Zhangopcodes/
2012-08-13  Nick CliftonAdd support for 64-bit ARM architecture: AArch64
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