Automatic date update in version.in
[deliverable/binutils-gdb.git] / opcodes / i386-opc.tbl
2021-04-26  Jan Beulichx86: optimize LEA
2021-03-29  Jan Beulichx86: move some opcode table entries
2021-03-29  Jan Beulichx86: VPSADBW's source operands are also commutative
2021-03-29  Jan Beulichx86: fold SSE2AVX and their base MMX/SSE templates
2021-03-29  Jan Beulichx86: undo Prefix_0X<nn> use in opcode table
2021-03-26  Jan Beulichx86-64: don't accept supposedly disabled MOVQ forms
2021-03-25  Jan Beulichx86: fix AMD Zen3 insns
2021-03-24  Jan Beulichx86: derive opcode length from opcode value
2021-03-24  Jan Beulichx86: don't use opcode_length to identify pseudo prefixes
2021-03-23  Jan Beulichx86: split opcode prefix and opcode space representation
2021-03-09  Jan Beulichx86: fold some prefix related attributes into a single one
2021-03-09  Jan Beulichx86-64: make SYSEXIT handling similar to SYSRET's
2021-03-03  Jan Beulichx86: infer operand count of templates
2021-02-16  Jan Beulichx86: CVTPI2PD has special behavior
2021-02-16  Jan Beulichx86: have preprocessor expand macros
2021-01-01  Alan ModraUpdate year range in copyright notice of binutils files
2020-10-20  Ganesh Gopalasubra... Add AMD znver3 processor support
2020-10-16  Cui,LiliEnhancement for avx-vnni patch
2020-10-14  H.J. Lux86: Support Intel AVX VNNI
2020-10-14  Lili Cuix86: Add support for Intel HRESET instruction
2020-10-14  Lili Cuix86: Support Intel UINTR
2020-10-14  H.J. Lux86: Remove the prefix byte from non-VEX/EVEX base_opcode
2020-10-14  H.J. Lux86: Rename VexOpcode to OpcodePrefix
2020-09-24  Cui,LiliAdd support for Intel TDX instructions.
2020-09-23  Terry GuoEnable support to Intel Keylocker instructions
2020-07-30  H.J. Lux86: Add {disp16} pseudo prefix
2020-07-10  Lili Cuix86: Add support for Intel AMX instructions
2020-07-08  Jan Beulichx86: FMA4 scalar insns ignore VEX.L
2020-07-02  H.J. Lux86: Add SwapSources
2020-06-26  H.J. Lui386-opc.tbl: Add a blank line
2020-06-26  H.J. Lux86: Correct VexSIB128 to VecSIB128
2020-06-26  H.J. Lux86: Rename VecSIB to SIB for Intel AMX
2020-06-14  H.J. Lux86: Correct xsusldtrk mnemonic
2020-04-07  Cui,LiliAdd support for intel TSXLDTRK instructions$
2020-04-02  LiliCuiAdd support for intel SERIALIZE instruction
2020-03-09  Jan Beulichx86: use template for AVX512 integer comparison insns
2020-03-09  Jan Beulichx86: use template for XOP integer comparison, shift...
2020-03-09  Jan Beulichx86: use template for AVX/AVX512 floating point compari...
2020-03-09  Jan Beulichx86: use template for SSE floating point comparison...
2020-03-09  Jan Beulichx86: allow opcode templates to be templated
2020-03-06  Jan Beulichx86: reduce amount of various VCVT* templates
2020-03-06  Jan Beulichx86: drop/replace IgnoreSize
2020-03-06  Jan Beulichx86: don't accept FI{LD,STP,STTP}LL in Intel syntax...
2020-03-06  Jan Beulichx86: replace NoRex64 on VEX-encoded insns
2020-03-06  Jan Beulichx86: drop Rex64 attribute
2020-03-06  Jan Beulichx86: add missing IgnoreSize
2020-03-06  Jan Beulichx86: refine TPAUSE and UMWAIT
2020-03-04  Jan Beulichx86: support VMGEXIT
2020-03-03  H.J. Lux86: Replace IgnoreSize/DefaultSize with MnemonicSize
2020-03-03  H.J. Lux86: Allow integer conversion without suffix in AT...
2020-02-17  H.J. Lux86: Remove CpuABM and add CpuPOPCNT
2020-02-17  Jan Beulichx86: fold certain VCVT{,U}SI2S{S,D} templates
2020-02-17  Jan Beulichx86: fold AddrPrefixOpReg templates
2020-02-17  Jan Beulichx86/Intel: improve diagnostics for ambiguous VCVT*...
2020-02-14  H.J. LuRemove Intel syntax comments on movsx and movzx
2020-02-14  Jan Beulichx86: replace adhoc (partly wrong) ambiguous operand...
2020-02-12  Jan Beulichx86: correct VFPCLASSP{S,D} operand size handling
2020-02-12  Jan Beulichx86: fold two JMP templates
2020-02-12  Jan Beulichx86-64: Intel64 adjustments for insns dealing with...
2020-02-11  Jan Beulichx86: drop ShortForm attribute
2020-02-11  Jan Beulichx86: drop stray ShortForm attributes
2020-02-10  H.J. Lux86: Accept Intel64 only instruction by default
2020-01-30  Jan Beulichx86-64: honor vendor specifics for near RET
2020-01-30  Jan Beulichx86: drop further pointless/bogus DefaultSize
2020-01-27  H.J. Lux86-64: Properly encode and decode movsxd
2020-01-21  Jan Beulichx86: improve handling of insns with ambiguous operand...
2020-01-21  Jan Beulichx86: VCVTNEPS2BF16{X,Y} should permit broadcasting
2020-01-17  H.J. Lux86: Add {vex} pseudo prefix
2020-01-16  Jan Beulichx86: drop stale Vec_Imm4 related comment
2020-01-16  Jan Beulichx86: add a few more missing VexWIG
2020-01-16  Jan Beulichx86: VPEXTRQ/VPINSRQ are unavailable outside of 64...
2020-01-09  Jan Beulichx86: SYSENTER/SYSEXIT are unavailable in 64-bit mode...
2020-01-01  Alan ModraUpdate year range in copyright notice of binutils files
2019-12-27  Jan Beulichx86: consolidate Disp<NN> handling a little
2019-12-04  Jan Beulichx86-64: accept 64-bit LFS/LGS/LSS forms with suffix...
2019-12-04  Jan Beulichx86: drop some stray/bogus DefaultSize
2019-11-14  Jan Beulichx86: drop redundant SYSCALL/SYSRET templates
2019-11-14  Jan Beulichx86: fold individual Jump* attributes into a single...
2019-11-14  Jan Beulichx86: make JumpAbsolute an insn attribute
2019-11-14  Jan Beulichx86: make AnySize an insn attribute
2019-11-12  Jan Beulichx86: fold EsSeg into IsString
2019-11-12  Jan Beulichx86: eliminate ImmExt abuse
2019-11-12  Jan Beulichx86: introduce operand type "instance"
2019-11-08  H.J. Lui386: Only check suffix in instruction mnemonic
2019-11-08  Jan Beulichx86: convert RegMask and RegBND from bitfield to enumerator
2019-11-08  Jan Beulichx86: convert RegSIMD and RegMMX from bitfield to enumerator
2019-11-08  Jan Beulichx86: convert Control/Debug/Test from bitfield to enumerator
2019-11-08  Jan Beulichx86: convert SReg from bitfield to enumerator
2019-11-08  Jan Beulichx86: introduce operand type "class"
2019-11-07  Jan Beulichx86: support further AMD Zen2 instructions
2019-11-07  Jan Beulichx86/Intel: drop IgnoreSize from operand-less MOVSD...
2019-10-30  Jan Beulichx86: re-do "shorthand" handling
2019-10-30  Jan Beulichx86: drop stray W
2019-10-07  Jan Beulichx86/Intel: correct MOVSD and CMPSD handling
2019-09-20  Jan Beulichx86-64: fix handling of PUSH/POP of segment register
2019-08-07  Jan Beulichx86: drop stray FloatMF
2019-07-16  Jan Beulichx86: make RegMem an opcode modifier
2019-07-16  Jan Beulichx86: fold SReg{2,3}
2019-07-01  Jan Beulichx86: drop Vec_Imm4
2019-07-01  Jan Beulichx86: limit ImmExt abuse
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