Rename non_ir_ref to non_ir_ref_regular

Since the flag is now set only for regular object refs.

include/
* bfdlink.h (struct bfd_link_hash_entry <non_ir_ref>): Rename to
non_ir_ref_regular.
bfd/
* elf-m10300.c: Rename occurrences of non_ir_ref.
* elf32-arm.c: Likewise.
* elf32-bfin.c: Likewise.
* elf32-cr16.c: Likewise.
* elf32-cris.c: Likewise.
* elf32-d10v.c: Likewise.
* elf32-dlx.c: Likewise.
* elf32-fr30.c: Likewise.
* elf32-frv.c: Likewise.
* elf32-hppa.c: Likewise.
* elf32-i370.c: Likewise.
* elf32-i386.c: Likewise.
* elf32-iq2000.c: Likewise.
* elf32-lm32.c: Likewise.
* elf32-m32c.c: Likewise.
* elf32-m32r.c: Likewise.
* elf32-m68hc1x.c: Likewise.
* elf32-m68k.c: Likewise.
* elf32-mcore.c: Likewise.
* elf32-metag.c: Likewise.
* elf32-microblaze.c: Likewise.
* elf32-moxie.c: Likewise.
* elf32-msp430.c: Likewise.
* elf32-mt.c: Likewise.
* elf32-nios2.c: Likewise.
* elf32-or1k.c: Likewise.
* elf32-ppc.c: Likewise.
* elf32-rl78.c: Likewise.
* elf32-s390.c: Likewise.
* elf32-score.c: Likewise.
* elf32-score7.c: Likewise.
* elf32-sh.c: Likewise.
* elf32-tic6x.c: Likewise.
* elf32-tilepro.c: Likewise.
* elf32-v850.c: Likewise.
* elf32-vax.c: Likewise.
* elf32-xstormy16.c: Likewise.
* elf32-xtensa.c: Likewise.
* elf64-alpha.c: Likewise.
* elf64-hppa.c: Likewise.
* elf64-ia64-vms.c: Likewise.
* elf64-mmix.c: Likewise.
* elf64-ppc.c: Likewise.
* elf64-s390.c: Likewise.
* elf64-sh64.c: Likewise.
* elf64-x86-64.c: Likewise.
* elflink.c: Likewise.
* elfnn-aarch64.c: Likewise.
* elfnn-ia64.c: Likewise.
* elfnn-riscv.c: Likewise.
* elfxx-mips.c: Likewise.
* elfxx-sparc.c: Likewise.
* elfxx-tilegx.c: Likewise.
* linker.c: Likewise.
ld/
* plugin.c: Rename occurrences of non_ir_ref.

non_ir_ref_dynamic

dynamic_ref_after_ir_def is a little odd compared to other symbol
flags in that as the name suggests, it is set only for certain
references after a definition.  It turns out that setting a flag for
any non-ir reference from a dynamic object can be used to solve the
problem for which this flag was invented, which I think is a cleaner.
This patch does that, and sets non_ir_ref only for regular object
references.

include/
* bfdlink.h (struct bfd_link_hash_entry): Update non_ir_ref
comment.  Rename dynamic_ref_after_ir_def to non_ir_ref_dynamic.
ld/
* plugin.c (is_visible_from_outside): Use non_ir_ref_dynamic.
(plugin_notice): Set non_ir_ref for references from regular
objects, non_ir_ref_dynamic for references from dynamic objects.
bfd/
* elf64-ppc.c (add_symbol_adjust): Transfer non_ir_ref_dynamic.
* elflink.c (elf_link_add_object_symbols): Update to use
non_ir_ref_dynamic.
(elf_link_input_bfd): Test non_ir_ref_dynamic in addition to
non_ir_ref.
* linker.c (_bfd_generic_link_add_one_symbol): Likewise.

Automatic date update in version.in

2017-05-15  Eric Christopher <echristo@gmail.com>

        * layout.cc (Layout::segment_precedes): Add a case for testing
        pointer equality when determining which segment precedes
        another.

2017-05-15  Jeff Law  <law@redhat.com>

* readelf.c (display_arc_attribute): Avoid implicit fallthru.

Fix use of ARM ADR and ADRl pseudo-instructions with thumb function symbols.

PR gas/21458
* config/tc-arm.c (do_adr): If the ADR involves a thumb function
symbol, ensure that the T bit will be set.
(do_adrl): Likewise.
(do_t_adr): Likewise.
* testsuite/gas/arm/pr21458.s: New test.
* testsuite/gas/arm/pr21458.d: New test driver.

MIPS16e2: Add new MIPS16e2 relaxation GAS and LD tests

Verify MIPS16 PC-relative instruction relaxation using the MIPS16e2 LUI
instruction rather than an LI/SLL instruction pair.

gas/
* testsuite/gas/mips/mips16-pcrel-1.d: Remove `-mips3' from `as'
flags.
* testsuite/gas/mips/mips16-pcrel-pic-1.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n32-0.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n32-1.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n64-0.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n64-1.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-reloc-4.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-reloc-5.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-reloc-6.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-reloc-7.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-4.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-5.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-6.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-7.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-9.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-pic-9.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-n32-8.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-n32-9.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-8.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-9.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-n64-8.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-addend-n64-9.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-2.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-3.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-6.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-7.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-6.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-n32-4.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-n32-6.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-n64-4.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-n64-6.d: Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-4.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-6.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-4.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-6.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-4.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-6.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-4.d:
Likewise.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-6.d:
Likewise.
* testsuite/gas/mips/mips16e2@mips16-pcrel-0.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-1.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-2.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-n32-0.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-n32-1.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-0.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-1.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-delay-0.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-delay-1.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-2.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-3.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-6.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-7.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-2.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-3.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-6.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-7.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-8.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-9.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-8.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-9.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-8.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-9.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute.d: New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-1.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-2.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-3.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-4.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-5.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-6.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-7.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-4.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-6.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-4.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-6.d: New
test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-4.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-6.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-4.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-6.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-4.d:
New test.
* testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-6.d:
New test.
* testsuite/gas/mips/mips16-pcrel-1.l: Adjust line numbers.
* testsuite/gas/mips/mips16-pcrel-1.s: Adjust for alignment
preservation between MIPS16 and MIPS16e2 code.
* testsuite/gas/mips/mips.exp: Run MIPS16 relaxation tests over
all MIPS16 architectures.

ld/
* testsuite/ld-mips-elf/mips16e2-pcrel-0.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-1.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-addend-2.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-addend-6.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-n32-0.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-n32-1.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-0.d: New test.
* testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-1.d: New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.

MIPS16e2: Add new MIPS16e2 ASE binutils and GAS tests

Verify MIPS16e2 ASE instruction assembly, disassembly and object file
flags.

binutils/
* testsuite/binutils-all/mips/mips16-undecoded.d: Add `-mips3'
to `as' flags.
* testsuite/binutils-all/mips/mips16e2-undecoded.d: New test.
* testsuite/binutils-all/mips/mips16e2-extend-insn.d: New test.
* testsuite/binutils-all/mips/mips16-undecoded.s: Remove
`.module mips3'.
* testsuite/binutils-all/mips/mips.exp: Run the new tests.

gas/
* testsuite/gas/mips/mips16e2.d: New test.
* testsuite/gas/mips/mips16e2-mt.d: New test.
* testsuite/gas/mips/mips16e2-sub.d: New test.
* testsuite/gas/mips/mips16e2@mips16e2-sub.d: New test.
* testsuite/gas/mips/mips16e2-mt-sub.d: New test.
* testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: New test.
* testsuite/gas/mips/mips16e2-hilo.d: New test.
* testsuite/gas/mips/mips16e2-hilo-n32.d: New test.
* testsuite/gas/mips/mips16e2-reloc-error.d: New test.
* testsuite/gas/mips/mips16e2-imm-error.d: New test.
* testsuite/gas/mips/elf_ase_mips16e2.d: New test.
* testsuite/gas/mips/elf_ase_mips16e2-2.d: New test.
* testsuite/gas/mips/elf-rel9-mips16e2.d: New test.
* testsuite/gas/mips/mips16e2-lui.d: New test.
* testsuite/gas/mips/mips16e2@mips32r2-sync.d: New test.
* testsuite/gas/mips/mips16e2@mips32r2-sync-1.d: New test.
* testsuite/gas/mips/mips16e2@lui-2.d: New test.
* testsuite/gas/mips/mips16e2-reloc-error.l: New stderr output.
* testsuite/gas/mips/mips16e2-imm-error.l: New stderr output.
* testsuite/gas/mips/mips16e2@lui-2.l: New stderr output.
* testsuite/gas/mips/mips16e2.s: New test source.
* testsuite/gas/mips/mips16e2-mt.s: New test source.
* testsuite/gas/mips/mips16e2-sub.s: New test source.
* testsuite/gas/mips/mips16e2-mt-sub.s: New test source.
* testsuite/gas/mips/mips16e2-hilo.s: New test source.
* testsuite/gas/mips/mips16e2-reloc-error.s: New test source.
* testsuite/gas/mips/mips16e2-imm-error.s: New test source.
* testsuite/gas/mips/elf-rel9-mips16e2.s: New test source.
* testsuite/gas/mips/mips16e2-lui.s: New test source.
* testsuite/gas/mips/mips.exp: Expand `mips32r2-sync',
`mips32r2-sync-1', `lui-1' and `lui-2' tests across MIPS16e2
architectures.  Run the new tests.

MIPS16e2: Add MIPS16e2 ASE GAS test infrastructure

Define a new 32-bit and 64-bit MIPS16e2 test architecture and adjust
existing tests now run against these architectures accordingly.

gas/
* testsuite/gas/mips/mips.exp (run_dump_test_arch): Add
`mips16e2@' prefix.
(run_list_test_arch): Likewise.
(mips16e2-32, mips16e2-64): New architectures.
* testsuite/gas/mips/mips16e2-32@mips16-macro.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16-macro-t.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16-macro-e.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16-insn-t.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16-insn-e.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16e-64.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16-sub.d: New test.
* testsuite/gas/mips/mips16e2-32@mips16e-64-sub.d: New test.
* testsuite/gas/mips/mips16e2@relax-swap3.d: New test.
* testsuite/gas/mips/mips16-32@mips16-asmacro.d: Remove `source'
tag.  Add `-I$srcdir/$subdir' to `as' flags.
* testsuite/gas/mips/mips16-64@mips16-asmacro.d: Likewise.
* testsuite/gas/mips/mips16e2-32@mips16-macro.l: New stderr
output.
* testsuite/gas/mips/mips16e2-32@mips16-macro-t.l: New stderr
output.
* testsuite/gas/mips/mips16e2-32@mips16-macro-e.l: New stderr
output.
* testsuite/gas/mips/mips16e2-32@mips16-insn-t.l: New stderr
output.
* testsuite/gas/mips/mips16e2-32@mips16-insn-e.l: New stderr
output.
* testsuite/gas/mips/mips16-sub.s: Add `.set nomips16e2'.
* testsuite/gas/mips/mips16e-sub.s: Likewise.
* testsuite/gas/mips/mips16e-64-sub.s: Likewise.
* testsuite/gas/mips/mips16-asmacro.s: Remove `.set mips32'.
* testsuite/gas/mips/mips16-32@mips16-asmacro.s: New test
source.
* testsuite/gas/mips/mips16-64@mips16-asmacro.s: New test
source.

MIPS16e2: Add MIPS16e2 ASE support

Add MIPS16e2 ASE support as per the architecture specification[1],
including in particular:

1. A new ELF ASE flag to mark MIPS16e2 binaries.

2. MIPS16e2 instruction assembly support, including a relaxation update
   to use LUI rather than an LI/SLL instruction pair for loading the
   high part of 32-bit addresses.

3. MIPS16e2 instruction disassembly support, including updated rules for
   extended forms of instructions that are now subdecoded and therefore
   do not alias to the original MIPS16 ISA revision instructions even
   for encodings that are not valid in the MIPS16e2 instruction set.

Add `-mmips16e2' and `-mno-mips16e2' GAS command-line options and their
corresponding `mips16e2' and `no-mips16e2' settings for the `.set' and
`.module' pseudo-ops.  Control the availability of the MT ASE subset of
the MIPS16e2 instruction set with a combination of these controls and
the preexisting MT ASE controls.

Parts of this change by Matthew Fortune and Andrew Bennett.

References:

[1] "MIPS32 Architecture for Programmers: MIPS16e2 Application-Specific
    Extension Technical Reference Manual", Imagination Technologies
    Ltd., Document Number: MD01172, Revision 01.00, April 26, 2016

include/
* elf/mips.h (AFL_ASE_MIPS16E2): New macro.
(AFL_ASE_MASK): Adjust accordingly.
* opcode/mips.h: Document new operand codes defined.
(mips_operand_type): Add OP_REG28 enum value.
(INSN2_SHORT_ONLY): Update description.
(ASE_MIPS16E2, ASE_MIPS16E2_MT): New macros.

bfd/
* elfxx-mips.c (print_mips_ases): Handle MIPS16e2 ASE.

opcodes/
* mips-dis.c (mips_arch_choices): Add ASE_MIPS16E2 and
ASE_MIPS16E2_MT flags to the unnamed MIPS16 entry.
(mips_convert_abiflags_ases): Handle the AFL_ASE_MIPS16E2 flag.
(print_insn_arg) <OP_REG28>: Add handler.
(validate_insn_args) <OP_REG28>: Handle.
(print_mips16_insn_arg): Handle MIPS16 instructions that require
32-bit encoding and 9-bit immediates.
(print_insn_mips16): Handle MIPS16 instructions that require
32-bit encoding and MFC0/MTC0 operand decoding.
* mips16-opc.c (decode_mips16_operand) <'>', '9', 'G', 'N', 'O'>
<'Q', 'T', 'b', 'c', 'd', 'r', 'u'>: Add handlers.
(RD_C0, WR_C0, E2, E2MT): New macros.
(mips16_opcodes): Add entries for MIPS16e2 instructions:
GP-relative "addiu" and its "addu" spelling, "andi", "cache",
"di", "ehb", "ei", "ext", "ins", GP-relative "lb", "lbu", "lh",
"lhu", and "lw" instructions, "ll", "lui", "lwl", "lwr", "mfc0",
"movn", "movtn", "movtz", "movz", "mtc0", "ori", "pause",
"pref", "rdhwr", "sc", GP-relative "sb", "sh" and "sw"
instructions, "swl", "swr", "sync" and its "sync_acquire",
"sync_mb", "sync_release", "sync_rmb" and "sync_wmb" aliases,
"xori", "dmt", "dvpe", "emt" and "evpe".  Add split
regular/extended entries for original MIPS16 ISA revision
instructions whose extended forms are subdecoded in the MIPS16e2
ISA revision: "li", "sll" and "srl".

binutils/
* readelf.c (print_mips_ases): Handle MIPS16e2 ASE.
* NEWS: Mention MIPS16e2 ASE support.

gas/
* config/tc-mips.c (RELAX_MIPS16_ENCODE): Add `e2' flag.
(RELAX_MIPS16_E2): New macro.
(RELAX_MIPS16_PIC, RELAX_MIPS16_SYM32, RELAX_MIPS16_NOMACRO)
(RELAX_MIPS16_USER_SMALL, RELAX_MIPS16_USER_EXT)
(RELAX_MIPS16_DSLOT, RELAX_MIPS16_JAL_DSLOT)
(RELAX_MIPS16_EXTENDED, RELAX_MIPS16_MARK_EXTENDED)
(RELAX_MIPS16_CLEAR_EXTENDED, RELAX_MIPS16_ALWAYS_EXTENDED)
(RELAX_MIPS16_MARK_ALWAYS_EXTENDED)
(RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED, RELAX_MIPS16_MACRO)
(RELAX_MIPS16_MARK_MACRO, RELAX_MIPS16_CLEAR_MACRO): Shift bits.
(mips16_immed_extend): New prototype.
(options): Add OPTION_MIPS16E2 and OPTION_NO_MIPS16E2 enum
values.
(md_longopts): Add "mmips16e2" and "mno-mips16e2" options.
(mips_ases): Add "mips16e2" entry.
(mips_set_ase): Handle MIPS16e2 ASE.
(insn_insert_operand): Explicitly handle immediates with MIPS16
instructions that require 32-bit encoding.
(is_opcode_valid_16): Pass enabled ASE bitmask on to
`opcode_is_member'.
(validate_mips_insn): Explicitly handle immediates with MIPS16
instructions that require 32-bit encoding.
(operand_reg_mask) <OP_REG28>: Add handler.
(match_reg28_operand): New function.
(match_operand) <OP_REG28>: Add handler.
(append_insn): Pass ASE_MIPS16E2 setting to RELAX_MIPS16_ENCODE.
(match_mips16_insn): Handle MIPS16 instructions that require
32-bit encoding and `V' and `u' operand codes.
(mips16_ip): Allow any characters except from `.' in opcodes.
(mips16_immed_extend): Handle 9-bit immediates.  Do not shuffle
immediates whose width is not one of these listed.
(md_estimate_size_before_relax): Handle MIPS16e2 relaxation.
(mips_relax_frag): Likewise.
(md_convert_frag): Likewise.
(mips_convert_ase_flags): Handle MIPS16e2 ASE.

* doc/as.texinfo (Target MIPS options): Add `-mmips16e2' and
`-mno-mips16e2' options.
(-mmips16e2, -mno-mips16e2): New options.
* doc/c-mips.texi (MIPS Options): Add `-mmips16e2' and
`-mno-mips16e2' options.
(MIPS ASE Instruction Generation Overrides): Add `.set mips16e2'
and `.set nomips16e2'.

MIPS16/GAS: Improve [32768,65535] out-of-range operand error diagnostics

Improve out-of-range operand error diagnostics for invalid values in the
[32768,65535] range used for a signed 16-bit immediate, making the
message consistent with that used for other invalid values, e.g.:

foo.s:1: Error: operand 2 must be an immediate expression `addiu $2,$gp,32768'
foo.s:2: Error: invalid operands `lw $2,32768($gp)'

vs:

foo.s:3: Error: operand 3 out of range `addiu $2,$gp,-32769'
foo.s:4: Error: operand 2 out of range `lw $2,-32769($gp)'

This case does not currently trigger however, for two reasons.

First, for regular MIPS and microMIPS assembly in the case of no match
caused by `match_int_operand' here, the function is always called again
from `mips_ip' via `match_insns', `match_insn' and then `match_operand'
for the same opcode table's entry with `lax_match' set to TRUE, in which
case the attempt to match succeeds and no error is issued.

Second, in the case of MIPS16 assembly no call to `match_int_operand' is
made at all for signed 16-bit immediates, because such immediates are
currently only matched with extensible instructions, and these are
handled in `match_mips16_insn' via `match_expression' directly rather
than via `match_operand'.

This will change for MIPS16 code with MIPS16e2 support introduced, where
non-extensible instructions accepting signed 16-bit immediates will be
added, so make the case work well right from the start:

foo.s:1: Error: operand 3 out of range `addiu $2,$gp,32768'
foo.s:2: Error: operand 2 out of range `lw $2,32768($gp)'

gas/
* config/tc-mips.c (match_int_operand): Call
`match_out_of_range' before returning failure for 0x8000-0xffff
values conditionally allowed.

MIPS16/GAS: Improve non-constant operand error diagnostics

Improve operand error diagnostics for non-constant expressions used for
a 16-bit immediate, making the message more descriptive and indicating
the offending operand, e.g.:

foo.s:1: Error: invalid operands `lui $2,foo-bar'

will show as:

foo.s:1: Error: operand 2 must be constant `lui $2,foo-bar'

This case does not currently trigger however, for two reasons.

First, for regular MIPS and microMIPS assembly in the case of no match
caused by `match_int_operand' here, the function is always called again
from `mips_ip' via `match_insns', `match_insn' and then `match_operand'
for the same opcode table's entry with `lax_match' set to TRUE, in which
case the attempt to match succeeds and no error is issued.

Second, in the case of MIPS16 assembly no call to `match_int_operand' is
made at all for 16-bit immediates, because such immediates are currently
only matched with extensible instructions, and these are handled in
`match_mips16_insn' via `match_expression' directly rather than via
`match_operand'.

This will change for MIPS16 code with MIPS16e2 support introduced, where
non-extensible instructions accepting 16-bit immediates will be added,
so make the case work well right from the start.

gas/
* config/tc-mips.c (match_int_operand): Call
`match_not_constant' before returning failure for a non-constant
16-bit immediate conditionally allowed.

MIPS/GAS: Improve bignum operand error diagnostics

Improve bignum operand error diagnostics for cases where a constant
would be accepted and report them as range errors, also indicating the
offending operand and instruction, e.g.:

$ cat bignum.s
addiu $2, 0x10000000000000000
break 0x10000000000000000
$ as -o bignum.o bignum.s
bignum.s:1: Error: bignum invalid
bignum.s:2: Error: operand 1 must be constant `break 0x10000000000000000'
$

now show as:

$ as -o bignum.o bignum.s
bignum.s:1: Error: operand 2 out of range `addiu $2,0x10000000000000000'
bignum.s:2: Error: operand 1 out of range `break 0x10000000000000000'
$

gas/
* config/tc-mips.c (match_const_int): Call `match_out_of_range'
rather than `match_not_constant' for unrelocated operands
retrieved as an `O_big' expression.
(match_int_operand): Call `match_out_of_range' for relocatable
operands retrieved as an `O_big' expression.
(match_mips16_insn): Call `match_out_of_range' for relaxable
operands retrieved as an `O_big' expression.
* testsuite/gas/mips/addiu-error.d: New test.
* testsuite/gas/mips/mips16@addiu-error.d: New test.
* testsuite/gas/mips/micromips@addiu-error.d: New test.
* testsuite/gas/mips/break-error.d: New test.
* testsuite/gas/mips/lui-1.l: Adjust error message.
* testsuite/gas/mips/addiu-error.l: New stderr output.
* testsuite/gas/mips/mips16@addiu-error.l: New stderr output.
* testsuite/gas/mips/micromips@addiu-error.l: New stderr output.
* testsuite/gas/mips/break-error.l: New stderr output.
* testsuite/gas/mips/addiu-error.s: New test source.
* testsuite/gas/mips/break-error.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.

MIPS16/GAS: Improve non-immediate operand error diagnostics

Improve non-immediate operand error diagnostics for extensible MIPS16
instructions and make it match corresponding regular MIPS and microMIPS
handling, e.g:

$ cat addiu.s
        addiu    $4, $3, $2
$ as -o addiu.o addiu.s
addiu.s: Assembler messages:
addiu.s:1: Error: operand 3 must be an immediate expression `addiu $4,$3,$2'
$ as -mips16 -o addiu.o addiu.s
addiu.s: Assembler messages:
addiu.s:1: Error: invalid operands `addiu $4,$3,$2'
$

To do so observe that for extensible MIPS16 instructions and a non-PC
relative operand this case is handled by an explicit OT_INTEGER check in
`match_mips16_insn' returning a failure right away and consequently
preventing a call to `match_expression' from being made.  As from commit
d436c1c2e889 ("Improve error reporting for register expressions"),
<https://sourceware.org/ml/binutils/2013-08/msg00134.html>, however the
check has become redundant as `match_expression' now only ever returns
success for OT_INTEGER argument tokens, and a special case of an OT_CHAR
`(' token already handled by `match_mips16_insn' just ahead of the
`match_expression' call.  Previously it also returned success for OT_REG
argument tokens.

Let the call to `match_expression' always happen then, yielding the same
failure for the affected cases, however with more accurate diagnostics
provided by the call making reporting consistent:

$ as -mips16 -o addiu.o addiu.s
addiu.s: Assembler messages:
addiu.s:1: Error: operand 3 must be an immediate expression `addiu $4,$3,$2'
$

gas/
* config/tc-mips.c (match_mips16_insn): Remove the explicit
OT_INTEGER check before the `match_expression' call.
* testsuite/gas/mips/mips16-insn-e.l: Adjust messages.
* testsuite/gas/mips/mips16-32@mips16-insn-e.l: Likewise.
* testsuite/gas/mips/mips16-64@mips16-insn-e.l: Likewise.
* testsuite/gas/mips/mips16e-32@mips16-insn-e.l: Likewise.
* testsuite/gas/mips/mips16-reg-error.d: New test.
* testsuite/gas/mips/mips16-reg-error.l: New stderr output.
* testsuite/gas/mips/mips16-reg-error.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.

MIPS16/GAS: Improve disallowed relocation operand error diagnostics

Improve disallowed relocation operand error diagnostics for MIPS16 code
and make it match corresponding regular MIPS and microMIPS handling,
e.g:

$ cat sltu.s
sltu $2, %lo(foo)
$ as -o sltu.o sltu.s
sltu.s: Assembler messages:
sltu.s:1: Error: operand 2 must be constant `sltu $2,%lo(foo)'
$ as -mips16 -o sltu.o sltu.s
sltu.s: Assembler messages:
sltu.s:1: Error: invalid operands `sltu $2,%lo(foo)'
$

To do so call `match_not_constant' from `match_mips16_insn' whenever a
disallowed relocation operation has been noticed, like `match_const_int'
does, making reporting consistent:

$ as -mips16 -o sltu.o sltu.s
sltu.s: Assembler messages:
sltu.s:1: Error: operand 2 must be constant `sltu $2,%lo(foo)'
$

gas/
* config/tc-mips.c (match_mips16_insn): Call
`match_not_constant' for a disallowed relocation operation.
* testsuite/gas/mips/mips16-reloc-error.d: New test.
* testsuite/gas/mips/mips16-reloc-error.l: New stderr output.
* testsuite/gas/mips/mips16-reloc-error.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.

MIPS/GAS/testsuite: Convert LUI list tests to dump tests

gas/
* testsuite/gas/mips/lui-1.d: New test.
* testsuite/gas/mips/lui-2.d: New test.
* gas/testsuite/gas/mips/mips.exp: Fold corresponding list tests
into the new tests.

MIPS/opcodes: Remove an incorrect MT ASE reference in MFC0/MTC0 decoding

The `sel' operand of CP0 move instructions is a part of the base ISA and
has nothing to do with the MT ASE.

opcodes/
* mips-dis.c (print_insn_args) <default>: Remove an MT ASE
reference in CP0 move operand decoding.

MIPS/GAS: Update `match_const_int' description

Remove a stale reference to FALLBACK parameter from the description of
`match_const_int', matching commit 1a00e61226b3 ("Remove soft_match"),
<https://sourceware.org/ml/binutils/2013-08/msg00133.html>.

gas/
* config/tc-mips.c (match_const_int): Update description.

MIPS/GAS/doc: Refer to `.module' rather than `.set'

Complement commit 919731affbef ("Add MIPS .module directive") and update
the GAS manual to refer to the `.module' rather than `.set' directive in
command-line option descriptions, following an observation that unlike
`.set' and like the respective command-line option the use of the
`.module' directive affects the ISA and ASE flags recorded in the object
file produced, and therefore it is `.module' rather than `.set' that
corresponds to the respective command-line option.

gas/
* doc/as.texinfo (-mips16, -no-mips16): Refer to `.module
mips16' rather than `.set mips16'.
(-mmicromips, -mno-micromips): Refer to `.module micromips' and
`.module nomicromips' rather than `.set micromips' and `.set
nomicromips'.
(-msmartmips, -mno-smartmips): Refer to `.module smartmips'
rather than `.set smartmips'.
* doc/c-mips.texi (MIPS Options): Refer to `.module mips16',
`.module micromips', `.module nomicromips' and `.module
smartmips' rather than `.set mips16', `.set micromips', `.set
nomicromips' and `.set smartmips' respectively.

Fix gdb procfs.c compilation on Solaris

Prompted by the creation of the gdb 8.0 branch, I tried to build it on
x86_64-pc-solaris2.12, but failed:

/vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c: In function `target_ops* procfs_target()':
/vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c:186:27: error: invalid conversion from `void (*)(target_ops*, char*, char*, char**, int)' to `void (*)(target_ops*, const char*, const string&, char**, int) {aka void (*)(target_ops*, const char*, const std::__cxx11::basic_string<char>&, char**, int)}' [-fpermissive]
   t->to_create_inferior = procfs_create_inferior;
                           ^~~~~~~~~~~~~~~~~~~~~~
/vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c: At global scope:
/vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c:125:13: warning: `void procfs_create_inferior(target_ops*, char*, char*, char**, int)' declared `static' but never defined [-Wunused-function]
 static void procfs_create_inferior (struct target_ops *, char *,
             ^~~~~~~~~~~~~~~~~~~~~~
/vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c:4529:1: warning: `void procfs_create_inferior(target_ops*, const char*, const string&, char**, int)' defined but not used [-Wunused-function]
 procfs_create_inferior (struct target_ops *ops, const char *exec_file,
 ^~~~~~~~~~~~~~~~~~~~~~

This can easily be fixed by the following patch.

* procfs.c (procfs_create_inferior): Change prototype to match
definition.

Add .debug_gdb_scripts section to PE linker scripts.

PR ld/21459
* scripttempl/pe.sc: Add .debug_gdb_scripts section.
* scripttempl/pep.sc: Likewise.

Automatic date update in version.in

Fix match and mask for 64-bit bb opcode.

Automatic date update in version.in

Fix assertion failure relaxing TLS for position-independent executables.

gold/
PR gold/21444
* gold.cc (Target_sparc::Relocate::relocate_tls): Local
variables are final for position-independent executables. This
has to be consistent with Target_sparc::Scan::local otherwise
they will disagree as to whether local-exec is used.

Avoid compiler warning in MinGW build

gdb:

2017-05-13  Eli Zaretskii  <eliz@gnu.org>

* tui/tui.c (tui_enable): Cast "unknown" to 'char *' to avoid a
C++ compiler warning.

Automatic date update in version.in

Fix misplacement of a relaxed section on AArch64.

gold/ChangeLog
PR gold/21430
* aarch64.cc
(AArch64_relobj::convert_input_section_to_relaxed_section):
Set the section offset to -1ULL.
(Target_aarch64::relocate_section): Adjust the view in case
of a relaxed input section.
* testsuite/Makefile.am (pr21430): New test.
* testsuite/Makefile.in: Regenerate
* testsuite/pr21430.s: New test source file.
* testsuite/pr21430.sh: New test script.

x86: Merge X86_ISA_1_USED/X86_ISA_1_NEEDED properties

If there are more than GNU property note in an input, we should merge
X86_ISA_1_USED and X86_ISA_1_NEEDED properties.

bfd/

* elf32-i386.c (elf_i386_parse_gnu_properties): Merge
GNU_PROPERTY_X86_ISA_1_USED and GNU_PROPERTY_X86_ISA_1_NEEDED
properties.
* elf64-x86-64.c (elf_x86_64_parse_gnu_properties): Likewise.

ld/

* testsuite/ld-i386/i386.exp: Run property-x86-3.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
* testsuite/ld-i386/property-x86-3.d: New file.
* testsuite/ld-i386/property-x86-3.s: Likewise.
* testsuite/ld-x86-64/property-x86-3.d: Likewise.
* testsuite/ld-x86-64/property-x86-3.s: Likewise.

Avoid exponential behavior in rust_evaluate_subexp

The STRUCTOP_STRUCT case in rust_evaluate_subexp would evaluate its
LHS, and then, if it did not need Rust-specific treatment, it would
back up and re-evaluate the entire STRUCTOP_STRUCT part of the
expression using evaluate_subexp_standard.  This yields exponential
behavior and causes some expressions to evaluate extremely slowly.

The fix is to simply do the needed work inline.

This is PR rust/21483.

ChangeLog
2017-05-12  Tom Tromey  <tom@tromey.com>

PR rust/21483:
* rust-lang.c (rust_evaluate_subexp) <STRUCTOP_STRUCT>: Don't
recurse, just call value_struct_elt directly.

Fix rust_dump_subexp_body

rust_dump_subexp_body was not correct in a couple of cases.  While
debugging the bug I was really interested in, this caused a crash.
This patch fixes the problems.  No test case because, IIRC there
generally aren't tests for expression dumping.

ChangeLog
2017-05-12  Tom Tromey  <tom@tromey.com>

* rust-lang.c (rust_dump_subexp_body) <STRUCTOP_ANONYMOUS,
OP_RUST_ARRAY>: Fix.

Replace "return" with "break"

This replaces a "return" with a "break" in rust_print_subexp, for
consistency.

ChangeLog
2017-05-12  Tom Tromey  <tom@tromey.com>

* rust-lang.c (rust_print_subexp): Replace "return" with "break".

MIPS/GAS: Unify GP-relative percent-ops

For a reason that is unclear commit d6f165938798 ("Support for MIPS16
HI16/LO16 relocations"),
<https://sourceware.org/ml/binutils/2005-02/msg00332.html>, which has
added support for the R_MIPS16_GPREL relocation, has spelled its
corresponding MIPS16 percent-op as `%gprel', rather than `%gp_rel' which
is how its regular MIPS counterpart is spelled.  To make assembly code
sharing easier between the regular MIPS and the MIPS16 ISA make both
percent-op spellings acceptable in both kinds of code now.

Parts of this change by Matthew Fortune.

gas/
* config/tc-mips.c (mips_percent_op): Add "%gprel".
(mips16_percent_op): Add "%gp_rel".
* testsuite/gas/mips/elf-rel8.s:: Add `%gprel' forms.
* testsuite/gas/mips/elf-rel8-mips16.s: Add `%gp_rel' forms.
* testsuite/gas/mips/elf-rel8.d: Adjust accordingly.
* testsuite/gas/mips/elf-rel8-mips16.d: Likewise.

MIPS16/opcodes: Make the handling of BREAK and SDBBP consistent

Disassemble the MIPS16 BREAK and SDBBP instruction's immediate operand
in the hexadecimal rather than decimal numeral system and add respective
operandless variants with an implicit 0 operand, making our handling of
these instructions consistent with how we have processed their regular
MIPS and microMIPS counterparts since forever.

opcodes/
* mips16-opc.c (decode_mips16_operand) <'6'>: Switch the operand
type to hexadecimal.
(mips16_opcodes): Add operandless "break" and "sdbbp" entries.

binutils/
* testsuite/binutils-all/mips/mips16-extend-insn.d: Adjust BREAK
and SDBBP disassembly.

gas/
* testsuite/gas/mips/mips16.d: Adjust BREAK disassembly.
* testsuite/gas/mips/mips16-64@mips16.d: Likewise.
* testsuite/gas/mips/mips16-64.d: Likewise.
* testsuite/gas/mips/mips16-64@mips16-64.d: Likewise.
* testsuite/gas/mips/mips16-macro.d: Likewise.
* testsuite/gas/mips/mips16-64@mips16-macro.d: Likewise.
* testsuite/gas/mips/mips16-sub.d: Likewise.
* testsuite/gas/mips/mips16-32@mips16-sub.d: Likewise.

Automatic date update in version.in

MIPS/opcodes: Mark descriptive SYNC mnemonics as aliases

Following the way how descriptive SYNC mnemonics have been defined in
the architecture[1][2] mark them as aliases, so that the generic SYNC
instruction can be alternatively disassembled along with its immediate
operand, as noted in the documents referred.

References:

[1] "MIPS Architecture For Programmers, Volume II-A: The MIPS32
    Instruction Set", MIPS Technologies, Inc., Document Number: MD00086,
    Revision 5.04, December 11, 2013, Table 4.7 "Encodings of the
    Bits[10:6] of the SYNC instruction; the SType Field", p. 305

[2] "MIPS Architecture for Programmers, Volume II-B: The microMIPS32
    Instruction Set", MIPS Technologies, Inc., Document Number: MD00582,
    Revision 5.04, January 15, 2014, Table 5.28 "Encodings of the
    Bits[10:6] of the SYNC instruction; the SType Field", p. 481

opcodes/
* mips-opc.c (mips_builtin_opcodes): Mark "synciobdma", "syncs",
"syncw", "syncws", "sync_acquire", "sync_mb", "sync_release",
"sync_rmb" and "sync_wmb" as aliases.
* micromips-opc.c (micromips_opcodes): Mark "sync_acquire",
"sync_mb", "sync_release", "sync_rmb" and "sync_wmb" as aliases.

gas/
* testsuite/gas/mips/mips32r2-sync-1.d: New test.
* testsuite/gas/mips/micromips@mips32r2-sync-1.d: New test.
* testsuite/gas/mips/mips.exp: Run the new tests.

x86-64: Rename .plt.bnd to .plt.sec

Rename .plt.bnd to .plt.sec to indicate that this is used as the second
PLT section.  There is no change in run-time behavior.  We also scan the
.plt.sec section to synthesize PLT symbols.

bfd/

* elf64-x86-64.c (elf_x86_64_link_hash_entry): Rename plt_bnd
to plt_second.
(elf_x86_64_link_hash_table): Rename plt_bnd/plt_bnd_eh_frame
to plt_second/plt_second_eh_frame.
(elf_x86_64_link_hash_newfunc): Updated.
(elf_x86_64_allocate_dynrelocs): Likewise.
(elf_x86_64_size_dynamic_sections): Likewise.
(elf_x86_64_relocate_section): Likewise.
(elf_x86_64_finish_dynamic_symbol): Likewise.
(elf_x86_64_finish_dynamic_sections): Likewise.
(elf_x86_64_plt_type): Rename plt_bnd to plt_second.
(elf_x86_64_get_synthetic_symtab): Updated.  Also scan the
.plt.sec section.
(elf_backend_setup_gnu_properties): Updated.  Create the
.plt.sec section instead of the .plt.sec section.

ld/

* emulparams/elf_x86_64.sh (TINY_READONLY_SECTION): Replace
.plt.bnd with .plt.sec.
* testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise.
* testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise.
* testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise.
* testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise.
* testsuite/ld-x86-64/bnd-plt-1.d: Likewise.
* testsuite/ld-x86-64/mpx3.dd: Likewise.
* testsuite/ld-x86-64/mpx3n.dd: Likewise.
* testsuite/ld-x86-64/mpx4.dd: Likewise.
* testsuite/ld-x86-64/mpx4n.dd: Likewise.
* testsuite/ld-x86-64/plt-main-bnd-now.rd: Likewise.
* testsuite/ld-x86-64/pr21038b-now.d: Likewise.
* testsuite/ld-x86-64/pr21038b.d: Likewise.
* testsuite/ld-x86-64/pr21038c-now.d: Likewise.
* testsuite/ld-x86-64/pr21038c.d: Likewise.

x86: Generate PLT relocations for -z now

This patch partially reverses:

commit 25070364b0ce33eed46aa5d78ebebbec6accec7e
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Sat May 16 07:00:21 2015 -0700

    Don't generate PLT relocations for now binding

to support LD_AUDIT and LD_PROFILE with -z now.  If there is an existing
GOT relocation, it is still used to avoid PLT relocation against the same
function symbol.

bfd/

* elf32-i386.c (elf_i386_allocate_dynrelocs): Partially revert
commit 25070364b0ce33eed46aa5d78ebebbec6accec7e.
* elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): Likewse.

ld/

* testsuite/ld-i386/plt-pic2.dd: Updated.
* testsuite/ld-i386/plt2.dd: Likewise.
* testsuite/ld-i386/plt2.rd: Likewise.
* testsuite/ld-i386/pr17689now.rd: Likewise.
* testsuite/ld-ifunc/ifunc-16-i386-now.d: Likewise.
* testsuite/ld-ifunc/ifunc-16-x86-64-now.d: Likewise.
* testsuite/ld-ifunc/pr17154-i386-now.d: Likewise.
* testsuite/ld-ifunc/pr17154-x86-64-now.d: Likewise.
* testsuite/ld-x86-64/bnd-branch-1-now.d: Likewise.
* testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise.
* testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise.
* testsuite/ld-x86-64/plt2.dd: Likewise.
* testsuite/ld-x86-64/plt2.rd: Likewise.
* testsuite/ld-x86-64/pr17689now.rd: Likewise.
* testsuite/ld-x86-64/pr21038b-now.d: Likewise.
* testsuite/ld-x86-64/pr21038c-now.d: Likewise.

Automatic date update in version.in

MIPS/GAS/testsuite: Convert ISA override list tests to dump tests

And remove the zillion duplicate sources.  Also `mips1@isa-override-2.l'
is the same as `r3000@isa-override-2.l', so remove the latter too, now
that `r3000@isa-override-2.d' can name a file to match stderr output
against.

gas/
* testsuite/gas/mips/isa-override-2.d: New test.
* testsuite/gas/mips/mips1@isa-override-2.d: New test.
* testsuite/gas/mips/r3000@isa-override-2.d: New test.
* testsuite/gas/mips/r3900@isa-override-2.d: New test.
* testsuite/gas/mips/mips2@isa-override-2.d: New test.
* testsuite/gas/mips/mips32@isa-override-2.d: New test.
* testsuite/gas/mips/mips32r2@isa-override-2.d: New test.
* testsuite/gas/mips/mips32r3@isa-override-2.d: New test.
* testsuite/gas/mips/mips32r5@isa-override-2.d: New test.
* testsuite/gas/mips/mips32r6@isa-override-2.d: New test.
* testsuite/gas/mips/octeon3@isa-override-2.d: New test.
* testsuite/gas/mips/r3000@isa-override-2.l: Remove list test.
* testsuite/gas/mips/mips1@isa-override-2.s: Remove test source.
* testsuite/gas/mips/r3000@isa-override-2.s: Remove test source.
* testsuite/gas/mips/r3900@isa-override-2.s: Remove test source.
* testsuite/gas/mips/mips2@isa-override-2.s: Remove test source.
* testsuite/gas/mips/mips32@isa-override-2.s: Remove test
source.
* testsuite/gas/mips/mips32r2@isa-override-2.s: Remove test
source.
* testsuite/gas/mips/mips32r3@isa-override-2.s: Remove test
source.
* testsuite/gas/mips/mips32r5@isa-override-2.s: Remove test
source.
* testsuite/gas/mips/mips32r6@isa-override-2.s: Remove test
source.
* testsuite/gas/mips/octeon3@isa-override-2.s: Remove test
source.
* gas/testsuite/gas/mips/mips.exp: Fold corresponding list tests
into the new tests.

MIPS/binutils/testsuite: Define names of temporary files

Define `tempfile' and `copyfile' in `mips.exp' so that standalone script
execution via `RUNTESTFLAGS=mips.exp' works rather than producing:

Running .../binutils/testsuite/binutils-all/mips/mips.exp ...
ERROR: tcl error sourcing
.../binutils/testsuite/binutils-all/mips/mips.exp.
ERROR: can't read "tempfile": no such variable
    while executing
"binutils_assemble_flags ${srcfile} $tempfile $opts(as)"
    (procedure "run_dump_test" line 207)
    invoked from within
"run_dump_test "mips-ase-1""
    invoked from within
"if [is_elf_format] {
    run_dump_test "mips-ase-1"
    run_dump_test "mips-ase-2"
    run_dump_test "mips-ase-3"
    run_dump_test "mixed-mips16"
   ..."
    (file ".../binutils/testsuite/binutils-all/mips/mips.exp" line 22)
    invoked from within
"source .../binutils/testsuite/binutils-all/mips/mips.exp"
    ("uplevel" body line 1)
    invoked from within
"uplevel #0 source .../binutils/testsuite/binutils-all/mips/mips.exp"
    invoked from within
"catch "uplevel #0 source $test_file_name""
testcase .../binutils/testsuite/binutils-all/mips/mips.exp completed in 0 seconds

binutils/
* testsuite/binutils-all/mips/mips.exp: Define `tempfile' and
`copyfile' variables.

i386: Set CHECK_RELOCS_AFTER_OPEN_INPUT to yes

All linker targets based on elf32-i386 should check relocations after
opening all inputs since this is how elf32-i386 works.

* emulparams/i386lynx.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Set
to yes.
* emulparams/i386moss.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/i386nw.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise.

MIPS/GAS/testsuite: Correct swapped MIPS16e subset test names

Correct the test names swapped between common and 64-bit MIPS16e subset
tests.

gas/
* testsuite/gas/mips/mips16e-sub.d: Correct test name.
* testsuite/gas/mips/mips16-32@mips16e-sub.d: Likewise.
* testsuite/gas/mips/mips16-64@mips16e-sub.d: Likewise.
* testsuite/gas/mips/mips16e-64-sub.d: Likewise.
* testsuite/gas/mips/mips16-32@mips16e-64-sub.d: Likewise.
* testsuite/gas/mips/mips16-64@mips16e-64-sub.d: Likewise.
* testsuite/gas/mips/mips16e-32@mips16e-64-sub.d: Likewise.

bfd: fix the deletion of relocs in sparc64

This patch fixes the deletion of relocations in BFD sections in
sparc64 targets.

A specialized `_bfd_set_reloc' function is provided that updates the
internal canon_reloc_count(sec) counter instead of sec->reloc_count.
Additionally, the `write_relocs' callback in elf64-sparc is adapted to
use the canon_reloc_count to traverse `sec->orelocation'.

Tested in sparc64-linux-gnu targets.
Fixes an existing failure in the merge-notes objcopy test.
No regressions.

bfd/ChangeLog:

2017-05-10  Jose E. Marchesi  <jose.marchesi@oracle.com>

* elf64-sparc.c (elf64_sparc_set_reloc): New function.
(bfd_elf64_set_reloc): Define.
(elf64_sparc_write_relocs): Use `canon_reloc_count'.

bfd: new BFD target entry point _bfd_set_reloc.

This patch adds a new entry point to the BFD_JUMP_TABLE_RELOCS.  The
previous common implementation `bfd_set_reloc', in bfd/bfd.c, has been
moved to bfd/reloc.c with the name `_bfd_generic_set_reloc', and all
BFD targets has been adapted to use it.

This patch doesn't introduce any change on functionality, but prepares
the ground for further work.

bfd/ChangeLog:

    2017-05-10  Jose E. Marchesi  <jose.marchesi@oracle.com>

     * targets.c (BFD_JUMP_TABLE_RELOCS): Add NAME##_set_reloc.
     (struct bfd_target): New field _bfd_set_reloc.
     * bfd.c (bfd_set_reloc): Call backend _set_bfd.
     * reloc.c (_bfd_generic_set_reloc): New function.
     * coffcode.h (coff_set_reloc): Define to _bfd_generic_set_reloc.
     * nlm-target.h (nlm_set_reloc): Likewise.
     * coff-rs6000.c (_bfd_xcoff_set_reloc): Likewise.
     * aout-tic30.c (MY_set_reloc): Likewise.
     * aout-target.h (MY_set_reloc): Likewise.
     * elfxx-target.h (bfd_elfNN_set_reloc): Likewise.
     * coff-alpha.c (_bfd_ecoff_set_reloc): Likewise.
     * mach-o-target.c (bfd_mach_o_set_reloc): Likewise.
     * vms-alpha.c (alpha_vms_set_reloc): Likewise.
     * aout-adobe.c (aout_32_set_reloc): Likewise.
     * bout.c (b_out_set_reloc): Likewise.
     * coff-mips.c (_bfd_ecoff_set_reloc): Likewise.
     * i386os9k.c (aout_32_set_reloc): Likewise.
     * ieee.c (ieee_set_reloc): Likewise.
     * oasys.c (oasys_set_reloc): Likewise.
     * som.c (som_set_reloc): Likewise.
     * versados.c (versados_set_reloc): Likewise.
     * coff64-rs6000.c (rs6000_xcoff64_vec): Add
     _bfd_generic_set_reloc.
     (rs6000_xcoff64_aix_vec): LIkewise.
     * libbfd.c (_bfd_norelocs_set_reloc): New function.
     * libbfd-in.h: Prototype for _bfd_norelocs_set_reloc.
     * i386msdos.c (msdos_set_reloc): Define to
     _bfd_norelocs_set_reloc.
     * elfcode.h (elf_set_reloc): Define.
     * bfd-in2.h: Regenerated.

x86-64: Use .plt.bnd for IFUNC function address

When -z bndplt is used, we must use the .plt.bnd entry for IFUNC function
address.

bfd/

PR ld/21481
* elf64-x86-64.c (elf_x86_64_finish_dynamic_symbol): Use .plt.bnd
for IFUNC function address.

ld/

PR ld/21481
* testsuite/ld-x86-64/pr21481a.c: New file.
* testsuite/ld-x86-64/pr21481b.S: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run PR ld/21481 tests.

MIPS/GAS/testsuite: Remove stale `mips16-macro' list test output

Complement commit c60aaac10f9a1 ("MIPS/GAS/testsuite: Extend MIPS16
testing over multiple ISAs") and remove a stale `mips16-macro' list test
output replaced with the `mips16-32@mips16-macro' stderr output.

gas/
* testsuite/gas/mips/mips16-macro.l: Remove list test.

MIPS/GAS/testsuite: Remove last remnants of ECOFF support

Complement commit 16e5e222b6ea ("Make gas/mips/mips.exp ELF-only"),
<https://sourceware.org/ml/binutils/2013-06/msg00195.html>, and commit
fcedb9f3ca87 ("MIPS/GAS/testsuite: Remove remnants of a.out/ECOFF
support"), and remove stale ECOFF test dumps previously missed.

gas/
* testsuite/gas/mips/r3900@ecoff@ld.d: Remove test.
* testsuite/gas/mips/mips2@ecoff@ld.d: Remove test.
* testsuite/gas/mips/mips32@ecoff@ld.d: Remove test.
* testsuite/gas/mips/mips32r2@ecoff@ld.d: Remove test.
* testsuite/gas/mips/r3900@ecoff@ld-forward.d: Remove test.
* testsuite/gas/mips/mips2@ecoff@ld-forward.d: Remove test.
* testsuite/gas/mips/mips32@ecoff@ld-forward.d: Remove test.
* testsuite/gas/mips/mips32r2@ecoff@ld-forward.d: Remove test.
* testsuite/gas/mips/mips1@ecoff@sd.d: Remove test.
* testsuite/gas/mips/r3000@ecoff@sd.d: Remove test.
* testsuite/gas/mips/r3900@ecoff@sd.d: Remove test.
* testsuite/gas/mips/mips2@ecoff@sd.d: Remove test.
* testsuite/gas/mips/mips32@ecoff@sd.d: Remove test.
* testsuite/gas/mips/mips32r2@ecoff@sd.d: Remove test.
* testsuite/gas/mips/mips1@ecoff@sd-forward.d: Remove test.
* testsuite/gas/mips/r3000@ecoff@sd-forward.d: Remove test.
* testsuite/gas/mips/r3900@ecoff@sd-forward.d: Remove test.
* testsuite/gas/mips/mips2@ecoff@sd-forward.d: Remove test.
* testsuite/gas/mips/mips32@ecoff@sd-forward.d: Remove test.
* testsuite/gas/mips/mips32r2@ecoff@sd-forward.d: Remove test.

[ARC] Object attributes.

gas/
2017-05-10  Claudiu Zissulescu  <claziss@synopsys.com>

* testsuite/gas/arc/attr-arc600.d: New file.
* testsuite/gas/arc/attr-arc600_mul32x16.d: Likewise.
* testsuite/gas/arc/attr-arc600_norm.d: Likewise.
* testsuite/gas/arc/attr-arc601.d: Likewise.
* testsuite/gas/arc/attr-arc601_mul32x16.d: Likewise.
* testsuite/gas/arc/attr-arc601_mul64.d: Likewise.
* testsuite/gas/arc/attr-arc601_norm.d: Likewise.
* testsuite/gas/arc/attr-arc700.d: Likewise.
* testsuite/gas/arc/attr-arcem.d: Likewise.
* testsuite/gas/arc/attr-archs.d: Likewise.
* testsuite/gas/arc/attr-autodetect-1.d: Likewise.
* testsuite/gas/arc/attr-autodetect-1.s: Likewise.
* testsuite/gas/arc/attr-cpu-a601.d: Likewise.
* testsuite/gas/arc/attr-cpu-a601.s: Likewise.
* testsuite/gas/arc/attr-cpu-a700.d: Likewise.
* testsuite/gas/arc/attr-cpu-a700.s: Likewise.
* testsuite/gas/arc/attr-cpu-em.d: Likewise.
* testsuite/gas/arc/attr-cpu-em.s: Likewise.
* testsuite/gas/arc/attr-cpu-hs.d: Likewise.
* testsuite/gas/arc/attr-cpu-hs.s: Likewise.
* testsuite/gas/arc/attr-em.d: Likewise.
* testsuite/gas/arc/attr-em4.d: Likewise.
* testsuite/gas/arc/attr-em4_dmips.d: Likewise.
* testsuite/gas/arc/attr-em4_fpuda.d: Likewise.
* testsuite/gas/arc/attr-em4_fpus.d: Likewise.
* testsuite/gas/arc/attr-hs.d: Likewise.
* testsuite/gas/arc/attr-hs34.d: Likewise.
* testsuite/gas/arc/attr-hs38.d: Likewise.
* testsuite/gas/arc/attr-hs38_linux.d: Likewise.
* testsuite/gas/arc/attr-mul64.d: Likewise.
* testsuite/gas/arc/attr-name.d: Likewise.
* testsuite/gas/arc/attr-name.s: Likewise.
* testsuite/gas/arc/attr-nps400.d: Likewise.
* testsuite/gas/arc/attr-override-mcpu.d: Likewise.
* testsuite/gas/arc/attr-override-mcpu.s
* testsuite/gas/arc/attr-quarkse_em.d: Likewise.
* testsuite/gas/arc/blank.s: Likewise.
* testsuite/gas/elf/section2.e-arc: Likewise.
* testsuite/gas/arc/cpu-pseudop-1.d: Update test.
* testsuite/gas/arc/cpu-pseudop-2.d: Likewise.
* testsuite/gas/arc/nps400-0.d: Likewise.
* testsuite/gas/elf/elf.exp: Set target_machine for ARC.
* config/tc-arc.c (opcode/arc-attrs.h): Include.
(ARC_GET_FLAG, ARC_SET_FLAG, streq): Define.
(arc_attribute): Declare new function.
(md_pseudo_table): Add arc_attribute.
(cpu_types): Rename default cpu features.
(selected_cpu): Set the default OSABI flag.
(mpy_option): New variable.
(pic_option): Likewise.
(sda_option): Likewise.
(tls_option): Likewise.
(feature_type, feature_list): Remove.
(arc_initial_eflag): Likewise.
(attributes_set_explicitly): New variable.
(arc_check_feature): Check also for the conflicting features.
(arc_select_cpu): Refactor assignment of selected_cpu.eflags.
(arc_option): Remove setting of private flags and architecture.
(check_cpu_feature): Refactor feature names.
(autodetect_attributes): New function.
(assemble_tokens): Use above function.
(md_parse_option): Refactor feature names.
(arc_attribute): New function.
(arc_set_attribute_int): Likewise.
(arc_set_attribute_string): Likewise.
(arc_stralloc): Likewise.
(arc_set_public_attributes): Likewise.
(arc_md_end): Likewise.
(arc_copy_symbol_attributes): Likewise.
(rc_convert_symbolic_attribute): Likewise.
* config/tc-arc.h (md_end): Define.
(CONVERT_SYMBOLIC_ATTRIBUTE): Likewise.
(TC_COPY_SYMBOL_ATTRIBUTES): Likewise.
* doc/c-arc.texi: Document ARC object attributes.

binutils/
2017-05-10  Claudiu Zissulescu  <claziss@synopsys.com>

* readelf.c (decode_ARC_machine_flags): Recognize OSABI v4.
(get_arc_section_type_name): New function.
(get_section_type_name): Use the above function.
(display_arc_attribute): New function.
(process_arc_specific): Likewise.
(process_arch_specific): Handle ARC specific information.
* testsuite/binutils-all/strip-3.d: Consider ARC.attributes
section.

include/
2017-05-10  Claudiu Zissulescu  <claziss@synopsys.com>

* elf/arc.h (SHT_ARC_ATTRIBUTES): Define.
(Tag_ARC_*): Define.
(E_ARC_OSABI_V4): Define.
(E_ARC_OSABI_CURRENT): Reassign it.
(TAG_CPU_*): Define.
* opcode/arc-attrs.h: New file.
* opcode/arc.h (insn_subclass_t): Assign enum values.
(insn_subclass_t): Update enum with QUARKSE1, QUARKSE2, and LL64.
(ARC_EA, ARC_CD, ARC_LLOCK, ARC_ATOMIC, ARC_MPY, ARC_MULT)
(ARC_NPS400, ARC_DPFP, ARC_SPFP, ARC_FPU, ARC_FPUDA, ARC_SWAP)
(ARC_NORM, ARC_BSCAN, ARC_UIX, ARC_TSTAMP, ARC_VBFDW)
(ARC_BARREL, ARC_DSPA, ARC_SHIFT, ARC_INTR, ARC_DIV, ARC_XMAC)
(ARC_CRC): Delete.

bfd/
2017-05-10  Claudiu Zissulescu  <claziss@synopsys.com>

* elf32-arc.c (FEATURE_LIST_NAME): Define.
(CONFLICT_LIST): Likewise.
(opcode/arc-attrs.h): Include.
(arc_elf_print_private_bfd_data): Print OSABI v4 flag.
(arc_extract_features): New file.
(arc_stralloc): Likewise.
(arc_elf_merge_attributes): Likewise.
(arc_elf_merge_private_bfd_data): Use object attributes.
(bfd_arc_get_mach_from_attributes): New function.
(arc_elf_object_p): Use object attributes.
(arc_elf_final_write_processing): Likewise.
(elf32_arc_obj_attrs_arg_type): New function.
(elf32_arc_obj_attrs_handle_unknown): Likewise.
(elf32_arc_section_from_shdr): Likewise.
(elf_backend_obj_attrs_vendor): Define.
(elf_backend_obj_attrs_section): Likewise.
(elf_backend_obj_attrs_arg_type): Likewise.
(elf_backend_obj_attrs_section_type): Likewise.
(elf_backend_obj_attrs_handle_unknown): Likewise.
(elf_backend_section_from_shdr): Likewise.

ld/
2017-05-10  Claudiu Zissulescu  <claziss@synopsys.com>

* testsuite/ld-arc/attr-merge-0.d: New file.
* testsuite/ld-arc/attr-merge-0.s: Likewise.
* testsuite/ld-arc/attr-merge-0e.s: Likewise.
* testsuite/ld-arc/attr-merge-1.d: Likewise.
* testsuite/ld-arc/attr-merge-1.s: Likewise.
* testsuite/ld-arc/attr-merge-1e.s: Likewise.
* testsuite/ld-arc/attr-merge-2.d: Likewise.
* testsuite/ld-arc/attr-merge-2.s: Likewise.
* testsuite/ld-arc/attr-merge-3.d: Likewise.
* testsuite/ld-arc/attr-merge-3.s: Likewise.
* testsuite/ld-arc/attr-merge-3e.s: Likewise.
* testsuite/ld-arc/attr-merge-4.s: Likewise.
* testsuite/ld-arc/attr-merge-5.d: Likewise.
* testsuite/ld-arc/attr-merge-5a.s: Likewise.
* testsuite/ld-arc/attr-merge-5b.s: Likewise.
* testsuite/ld-arc/attr-merge-conflict-isa.d: Likewise.
* testsuite/ld-arc/attr-merge-err-isa.d: Likewise.
* testsuite/ld-arc/attr-merge-incompatible-cpu.d: Likewise.
* testsuite/ld-arc/got-01.d: Update test.
* testsuite/ld-arc/attr-merge-err-quarkse.d: New file.
* testsuite/ld-arc/attr-quarkse.s: Likewise.
* testsuite/ld-arc/attr-quarkse2.s: Likewise.

opcodes/
2017-05-10  Claudiu Zissulescu  <claziss@synopsys.com>

* arc-dis.c (parse_option): Update quarkse_em option..
* arc-ext-tbl.h (dsp_fp_flt2i, dsp_fp_i2flt): Change subclass to
QUARKSE1.
(dsp_fp_div, dsp_fp_cmp): Change subclass to QUARKSE2.

Remove Kaz Kojima as SH maintainer.

Automatic date update in version.in

Support pe-bigobj-x86-64 as an output format in 64-bit PE based linkers.

PR ld/21471
* pe-dll.c (pe_detail_list): Add entry for pe-bigobj-x86-64.

Use std::forward_list for current_regcache

gdb:

2017-05-09  Yao Qi  <yao.qi@linaro.org>

* regcache.c: Include <forward_list>.
(struct regcache_list): Remove.
(current_regcache): Update.
(get_thread_arch_aspace_regcache): Update for std::forward_list.
(regcache_thread_ptid_changed): Likewise.
(registers_changed_ptid): Likewise.
(current_regcache_size): Likewise.

Add current_regcache unit test

This patch adds a unit test to current_regcache, to make sure it is
correctly updated by get_thread_arch_aspace_regcache and
registers_changed_ptid.

gdb:

2017-05-09  Yao Qi  <yao.qi@linaro.org>

* regcache.c [GDB_SELF_TEST]: Include selftest.h.
(current_regcache_size): New function.
(current_regcache_test): New function.
(_initialize_regcache) [GDB_SELF_TEST]: Register the unit test.

Fix resolution of R_ARM_THM_ALU_PREL_11_0 relocation against Thumb symbols.

PR ld/21458
* elf32-arm.c (elf32_arm_final_link_relocate): Set the bottom bit
of the value when resolving a R_ARM_THM_ALU_PREL_11_0 relocation
and the destination is a Thumb symbol.

ld.texinfo, use "affects" instead of "effects"

* ld.texinfo (orphan sections): Grammar fix.

Automatic date update in version.in

Add missing initializer to silence GCC 4.2

Silence GCC 4.2:

elf64-x86-64.c: In function ‘elf_x86_64_get_synthetic_symtab’:
elf64-x86-64.c:6490: warning: missing initializer
elf64-x86-64.c:6490: warning: (near initialization for ‘plts[3].sec’)

* elf32-i386.c (elf_i386_get_synthetic_symtab): Add missing
initializer for GCC 4.2.
* lf64-x86-64.c (elf_x86_64_get_synthetic_symtab): Likewise.

x86-64: Improve PLT generation and synthetic PLT symbols

On x86-64, the procedure linkage table (PLT) is used to

1. Call external function.
2. Call internal IFUNC function.  The best implementation is selected
for the target processor at run-time.
3. Act as the canonical function address.
4. Support LD_AUDIT to audit external function calls.
5. Support LD_PROFILE to profile external function calls.

PLT looks like:

PLT0:  push  GOT[1]
       jmp   *GOT[2]
       nop
PLT1:  jmp   *GOT[name1_index]
       push  name1_reloc_index
       jmp   PLT0

GOT is an array of addresses.  Initially the GOT entry of name1 is
filled with the address of the "push name1_reloc_index" instruction.
The function, name1, is called via "jmp *GOT[name1]" in the PLT entry.
Even when lazy binding is disabled by "-z now", the PLT0 entry may
still be used with LD_AUDIT or LD_PROFILE if PLT entry is used for
canonical function address.

When linker is invoked with "-z bndplt", a different PLT layout in .plt
is used:

PLT0:  push     GOT[1]
       bnd jmp  *GOT[2]
       nop
PLT1:  push     name1_reloc_index
       bnd jmp  PLT0
       nop

together with a second PLT section, .pl.bnd:

PLT1:  bnd jmp  *GOT[name1_index]
       nop

where the GOT entry of name1 is filled with the address of the push
instruction of the corresponding entry in .plt.

1. With lazy binding, when the external function, name1, is called the
first time, dynamic linker is called via PLT0 to update GOT[name1_index]
with the actual address of name1 and transfers control to name1
afterwards.
2. PLT is also used to call a local IFUNC function, name1, run-time
loader updates GOT[name1_index] when loading the module.

This patch

1. Remove PLT layout configurations from x86-64 backend_data.
2. Add generic, lay and non-lazy PLT layout configurations to x86-64
link_hash_table.  Generic PLT layout includes the PLT entry templates,
information how to update the first instruction in PLT and PLT eh_frame
informaton, which are initialized in x86-64 setup_gnu_properties, based
on "-z bndplt" and target selection.  PLT section alignment is also set
to PLT entry size for non-NaCl target.
3. Remove elf_x86_64_create_dynamic_sections.  create_dynamic_sections
isn't always called, but GOT relocations need GOT relocations.  Instead,
create all x86-64 specific dynamic sections with alignment to their entry
size  in x86-64 setup_gnu_properties, which initializes elf.dynobj, so
that x86-64 check_relocs can be simplified.
4. Rewrite elf_x86_64_get_synthetic_symtab to check PLT sections against
all dynamic relocations to support both lazy and non-lazy PLTs.

There is no change in PLT.  The only externally visible change is the
improvement of synthetic PLT symbols for .plt.got.

bfd/

* elf64-x86-64.c (PLT_ENTRY_SIZE): Renamed to ...
(LAZY_PLT_ENTRY_SIZE): This.
(NON_LAZY_PLT_ENTRY_SIZE): New.
(elf_x86_64_plt0_entry): Renamed to ...
(elf_x86_64_lazy_plt0_entry): This.
(elf_x86_64_plt_entry): Renamed to ...
(elf_x86_64_lazy_plt_entry): This.
(elf_x86_64_bnd_plt0_entry): Renamed to ...
(elf_x86_64_lazy_bnd_plt0_entry): This.
(elf_x86_64_legacy_plt_entry): Removed.
(elf_x86_64_bnd_plt_entry): Renamed to ...
(elf_x86_64_lazy_bnd_plt_entry): This.
(elf_x86_64_legacy_plt2_entry): Renamed to ...
(elf_x86_64_non_lazy_plt_entry): This.
(elf_x86_64_bnd_plt2_entry): Renamed to ...
(elf_x86_64_non_lazy_bnd_plt_entry): This.
(elf_x86_64_eh_frame_plt): Renamed to ...
(elf_x86_64_eh_frame_lazy_plt): This.
(elf_x86_64_eh_frame_bnd_plt): Renamed to ...
(elf_x86_64_eh_frame_lazy_bnd_plt): This.
(elf_x86_64_eh_frame_plt_got): Renamed to ...
(elf_x86_64_eh_frame_non_lazy_plt): This.
(elf_x86_64_lazy_plt_layout): New.
(elf_x86_64_non_lazy_plt_layout): Likewise.
(elf_x86_64_plt_layout): Likewise.
(elf_x86_64_backend_data): Remove PLT layout information.  Add
os for target system.
(GET_PLT_ENTRY_SIZE): Removed.
(elf_x86_64_lazy_plt): New.
(elf_x86_64_non_lazy_plt): Likewise.
(elf_x86_64_lazy_bnd_plt): Likewise.
(elf_x86_64_non_lazy_bnd_plt): Likewise.
(elf_x86-64_arch_bed): Updated.
(elf_x86_64_link_hash_table): Add plt, lazy_plt and non_lazy_plt.
(elf_x86_64_create_dynamic_sections): Removed.
(elf_x86_64_check_relocs): Don't check elf.dynobj.  Don't call
_bfd_elf_create_ifunc_sections nor _bfd_elf_create_got_section.
(elf_x86-64_adjust_dynamic_symbol): Updated.
(elf_x86_64_allocate_dynrelocs): Updated.  Pass 0 as PLT header
size to _bfd_elf_allocate_ifunc_dyn_relocs and don't allocate
size for PLT0 if there is no PLT0.  Get plt_entry_size from
non_lazy_plt for non-lazy PLT entries.
(elf_x86_64_size_dynamic_sections): Updated.  Get plt_entry_size
from non_lazy_plt for non-lazy PLT entries.
(elf_x86-64_relocate_section): Updated.  Properly get PLT index
if there is no PLT0.
(elf_x86_64_finish_dynamic_symbol): Updated.  Fill the first slot
in the PLT entry with generic PLT layout.  Fill the non-lazy PLT
entries with non-lazy PLT layout.  Don't fill the second and third
slots in the PLT entry if there is no PLT0.
(elf_x86_64_finish_dynamic_sections): Updated.  Don't fill PLT0
if there is no PLT0.  Set sh_entsize on the .plt.got section.
(compare_relocs): New.
(elf_x86_64_plt_type): Likewise.
(elf_x86_64_plt): Likewise.
(elf_x86_64_nacl_plt): New. Forward declaration.
(elf_x86_64_get_plt_sym_val): Removed.
(elf_x86_64_get_synthetic_symtab): Rewrite to check PLT sections
against all dynamic relocations.
(elf_x86_64_link_setup_gnu_properties): New function.
(elf_backend_create_dynamic_sections): Updated.
(elf_backend_setup_gnu_properties): New.
(elf_x86_64_nacl_plt): New.
(elf_x86_64_nacl_arch_bed): Updated.

ld/

* testsuite/ld-ifunc/ifunc-16-x86-64-now.d: New file.
* testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d: Likewise.
* testsuite/ld-ifunc/ifunc-2-x86-64-now.d: Likewise.
* testsuite/ld-ifunc/pr17154-x86-64-now.d: Likewise.
* testsuite/ld-x86-64/bnd-branch-1-now.d: Likewise.
* testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise.
* testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise.
* testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise.
* testsuite/ld-x86-64/mpx3n.dd: Likewise.
* testsuite/ld-x86-64/mpx4n.dd: Likewise.
* testsuite/ld-x86-64/plt-main-bnd-now.rd: Likewise.
* testsuite/ld-x86-64/plt2.dd: Likewise.
* testsuite/ld-x86-64/plt2.rd: Likewise.
* testsuite/ld-x86-64/plt2.s: Likewise.
* testsuite/ld-x86-64/pr20830a-now.d: Likewise.
* testsuite/ld-x86-64/pr20830b-now.d: Likewise.
* testsuite/ld-x86-64/pr21038a-now.d: Likewise.
* testsuite/ld-x86-64/pr21038b-now.d: Likewise.
* testsuite/ld-x86-64/pr21038c-now.d: Likewise.
* testsuite/ld-x86-64/load1b-nacl.d: Updated.
* testsuite/ld-x86-64/load1b.d: Likewise.
* testsuite/ld-x86-64/plt-main-bnd.dd: Likewise.
* testsuite/ld-x86-64/pr20253-1h.d: Likewise.
* testsuite/ld-x86-64/pr20830a.d: Update the .plt.got section
with func@plt.
* testsuite/ld-x86-64/pr20830b.d: Likewise.
* testsuite/ld-x86-64/pr21038a.d: Likewise.
* testsuite/ld-x86-64/pr21038c.d: Likewise.
* testsuite/ld-x86-64/mpx.exp: Add some -z now tests.
* testsuite/ld-x86-64/x86-64.exp: Likewise.

S/390: Fix ifunc missing runtime reloc

This fixes a problem with a missing R_390_64 reloc against .data for a
function pointer to an ifunc function.

No regressions on s390x.

Pushed to mainline.

bfd/ChangeLog:

2017-05-08  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

* elf-s390-common.c: Don't check non_got_ref flag.
* elf32-s390.c (elf_s390_relocate_section): Likewise.
* elf64-s390.c (elf_s390_relocate_section): Likewise.

i386: Improve PLT generation and synthetic PLT symbols

On i386, the procedure linkage table (PLT) is used to

1. Call external function.
2. Call internal IFUNC function.  The best implementation is selected
for the target processor at run-time.
3. Act as the canonical function address.
4. Support LD_AUDIT to audit external function calls.
5. Support LD_PROFILE to profile external function calls.

PLT looks like:

PLT0:  push  GOT[1]
       jmp   *GOT[2]
       nop
PLT1:  jmp   *GOT[name1_index]
       push  name1_reloc_index
       jmp   PLT0

GOT is an array of addresses.  Initially the GOT entry of name1 is
filled with the address of the "push name1_reloc_index" instruction.
The function, name1, is called via "jmp *GOT[name1]" in the PLT entry.
Even when lazy binding is disabled by "-z now", the PLT0 entry may
still be used with LD_AUDIT or LD_PROFILE if PLT entry is used for
canonical function address.

1. With lazy binding, when the external function, name1, is called the
first time, dynamic linker is called via PLT0 to update GOT[name1_index]
with the actual address of name1 and transfers control to name1
afterwards.
2. PLT is also used to call a local IFUNC function, name1, run-time
loader updates GOT[name1_index] when loading the module.

This patch

1. Remove PLT layout configurations from i386 backend_data.
2. Add generic, lay and non-lazy PLT layout configurations to i386
link_hash_table.  Generic PLT layout includes the PLT entry templates,
information how to update the first instruction in PLT and PLT eh_frame
informaton, which are initialized in i386 setup_gnu_properties, based
on PIC and target selection.  PLT section alignment is also set to PLT
entry size for non-NaCl/VxWorks target.
3. Remove elf_i386_create_dynamic_sections.  create_dynamic_sections
isn't always called, but GOT relocations need GOT relocations.  Instead,
create all i386 specific dynamic sections in i386 setup_gnu_properties,
which initializes elf.dynobj, so that i386 check_relocs can be simplified.
4. Rewrite elf_i386_get_synthetic_symtab to check PLT sections against
all dynamic relocations to support both lazy and non-lazy PLTs.

bfd/

* elf32-i386.c (PLT_ENTRY_SIZE): Renamed to ...
(LAZY_PLT_ENTRY_SIZE): This.
(NON_LAZY_PLT_ENTRY_SIZE): New.
(elf_i386_plt0_entry): Renamed to ...
(elf_i386_lazy_plt0_entry): This.
(elf_i386_plt_entry): Renamed to ...
(elf_i386_lazy_plt_entry): This.
(elf_i386_pic_plt0_entry): Renamed to ...
(elf_i386_pic_lazy_plt0_entry): This.
(elf_i386_pic_plt_entry): Renamed to ...
(elf_i386_pic_lazy_plt_entry): This.
(elf_i386_got_plt_entry): Renamed to ...
(elf_i386_non_lazy_plt_entry): This.
(elf_i386_pic_got_plt_entry): Renamed to ...
(elf_i386_pic_non_lazy_plt_entry): This.
(elf_i386_eh_frame_plt): Renamed to ...
(elf_i386_eh_frame_lazy_plt): This.
(elf_i386_eh_frame_plt_got): Renamed to ...
(elf_i386_eh_frame_non_lazy_plt): This.
(elf_i386_plt_layout): Renamed to ...
(elf_i386_lazy_plt_layout): This.  Remove eh_frame_plt_got and
eh_frame_plt_got_size.
(elf_i386_non_lazy_plt_layout): New.
(elf_i386_plt_layout): Likewise.
(elf_i386_non_lazy_plt): Likewise.
(GET_PLT_ENTRY_SIZE): Removed.
(elf_i386_plt): Renamed to ...
(elf_i386_lazy_plt): This.
(elf_i386_backend_data): Remove plt.  Rename is_vxworks to os.
(elf_i386_arch_bed): Updated.
(elf_i386_link_hash_table): Add plt, lazy_plt and non_lazy_plt.
(elf_i386_create_dynamic_sections): Removed.
(elf_i386_check_relocs): Don't check elf.dynobj.  Don't call
_bfd_elf_create_ifunc_sections nor _bfd_elf_create_got_section.
(elf_i386_adjust_dynamic_symbol): Updated.
(elf_i386_allocate_dynrelocs): Updated.  Pass 0 as PLT header
size to _bfd_elf_allocate_ifunc_dyn_relocs and don't allocate
size for PLT0 if there is no PLT0.
(elf_i386_size_dynamic_sections): Updated.  Check whether GOT
output section is discarded only if GOT isn't empty.
(elf_i386_relocate_section): Updated.  Properly get PLT index
if there is no PLT0.
(elf_i386_finish_dynamic_symbol): Updated.  Don't fill the
second and third slots in the PLT entry if there is no PLT0.
(elf_i386_finish_dynamic_sections): Updated.  Don't fill PLT0
if there is no PLT0.  Set sh_entsize on the .plt.got section.
(elf_i386_nacl_plt): Forward declaration.
(elf_i386_get_plt_sym_val): Removed.
(elf_i386_get_synthetic_symtab): Rewrite to check PLT sections
against all dynamic relocations.
(elf_i386_link_setup_gnu_properties): New function.
(elf_backend_create_dynamic_sections): Updated.
(elf_backend_setup_gnu_properties): New.
(elf_i386_nacl_plt): Updated.
(elf_i386_nacl_arch_bed): Likewise.
(elf_i386_vxworks_arch_bed): Likewise.

ld/

* testsuite/ld-i386/i386.exp: Add some -z now tests.
* testsuite/ld-i386/plt-pic2.dd: New file.
* testsuite/ld-i386/plt2.dd: Likewise.
* testsuite/ld-i386/plt2.rd: Likewise.
* testsuite/ld-i386/plt2.s: Likewise.
* testsuite/ld-ifunc/ifunc-16-i386-now.d: Likewise.
* testsuite/ld-ifunc/ifunc-2-i386-now.d: Likewise.
* testsuite/ld-ifunc/ifunc-2-local-i386-now.d: Likewise.
* testsuite/ld-ifunc/pr17154-i386-now.d: Likewise.
* testsuite/ld-i386/pr20830.d: Update the .plt.got section
with func@plt.

Make import libraries relocatable objects

For ELF targets --out-implib currently generates an executable file
(e_type is ET_EXEC) despite the file being expected to be linked against
some other object file to make an executable later. It seems therefore
more sensible to make the import library a relocatable object file
(e_type set to ET_REL).

Incidentally, as dicted by requirement 8 of
"ARM v8-M Security Extensions: Requirements on Development Tools"
(document ARM-ECM-0359818) version 1.0, import libraries generated when
using --cmse-implib *must* be relocatable object file so this commit
also adds an assert there in case the type of ELF import library is
changed again in the future.

2017-05-08  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
* elflink.c (elf_output_implib): Remove executable flag from import
library bfd.
* elf32-arm.c (elf32_arm_filter_implib_symbols): Assert that the import
library is a relocatable object file.

ld/
* testsuite/ld-arm/arm-elf.exp
(Secure gateway import library generation): Check e_type field
of import library and executable produced.
* testsuite/ld-arm/cmse-implib.type: Expectations for e_type field.

Remove some uses of MAX_REGISTER_SIZE from mips-tdep.c

gdb/
* mips-tdep.c (mips_o32_return_value): Remove unused buffer.
(print_gp_register_row): Use get_frame_register_value.

Remove some uses of MAX_REGISTER_SIZE from mips-linux-tdep.c

gdb/
* mips-linux-tdep.c (mips_supply_gregset): Use raw_supply_zeroed.
(mips_supply_fpregset): Likewise.
(mips64_supply_gregset): Likewise.

Remove some uses of MAX_REGISTER_SIZE uses from mn10300-linux-tdep.c

gdb/
* mn10300-linux-tdep.c (am33_supply_gregset_method): Use
regcache->raw_supply_zeroed.

Automatic date update in version.in

Automatic date update in version.in

Rearrange gdb/configure.nat to make it simpler and less redundant

The previous commit introduced gdb/configure.nat, but it was just a
copy-and-past (with the necessary adjustments) from the files under
gdb/config/.  We can do better than that.

Instead of using one big 'case' statement that matches the
${gdb_host_cpu} and then match each ${gdb_host}, it is possible to
remove a lof of redundancy by matching the most common ${gdb_host}'s
first, setting the common variables for each, and then proceed to
matching specific ${gdb_host}'s and ${gdb_host_cpu}'s.  In other
words, reverse the order of the 'case's and take advantage of the fact
that a lot of parameters are the same for each host.

This commit was tested on x86_64 without regressions.

gdb/ChangeLog:
2017-05-06  Sergio Durigan Junior  <sergiodj@redhat.com>

  * configure.nat: Rearrange 'case' statements to match
host before cpu.

Introduce "gdb/configure.nat" (and delete "gdb/config/*/*.mh" files)

Due to my ongoing work to make it possible for gdbserver to start the
inferior using the shell, I had to share the fork_inferior function
under the "nat/" directory.  In order to do that, I created a new file
and put the function there; however, this meant that I now had to
update some of the *.mh files (under "gdb/config") and add the new
file as a dependency to be built natively.  Bleh...

After talking a bit to Pedro about this, the idea came up to write a
new "gdb/configure.nat" file, a la "gdb/configure.tgt", which would
concentrate all of the native settings for each host/system.  I
decided to tackle this issue.

The patch is simple.  All of the previous Makefile variables that were
being declared inside the *.mh files are now inside "gdb/Makefile.in",
and "gdb/configure" is responsible for AC_SUBST'ing them.  The
definitions of these variables were put inside "gdb/configure.nat", so
now they're shell variables.  For excerpts of Makefile code, one must
create a file under "gdb/config/${gdb_cpu_host}" and reference it on
the "nat_extra_makefile_frag" variable.

It should now be easier to update the native dependencies of hosts in
this single file.

This has been tested on x86_64 without regressions.

gdb/ChangeLog:
2017-05-06  Sergio Durigan Junior  <sergiodj@redhat.com>

* Makefile.in: Remove "@host_makefile_frag@".  Add variables
NAT_FILE, NATDEPFILES, NAT_CDEPS, LOADLIBES, MH_CFLAGS, XM_CLIBS,
NAT_GENERATED_FILES, HAVE_NATIVE_GCORE_HOST.  Add
"@nat_extra_makefile_frag@".
(Makefile): Remove dependency on "@frags@".
($(GNULIB_BUILDDIR)/Makefile): Likewise.
(data-directory/Makefile): Likewise.
* config/aarch64/linux.mh: Deleted; moved contents to
"gdb/configure.nat".
* config/alpha/alpha-linux.mh: Likewise.
* config/alpha/nbsd.mh: Likewise.
* config/arm/linux.mh: Likewise.
* config/arm/nbsdelf.mh: Likewise.
* config/i386/cygwin.mh: Likewise.
* config/i386/cygwin64.mh: Likewise.
* config/i386/darwin.mh: Likewise.
* config/i386/fbsd.mh: Likewise.
* config/i386/fbsd64.mh: Likewise.
* config/i386/go32.mh: Likewise.
* config/i386/i386gnu.mh: Likewise.
* config/i386/i386sol2.mh: Likewise.
* config/i386/linux.mh: Likewise.
* config/i386/linux64.mh: Likewise.
* config/i386/mingw.mh: Likewise.
* config/i386/mingw64.mh: Likewise.
* config/i386/nbsd64.mh: Likewise.
* config/i386/nbsdelf.mh: Likewise.
* config/i386/nto.mh: Likewise.
* config/i386/obsd.mh: Likewise.
* config/i386/obsd64.mh: Likewise.
* config/i386/sol2-64.mh: Likewise.
* config/ia64/linux.mh: Likewise.
* config/m32r/linux.mh: Likewise.
* config/m68k/linux.mh: Likewise.
* config/m68k/nbsdelf.mh: Likewise.
* config/m68k/obsd.mh: Likewise.
* config/m88k/obsd.mh: Likewise.
* config/mips/fbsd.mh: Likewise.
* config/mips/linux.mh: Likewise.
* config/mips/nbsd.mh: Likewise.
* config/mips/obsd64.mh: Likewise.
* config/pa/linux.mh: Likewise.
* config/pa/nbsd.mh: Likewise.
* config/pa/obsd.mh: Likewise.
* config/powerpc/aix.mh: Likewise.
* config/powerpc/fbsd.mh: Likewise.
* config/powerpc/linux.mh: Likewise.
* config/powerpc/nbsd.mh: Likewise.
* config/powerpc/obsd.mh: Likewise.
* config/powerpc/ppc64-linux.mh: Likewise.
* config/powerpc/spu-linux.mh: Likewise.
* config/s390/linux.mh: Likewise.
* config/sh/nbsd.mh: Likewise.
* config/sparc/fbsd.mh: Likewise.
* config/sparc/linux.mh: Likewise.
* config/sparc/linux64.mh: Likewise.
* config/sparc/nbsd64.mh: Likewise.
* config/sparc/nbsdelf.mh: Likewise.
* config/sparc/obsd64.mh: Likewise.
* config/sparc/sol2.mh: Likewise.
* config/tilegx/linux.mh: Likewise.
* config/vax/nbsdelf.mh: Likewise.
* config/vax/obsd.mh: Likewise.
* config/xtensa/linux.mh: Likewise.
* config/i386/i386gnu.mn: New file, with excerpts from
"config/i386/i386gnu.mh".
* configure: Regenerate.
* configure.ac: Rewrite code to use "gdb/configure.nat" instead of
*.mh files under "gdb/config".
* configure.nat: New file, with contents from the
"gdb/config/*/*.mh" files.

gdb/doc/ChangeLog:
2017-05-06  Sergio Durigan Junior  <sergiodj@redhat.com>

* Makefile: Remove "@host_makefile_frag@".

Automatic date update in version.in

btrace: Fix memory leak in btrace_clear.

gdb: Disable -Werror for -Wmaybe-uninitialized

Newer GCCs are triggering false-positive -Wmaybe-uninitialized
warnings around code that uses gdb::optional:
  https://sourceware.org/ml/gdb-patches/2017-05/msg00118.html

Using std::optional wouldn't help, it triggers the same warnings:
  https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80635

Initializing the variables to quiet the warning would defeat the
purpose of gdb::optional.  Making the optional ctor memset its storage
would be a pessimization.  Wrapping gdb::optional's internals with
"#pragma GCC diagnostic push/ignored/pop" doesn't work, we'd have to
wrap uses of gdb::optional instead, which I think would get unwieldy
and ugly as we start using gdb::optional more and more.

The -Wmaybe-uninitialized warning is documented as producing false
positives (unlike -Wuninialized), so until we find a better
workaround, disable -Werror for this warning.  You'll still see the
warning when building gdb, but it won't cause a build failure.

Tested by building with gcc 4.8.5, 5.3.1, and gcc trunk (20170428).

gdb/ChangeLog:
2017-05-05  Pedro Alves  <palves@redhat.com>

* warning.m4 (build_warnings): Add -Wno-error=maybe-uninitialized.
* configure: Regenerate.

gdb/gdbserver/ChangeLog:
2017-05-05  Pedro Alves  <palves@redhat.com>

* configure: Regenerate.

Automatic date update in version.in

Fix gdb.python/py-record-btrace-threads.exp with Python 3

Fix several instances of:

 ...
 python print not f1calls
   File "<string>", line 1
     print not f1calls
     ^
 SyntaxError: Missing parentheses in call to 'print'
 Error while executing Python code.
 (gdb) FAIL: gdb.python/py-record-btrace-threads.exp: thread=1: checking thread 1: python print not f1calls
 ...

gdb/testsuite/ChangeLog:
2017-05-04  Pedro Alves  <palves@redhat.com>

* gdb.python/py-record-btrace-threads.exp (check_insn_for_thread):
Add parens to print call for Python 3.

RAII-fy make_cleanup_restore_current_thread & friends

After all the make_cleanup_restore_current_thread fixing, I thought
I'd convert that and its relatives (which are all cleanups) to RAII
classes.

scoped_restore_current_pspace_and_thread was put in a separate file to
avoid a circular dependency.

Tested on x86-64 Fedora 23, native and gdbserver.

gdb/ChangeLog:
2017-05-04  Pedro Alves  <palves@redhat.com>

* Makefile.in (SFILES): Add progspace-and-thread.c.
(HFILES_NO_SRCDIR): Add progspace-and-thread.h.
(COMMON_OBS): Add progspace-and-thread.o.
* breakpoint.c: Include "progspace-and-thread.h".
(update_inserted_breakpoint_locations)
(insert_breakpoint_locations, create_longjmp_master_breakpoint):
Use scoped_restore_current_pspace_and_thread.
(create_std_terminate_master_breakpoint): Use
scoped_restore_current_program_space.
(remove_breakpoint): Use scoped_restore_current_pspace_and_thread.
(print_breakpoint_location): Use
scoped_restore_current_program_space.
(bp_loc_is_permanent): Use
scoped_restore_current_pspace_and_thread.
(resolve_sal_pc): Use scoped_restore_current_pspace_and_thread.
(download_tracepoint_locations): Use
scoped_restore_current_pspace_and_thread.
(breakpoint_re_set): Use scoped_restore_current_pspace_and_thread.
* exec.c (exec_close_1): Use scoped_restore_current_program_space.
(enum step_over_calls_kind): Moved from inferior.h.
(class scoped_restore_current_thread): New class.
* gdbthread.h (make_cleanup_restore_current_thread): Delete
declaration.
(scoped_restore_current_thread): New class.
* infcmd.c: Include "common/gdb_optional.h".
(continue_1, proceed_after_attach): Use
scoped_restore_current_thread.
(notice_new_inferior): Use scoped_restore_current_thread.
* inferior.c: Include "progspace-and-thread.h".
(restore_inferior, save_current_inferior): Delete.
(add_inferior_command, clone_inferior_command): Use
scoped_restore_current_pspace_and_thread.
* inferior.h (scoped_restore_current_inferior): New class.
* infrun.c: Include "progspace-and-thread.h" and
"common/gdb_optional.h".
(follow_fork_inferior): Use
scoped_restore_current_pspace_and_thread.
(scoped_restore_exited_inferior): New class.
(handle_vfork_child_exec_or_exit): Use
scoped_restore_exited_inferior,
scoped_restore_current_pspace_and_thread,
scoped_restore_current_thread and scoped_restore.
(fetch_inferior_event): Use scoped_restore_current_thread.
* linespec.c (decode_line_full, decode_line_1): Use
scoped_restore_current_program_space.
* mi/mi-main.c: Include "progspace-and-thread.h".
(exec_continue): Use scoped_restore_current_thread.
(mi_cmd_exec_run): Use scoped_restore_current_pspace_and_thread.
(mi_cmd_trace_frame_collected): Use scoped_restore_current_thread.
* proc-service.c (ps_pglobal_lookup): Use
scoped_restore_current_program_space.
* progspace-and-thread.c: New file.
* progspace-and-thread.h: New file.
* progspace.c (release_program_space, clone_program_space): Use
scoped_restore_current_program_space.
(restore_program_space, save_current_program_space)
(save_current_space_and_thread): Delete.
(switch_to_program_space_and_thread): Moved to
progspace-and-thread.c.
* progspace.h (save_current_program_space)
(save_current_space_and_thread): Delete declarations.
(scoped_restore_current_program_space): New class.
* remote.c (remote_btrace_maybe_reopen): Use
scoped_restore_current_thread.
* symtab.c: Include "progspace-and-thread.h".
(skip_prologue_sal): Use scoped_restore_current_pspace_and_thread.
* thread.c (print_thread_info_1): Use
scoped_restore_current_thread.
(struct current_thread_cleanup): Delete.
(do_restore_current_thread_cleanup)
(restore_current_thread_cleanup_dtor): Rename/convert both to ...
(scoped_restore_current_thread::~scoped_restore_current_thread):
... this new dtor.
(make_cleanup_restore_current_thread): Rename/convert to ...
(scoped_restore_current_thread::scoped_restore_current_thread):
... this new ctor.
(thread_apply_all_command): Use scoped_restore_current_thread.
(thread_apply_command): Use scoped_restore_current_thread.
* tracepoint.c (tdump_command): Use scoped_restore_current_thread.
* varobj.c (value_of_root_1): Use scoped_restore_current_thread.

make_cleanup_restore_current_thread: Look up thread earlier

The unconditional is_stopped call already asserts that the thread exists.

gdb/ChangeLog:
2017-05-04  Pedro Alves  <palves@redhat.com>

* thread.c (make_cleanup_restore_current_thread): Move
find_thread_ptid call before the is_stopped call.  Assert that the
thread is found.  Replace is_stopped call by checking the thread's
state directly.  Remove unnecessary NULL-thread check.

Fix get_core_register_section leak, introduce thread_section_name

This plugs a leak introduced in the previous change to
get_core_register_section, which removed an xfree call that is
actually necessary because the 'section_name' local is static.

From [1] it looks like the reason the variable was made static to
begin with, was just "laziness" to avoid having to think about freeing
it on every function return path:

 https://sourceware.org/ml/gdb-patches/2005-03/msg00237.html

The easiest to fix that nowadays is to use a std::string.

I don't see a need to xstrdup the section name in the single-threaded
case though, and also there's more than one place that computes a
multi-threaded section name in the same way.  So put the section name
computation in a wrapper class with state.

gdb/ChangeLog:
2017-05-04  Pedro Alves  <palves@redhat.com>

* corelow.c (thread_section_name): New class.
(get_core_register_section, get_core_siginfo): Use it.

RISC-V: Fix disassemble for c.li, c.andi and c.addiw

ChangeLog

2017-05-03  Kito Cheng  <kito.cheng@gmail.com>

        * riscv-dis.c (print_insn_args): Handle 'Co' operands.

Remove some superfluous code in corelow.c

In corelow.c I stumbled upon an extra semicolon and an xfree of a NULL
pointer.  Remove them.

gdb/ChangeLog:

* corelow.c (sniff_core_bfd): Remove extra semicolon.
(get_core_register_section): Remove xfree of NULL pointer.

Fix PR21404 - assertion fail when calculating symbol size

Fix a host of problems related to adjustment of
symbol values and sizes when relaxing for avr.

1. Adjust symbol size first before adjusting symbol
value. Otherwise, a symbol whose value just got adjusted to the
relaxed address also ends up getting resized. See pr21404-1.s.

2. Reduce symbol sizes only if their span is below an
alignment boundary. Otherwise, the size gets decremented once when the
actual instruction is relaxed and padding bytes are added, and again
when the padding bytes are deleted (if padding ends up being unnecessary).
pr21404-2.s addresses that, and this bug is really the root cause of PR21404.

3. Adjust all symbol values before an alignment boundary.
Previous code did not adjust symbol values if they fell in the
would-be padded area, resulting in incorrect symbol values in some
cases (see pr21404-3.s).

4. Increase symbol sizes if alignment directives require so.
As pr21404-4.s shows
.global nonzero_sym
L1:
    jmp  L1
nonzero_sym:
    nop
    nop
    .p2align 2
.size nonzero_sym, .-nonzero_sym

The two nops satisfy the 4 byte alignment at assembly time and
therefore the size of nonzero_sym is 4. Relaxation shortens
the 4 byte jmp to a 2 byte rjmp, and to satisfy 4 byte alignment
the code places 2 extra padding bytes after the nops, increasing
nonzero_sym's size by 2. This wasn't handled before.

If the assembly code does not have any align directives, then the
boundary is the section size, and symbol values and sizes == boundary
should also get adjusted. To handle that case, add a did_pad variable
and use that to determine whether it should use < boundary or <= boundary.

Also get rid of reloc_toaddr, which is now redundant.  toaddr is now not
adjusted to handle the above case - the newly added
did_pad variable does the job.

pr21404-{5,6,7,8} are the same testcases written for local symbols, as
the code handles them slightly differently.

Automatic date update in version.in

MIPS16/GAS: Relax 32-bit non-PIC PC-relative synthetic instructions

Implement the relaxation of MIPS16 PC-relative synthetic LA, DLA, LW and
LD instructions to an equivalent sequence of instructions produced where
the address operand requested is out of range, absolute or requires
linker relocation, for ABIs that use 32-bit addressing and non-PIC code.

The sequence generated uses the register specified for the destination
operand as a temporary and begins with LI to load the high 16-bit part
of the address, then continues with SLL by 16 bits to move that part
into place and finally completes with a suitable operation corresponding
to the synthetic instruction used, one of: 2-argument ADDIU, 2-argument
DADDIU, absolute LW, and absolute LD respectively, providing the low
16-bit part of the address.  All instructions use the extended encoding.
As a special exception accept absolute addresses for relaxation even in
PIC code.

For example:

la $2, 0x12345678

produces code as:

li $2, 0x1234
sll $2, $2, 16
addiu $2, 0x5678

would.

Where linker relocation is required emit an R_MIPS16_HI16 relocation on
the initial LI instruction and an R_MIPS16_LO16 relocation on the final
operation.

For example (where `foo' is not local):

lw $3, foo

produces code as:

li $3, %hi(foo)
sll $3, $3, 16
lw $3, %lo(foo)($3)

would.

Emit assembly warnings as appropriate where this new relaxation triggers
in the `nomacro' mode or for an instruction manually placed in a branch
delay slot in the `noreorder' mode.  Refrain from relaxation where an
explicit instruction size suffix has been used and in the `noautoextend'
mode.

gas/
* config/tc-mips.c (RELAX_MIPS16_ENCODE): Add `pic', `sym32' and
`nomacro' flags.
(RELAX_MIPS16_PIC, RELAX_MIPS16_SYM32, RELAX_MIPS16_NOMACRO):
New macros.
(RELAX_MIPS16_USER_SMALL, RELAX_MIPS16_USER_EXT)
(RELAX_MIPS16_DSLOT, RELAX_MIPS16_JAL_DSLOT)
(RELAX_MIPS16_EXTENDED, RELAX_MIPS16_MARK_EXTENDED)
(RELAX_MIPS16_CLEAR_EXTENDED, RELAX_MIPS16_ALWAYS_EXTENDED)
(RELAX_MIPS16_MARK_ALWAYS_EXTENDED)
(RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED): Shift bits.
(RELAX_MIPS16_MACRO, RELAX_MIPS16_MARK_MACRO)
(RELAX_MIPS16_CLEAR_MACRO): New macros.
(append_insn): Pass `mips_pic', HAVE_32BIT_SYMBOLS and
`mips_opts.warn_about_macros' settings to RELAX_MIPS16_ENCODE.
(mips16_macro_frag): New function.
(md_estimate_size_before_relax): Handle HI16/LO16 relaxation.
(mips_relax_frag): Likewise.
(md_convert_frag): Likewise.

* testsuite/gas/mips/mips16@relax-swap3.d: Remove error output,
add dump patterns.
* testsuite/gas/mips/mips16e@relax-swap3.d: New test
subarchitecture.
* testsuite/gas/mips/micromips@relax-swap3.d: Remove trailing
NOP padding.
* testsuite/gas/mips/mips16-pcrel-reloc-2.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16-pcrel-reloc-3.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16-pcrel-reloc-6.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16-pcrel-reloc-7.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16-pcrel-addend-2.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16-pcrel-addend-3.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16-pcrel-absolute.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16-pcrel-absolute-1.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16@relax-swap3.l: Remove file.
* testsuite/gas/mips/mips16-pcrel-reloc-2.l: Remove file.
* testsuite/gas/mips/mips16-pcrel-reloc-3.l: Remove file.
* testsuite/gas/mips/mips16-pcrel-reloc-6.l: Remove file.
* testsuite/gas/mips/mips16-pcrel-reloc-7.l: Remove file.
* testsuite/gas/mips/mips16-pcrel-addend-2.l: Remove file.
* testsuite/gas/mips/mips16-pcrel-addend-3.l: Remove file.
* testsuite/gas/mips/mips16-pcrel-absolute.l: Remove file.
* testsuite/gas/mips/mips16-pcrel-absolute-1.l: Remove file.
* testsuite/gas/mips/relax-swap3.s: Adjust trailing padding.

* testsuite/gas/mips/mips16-pcrel-0.d: New test.
* testsuite/gas/mips/mips16-pcrel-1.d: New test.
* testsuite/gas/mips/mips16-pcrel-2.d: New test.
* testsuite/gas/mips/mips16-pcrel-3.d: New test.
* testsuite/gas/mips/mips16-pcrel-4.d: New test.
* testsuite/gas/mips/mips16-pcrel-5.d: New test.
* testsuite/gas/mips/mips16-pcrel-pic-0.d: New test.
* testsuite/gas/mips/mips16-pcrel-pic-1.d: New test.
* testsuite/gas/mips/mips16-pcrel-n32-0.d: New test.
* testsuite/gas/mips/mips16-pcrel-n32-1.d: New test.
* testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d: New test.
* testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d: New test.
* testsuite/gas/mips/mips16-pcrel-n64-0.d: New test.
* testsuite/gas/mips/mips16-pcrel-n64-1.d: New test.
* testsuite/gas/mips/mips16-pcrel-delay-0.d: New test.
* testsuite/gas/mips/mips16-pcrel-delay-1.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-4.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-5.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-6.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-7.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-8.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-9.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-pic-8.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-pic-9.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-n32-8.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-n32-9.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-8.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-9.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-n64-8.d: New test.
* testsuite/gas/mips/mips16-pcrel-addend-n64-9.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-2.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-3.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-4.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-5.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-6.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-7.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-4.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-6.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-n32-4.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-n32-6.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-n64-4.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-n64-6.d: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-4.d: New
test.
* testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-6.d: New
test.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-4.d: New
test.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-6.d: New
test.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-4.d: New
test.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-6.d: New
test.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-4.d:
New test.
* testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-6.d:
New test.
* testsuite/gas/mips/mips16-pcrel-0.l: New stderr output.
* testsuite/gas/mips/mips16-pcrel-1.l: New stderr output.
* testsuite/gas/mips/mips16-pcrel-2.l: New stderr output.
* testsuite/gas/mips/mips16-pcrel-3.l: New stderr output.
* testsuite/gas/mips/mips16-pcrel-4.l: New stderr output.
* testsuite/gas/mips/mips16-pcrel-5.l: New stderr output.
* testsuite/gas/mips/mips16-pcrel-delay-0.l: New stderr output.
* testsuite/gas/mips/mips16-pcrel-delay-1.l: New stderr output.
* testsuite/gas/mips/mips16-pcrel-addend-8.l: New stderr output.
* testsuite/gas/mips/mips16-pcrel-addend-9.l: New stderr output.
* testsuite/gas/mips/mips16-pcrel-absolute-4.l: New stderr
output.
* testsuite/gas/mips/mips16-pcrel-absolute-6.l: New stderr
output.
* testsuite/gas/mips/mips16-pcrel-0.s: New test source.
* testsuite/gas/mips/mips16-pcrel-1.s: New test source.
* testsuite/gas/mips/mips16-pcrel-2.s: New test source.
* testsuite/gas/mips/mips16-pcrel-3.s: New test source.
* testsuite/gas/mips/mips16-pcrel-4.s: New test source.
* testsuite/gas/mips/mips16-pcrel-5.s: New test source.
* testsuite/gas/mips/mips16-pcrel-delay-0.s: New test source.
* testsuite/gas/mips/mips16-pcrel-delay-1.s: New test source.
* testsuite/gas/mips/mips16-pcrel-addend-4.s: New test source.
* testsuite/gas/mips/mips16-pcrel-addend-5.s: New test source.
* testsuite/gas/mips/mips16-pcrel-addend-6.s: New test source.
* testsuite/gas/mips/mips16-pcrel-addend-7.s: New test source.
* testsuite/gas/mips/mips16-pcrel-addend-8.s: New test source.
* testsuite/gas/mips/mips16-pcrel-addend-9.s: New test source.
* testsuite/gas/mips/mips16-pcrel-absolute-2.s: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-3.s: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-4.s: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-5.s: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-6.s: New test.
* testsuite/gas/mips/mips16-pcrel-absolute-7.s: New test.
* testsuite/gas/mips/mips.exp: Run the new tests.

ld/
* testsuite/ld-mips-elf/mips16-pcrel-0.d: New test.
* testsuite/ld-mips-elf/mips16-pcrel-1.d: New test.
* testsuite/ld-mips-elf/mips16-pcrel-addend-2.d: New test.
* testsuite/ld-mips-elf/mips16-pcrel-addend-6.d: New test.
* testsuite/ld-mips-elf/mips16-pcrel-n32-0.d: New test.
* testsuite/ld-mips-elf/mips16-pcrel-n32-1.d: New test.
* testsuite/ld-mips-elf/mips16-pcrel-n64-sym32-0.d: New test.
* testsuite/ld-mips-elf/mips16-pcrel-n64-sym32-1.d: New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.

Make sure malloc is linked into gdb.cp/oranking.cc.

On some platforms, e.g., arm-eabi-none, we need to make certain that
malloc is linked into the program because the test suite uses function
calls requiring malloc:

(gdb) p foo101("abc")
evaluation of this expression requires the program to have a function "malloc".

gdb/testsuite/ChangeLog

* gdb.cp/oranking.cc (dummy): New function to grab malloc.
(main): Call it.

Adjust testsuite/ld-elf/pr21384.d

Adjust testsuite/ld-elf/pr21384.d to accommodate additional dynamic
symbols on some targets.

* testsuite/ld-elf/pr21384.d: Adjusted to accommodate
additional dynamic symbols on some targets.

Remove MAX_REGISTER_SIZE from frv-linux-tdep.c

gdb/
* frv-linux-tdep.c (frv_linux_supply_gregset): Use raw_supply_zeroed.
* regcache.c (regcache::raw_supply_zeroed): New function.
* regcache.h (regcache::raw_supply_zeroed): New declaration.

gdbarch.sh: Remove commented out TARGET_CHAR_BIT definition

As Pedro commented on the patch "Change field separator in gdbarch.sh",
this commented out definition is probably not useful and should be
removed.  It has been commented out for basically forever, and it
probably serves the same intent as addressable_memory_unit_size.

gdb/ChangeLog:

* gdbarch.sh: Remove commented out definition of
TARGET_CHAR_BIT.
* gdbarch.h: Re-generate.

Regenerate gdb/{,gdbserver/}configure (for commit be628ab814f1c90e185d7482d27aa8a991ab5837)

On commit be628ab814f1c90e185d7482d27aa8a991ab5837, both
common/common.m4 was modified in order to check for the presence of
'termios.h', 'termio.h' and 'sgtty.h'.  However, I forgot to
regenerate both gdb/configure and gdb/gdbserver/configure.  This
commit does that.

gdb/ChangeLog:
2017-05-03  Sergio Durigan Junior  <sergiodj@redhat.com>

* configure: Regenerate.

gdb/gdbserver/ChangeLog:
2017-05-03  Sergio Durigan Junior  <sergiodj@redhat.com>

* configure: Regenerate.

Prevent a seg-fault in the assembler when provided with a bogus input source file.

PR gas/20941
* symbols.c (snapshot_symbol): Handle the case where
resolve_expression returns a local symbol.

Automatic date update in version.in

MIPS16/GAS: Fix absolute references with PC-relative synthetic instructions

Complement commit 88a7ef168927 ("MIPS16/GAS: Restore unsupported
relocation diagnostics") and also propagate constant expressions, either
already reduced from absolute symbol references or created from literals
in the first place, used as a PC-relative operand with the MIPS16 LA,
LW, DLA and LD synthetic instructions to relaxation, matching the way
forward absolute symbol references have been handled as from the commit
referred and letting relaxation produce any necessary relocations, if
possible, for the absolute value requested to be reproduced at the run
time.

Call `symbol_append' for any expression symbol created for the purpose
of MIPS16 relaxation as with constant expressions now propagated from
earlier on such symbols may make it through and have R_MIPS16_PC16_S1
relocations emitted against, and therefore need to appear in the symbol
table produced.

gas/
* config/tc-mips.c (append_insn): Call `symbol_append' for any
expression symbol created for MIPS16 relaxation.
(match_mips16_insn): Don't encode a constant value as an
immediate with a PC-relative operand.

* testsuite/gas/mips/mips16-pcrel-absolute-1.d: New test.
* testsuite/gas/mips/mips16-branch-absolute-1.d: New test.
* testsuite/gas/mips/mips16-branch-absolute-2.d: New test.
* testsuite/gas/mips/mips16-branch-absolute-addend-1.d: New
test.
* testsuite/gas/mips/mips16-branch-absolute-n32-1.d: New test.
* testsuite/gas/mips/mips16-branch-absolute-n32-2.d: New test.
* testsuite/gas/mips/mips16-branch-absolute-addend-n32-1.d: New
test.
* testsuite/gas/mips/mips16-branch-absolute-n64-1.d: New test.
* testsuite/gas/mips/mips16-branch-absolute-n64-2.d: New test.
* testsuite/gas/mips/mips16-branch-absolute-addend-n64-1.d: New
test.
* testsuite/gas/mips/mips16-pcrel-absolute-1.l: New stderr
output.
* testsuite/gas/mips/mips16-pcrel-absolute-1.s: New test source.
* testsuite/gas/mips/mips16-branch-absolute-1.s: New test
source.
* testsuite/gas/mips/mips16-branch-absolute-2.s: New test
source.
* testsuite/gas/mips/mips16-branch-absolute-addend-1.s: New test
source.
* testsuite/gas/mips/mips.exp: Run the new tests.

ld/
* testsuite/ld-mips-elf/mips16-branch-absolute-1.d: New test.
* testsuite/ld-mips-elf/mips16-branch-absolute-2.d: New test.
* testsuite/ld-mips-elf/mips16-branch-absolute-addend-1.d: New
test.
* testsuite/ld-mips-elf/mips16-branch-absolute-n32-1.d: New
test.
* testsuite/ld-mips-elf/mips16-branch-absolute-n32-2.d: New
test.
* testsuite/ld-mips-elf/mips16-branch-absolute-addend-n32-1.d:
New test.
* testsuite/ld-mips-elf/mips16-branch-absolute-n64-1.d: New
test.
* testsuite/ld-mips-elf/mips16-branch-absolute-n64-2.d: New
test.
* testsuite/ld-mips-elf/mips16-branch-absolute-addend-n64-1.d:
New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.

x86: Add -Wl,--no-as-needed to some TLS tests

* testsuite/ld-i386/tls.exp: Add -Wl,--no-as-needed to
"TLS without PLT (1)" and "TLS without PLT (3)".
* testsuite/ld-x86-64/tls.exp: Add -Wl,--no-as-needed to
to "TLS without PLT (3)".

RISC-V: Change CALL macro to use ra as the temporary address register

e.g.

    1:  auipc ra, %pcrel_hi(symbol)
        jalr  ra, %pcrel_lo(1b)(ra)

The use of ra instead of t1 for address construction provides an
opportunity for a microarchitecture to elide the write of the
destination address, and instead read the target address as an
immediate spread across the fused auipc+jalr pair. The link
register ra in the jalr overwrites the target address temporary.

2017-05-01  Michael Clark  <michaeljclark@mac.com>

* riscv-opc.c (riscv_opcodes) <call>: Use RA not T1 as a temporary
register.

RISC-V: Allow 32-bit BFD to handle 64-bit objects

We've been telling people that the riscv32-* and riscv64-* toolchains
are exactly the same, but it turns out we were lying: the riscv32-* BFD
doesn't handle 64-bit objects.  This fixes that difference, so the ports
are actually the same.

bfd/ChangeLog

2017-05-01  Palmer Dabbelt  <palmer@dabbelt.com>

        * config.bfd (riscv32-*): Enable rv64.

Add a test for PR ld/21384

PR ld/21384
* testsuite/ld-elf/pr21384.d: New file.
* testsuite/ld-elf/pr21384.dl: Likewise.
* testsuite/ld-elf/pr21384.ld: Likewise.
* testsuite/ld-elf/pr21384.s: Likewise.

Cast relcount to unsigned long when comparing with sec->reloc_count

The type of relcount is long and the type of sec->reloc_count is
unsigned int.  On 32-bit hosts, GCC issues an error:

objcopy.c:2144:20: error: comparison between signed and unsigned integer expressions [-Werror=sign-compare]
       if (relcount > sec->reloc_count)

Cast relcount to unsigned long to silence GCC.

* objcopy.c (merge_gnu_build_notes): Cast relcount to unsigned
long when comparing with sec->reloc_count.

solib-target: Remove local variables

Now that we use std::vector, these local variables are not very useful.
They're not much shorter than the expressions they stand for.

gdb/ChangeLog:

* solib-target.c (solib_target_relocate_section_addresses):
Remove num_section_bases, num_bases, segment_bases variables.

Remove definition of VEC (CORE_ADDR)

gdb/ChangeLog:

* common/gdb_vecs.h (DEF_VEC_I (CORE_ADDR)): Remove.

Use std::vector in lm_info_target

Replace the two VEC fields with std::vector.

gdb/ChangeLog:

* solib-target.c: Include <vector>
(struct lm_info_target) <~lm_info_target>: Remove.
<segment_bases, section_bases>: Change type to
std::vector<CORE_ADDR>.
(library_list_start_segment, library_list_start_section,
library_list_end_library,
solib_target_relocate_section_addresses): Adjust.

Change return type of gdbarch_software_single_step to vector<CORE_ADDR>

This is a relatively straightforward patch that changes
gdbarch_software_single_step so it returns an std::vector<CORE_ADDR>
instead of a VEC (CORE_ADDR).

gdb/ChangeLog:

* gdbarch.sh (software_single_step): Change return type to
std::vector<CORE_ADDR>.
* gdbarch.c, gdbarch.h: Re-generate.
* arch/arm-get-next-pcs.c (thumb_deal_with_atomic_sequence_raw):
Adjust.
(arm_deal_with_atomic_sequence_raw): Adjust.
(thumb_get_next_pcs_raw): Adjust.
(arm_get_next_pcs_raw): Adjust.
(arm_get_next_pcs): Adjust.
* arch/arm-get-next-pcs.h (arm_get_next_pcs): Adjust.
* aarch64-tdep.c (aarch64_software_single_step): Adjust.
* alpha-tdep.c (alpha_deal_with_atomic_sequence): Adjust.
(alpha_software_single_step): Adjust.
* alpha-tdep.h (alpha_software_single_step): Adjust.
* arm-linux-tdep.c (arm_linux_software_single_step): Adjust.
* arm-tdep.c (arm_software_single_step): Adjust.
(arm_breakpoint_kind_from_current_state): Adjust.
* arm-tdep.h (arm_software_single_step): Adjust.
* breakpoint.c (insert_single_step_breakpoint): Adjust.
* cris-tdep.c (cris_software_single_step): Adjust.
* mips-tdep.c (mips_deal_with_atomic_sequence): Adjust.
(micromips_deal_with_atomic_sequence): Adjust.
(deal_with_atomic_sequence): Adjust.
(mips_software_single_step): Adjust.
* mips-tdep.h (mips_software_single_step): Adjust.
* moxie-tdep.c (moxie_software_single_step): Adjust.
* nios2-tdep.c (nios2_software_single_step): Adjust.
* ppc-tdep.h (ppc_deal_with_atomic_sequence): Adjust.
* rs6000-aix-tdep.c (rs6000_software_single_step): Adjust.
* rs6000-tdep.c (ppc_deal_with_atomic_sequence): Adjust.
* s390-linux-tdep.c (s390_software_single_step): Adjust.
* sparc-tdep.c (sparc_software_single_step): Adjust.
* spu-tdep.c (spu_software_single_step): Adjust.
* tic6x-tdep.c (tic6x_software_single_step): Adjust.

gdb/gdbserver/ChangeLog:

* linux-arm-low.c (arm_gdbserver_get_next_pcs): Adjust to
software_single_step change of return type to
std::vector<CORE_ADDR>.
* linux-low.c (install_software_single_step_breakpoints):
Likewise.
* linux-low.h (install_software_single_step_breakpoints):
Likewise.

Change field separator in gdbarch.sh

The fields in the description of the gdbarch interface are separated
using colons.  That becomes a problem if we want to use things like
std::vector in it. This patch changes the field separator to use
semicolons instead.

I think there's very little chance we'll ever want to use a semicolon in
one of the fields, but if you think another character would be more
appropriate, let me know.

gdb/ChangeLog:

* gdbarch.sh: Use semi-colon as field separator instead of colon.
* gdbarch.h: Re-generate.