From 5c27d164d807fdd1f2eee400a81e74f210193118 Mon Sep 17 00:00:00 2001
From: Anthony Green <green@redhat.com>
Date: Thu, 10 Sep 2009 21:57:03 +0000
Subject: [PATCH] Use common memory infrastructure and introduce device tree
 support

---
 sim/moxie/ChangeLog     |  17 ++
 sim/moxie/Makefile.in   |  19 +-
 sim/moxie/configure     | 520 +++++++++++++++++++++++++++++++++++++++-
 sim/moxie/configure.ac  |   8 +
 sim/moxie/interp.c      | 436 ++++++++++++---------------------
 sim/moxie/moxie-gdb.dts |  49 ++++
 sim/moxie/sim-main.h    |  63 +++++
 7 files changed, 823 insertions(+), 289 deletions(-)
 create mode 100644 sim/moxie/moxie-gdb.dts
 create mode 100644 sim/moxie/sim-main.h

diff --git a/sim/moxie/ChangeLog b/sim/moxie/ChangeLog
index 79a7965f76..0aa9c792ef 100644
--- a/sim/moxie/ChangeLog
+++ b/sim/moxie/ChangeLog
@@ -1,3 +1,20 @@
+2009-09-10  Anthony Green  <green@moxielogic.com>
+
+	* Makefile.in (install-dtb): New target.
+	(moxie-gdb.dtb): New target.
+	(SIM_CFLAGS): Define DTB macro on command line.
+	(SIM_OBJS): Use common infrastructire.
+	(dtbdir): Define install location for dtb file.
+
+	* sim-main.h: New file.
+	* moxie-gdb.dts: New file.
+	* configure.ac: Check for dtc.  Install dtb file.  Remove some old
+	cruft.
+	* configure: Regenerate.
+	* interp.c: Many changes to use common memory infrastructure.
+	(load_dtb): New function.
+	(sim_create_inferior): Call it.
+
 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 
 	* config.in: Regenerate.
diff --git a/sim/moxie/Makefile.in b/sim/moxie/Makefile.in
index 9b00b09555..a06ee2245f 100644
--- a/sim/moxie/Makefile.in
+++ b/sim/moxie/Makefile.in
@@ -18,12 +18,29 @@
 
 ## COMMON_PRE_CONFIG_FRAG
 
-SIM_OBJS = interp.o sim-load.o
+dtbdir = @datadir@/gdb-`sed q ${srcdir}/../../gdb/version.in`/dtb
+
+SIM_OBJS = interp.o sim-load.o sim-io.o sim-config.o sim-utils.o	\
+sim-options.o sim-module.o sim-core.o sim-endian.o sim-trace.o 	\
+sim-engine.o sim-fpu.o sim-bits.o sim-profile.o sim-events.o \
+sim-memopt.o
+
 SIM_EXTRA_LIBS = -lm -lz
 SIM_EXTRA_CLEAN = moxie-clean
+SIM_EXTRA_INSTALL = install-dtb
+SIM_CFLAGS = -DDTB="\"$(dtbdir)/moxie-gdb.dtb\""
 
 ## COMMON_POST_CONFIG_FRAG
 
+all: interp.o moxie-gdb.dtb
+
 interp.o: interp.c
 
+moxie-gdb.dtb: moxie-gdb.dts
+	dtc -O dtb -o moxie-gdb.dtb ${srcdir}/moxie-gdb.dts
+
+install-dtb: moxie-gdb.dtb
+	$(SHELL) $(srcdir)/../../mkinstalldirs $(DESTDIR)$(dtbdir)
+	$(INSTALL_DATA) moxie-gdb.dtb $(DESTDIR)$(dtbdir)/moxie-gdb.dtb
+
 moxie-clean:
diff --git a/sim/moxie/configure b/sim/moxie/configure
index 0c37ff3980..d360d1ba34 100644
--- a/sim/moxie/configure
+++ b/sim/moxie/configure
@@ -663,6 +663,7 @@ sim_bitsize
 sim_assert
 sim_alignment
 sim_environment
+DTC
 target_alias
 host_alias
 build_alias
@@ -713,6 +714,11 @@ enable_sim_trace
 enable_sim_profile
 with_pkgversion
 with_bugurl
+enable_sim_endian
+enable_sim_alignment
+enable_sim_hostendian
+enable_sim_environment
+enable_sim_inline
 '
       ac_precious_vars='build_alias
 host_alias
@@ -1348,6 +1354,11 @@ Optional Features:
   --enable-sim-stdio			Specify whether to use stdio for console input/output.
   --enable-sim-trace=opts		Enable tracing flags
   --enable-sim-profile=opts		Enable profiling flags
+  --enable-sim-endian=endian		Specify target byte endian orientation.
+  --enable-sim-alignment=align		Specify strict,  nonstrict or forced alignment of memory accesses.
+  --enable-sim-hostendian=end		Specify host byte endian orientation.
+  --enable-sim-environment=environment	Specify mixed, user, virtual or operating environment.
+  --enable-sim-inline=inlines		Specify which functions should be inlined.
 
 Optional Packages:
   --with-PACKAGE[=ARG]    use PACKAGE [ARG=yes]
@@ -2146,6 +2157,99 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu
 ac_config_headers="$ac_config_headers config.h:config.in"
 
 
+if test -n "$ac_tool_prefix"; then
+  # Extract the first word of "${ac_tool_prefix}dtc", so it can be a program name with args.
+set dummy ${ac_tool_prefix}dtc; ac_word=$2
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+$as_echo_n "checking for $ac_word... " >&6; }
+if test "${ac_cv_prog_DTC+set}" = set; then :
+  $as_echo_n "(cached) " >&6
+else
+  if test -n "$DTC"; then
+  ac_cv_prog_DTC="$DTC" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+    ac_cv_prog_DTC="${ac_tool_prefix}dtc"
+    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+DTC=$ac_cv_prog_DTC
+if test -n "$DTC"; then
+  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $DTC" >&5
+$as_echo "$DTC" >&6; }
+else
+  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+$as_echo "no" >&6; }
+fi
+
+
+fi
+if test -z "$ac_cv_prog_DTC"; then
+  ac_ct_DTC=$DTC
+  # Extract the first word of "dtc", so it can be a program name with args.
+set dummy dtc; ac_word=$2
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+$as_echo_n "checking for $ac_word... " >&6; }
+if test "${ac_cv_prog_ac_ct_DTC+set}" = set; then :
+  $as_echo_n "(cached) " >&6
+else
+  if test -n "$ac_ct_DTC"; then
+  ac_cv_prog_ac_ct_DTC="$ac_ct_DTC" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+    ac_cv_prog_ac_ct_DTC="dtc"
+    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+ac_ct_DTC=$ac_cv_prog_ac_ct_DTC
+if test -n "$ac_ct_DTC"; then
+  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_DTC" >&5
+$as_echo "$ac_ct_DTC" >&6; }
+else
+  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+$as_echo "no" >&6; }
+fi
+
+  if test "x$ac_ct_DTC" = x; then
+    DTC=""
+  else
+    case $cross_compiling:$ac_tool_warned in
+yes:)
+{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
+$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+ac_tool_warned=yes ;;
+esac
+    DTC=$ac_ct_DTC
+  fi
+else
+  DTC="$ac_cv_prog_DTC"
+fi
+
+
 # This file contains common code used by all simulators.
 #
 # SIM_AC_COMMON invokes AC macros used by all simulators and by the common
@@ -2236,13 +2340,6 @@ ac_config_headers="$ac_config_headers config.h:config.in"
 
 
 
-
-
-
-
-
-
-
 
 
 
@@ -2407,7 +2504,6 @@ sim_inline="-DDEFAULT_INLINE=0"
 
 
 
-
 
 
 # Bugs in autoconf 2.59 break the call to SIM_AC_COMMON, hack around
@@ -2905,10 +3001,12 @@ done
 
 cat confdefs.h - <<_ACEOF >conftest.$ac_ext
 /* end confdefs.h.  */
-
+#include <stdio.h>
 int
 main ()
 {
+FILE *f = fopen ("conftest.out", "w");
+ return ferror (f) || fclose (f) != 0;
 
   ;
   return 0;
@@ -4495,6 +4593,409 @@ sim_link_files="${sim_link_files} ${TARG_VALS_DEF}"
 sim_link_links="${sim_link_links} targ-vals.def"
 
 
+
+wire_endian="BIG_ENDIAN"
+default_endian=""
+# Check whether --enable-sim-endian was given.
+if test "${enable_sim_endian+set}" = set; then :
+  enableval=$enable_sim_endian; case "${enableval}" in
+  b*|B*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";;
+  l*|L*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";;
+  yes)	 if test x"$wire_endian" != x; then
+	   sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
+	 else
+           if test x"$default_endian" != x; then
+	     sim_endian="-DWITH_TARGET_BYTE_ORDER=${default_endian}"
+	   else
+	     echo "No hard-wired endian for target $target" 1>&6
+	     sim_endian="-DWITH_TARGET_BYTE_ORDER=0"
+	   fi
+	 fi;;
+  no)	 if test x"$default_endian" != x; then
+	   sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
+	 else
+	   if test x"$wire_endian" != x; then
+	     sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${wire_endian}"
+	   else
+	     echo "No default endian for target $target" 1>&6
+	     sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=0"
+	   fi
+	 fi;;
+  *)	 as_fn_error "\"Unknown value $enableval for --enable-sim-endian\"" "$LINENO" 5; sim_endian="";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_endian" != x""; then
+  echo "Setting endian flags = $sim_endian" 6>&1
+fi
+else
+  if test x"$default_endian" != x; then
+  sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
+else
+  if test x"$wire_endian" != x; then
+    sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
+  else
+    sim_endian=
+  fi
+fi
+fi
+
+wire_alignment="STRICT_ALIGNMENT"
+default_alignment=""
+
+# Check whether --enable-sim-alignment was given.
+if test "${enable_sim_alignment+set}" = set; then :
+  enableval=$enable_sim_alignment; case "${enableval}" in
+  strict | STRICT)       sim_alignment="-DWITH_ALIGNMENT=STRICT_ALIGNMENT";;
+  nonstrict | NONSTRICT) sim_alignment="-DWITH_ALIGNMENT=NONSTRICT_ALIGNMENT";;
+  forced | FORCED)       sim_alignment="-DWITH_ALIGNMENT=FORCED_ALIGNMENT";;
+  yes) if test x"$wire_alignment" != x; then
+	 sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
+       else
+         if test x"$default_alignment" != x; then
+           sim_alignment="-DWITH_ALIGNMENT=${default_alignment}"
+         else
+	   echo "No hard-wired alignment for target $target" 1>&6
+	   sim_alignment="-DWITH_ALIGNMENT=0"
+         fi
+       fi;;
+  no)  if test x"$default_alignment" != x; then
+	 sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
+       else
+         if test x"$wire_alignment" != x; then
+	   sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${wire_alignment}"
+         else
+           echo "No default alignment for target $target" 1>&6
+           sim_alignment="-DWITH_DEFAULT_ALIGNMENT=0"
+         fi
+       fi;;
+  *)   as_fn_error "\"Unknown value $enableval passed to --enable-sim-alignment\"" "$LINENO" 5; sim_alignment="";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_alignment" != x""; then
+  echo "Setting alignment flags = $sim_alignment" 6>&1
+fi
+else
+  if test x"$default_alignment" != x; then
+  sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
+else
+  if test x"$wire_alignment" != x; then
+    sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
+  else
+    sim_alignment=
+  fi
+fi
+fi
+
+
+# Check whether --enable-sim-hostendian was given.
+if test "${enable_sim_hostendian+set}" = set; then :
+  enableval=$enable_sim_hostendian; case "${enableval}" in
+  no)	 sim_hostendian="-DWITH_HOST_BYTE_ORDER=0";;
+  b*|B*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN";;
+  l*|L*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN";;
+  *)	 as_fn_error "\"Unknown value $enableval for --enable-sim-hostendian\"" "$LINENO" 5; sim_hostendian="";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_hostendian" != x""; then
+  echo "Setting hostendian flags = $sim_hostendian" 6>&1
+fi
+else
+
+if test "x$cross_compiling" = "xno"; then
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether byte ordering is bigendian" >&5
+$as_echo_n "checking whether byte ordering is bigendian... " >&6; }
+if test "${ac_cv_c_bigendian+set}" = set; then :
+  $as_echo_n "(cached) " >&6
+else
+  ac_cv_c_bigendian=unknown
+    # See if we're dealing with a universal compiler.
+    cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#ifndef __APPLE_CC__
+	       not a universal capable compiler
+	     #endif
+	     typedef int dummy;
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+
+	# Check for potential -arch flags.  It is not universal unless
+	# there are at least two -arch flags with different values.
+	ac_arch=
+	ac_prev=
+	for ac_word in $CC $CFLAGS $CPPFLAGS $LDFLAGS; do
+	 if test -n "$ac_prev"; then
+	   case $ac_word in
+	     i?86 | x86_64 | ppc | ppc64)
+	       if test -z "$ac_arch" || test "$ac_arch" = "$ac_word"; then
+		 ac_arch=$ac_word
+	       else
+		 ac_cv_c_bigendian=universal
+		 break
+	       fi
+	       ;;
+	   esac
+	   ac_prev=
+	 elif test "x$ac_word" = "x-arch"; then
+	   ac_prev=arch
+	 fi
+       done
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+    if test $ac_cv_c_bigendian = unknown; then
+      # See if sys/param.h defines the BYTE_ORDER macro.
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <sys/types.h>
+	     #include <sys/param.h>
+
+int
+main ()
+{
+#if ! (defined BYTE_ORDER && defined BIG_ENDIAN \
+		     && defined LITTLE_ENDIAN && BYTE_ORDER && BIG_ENDIAN \
+		     && LITTLE_ENDIAN)
+	      bogus endian macros
+	     #endif
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+  # It does; now see whether it defined to BIG_ENDIAN or not.
+	 cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <sys/types.h>
+		#include <sys/param.h>
+
+int
+main ()
+{
+#if BYTE_ORDER != BIG_ENDIAN
+		 not big endian
+		#endif
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+  ac_cv_c_bigendian=yes
+else
+  ac_cv_c_bigendian=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+    fi
+    if test $ac_cv_c_bigendian = unknown; then
+      # See if <limits.h> defines _LITTLE_ENDIAN or _BIG_ENDIAN (e.g., Solaris).
+      cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <limits.h>
+
+int
+main ()
+{
+#if ! (defined _LITTLE_ENDIAN || defined _BIG_ENDIAN)
+	      bogus endian macros
+	     #endif
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+  # It does; now see whether it defined to _BIG_ENDIAN or not.
+	 cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <limits.h>
+
+int
+main ()
+{
+#ifndef _BIG_ENDIAN
+		 not big endian
+		#endif
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+  ac_cv_c_bigendian=yes
+else
+  ac_cv_c_bigendian=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+    fi
+    if test $ac_cv_c_bigendian = unknown; then
+      # Compile a test program.
+      if test "$cross_compiling" = yes; then :
+  # Try to guess by grepping values from an object file.
+	 cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+short int ascii_mm[] =
+		  { 0x4249, 0x4765, 0x6E44, 0x6961, 0x6E53, 0x7953, 0 };
+		short int ascii_ii[] =
+		  { 0x694C, 0x5454, 0x656C, 0x6E45, 0x6944, 0x6E61, 0 };
+		int use_ascii (int i) {
+		  return ascii_mm[i] + ascii_ii[i];
+		}
+		short int ebcdic_ii[] =
+		  { 0x89D3, 0xE3E3, 0x8593, 0x95C5, 0x89C4, 0x9581, 0 };
+		short int ebcdic_mm[] =
+		  { 0xC2C9, 0xC785, 0x95C4, 0x8981, 0x95E2, 0xA8E2, 0 };
+		int use_ebcdic (int i) {
+		  return ebcdic_mm[i] + ebcdic_ii[i];
+		}
+		extern int foo;
+
+int
+main ()
+{
+return use_ascii (foo) == use_ebcdic (foo);
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+  if grep BIGenDianSyS conftest.$ac_objext >/dev/null; then
+	      ac_cv_c_bigendian=yes
+	    fi
+	    if grep LiTTleEnDian conftest.$ac_objext >/dev/null ; then
+	      if test "$ac_cv_c_bigendian" = unknown; then
+		ac_cv_c_bigendian=no
+	      else
+		# finding both strings is unlikely to happen, but who knows?
+		ac_cv_c_bigendian=unknown
+	      fi
+	    fi
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+else
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+$ac_includes_default
+int
+main ()
+{
+
+	     /* Are we little or big endian?  From Harbison&Steele.  */
+	     union
+	     {
+	       long int l;
+	       char c[sizeof (long int)];
+	     } u;
+	     u.l = 1;
+	     return u.c[sizeof (long int) - 1] == 1;
+
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_run "$LINENO"; then :
+  ac_cv_c_bigendian=no
+else
+  ac_cv_c_bigendian=yes
+fi
+rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
+  conftest.$ac_objext conftest.beam conftest.$ac_ext
+fi
+
+    fi
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_c_bigendian" >&5
+$as_echo "$ac_cv_c_bigendian" >&6; }
+ case $ac_cv_c_bigendian in #(
+   yes)
+     $as_echo "#define WORDS_BIGENDIAN 1" >>confdefs.h
+;; #(
+   no)
+      ;; #(
+   universal)
+
+$as_echo "#define AC_APPLE_UNIVERSAL_BUILD 1" >>confdefs.h
+
+     ;; #(
+   *)
+     as_fn_error "unknown endianness
+ presetting ac_cv_c_bigendian=no (or yes) will help" "$LINENO" 5 ;;
+ esac
+
+  if test $ac_cv_c_bigendian = yes; then
+    sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN"
+  else
+    sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN"
+  fi
+else
+  sim_hostendian="-DWITH_HOST_BYTE_ORDER=0"
+fi
+fi
+
+
+# Check whether --enable-sim-environment was given.
+if test "${enable_sim_environment+set}" = set; then :
+  enableval=$enable_sim_environment; case "${enableval}" in
+  all | ALL)             sim_environment="-DWITH_ENVIRONMENT=ALL_ENVIRONMENT";;
+  user | USER)           sim_environment="-DWITH_ENVIRONMENT=USER_ENVIRONMENT";;
+  virtual | VIRTUAL)     sim_environment="-DWITH_ENVIRONMENT=VIRTUAL_ENVIRONMENT";;
+  operating | OPERATING) sim_environment="-DWITH_ENVIRONMENT=OPERATING_ENVIRONMENT";;
+  *)   as_fn_error "\"Unknown value $enableval passed to --enable-sim-environment\"" "$LINENO" 5;
+       sim_environment="";;
+esac
+if test x"$silent" != x"yes" && test x"$sim_environment" != x""; then
+  echo "Setting sim environment = $sim_environment" 6>&1
+fi
+else
+  sim_environment="-DWITH_ENVIRONMENT=ALL_ENVIRONMENT"
+fi
+
+
+default_sim_inline=""
+# Check whether --enable-sim-inline was given.
+if test "${enable_sim_inline+set}" = set; then :
+  enableval=$enable_sim_inline; sim_inline=""
+case "$enableval" in
+  no)		sim_inline="-DDEFAULT_INLINE=0";;
+  0)		sim_inline="-DDEFAULT_INLINE=0";;
+  yes | 2)	sim_inline="-DDEFAULT_INLINE=ALL_C_INLINE";;
+  1)		sim_inline="-DDEFAULT_INLINE=INLINE_LOCALS";;
+  *) for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
+       new_flag=""
+       case "$x" in
+	 *_INLINE=*)	new_flag="-D$x";;
+	 *=*)		new_flag=`echo "$x" | sed -e "s/=/_INLINE=/" -e "s/^/-D/"`;;
+	 *_INLINE)	new_flag="-D$x=ALL_C_INLINE";;
+	 *)		new_flag="-D$x""_INLINE=ALL_C_INLINE";;
+       esac
+       if test x"$sim_inline" = x""; then
+	 sim_inline="$new_flag"
+       else
+	 sim_inline="$sim_inline $new_flag"
+       fi
+     done;;
+esac
+if test x"$silent" != x"yes" && test x"$sim_inline" != x""; then
+  echo "Setting inline flags = $sim_inline" 6>&1
+fi
+else
+
+if test "x$cross_compiling" = "xno"; then
+  if test x"$GCC" != "x" -a x"${default_sim_inline}" != "x" ; then
+    sim_inline="${default_sim_inline}"
+    if test x"$silent" != x"yes"; then
+      echo "Setting inline flags = $sim_inline" 6>&1
+    fi
+  else
+    sim_inline=""
+  fi
+else
+  sim_inline="-DDEFAULT_INLINE=0"
+fi
+fi
+
+
 for ac_header in unistd.h
 do :
   ac_fn_c_check_header_mongrel "$LINENO" "unistd.h" "ac_cv_header_unistd_h" "$ac_includes_default"
@@ -4631,6 +5132,7 @@ LTLIBOBJS=$ac_ltlibobjs
 
 
 
+
 : ${CONFIG_STATUS=./config.status}
 ac_write_fail=0
 ac_clean_files_save=$ac_clean_files
diff --git a/sim/moxie/configure.ac b/sim/moxie/configure.ac
index 78ef414c80..461734947b 100644
--- a/sim/moxie/configure.ac
+++ b/sim/moxie/configure.ac
@@ -3,12 +3,20 @@ AC_PREREQ(2.59)dnl
 AC_INIT(Makefile.in)
 AC_CONFIG_HEADER(config.h:config.in)
 
+AC_CHECK_TOOL(DTC, dtc)
+
 sinclude(../common/aclocal.m4)
 
 # Bugs in autoconf 2.59 break the call to SIM_AC_COMMON, hack around
 # it by inlining the macro's contents.
 sinclude(../common/common.m4)
 
+SIM_AC_OPTION_ENDIAN(BIG_ENDIAN)
+SIM_AC_OPTION_ALIGNMENT(STRICT_ALIGNMENT)
+SIM_AC_OPTION_HOSTENDIAN
+SIM_AC_OPTION_ENVIRONMENT
+SIM_AC_OPTION_INLINE()
+
 AC_CHECK_HEADERS(unistd.h)
 
 SIM_AC_OUTPUT
diff --git a/sim/moxie/interp.c b/sim/moxie/interp.c
index 9627b41d32..d9e4ea09dd 100644
--- a/sim/moxie/interp.c
+++ b/sim/moxie/interp.c
@@ -28,6 +28,9 @@ along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 #include "libiberty.h"
 #include "gdb/remote-sim.h"
 
+#include "sim-main.h"
+#include "sim-base.h"
+
 typedef int word;
 typedef unsigned int uword;
 
@@ -39,10 +42,11 @@ FILE *tracefile;
    instruction.  */
 #define INST2OFFSET(o) ((((signed short)((o & ((1<<10)-1))<<6))>>6)<<1)
 
-#define EXTRACT_WORD(addr) (((addr)[0] << 24) \
-			    + ((addr)[1] << 16) \
-			    + ((addr)[2] << 8) \
-			    + ((addr)[3]))
+#define EXTRACT_WORD(addr) \
+  ((sim_core_read_aligned_1 (scpu, cia, read_map, addr) << 24) \
+   + (sim_core_read_aligned_1 (scpu, cia, read_map, addr+1) << 16) \
+   + (sim_core_read_aligned_1 (scpu, cia, read_map, addr+2) << 8) \
+   + (sim_core_read_aligned_1 (scpu, cia, read_map, addr+3)))
 
 unsigned long
 moxie_extract_unsigned_integer (addr, len)
@@ -111,8 +115,6 @@ struct moxie_regset
   word		  sregs[256];             /* special registers */
   word            cc;                   /* the condition code reg */
   int		  exception;
-  unsigned long   msize;
-  unsigned char * memory;
   unsigned long long insts;                /* instruction counter */
 };
 
@@ -132,65 +134,20 @@ static char *myname;
 static SIM_OPEN_KIND sim_kind;
 static int issue_messages = 0;
 
-/* Default to a 16 Mbyte (== 2^23) memory space.  */
-static int sim_memory_size = 24;
-
-#define	MEM_SIZE_FLOOR	64
 void
-sim_size (power)
-     int power;
+sim_size (int s)
 {
-  sim_memory_size = power;
-  cpu.asregs.msize = 1 << sim_memory_size;
-
-  if (cpu.asregs.memory)
-    free (cpu.asregs.memory);
-
-  /* Watch out for the '0 count' problem. There's probably a better
-     way.. e.g., why do we use 64 here?  */
-  if (cpu.asregs.msize < 64)	/* Ensure a boundary.  */
-    cpu.asregs.memory = (unsigned char *) calloc (64, (64 + cpu.asregs.msize) / 64);
-  else
-    cpu.asregs.memory = (unsigned char *) calloc (64, cpu.asregs.msize / 64);
-
-  if (!cpu.asregs.memory)
-    {
-      if (issue_messages)
-	fprintf (stderr,
-		 "Not enough VM for simulation of %d bytes of RAM\n",
-		 cpu.asregs.msize);
-
-      cpu.asregs.msize = 1;
-      cpu.asregs.memory = (unsigned char *) calloc (1, 1);
-    }
 }
 
-static void
-init_pointers ()
-{
-  if (cpu.asregs.msize != (1 << sim_memory_size))
-    sim_size (sim_memory_size);
-}
-
-
 static void
 set_initial_gprs ()
 {
   int i;
   long space;
-  unsigned long memsize;
   
-  init_pointers ();
-
   /* Set up machine just out of reset.  */
   cpu.asregs.regs[PC_REGNO] = 0;
   
-  memsize = cpu.asregs.msize / (1024 * 1024);
-
-  if (issue_messages > 1)
-    fprintf (stderr, "Simulated memory of %d Mbytes (0x0 .. 0x%08x)\n",
-	     memsize, cpu.asregs.msize - 1);
-
   /* Clean out the register contents.  */
   for (i = 0; i < NUM_MOXIE_REGS; i++)
     cpu.asregs.regs[i] = 0;
@@ -207,168 +164,61 @@ interrupt ()
 /* Write a 1 byte value to memory.  */
 
 static void INLINE 
-wbat (pc, x, v)
-     word pc, x, v;
+wbat (sim_cpu *scpu, word pc, word x, word v)
 {
-  if (((uword)x) >= cpu.asregs.msize)
-    {
-      if (issue_messages)
-	fprintf (stderr, "byte write to 0x%x outside memory range\n", x);
-      
-      cpu.asregs.exception = SIGSEGV;
-    }
-  else
-    {
-      {
-	unsigned char * p = cpu.asregs.memory + x;
-	*p = v;
-      }
-    }
+  address_word cia = CIA_GET (scpu);
+  
+  sim_core_write_aligned_1 (scpu, cia, write_map, x, v);
 }
 
 /* Write a 2 byte value to memory.  */
 
 static void INLINE 
-wsat (pc, x, v)
-     word pc, x, v;
+wsat (sim_cpu *scpu, word pc, word x, word v)
 {
-  if (((uword)x) >= cpu.asregs.msize)
-    {
-      if (issue_messages)
-	fprintf (stderr, "short word write to 0x%x outside memory range\n", x);
-      
-      cpu.asregs.exception = SIGSEGV;
-    }
-  else
-    {
-      if ((x & 1) != 0)
-	{
-	  if (issue_messages)
-	    fprintf (stderr, "short word write to unaligned memory address: 0x%x\n", x);
-      
-	  cpu.asregs.exception = SIGBUS;
-	}
-      {
-	unsigned char * p = cpu.asregs.memory + x;
-	p[0] = v >> 8;
-	p[1] = v;
-      }
-    }
+  address_word cia = CIA_GET (scpu);
+  
+  sim_core_write_aligned_2 (scpu, cia, write_map, x, v);
 }
 
 /* Write a 4 byte value to memory.  */
 
 static void INLINE 
-wlat (pc, x, v)
-     word pc, x, v;
+wlat (sim_cpu *scpu, word pc, word x, word v)
 {
-  if (((uword)x) >= cpu.asregs.msize)
-    {
-      if (issue_messages)
-	fprintf (stderr, "word write to 0x%x outside memory range\n", x);
-      
-      cpu.asregs.exception = SIGSEGV;
-    }
-  else
-    {
-      if ((x & 1) != 0)
-	{
-	  if (issue_messages)
-	    fprintf (stderr, "word write to unaligned memory address: 0x%x\n", x);
-      
-	  cpu.asregs.exception = SIGBUS;
-	}
-      {
-	unsigned char * p = cpu.asregs.memory + x;
-	p[0] = v >> 24;
-	p[1] = v >> 16;
-	p[2] = v >> 8;
-	p[3] = v;
-      }
-    }
+  address_word cia = CIA_GET (scpu);
+	
+  sim_core_write_aligned_4 (scpu, cia, write_map, x, v);
 }
 
 /* Read 2 bytes from memory.  */
 
 static int INLINE 
-rsat (pc, x)
-     word pc, x;
+rsat (sim_cpu *scpu, word pc, word x)
 {
-  if (((uword) x) >= cpu.asregs.msize)
-    {
-      if (issue_messages)
-	fprintf (stderr, "short word read from 0x%x outside memory range\n", x);
-      
-      cpu.asregs.exception = SIGSEGV;
-      return 0;
-    }
-  else
-    {
-      if ((x & 1) != 0)
-	{
-	  if (issue_messages)
-	    fprintf (stderr, "short word read from unaligned address: 0x%x\n", x);
-      
-	  cpu.asregs.exception = SIGBUS;
-	  return 0;
-	}
-      {
-	unsigned char * p = cpu.asregs.memory + x;
-	return (p[0] << 8) | p[1];
-      }
-    }
+  address_word cia = CIA_GET (scpu);
+  
+  return (sim_core_read_aligned_2 (scpu, cia, read_map, x));
 }
 
 /* Read 1 byte from memory.  */
 
 static int INLINE 
-rbat (pc, x)
-     word pc, x;
+rbat (sim_cpu *scpu, word pc, word x)
 {
-  if (((uword) x) >= cpu.asregs.msize)
-    {
-      if (issue_messages)
-	fprintf (stderr, "byte read from 0x%x outside memory range\n", x);
-      
-      cpu.asregs.exception = SIGSEGV;
-      return 0;
-    }
-  else
-    {
-      unsigned char * p = cpu.asregs.memory + x;
-      return *p;
-    }
+  address_word cia = CIA_GET (scpu);
+  
+  return (sim_core_read_aligned_1 (scpu, cia, read_map, x));
 }
 
 /* Read 4 bytes from memory.  */
 
 static int INLINE 
-rlat (pc, x)
-     word pc, x;
+rlat (sim_cpu *scpu, word pc, word x)
 {
-  if (((uword) x) >= cpu.asregs.msize)
-    {
-      if (issue_messages)
-	fprintf (stderr, "word read from 0x%x outside memory range\n", x);
-      
-      cpu.asregs.exception = SIGSEGV;
-      return 0;
-    }
-  else
-    {
-      if ((x & 3) != 0)
-	{
-	  if (issue_messages)
-	    fprintf (stderr, "word read from unaligned address: 0x%x\n", x);
-      
-	  cpu.asregs.exception = SIGBUS;
-	  return 0;
-	}
-      {
-	unsigned char * p = cpu.asregs.memory + x;
-	return (EXTRACT_WORD(p));
-      }
-    }
+  address_word cia = CIA_GET (scpu);
+  
+  return (sim_core_read_aligned_4 (scpu, cia, read_map, x));
 }
 
 #define CHECK_FLAG(T,H) if (tflags & T) { hflags |= H; tflags ^= T; }
@@ -407,12 +257,13 @@ sim_resume (sd, step, siggnal)
   unsigned long long insts;
   unsigned short inst;
   void (* sigsave)();
+  sim_cpu *scpu = STATE_CPU (sd, 0); /* FIXME */
+  address_word cia = CIA_GET (scpu);
 
   sigsave = signal (SIGINT, interrupt);
   cpu.asregs.exception = step ? SIGTRAP: 0;
   pc = cpu.asregs.regs[PC_REGNO];
   insts = cpu.asregs.insts;
-  unsigned char *memory = cpu.asregs.memory;
 
   /* Run instructions here. */
   do 
@@ -420,7 +271,8 @@ sim_resume (sd, step, siggnal)
       opc = pc;
 
       /* Fetch the instruction at pc.  */
-      inst = (memory[pc] << 8) + memory[pc + 1];
+      inst = (sim_core_read_aligned_1 (scpu, cia, read_map, pc) << 8)
+	+ sim_core_read_aligned_1 (scpu, cia, read_map, pc+1);
 
       /* Decode instruction.  */
       if (inst & (1 << 15))
@@ -568,7 +420,7 @@ sim_resume (sd, step, siggnal)
 	      {
 		int reg = (inst >> 4) & 0xf;
 		TRACE("ldi.l");
-		unsigned int val = EXTRACT_WORD(&(memory[pc + 2]));
+		unsigned int val = EXTRACT_WORD(pc+2);
 		cpu.asregs.regs[reg] = val;
 		pc += 4;
 	      }
@@ -583,7 +435,7 @@ sim_resume (sd, step, siggnal)
 	      break;
  	    case 0x03: /* jsra */
  	      {
- 		unsigned int fn = EXTRACT_WORD(&(memory[pc + 2]));
+ 		unsigned int fn = EXTRACT_WORD(pc+2);
  		unsigned int sp = cpu.asregs.regs[1];
 		TRACE("jsra");
  		/* Save a slot for the static chain.  */
@@ -591,11 +443,11 @@ sim_resume (sd, step, siggnal)
 
  		/* Push the return address.  */
 		sp -= 4;
- 		wlat (opc, sp, pc + 6);
+ 		wlat (scpu, opc, sp, pc + 6);
  		
  		/* Push the current frame pointer.  */
  		sp -= 4;
- 		wlat (opc, sp, cpu.asregs.regs[0]);
+ 		wlat (scpu, opc, sp, cpu.asregs.regs[0]);
  
  		/* Uncache the stack pointer and set the pc and $fp.  */
 		cpu.asregs.regs[1] = sp;
@@ -610,11 +462,11 @@ sim_resume (sd, step, siggnal)
 		TRACE("ret");
  
  		/* Pop the frame pointer.  */
- 		cpu.asregs.regs[0] = rlat (opc, sp);
+ 		cpu.asregs.regs[0] = rlat (scpu, opc, sp);
  		sp += 4;
  		
  		/* Pop the return address.  */
- 		pc = rlat (opc, sp) - 2;
+ 		pc = rlat (scpu, opc, sp) - 2;
  		sp += 4;
 
 		/* Skip over the static chain slot.  */
@@ -640,7 +492,7 @@ sim_resume (sd, step, siggnal)
 		int b = inst & 0xf;
 		int sp = cpu.asregs.regs[a] - 4;
 		TRACE("push");
-		wlat (opc, sp, cpu.asregs.regs[b]);
+		wlat (scpu, opc, sp, cpu.asregs.regs[b]);
 		cpu.asregs.regs[a] = sp;
 	      }
 	      break;
@@ -650,25 +502,25 @@ sim_resume (sd, step, siggnal)
 		int b = inst & 0xf;
 		int sp = cpu.asregs.regs[a];
 		TRACE("pop");
-		cpu.asregs.regs[b] = rlat (opc, sp);
+		cpu.asregs.regs[b] = rlat (scpu, opc, sp);
 		cpu.asregs.regs[a] = sp + 4;
 	      }
 	      break;
 	    case 0x08: /* lda.l */
 	      {
 		int reg = (inst >> 4) & 0xf;
-		unsigned int addr = EXTRACT_WORD(&memory[pc+2]);
+		unsigned int addr = EXTRACT_WORD(pc+2);
 		TRACE("lda.l");
-		cpu.asregs.regs[reg] = rlat (opc, addr);
+		cpu.asregs.regs[reg] = rlat (scpu, opc, addr);
 		pc += 4;
 	      }
 	      break;
 	    case 0x09: /* sta.l */
 	      {
 		int reg = (inst >> 4) & 0xf;
-		unsigned int addr = EXTRACT_WORD(&memory[pc+2]);
+		unsigned int addr = EXTRACT_WORD(pc+2);
 		TRACE("sta.l");
-		wlat (opc, addr, cpu.asregs.regs[reg]);
+		wlat (scpu, opc, addr, cpu.asregs.regs[reg]);
 		pc += 4;
 	      }
 	      break;
@@ -679,7 +531,7 @@ sim_resume (sd, step, siggnal)
 		int xv;
 		TRACE("ld.l");
 		xv = cpu.asregs.regs[src];
-		cpu.asregs.regs[dest] = rlat (opc, xv);
+		cpu.asregs.regs[dest] = rlat (scpu, opc, xv);
 	      }
 	      break;
 	    case 0x0b: /* st.l */
@@ -687,28 +539,28 @@ sim_resume (sd, step, siggnal)
 		int dest = (inst >> 4) & 0xf;
 		int val  = inst & 0xf;
 		TRACE("st.l");
-		wlat (opc, cpu.asregs.regs[dest], cpu.asregs.regs[val]);
+		wlat (scpu, opc, cpu.asregs.regs[dest], cpu.asregs.regs[val]);
 	      }
 	      break;
 	    case 0x0c: /* ldo.l */
 	      {
-		unsigned int addr = EXTRACT_WORD(&memory[pc+2]);
+		unsigned int addr = EXTRACT_WORD(pc+2);
 		int a = (inst >> 4) & 0xf;
 		int b = inst & 0xf;
 		TRACE("ldo.l");
 		addr += cpu.asregs.regs[b];
-		cpu.asregs.regs[a] = rlat(opc, addr);
+		cpu.asregs.regs[a] = rlat (scpu, opc, addr);
 		pc += 4;
 	      }
 	      break;
 	    case 0x0d: /* sto.l */
 	      {
-		unsigned int addr = EXTRACT_WORD(&memory[pc+2]);
+		unsigned int addr = EXTRACT_WORD(pc+2);
 		int a = (inst >> 4) & 0xf;
 		int b = inst & 0xf;
 		TRACE("sto.l");
 		addr += cpu.asregs.regs[a];
-		wlat(opc, addr, cpu.asregs.regs[b]);
+		wlat (scpu, opc, addr, cpu.asregs.regs[b]);
 		pc += 4;
 	      }
 	      break;
@@ -763,11 +615,11 @@ sim_resume (sd, step, siggnal)
 
 		/* Push the return address.  */
 		sp -= 4;
-		wlat (opc, sp, pc + 2);
+		wlat (scpu, opc, sp, pc + 2);
 		
 		/* Push the current frame pointer.  */
 		sp -= 4;
-		wlat (opc, sp, cpu.asregs.regs[0]);
+		wlat (scpu, opc, sp, cpu.asregs.regs[0]);
 
 		/* Uncache the stack pointer and set the fp & pc.  */
 		cpu.asregs.regs[1] = sp;
@@ -777,7 +629,7 @@ sim_resume (sd, step, siggnal)
 	      break;
 	    case 0x1a: /* jmpa */
 	      {
-		unsigned int tgt = EXTRACT_WORD(&memory[pc+2]);
+		unsigned int tgt = EXTRACT_WORD(pc+2);
 		TRACE("jmpa");
 		pc = tgt - 2;
 	      }
@@ -786,7 +638,7 @@ sim_resume (sd, step, siggnal)
 	      {
 		int reg = (inst >> 4) & 0xf;
 
-		unsigned int val = EXTRACT_WORD(&(memory[pc + 2]));
+		unsigned int val = EXTRACT_WORD(pc+2);
 		TRACE("ldi.b");
 		cpu.asregs.regs[reg] = val;
 		pc += 4;
@@ -799,15 +651,15 @@ sim_resume (sd, step, siggnal)
 		int xv;
 		TRACE("ld.b");
 		xv = cpu.asregs.regs[src];
-		cpu.asregs.regs[dest] = rbat (opc, xv);
+		cpu.asregs.regs[dest] = rbat (scpu, opc, xv);
 	      }
 	      break;
 	    case 0x1d: /* lda.b */
 	      {
 		int reg = (inst >> 4) & 0xf;
-		unsigned int addr = EXTRACT_WORD(&memory[pc+2]);
+		unsigned int addr = EXTRACT_WORD(pc+2);
 		TRACE("lda.b");
-		cpu.asregs.regs[reg] = rbat (opc, addr);
+		cpu.asregs.regs[reg] = rbat (scpu, opc, addr);
 		pc += 4;
 	      }
 	      break;
@@ -816,15 +668,15 @@ sim_resume (sd, step, siggnal)
 		int dest = (inst >> 4) & 0xf;
 		int val  = inst & 0xf;
 		TRACE("st.b");
-		wbat (opc, cpu.asregs.regs[dest], cpu.asregs.regs[val]);
+		wbat (scpu, opc, cpu.asregs.regs[dest], cpu.asregs.regs[val]);
 	      }
 	      break;
 	    case 0x1f: /* sta.b */
 	      {
 		int reg = (inst >> 4) & 0xf;
-		unsigned int addr = EXTRACT_WORD(&memory[pc+2]);
+		unsigned int addr = EXTRACT_WORD(pc+2);
 		TRACE("sta.b");
-		wbat (opc, addr, cpu.asregs.regs[reg]);
+		wbat (scpu, opc, addr, cpu.asregs.regs[reg]);
 		pc += 4;
 	      }
 	      break;
@@ -832,7 +684,7 @@ sim_resume (sd, step, siggnal)
 	      {
 		int reg = (inst >> 4) & 0xf;
 
-		unsigned int val = EXTRACT_WORD(&(memory[pc + 2]));
+		unsigned int val = EXTRACT_WORD(pc+2);
 		TRACE("ldi.s");
 		cpu.asregs.regs[reg] = val;
 		pc += 4;
@@ -845,15 +697,15 @@ sim_resume (sd, step, siggnal)
 		int xv;
 		TRACE("ld.s");
 		xv = cpu.asregs.regs[src];
-		cpu.asregs.regs[dest] = rsat (opc, xv);
+		cpu.asregs.regs[dest] = rsat (scpu, opc, xv);
 	      }
 	      break;
 	    case 0x22: /* lda.s */
 	      {
 		int reg = (inst >> 4) & 0xf;
-		unsigned int addr = EXTRACT_WORD(&memory[pc+2]);
+		unsigned int addr = EXTRACT_WORD(pc+2);
 		TRACE("lda.s");
-		cpu.asregs.regs[reg] = rsat (opc, addr);
+		cpu.asregs.regs[reg] = rsat (scpu, opc, addr);
 		pc += 4;
 	      }
 	      break;
@@ -862,15 +714,15 @@ sim_resume (sd, step, siggnal)
 		int dest = (inst >> 4) & 0xf;
 		int val  = inst & 0xf;
 		TRACE("st.s");
-		wsat (opc, cpu.asregs.regs[dest], cpu.asregs.regs[val]);
+		wsat (scpu, opc, cpu.asregs.regs[dest], cpu.asregs.regs[val]);
 	      }
 	      break;
 	    case 0x24: /* sta.s */
 	      {
 		int reg = (inst >> 4) & 0xf;
-		unsigned int addr = EXTRACT_WORD(&memory[pc+2]);
+		unsigned int addr = EXTRACT_WORD(pc+2);
 		TRACE("sta.s");
-		wsat (opc, addr, cpu.asregs.regs[reg]);
+		wsat (scpu, opc, addr, cpu.asregs.regs[reg]);
 		pc += 4;
 	      }
 	      break;
@@ -984,8 +836,11 @@ sim_resume (sd, step, siggnal)
 	      break;
 	    case 0x30: /* swi */
 	      {
-		unsigned int inum = EXTRACT_WORD(&memory[pc+2]);
+		unsigned int inum = EXTRACT_WORD(pc+2);
 		TRACE("swi");
+		/* Set the special registers appropriately.  */
+		cpu.asregs.sregs[2] = 3; /* MOXIE_EX_SWI */
+	        cpu.asregs.sregs[3] = inum;
 		switch (inum)
 		  {
 		  case 0x1: /* SYS_exit */
@@ -995,10 +850,12 @@ sim_resume (sd, step, siggnal)
 		    }
 		  case 0x2: /* SYS_open */
 		    {
-		      char *fname = &memory[cpu.asregs.regs[2]];
+		      char fname[1024];
 		      int mode = (int) convert_target_flags ((unsigned) cpu.asregs.regs[3]);
 		      int perm = (int) cpu.asregs.regs[4];
 		      int fd = open (fname, mode, perm);
+		      sim_core_read_buffer (sd, scpu, read_map, fname,
+					    cpu.asregs.regs[2], 1024);
 		      /* FIXME - set errno */
 		      cpu.asregs.regs[2] = fd;
 		      break;
@@ -1006,17 +863,24 @@ sim_resume (sd, step, siggnal)
 		  case 0x4: /* SYS_read */
 		    {
 		      int fd = cpu.asregs.regs[2];
-		      char *buf = &memory[cpu.asregs.regs[3]];
 		      unsigned len = (unsigned) cpu.asregs.regs[4];
+		      char *buf = malloc (len);
 		      cpu.asregs.regs[2] = read (fd, buf, len);
+		      sim_core_write_buffer (sd, scpu, write_map, buf,
+					     cpu.asregs.regs[3], len);
+		      free (buf);
 		      break;
 		    }
 		  case 0x5: /* SYS_write */
 		    {
-		      char *str = &memory[cpu.asregs.regs[3]];
+		      char *str;
 		      /* String length is at 0x12($fp) */
 		      unsigned count, len = (unsigned) cpu.asregs.regs[4];
+		      str = malloc (len);
+		      sim_core_read_buffer (sd, scpu, read_map, str,
+					    cpu.asregs.regs[3], len);
 		      count = write (cpu.asregs.regs[2], str, len);
+		      free (str);
 		      cpu.asregs.regs[2] = count;
 		      break;
 		    }
@@ -1024,18 +888,17 @@ sim_resume (sd, step, siggnal)
 		    {
 		      unsigned int handler = cpu.asregs.sregs[1];
 		      unsigned int sp = cpu.asregs.regs[1];
-		      cpu.asregs.sregs[2] = 3; /* MOXIE_EX_SWI */
 
 		      /* Save a slot for the static chain.  */
 		      sp -= 4;
 
 		      /* Push the return address.  */
 		      sp -= 4;
-		      wlat (opc, sp, pc + 6);
+		      wlat (scpu, opc, sp, pc + 6);
 		
 		      /* Push the current frame pointer.  */
 		      sp -= 4;
-		      wlat (opc, sp, cpu.asregs.regs[0]);
+		      wlat (scpu, opc, sp, cpu.asregs.regs[0]);
 
 		      /* Uncache the stack pointer and set the fp & pc.  */
 		      cpu.asregs.regs[1] = sp;
@@ -1095,45 +958,45 @@ sim_resume (sd, step, siggnal)
 	      break;
 	    case 0x36: /* ldo.b */
 	      {
-		unsigned int addr = EXTRACT_WORD(&memory[pc+2]);
+		unsigned int addr = EXTRACT_WORD(pc+2);
 		int a = (inst >> 4) & 0xf;
 		int b = inst & 0xf;
 		TRACE("ldo.b");
 		addr += cpu.asregs.regs[b];
-		cpu.asregs.regs[a] = rbat(opc, addr);
+		cpu.asregs.regs[a] = rbat (scpu, opc, addr);
 		pc += 4;
 	      }
 	      break;
 	    case 0x37: /* sto.b */
 	      {
-		unsigned int addr = EXTRACT_WORD(&memory[pc+2]);
+		unsigned int addr = EXTRACT_WORD(pc+2);
 		int a = (inst >> 4) & 0xf;
 		int b = inst & 0xf;
 		TRACE("sto.b");
 		addr += cpu.asregs.regs[a];
-		wbat(opc, addr, cpu.asregs.regs[b]);
+		wbat (scpu, opc, addr, cpu.asregs.regs[b]);
 		pc += 4;
 	      }
 	      break;
 	    case 0x38: /* ldo.s */
 	      {
-		unsigned int addr = EXTRACT_WORD(&memory[pc+2]);
+		unsigned int addr = EXTRACT_WORD(pc+2);
 		int a = (inst >> 4) & 0xf;
 		int b = inst & 0xf;
 		TRACE("ldo.s");
 		addr += cpu.asregs.regs[b];
-		cpu.asregs.regs[a] = rsat(opc, addr);
+		cpu.asregs.regs[a] = rsat (scpu, opc, addr);
 		pc += 4;
 	      }
 	      break;
 	    case 0x39: /* sto.s */
 	      {
-		unsigned int addr = EXTRACT_WORD(&memory[pc+2]);
+		unsigned int addr = EXTRACT_WORD(pc+2);
 		int a = (inst >> 4) & 0xf;
 		int b = inst & 0xf;
 		TRACE("sto.s");
 		addr += cpu.asregs.regs[a];
-		wsat(opc, addr, cpu.asregs.regs[b]);
+		wsat (scpu, opc, addr, cpu.asregs.regs[b]);
 		pc += 4;
 	      }
 	      break;
@@ -1164,11 +1027,10 @@ sim_write (sd, addr, buffer, size)
      unsigned char * buffer;
      int size;
 {
-  int i;
-  init_pointers ();
-  
-  memcpy (& cpu.asregs.memory[addr], buffer, size);
-  
+  sim_cpu *scpu = STATE_CPU (sd, 0); /* FIXME */
+
+  sim_core_write_buffer (sd, scpu, write_map, buffer, addr, size);
+
   return size;
 }
 
@@ -1179,10 +1041,9 @@ sim_read (sd, addr, buffer, size)
      unsigned char * buffer;
      int size;
 {
-  int i;
-  init_pointers ();
-  
-  memcpy (buffer, & cpu.asregs.memory[addr], size);
+  sim_cpu *scpu = STATE_CPU (sd, 0); /* FIXME */
+
+  sim_core_read_buffer (sd, scpu, read_map, buffer, addr, size);
   
   return size;
 }
@@ -1195,8 +1056,6 @@ sim_store_register (sd, rn, memory, length)
      unsigned char * memory;
      int length;
 {
-  init_pointers ();
-
   if (rn < NUM_MOXIE_REGS && rn >= 0)
     {
       if (length == 4)
@@ -1221,8 +1080,6 @@ sim_fetch_register (sd, rn, memory, length)
      unsigned char * memory;
      int length;
 {
-  init_pointers ();
-  
   if (rn < NUM_MOXIE_REGS && rn >= 0)
     {
       if (length == 4)
@@ -1301,21 +1158,25 @@ sim_open (kind, cb, abfd, argv)
      struct bfd * abfd;
      char ** argv;
 {
-  int osize = sim_memory_size;
+  SIM_DESC sd = sim_state_alloc (kind, cb);
+  printf ("0x%x 0x%x\n", sd, STATE_MAGIC(sd));
+  SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
+
+  if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
+    return 0;
+
+  sim_do_command(sd," memory region 0x00000000,0x4000000") ; 
+  sim_do_command(sd," memory region 0xE0000000,0x10000") ; 
+
   myname = argv[0];
   callback = cb;
   
   if (kind == SIM_OPEN_STANDALONE)
     issue_messages = 1;
   
-  /* Discard and reacquire memory -- start with a clean slate.  */
-  sim_size (1);		/* small */
-  sim_size (osize);	/* and back again */
-
   set_initial_gprs ();	/* Reset the GPR registers.  */
   
-  /* Fudge our descriptor for now.  */
-  return (SIM_DESC) 1;
+  return sd;
 }
 
 void
@@ -1326,6 +1187,35 @@ sim_close (sd, quitting)
   /* nothing to do */
 }
 
+
+/* Load the device tree blob.  */
+
+static void
+load_dtb (SIM_DESC sd, const char *filename)
+{
+  int size = 0;
+  FILE *f = fopen (filename, "rb");
+  char *buf;
+  sim_cpu *scpu = STATE_CPU (sd, 0); /* FIXME */ 
+ if (f == NULL)
+    {
+      printf ("WARNING: ``%s'' could not be opened.\n", filename);
+      return;
+    }
+  fseek (f, 0, SEEK_END);
+  size = ftell(f);
+  fseek (f, 0, SEEK_SET);
+  buf = alloca (size);
+  if (size != fread (buf, 1, size, f))
+    {
+      printf ("ERROR: error reading ``%s''.\n", filename);
+      return;
+    }
+  sim_core_write_buffer (sd, scpu, write_map, buf, 0xE0000000, size);
+  cpu.asregs.sregs[9] = 0xE0000000;
+  fclose (f);
+}
+
 SIM_RC
 sim_load (sd, prog, abfd, from_tty)
      SIM_DESC sd;
@@ -1389,6 +1279,7 @@ sim_create_inferior (sd, prog_bfd, argv, env)
 {
   char ** avp;
   int l, argc, i, tp;
+  sim_cpu *scpu = STATE_CPU (sd, 0); /* FIXME */
 
   /* Set the initial register set.  */
   l = issue_messages;
@@ -1412,8 +1303,8 @@ sim_create_inferior (sd, prog_bfd, argv, env)
      0x0000???? zero word 
      0x0000???? start of data pointed to by argv  */
 
-  wlat (0, 0, 0);
-  wlat (0, 4, argc);
+  wlat (scpu, 0, 0, 0);
+  wlat (scpu, 0, 4, argc);
 
   /* tp is the offset of our first argv data.  */
   tp = 4 + 4 + argc * 4 + 4;
@@ -1421,14 +1312,17 @@ sim_create_inferior (sd, prog_bfd, argv, env)
   for (i = 0; i < argc; i++)
     {
       /* Set the argv value.  */
-      wlat (0, 4 + 4 + i * 4, tp);
+      wlat (scpu, 0, 4 + 4 + i * 4, tp);
 
       /* Store the string.  */
-      strcpy (&cpu.asregs.memory[tp], argv[i]);
+      sim_core_write_buffer (sd, scpu, write_map, argv[i],
+			     tp, strlen(argv[i])+1);
       tp += strlen (argv[i]) + 1;
     }
 
-  wlat (0, 4 + 4 + i * 4, 0);
+  wlat (scpu, 0, 4 + 4 + i * 4, 0);
+
+  load_dtb (sd, DTB);
 
   return SIM_RC_OK;
 }
@@ -1446,26 +1340,10 @@ sim_do_command (sd, cmd)
      SIM_DESC sd;
      char * cmd;
 {
-  /* Nothing there yet; it's all an error.  */
-  
-  if (cmd != NULL)
-    {
-      char ** simargv = buildargv (cmd);
-      if (strcmp (simargv[0], "verbose") == 0)
-	{
-	  issue_messages = 2;
-	}
-      else
-	{
-	  fprintf (stderr,"Error: \"%s\" is not a valid moxie simulator command.\n",
+  if (sim_args_command (sd, cmd) != SIM_RC_OK)
+    sim_io_printf (sd, 
+		   "Error: \"%s\" is not a valid moxie simulator command.\n",
 		   cmd);
-	}
-    }
-  else
-    {
-      fprintf (stderr, "moxie sim commands: \n");
-      fprintf (stderr, "  verbose\n");
-    }
 }
 
 void
diff --git a/sim/moxie/moxie-gdb.dts b/sim/moxie/moxie-gdb.dts
new file mode 100644
index 0000000000..56e0369b59
--- /dev/null
+++ b/sim/moxie/moxie-gdb.dts
@@ -0,0 +1,49 @@
+/*
+ * GDB Simulator device tree.
+ *
+ * (C) Copyright 2009 Anthony Green
+ *
+ * Anthony Green <green@moxielogic.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+/dts-v1/;
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "gdb,moxie-elf-gdb";
+	model = "testing";
+	DDR2_SDRAM: memory@00000000 {
+		device_type = "memory";
+		reg = < 0x00000000 0x04000000 >;
+	} ;
+	chosen {
+		bootargs = "lpj=1000 console=earlyser0";
+	} ;
+	cpus {
+		#address-cells = <1>;
+		#cpus = <0x1>;
+		#size-cells = <0>;
+		moxie_0: cpu@0 {
+			compatible = "moxie,moxie-0.99";
+			device_type = "cpu";
+			model = "moxie,0.99";
+			reg = <0>;
+		} ;
+	} ;
+}  ;
diff --git a/sim/moxie/sim-main.h b/sim/moxie/sim-main.h
new file mode 100644
index 0000000000..f743dfb6cf
--- /dev/null
+++ b/sim/moxie/sim-main.h
@@ -0,0 +1,63 @@
+/* Moxie Simulator definition.
+   Copyright (C) 2009
+   Free Software Foundation, Inc.
+   Contributed by Anthony Green <green@moxielogic.com>
+
+This file is part of GDB, the GNU debugger.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#ifndef SIM_MAIN_H
+#define SIM_MAIN_H
+
+#define SIM_HAVE_BIENDIAN
+
+#include "sim-basics.h"
+
+typedef address_word sim_cia;
+
+#include "sim-base.h"
+#include "bfd.h"
+
+#define PCIDX 17
+
+struct _sim_cpu {
+
+  /* The following are internal simulator state variables: */
+#define CIA_GET(CPU) ((CPU)->registers[PCIDX] + 0)
+#define CIA_SET(CPU,CIA) ((CPU)->registers[PCIDX] = (CIA))
+
+/* To keep this default simulator simple, and fast, we use a direct
+   vector of registers. The internal simulator engine then uses
+   manifests to access the correct slot. */
+
+  unsigned_word registers[19];
+
+  sim_cpu_base base;
+};
+
+struct sim_state {
+
+  sim_cpu cpu[MAX_NR_PROCESSORS];
+#if (WITH_SMP)
+#define STATE_CPU(sd,n) (&(sd)->cpu[n])
+#else
+#define STATE_CPU(sd,n) (&(sd)->cpu[0])
+#endif
+
+  sim_state_base base;
+};
+
+#endif
+
-- 
2.34.1