Handle multiple target events before commit resume
[deliverable/binutils-gdb.git] / bfd / elf32-h8300.c
CommitLineData
c2dcd04e 1/* BFD back-end for Renesas H8/300 ELF binaries.
82704155 2 Copyright (C) 1993-2019 Free Software Foundation, Inc.
e01b0e69 3
e514ac71 4 This file is part of BFD, the Binary File Descriptor library.
e01b0e69 5
e514ac71
NC
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
cd123cb7 8 the Free Software Foundation; either version 3 of the License, or
e514ac71 9 (at your option) any later version.
e01b0e69 10
e514ac71
NC
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
e01b0e69 15
e514ac71
NC
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
cd123cb7
NC
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
e01b0e69 20
e01b0e69 21#include "sysdep.h"
3db64b00 22#include "bfd.h"
e01b0e69
JR
23#include "libbfd.h"
24#include "elf-bfd.h"
25#include "elf/h8.h"
ca437b1b 26#include "cpu-h8300.h"
e01b0e69
JR
27
28static reloc_howto_type *elf32_h8_reloc_type_lookup
c6baf75e 29 (bfd *abfd, bfd_reloc_code_real_type code);
f3185997 30static bfd_boolean elf32_h8_info_to_howto
c6baf75e 31 (bfd *, arelent *, Elf_Internal_Rela *);
f3185997 32static bfd_boolean elf32_h8_info_to_howto_rel
c6baf75e 33 (bfd *, arelent *, Elf_Internal_Rela *);
96ef1419 34static unsigned long elf32_h8_mach (flagword);
96ef1419 35static bfd_boolean elf32_h8_object_p (bfd *);
50e03d47
AM
36static bfd_boolean elf32_h8_merge_private_bfd_data
37 (bfd *, struct bfd_link_info *);
b34976b6 38static bfd_boolean elf32_h8_relax_section
c6baf75e 39 (bfd *, asection *, struct bfd_link_info *, bfd_boolean *);
b34976b6 40static bfd_boolean elf32_h8_relax_delete_bytes
c6baf75e 41 (bfd *, asection *, bfd_vma, int);
96ef1419 42static bfd_boolean elf32_h8_symbol_address_p (bfd *, asection *, bfd_vma);
dc810e39 43static bfd_byte *elf32_h8_get_relocated_section_contents
c6baf75e
RS
44 (bfd *, struct bfd_link_info *, struct bfd_link_order *,
45 bfd_byte *, bfd_boolean, asymbol **);
5e47149d 46static bfd_reloc_status_type elf32_h8_final_link_relocate
c6baf75e
RS
47 (unsigned long, bfd *, bfd *, asection *,
48 bfd_byte *, bfd_vma, bfd_vma, bfd_vma,
49 struct bfd_link_info *, asection *, int);
b34976b6 50static bfd_boolean elf32_h8_relocate_section
c6baf75e
RS
51 (bfd *, struct bfd_link_info *, bfd *, asection *,
52 bfd_byte *, Elf_Internal_Rela *,
53 Elf_Internal_Sym *, asection **);
dc810e39 54static bfd_reloc_status_type special
2c3fc389 55 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
e01b0e69
JR
56
57/* This does not include any relocation information, but should be
58 good enough for GDB or objdump to read the file. */
59
2c3fc389
NC
60static reloc_howto_type h8_elf_howto_table[] =
61{
e01b0e69
JR
62#define R_H8_NONE_X 0
63 HOWTO (R_H8_NONE, /* type */
64 0, /* rightshift */
6346d5ca 65 3, /* size (0 = byte, 1 = short, 2 = long) */
e01b0e69 66 0, /* bitsize */
b34976b6 67 FALSE, /* pc_relative */
e01b0e69 68 0, /* bitpos */
9d29900b
NC
69 complain_overflow_dont,/* complain_on_overflow */
70 special, /* special_function */
e01b0e69 71 "R_H8_NONE", /* name */
b34976b6 72 FALSE, /* partial_inplace */
e01b0e69
JR
73 0, /* src_mask */
74 0, /* dst_mask */
b34976b6 75 FALSE), /* pcrel_offset */
e01b0e69
JR
76#define R_H8_DIR32_X (R_H8_NONE_X + 1)
77 HOWTO (R_H8_DIR32, /* type */
78 0, /* rightshift */
79 2, /* size (0 = byte, 1 = short, 2 = long) */
80 32, /* bitsize */
b34976b6 81 FALSE, /* pc_relative */
e01b0e69 82 0, /* bitpos */
9d29900b
NC
83 complain_overflow_dont,/* complain_on_overflow */
84 special, /* special_function */
e01b0e69 85 "R_H8_DIR32", /* name */
b34976b6 86 FALSE, /* partial_inplace */
e01b0e69
JR
87 0, /* src_mask */
88 0xffffffff, /* dst_mask */
b34976b6 89 FALSE), /* pcrel_offset */
e01b0e69
JR
90#define R_H8_DIR16_X (R_H8_DIR32_X + 1)
91 HOWTO (R_H8_DIR16, /* type */
92 0, /* rightshift */
93 1, /* size (0 = byte, 1 = short, 2 = long) */
94 16, /* bitsize */
b34976b6 95 FALSE, /* pc_relative */
e01b0e69 96 0, /* bitpos */
9d29900b
NC
97 complain_overflow_dont,/* complain_on_overflow */
98 special, /* special_function */
e01b0e69 99 "R_H8_DIR16", /* name */
b34976b6 100 FALSE, /* partial_inplace */
e01b0e69
JR
101 0, /* src_mask */
102 0x0000ffff, /* dst_mask */
b34976b6 103 FALSE), /* pcrel_offset */
e01b0e69
JR
104#define R_H8_DIR8_X (R_H8_DIR16_X + 1)
105 HOWTO (R_H8_DIR8, /* type */
106 0, /* rightshift */
107 0, /* size (0 = byte, 1 = short, 2 = long) */
108 8, /* bitsize */
b34976b6 109 FALSE, /* pc_relative */
e01b0e69 110 0, /* bitpos */
9d29900b
NC
111 complain_overflow_dont,/* complain_on_overflow */
112 special, /* special_function */
113 "R_H8_DIR8", /* name */
b34976b6 114 FALSE, /* partial_inplace */
e01b0e69
JR
115 0, /* src_mask */
116 0x000000ff, /* dst_mask */
b34976b6 117 FALSE), /* pcrel_offset */
e01b0e69
JR
118#define R_H8_DIR16A8_X (R_H8_DIR8_X + 1)
119 HOWTO (R_H8_DIR16A8, /* type */
120 0, /* rightshift */
121 1, /* size (0 = byte, 1 = short, 2 = long) */
122 16, /* bitsize */
b34976b6 123 FALSE, /* pc_relative */
e01b0e69
JR
124 0, /* bitpos */
125 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 126 special, /* special_function */
e01b0e69 127 "R_H8_DIR16A8", /* name */
b34976b6 128 FALSE, /* partial_inplace */
e01b0e69
JR
129 0, /* src_mask */
130 0x0000ffff, /* dst_mask */
b34976b6 131 FALSE), /* pcrel_offset */
e01b0e69
JR
132#define R_H8_DIR16R8_X (R_H8_DIR16A8_X + 1)
133 HOWTO (R_H8_DIR16R8, /* type */
134 0, /* rightshift */
135 1, /* size (0 = byte, 1 = short, 2 = long) */
136 16, /* bitsize */
b34976b6 137 FALSE, /* pc_relative */
e01b0e69
JR
138 0, /* bitpos */
139 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 140 special, /* special_function */
e01b0e69 141 "R_H8_DIR16R8", /* name */
b34976b6 142 FALSE, /* partial_inplace */
e01b0e69
JR
143 0, /* src_mask */
144 0x0000ffff, /* dst_mask */
b34976b6 145 FALSE), /* pcrel_offset */
e01b0e69
JR
146#define R_H8_DIR24A8_X (R_H8_DIR16R8_X + 1)
147 HOWTO (R_H8_DIR24A8, /* type */
148 0, /* rightshift */
149 2, /* size (0 = byte, 1 = short, 2 = long) */
150 24, /* bitsize */
b34976b6 151 FALSE, /* pc_relative */
e01b0e69
JR
152 0, /* bitpos */
153 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 154 special, /* special_function */
e01b0e69 155 "R_H8_DIR24A8", /* name */
b34976b6 156 TRUE, /* partial_inplace */
e01b0e69
JR
157 0xff000000, /* src_mask */
158 0x00ffffff, /* dst_mask */
b34976b6 159 FALSE), /* pcrel_offset */
e01b0e69
JR
160#define R_H8_DIR24R8_X (R_H8_DIR24A8_X + 1)
161 HOWTO (R_H8_DIR24R8, /* type */
162 0, /* rightshift */
163 2, /* size (0 = byte, 1 = short, 2 = long) */
164 24, /* bitsize */
b34976b6 165 FALSE, /* pc_relative */
e01b0e69
JR
166 0, /* bitpos */
167 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 168 special, /* special_function */
e01b0e69 169 "R_H8_DIR24R8", /* name */
b34976b6 170 TRUE, /* partial_inplace */
e01b0e69
JR
171 0xff000000, /* src_mask */
172 0x00ffffff, /* dst_mask */
b34976b6 173 FALSE), /* pcrel_offset */
e01b0e69
JR
174#define R_H8_DIR32A16_X (R_H8_DIR24R8_X + 1)
175 HOWTO (R_H8_DIR32A16, /* type */
176 0, /* rightshift */
177 2, /* size (0 = byte, 1 = short, 2 = long) */
178 32, /* bitsize */
b34976b6 179 FALSE, /* pc_relative */
e01b0e69 180 0, /* bitpos */
9d29900b
NC
181 complain_overflow_dont,/* complain_on_overflow */
182 special, /* special_function */
8c17da6e 183 "R_H8_DIR32A16", /* name */
b34976b6 184 FALSE, /* partial_inplace */
e01b0e69
JR
185 0, /* src_mask */
186 0xffffffff, /* dst_mask */
b34976b6 187 FALSE), /* pcrel_offset */
81f5558e
NC
188#define R_H8_DISP32A16_X (R_H8_DIR32A16_X + 1)
189 HOWTO (R_H8_DISP32A16, /* type */
190 0, /* rightshift */
191 2, /* size (0 = byte, 1 = short, 2 = long) */
192 32, /* bitsize */
193 FALSE, /* pc_relative */
194 0, /* bitpos */
195 complain_overflow_dont,/* complain_on_overflow */
196 special, /* special_function */
197 "R_H8_DISP32A16", /* name */
198 FALSE, /* partial_inplace */
199 0, /* src_mask */
200 0xffffffff, /* dst_mask */
201 FALSE), /* pcrel_offset */
202#define R_H8_PCREL16_X (R_H8_DISP32A16_X + 1)
f2352488
JL
203 HOWTO (R_H8_PCREL16, /* type */
204 0, /* rightshift */
205 1, /* size (0 = byte, 1 = short, 2 = long) */
206 16, /* bitsize */
b34976b6 207 TRUE, /* pc_relative */
f2352488 208 0, /* bitpos */
9d29900b
NC
209 complain_overflow_signed,/* complain_on_overflow */
210 special, /* special_function */
f2352488 211 "R_H8_PCREL16", /* name */
b34976b6 212 FALSE, /* partial_inplace */
f2352488
JL
213 0xffff, /* src_mask */
214 0xffff, /* dst_mask */
b34976b6 215 TRUE), /* pcrel_offset */
f2352488
JL
216#define R_H8_PCREL8_X (R_H8_PCREL16_X + 1)
217 HOWTO (R_H8_PCREL8, /* type */
218 0, /* rightshift */
219 0, /* size (0 = byte, 1 = short, 2 = long) */
220 8, /* bitsize */
b34976b6 221 TRUE, /* pc_relative */
f2352488 222 0, /* bitpos */
9d29900b
NC
223 complain_overflow_signed,/* complain_on_overflow */
224 special, /* special_function */
f2352488 225 "R_H8_PCREL8", /* name */
b34976b6 226 FALSE, /* partial_inplace */
f2352488
JL
227 0xff, /* src_mask */
228 0xff, /* dst_mask */
b34976b6 229 TRUE), /* pcrel_offset */
e01b0e69
JR
230};
231
232/* This structure is used to map BFD reloc codes to H8 ELF relocs. */
233
bc7eab72 234struct elf_reloc_map {
e01b0e69
JR
235 bfd_reloc_code_real_type bfd_reloc_val;
236 unsigned char howto_index;
237};
238
6288878d 239/* An array mapping BFD reloc codes to H8 ELF relocs. */
e01b0e69 240
bc7eab72 241static const struct elf_reloc_map h8_reloc_map[] = {
e01b0e69
JR
242 { BFD_RELOC_NONE, R_H8_NONE_X },
243 { BFD_RELOC_32, R_H8_DIR32_X },
244 { BFD_RELOC_16, R_H8_DIR16_X },
245 { BFD_RELOC_8, R_H8_DIR8_X },
246 { BFD_RELOC_H8_DIR16A8, R_H8_DIR16A8_X },
247 { BFD_RELOC_H8_DIR16R8, R_H8_DIR16R8_X },
248 { BFD_RELOC_H8_DIR24A8, R_H8_DIR24A8_X },
249 { BFD_RELOC_H8_DIR24R8, R_H8_DIR24R8_X },
250 { BFD_RELOC_H8_DIR32A16, R_H8_DIR32A16_X },
81f5558e 251 { BFD_RELOC_H8_DISP32A16, R_H8_DISP32A16_X },
f2352488
JL
252 { BFD_RELOC_16_PCREL, R_H8_PCREL16_X },
253 { BFD_RELOC_8_PCREL, R_H8_PCREL8_X },
e01b0e69
JR
254};
255
0a83638b 256
e01b0e69 257static reloc_howto_type *
c6baf75e
RS
258elf32_h8_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
259 bfd_reloc_code_real_type code)
e01b0e69
JR
260{
261 unsigned int i;
262
263 for (i = 0; i < sizeof (h8_reloc_map) / sizeof (struct elf_reloc_map); i++)
264 {
265 if (h8_reloc_map[i].bfd_reloc_val == code)
266 return &h8_elf_howto_table[(int) h8_reloc_map[i].howto_index];
267 }
268 return NULL;
269}
270
157090f7
AM
271static reloc_howto_type *
272elf32_h8_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
273 const char *r_name)
274{
275 unsigned int i;
276
277 for (i = 0;
278 i < sizeof (h8_elf_howto_table) / sizeof (h8_elf_howto_table[0]);
279 i++)
280 if (h8_elf_howto_table[i].name != NULL
281 && strcasecmp (h8_elf_howto_table[i].name, r_name) == 0)
282 return &h8_elf_howto_table[i];
283
284 return NULL;
285}
286
f3185997 287static bfd_boolean
c6baf75e
RS
288elf32_h8_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *bfd_reloc,
289 Elf_Internal_Rela *elf_reloc)
e01b0e69
JR
290{
291 unsigned int r;
292 unsigned int i;
293
294 r = ELF32_R_TYPE (elf_reloc->r_info);
295 for (i = 0; i < sizeof (h8_elf_howto_table) / sizeof (reloc_howto_type); i++)
bc7eab72 296 if (h8_elf_howto_table[i].type == r)
e01b0e69
JR
297 {
298 bfd_reloc->howto = &h8_elf_howto_table[i];
f3185997 299 return TRUE;
e01b0e69 300 }
f3185997
NC
301 /* xgettext:c-format */
302 _bfd_error_handler (_("%pB: unsupported relocation type %#x"), abfd, r);
303 bfd_set_error (bfd_error_bad_value);
304 return FALSE;
e01b0e69
JR
305}
306
f3185997
NC
307static bfd_boolean
308elf32_h8_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED,
309 arelent *bfd_reloc ATTRIBUTE_UNUSED,
c6baf75e 310 Elf_Internal_Rela *elf_reloc ATTRIBUTE_UNUSED)
e01b0e69 311{
f3185997 312 return FALSE;
e01b0e69
JR
313}
314
a00c9dbc
JL
315/* Special handling for H8/300 relocs.
316 We only come here for pcrel stuff and return normally if not an -r link.
317 When doing -r, we can't do any arithmetic for the pcrel stuff, because
318 we support relaxing on the H8/300 series chips. */
319static bfd_reloc_status_type
c6baf75e
RS
320special (bfd *abfd ATTRIBUTE_UNUSED,
321 arelent *reloc_entry ATTRIBUTE_UNUSED,
322 asymbol *symbol ATTRIBUTE_UNUSED,
2c3fc389 323 void * data ATTRIBUTE_UNUSED,
c6baf75e
RS
324 asection *input_section ATTRIBUTE_UNUSED,
325 bfd *output_bfd,
326 char **error_message ATTRIBUTE_UNUSED)
a00c9dbc
JL
327{
328 if (output_bfd == (bfd *) NULL)
329 return bfd_reloc_continue;
330
331 /* Adjust the reloc address to that in the output section. */
332 reloc_entry->address += input_section->output_offset;
333 return bfd_reloc_ok;
334}
5e47149d
JL
335
336/* Perform a relocation as part of a final link. */
337static bfd_reloc_status_type
c6baf75e
RS
338elf32_h8_final_link_relocate (unsigned long r_type, bfd *input_bfd,
339 bfd *output_bfd ATTRIBUTE_UNUSED,
340 asection *input_section ATTRIBUTE_UNUSED,
341 bfd_byte *contents, bfd_vma offset,
342 bfd_vma value, bfd_vma addend,
343 struct bfd_link_info *info ATTRIBUTE_UNUSED,
344 asection *sym_sec ATTRIBUTE_UNUSED,
345 int is_local ATTRIBUTE_UNUSED)
5e47149d
JL
346{
347 bfd_byte *hit_data = contents + offset;
348
349 switch (r_type)
350 {
5e47149d
JL
351 case R_H8_NONE:
352 return bfd_reloc_ok;
353
354 case R_H8_DIR32:
355 case R_H8_DIR32A16:
81f5558e 356 case R_H8_DISP32A16:
a00c9dbc 357 case R_H8_DIR24A8:
5e47149d
JL
358 value += addend;
359 bfd_put_32 (input_bfd, value, hit_data);
360 return bfd_reloc_ok;
361
362 case R_H8_DIR16:
363 case R_H8_DIR16A8:
364 case R_H8_DIR16R8:
365 value += addend;
366 bfd_put_16 (input_bfd, value, hit_data);
367 return bfd_reloc_ok;
368
369 /* AKA R_RELBYTE */
370 case R_H8_DIR8:
371 value += addend;
372
5e47149d
JL
373 bfd_put_8 (input_bfd, value, hit_data);
374 return bfd_reloc_ok;
375
5e47149d
JL
376 case R_H8_DIR24R8:
377 value += addend;
378
a00c9dbc 379 /* HIT_DATA is the address for the first byte for the relocated
e804e836 380 value. Subtract 1 so that we can manipulate the data in 32-bit
a00c9dbc
JL
381 hunks. */
382 hit_data--;
383
384 /* Clear out the top byte in value. */
5e47149d 385 value &= 0xffffff;
a00c9dbc
JL
386
387 /* Retrieve the type byte for value from the section contents. */
5e47149d 388 value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000);
a00c9dbc 389
e804e836 390 /* Now scribble it out in one 32-bit hunk. */
5e47149d
JL
391 bfd_put_32 (input_bfd, value, hit_data);
392 return bfd_reloc_ok;
393
f2352488
JL
394 case R_H8_PCREL16:
395 value -= (input_section->output_section->vma
396 + input_section->output_offset);
397 value -= offset;
398 value += addend;
399
a00c9dbc
JL
400 /* The value is relative to the start of the instruction,
401 not the relocation offset. Subtract 2 to account for
402 this minor issue. */
403 value -= 2;
404
f2352488
JL
405 bfd_put_16 (input_bfd, value, hit_data);
406 return bfd_reloc_ok;
407
408 case R_H8_PCREL8:
409 value -= (input_section->output_section->vma
410 + input_section->output_offset);
411 value -= offset;
412 value += addend;
413
a00c9dbc
JL
414 /* The value is relative to the start of the instruction,
415 not the relocation offset. Subtract 1 to account for
416 this minor issue. */
417 value -= 1;
418
f2352488
JL
419 bfd_put_8 (input_bfd, value, hit_data);
420 return bfd_reloc_ok;
421
5e47149d
JL
422 default:
423 return bfd_reloc_notsupported;
424 }
425}
426\f
427/* Relocate an H8 ELF section. */
b34976b6 428static bfd_boolean
c6baf75e
RS
429elf32_h8_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
430 bfd *input_bfd, asection *input_section,
431 bfd_byte *contents, Elf_Internal_Rela *relocs,
432 Elf_Internal_Sym *local_syms,
433 asection **local_sections)
5e47149d
JL
434{
435 Elf_Internal_Shdr *symtab_hdr;
436 struct elf_link_hash_entry **sym_hashes;
437 Elf_Internal_Rela *rel, *relend;
438
439 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
440 sym_hashes = elf_sym_hashes (input_bfd);
441
442 rel = relocs;
443 relend = relocs + input_section->reloc_count;
444 for (; rel < relend; rel++)
445 {
dc810e39 446 unsigned int r_type;
5e47149d
JL
447 unsigned long r_symndx;
448 Elf_Internal_Sym *sym;
449 asection *sec;
450 struct elf_link_hash_entry *h;
451 bfd_vma relocation;
452 bfd_reloc_status_type r;
ab96bf03
AM
453 arelent bfd_reloc;
454 reloc_howto_type *howto;
455
f3185997
NC
456 if (! elf32_h8_info_to_howto (input_bfd, &bfd_reloc, rel))
457 continue;
ab96bf03 458 howto = bfd_reloc.howto;
5e47149d
JL
459
460 r_symndx = ELF32_R_SYM (rel->r_info);
461 r_type = ELF32_R_TYPE (rel->r_info);
5e47149d
JL
462 h = NULL;
463 sym = NULL;
464 sec = NULL;
465 if (r_symndx < symtab_hdr->sh_info)
466 {
467 sym = local_syms + r_symndx;
468 sec = local_sections[r_symndx];
8517fae7 469 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
5e47149d
JL
470 }
471 else
472 {
62d887d4 473 bfd_boolean unresolved_reloc, warned, ignored;
59c2e50f 474
b2a8e766
AM
475 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
476 r_symndx, symtab_hdr, sym_hashes,
477 h, sec, relocation,
62d887d4 478 unresolved_reloc, warned, ignored);
5e47149d
JL
479 }
480
dbaa2011 481 if (sec != NULL && discarded_section (sec))
e4067dbb 482 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 483 rel, 1, relend, howto, 0, contents);
ab96bf03 484
0e1862bb 485 if (bfd_link_relocatable (info))
ab96bf03
AM
486 continue;
487
5e47149d
JL
488 r = elf32_h8_final_link_relocate (r_type, input_bfd, output_bfd,
489 input_section,
490 contents, rel->r_offset,
491 relocation, rel->r_addend,
492 info, sec, h == NULL);
493
494 if (r != bfd_reloc_ok)
495 {
496 const char *name;
497 const char *msg = (const char *) 0;
dc810e39 498
5e47149d
JL
499 if (h != NULL)
500 name = h->root.root.string;
501 else
502 {
503 name = (bfd_elf_string_from_elf_section
504 (input_bfd, symtab_hdr->sh_link, sym->st_name));
505 if (name == NULL || *name == '\0')
fd361982 506 name = bfd_section_name (sec);
5e47149d
JL
507 }
508
509 switch (r)
510 {
511 case bfd_reloc_overflow:
1a72702b
AM
512 (*info->callbacks->reloc_overflow)
513 (info, (h ? &h->root : NULL), name, howto->name,
514 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
5e47149d
JL
515 break;
516
517 case bfd_reloc_undefined:
1a72702b
AM
518 (*info->callbacks->undefined_symbol)
519 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
5e47149d
JL
520 break;
521
522 case bfd_reloc_outofrange:
523 msg = _("internal error: out of range error");
524 goto common_error;
525
526 case bfd_reloc_notsupported:
527 msg = _("internal error: unsupported relocation error");
528 goto common_error;
529
530 case bfd_reloc_dangerous:
531 msg = _("internal error: dangerous error");
532 goto common_error;
533
534 default:
535 msg = _("internal error: unknown error");
536 /* fall through */
537
538 common_error:
1a72702b
AM
539 (*info->callbacks->warning) (info, msg, name, input_bfd,
540 input_section, rel->r_offset);
5e47149d
JL
541 break;
542 }
543 }
544 }
545
b34976b6 546 return TRUE;
5e47149d
JL
547}
548
0a83638b
JL
549/* Object files encode the specific H8 model they were compiled
550 for in the ELF flags field.
551
552 Examine that field and return the proper BFD machine type for
553 the object file. */
dc810e39 554static unsigned long
c6baf75e 555elf32_h8_mach (flagword flags)
0a83638b
JL
556{
557 switch (flags & EF_H8_MACH)
558 {
559 case E_H8_MACH_H8300:
560 default:
561 return bfd_mach_h8300;
562
563 case E_H8_MACH_H8300H:
564 return bfd_mach_h8300h;
565
566 case E_H8_MACH_H8300S:
567 return bfd_mach_h8300s;
8d9cd6b1
NC
568
569 case E_H8_MACH_H8300HN:
570 return bfd_mach_h8300hn;
571
572 case E_H8_MACH_H8300SN:
573 return bfd_mach_h8300sn;
5d1db417
MS
574
575 case E_H8_MACH_H8300SX:
576 return bfd_mach_h8300sx;
f4984206
RS
577
578 case E_H8_MACH_H8300SXN:
579 return bfd_mach_h8300sxn;
0a83638b
JL
580 }
581}
582
583/* The final processing done just before writing out a H8 ELF object
584 file. We use this opportunity to encode the BFD machine type
585 into the flags field in the object file. */
586
cc364be6
AM
587static bfd_boolean
588elf32_h8_final_write_processing (bfd *abfd)
0a83638b
JL
589{
590 unsigned long val;
591
592 switch (bfd_get_mach (abfd))
593 {
594 default:
595 case bfd_mach_h8300:
596 val = E_H8_MACH_H8300;
597 break;
598
599 case bfd_mach_h8300h:
600 val = E_H8_MACH_H8300H;
601 break;
602
603 case bfd_mach_h8300s:
604 val = E_H8_MACH_H8300S;
605 break;
8d9cd6b1
NC
606
607 case bfd_mach_h8300hn:
608 val = E_H8_MACH_H8300HN;
609 break;
610
611 case bfd_mach_h8300sn:
612 val = E_H8_MACH_H8300SN;
613 break;
5d1db417
MS
614
615 case bfd_mach_h8300sx:
616 val = E_H8_MACH_H8300SX;
617 break;
f4984206
RS
618
619 case bfd_mach_h8300sxn:
620 val = E_H8_MACH_H8300SXN;
621 break;
0a83638b
JL
622 }
623
624 elf_elfheader (abfd)->e_flags &= ~ (EF_H8_MACH);
625 elf_elfheader (abfd)->e_flags |= val;
cc364be6 626 return _bfd_elf_final_write_processing (abfd);
0a83638b
JL
627}
628
629/* Return nonzero if ABFD represents a valid H8 ELF object file; also
630 record the encoded machine type found in the ELF flags. */
631
b34976b6 632static bfd_boolean
c6baf75e 633elf32_h8_object_p (bfd *abfd)
0a83638b
JL
634{
635 bfd_default_set_arch_mach (abfd, bfd_arch_h8300,
636 elf32_h8_mach (elf_elfheader (abfd)->e_flags));
b34976b6 637 return TRUE;
0a83638b
JL
638}
639
640/* Merge backend specific data from an object file to the output
641 object file when linking. The only data we need to copy at this
642 time is the architecture/machine information. */
643
b34976b6 644static bfd_boolean
50e03d47 645elf32_h8_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
0a83638b 646{
50e03d47
AM
647 bfd *obfd = info->output_bfd;
648
0a83638b
JL
649 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
650 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
b34976b6 651 return TRUE;
0a83638b
JL
652
653 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
654 && bfd_get_mach (obfd) < bfd_get_mach (ibfd))
655 {
656 if (! bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
96ef1419
KH
657 bfd_get_mach (ibfd)))
658 return FALSE;
0a83638b
JL
659 }
660
b34976b6 661 return TRUE;
0a83638b
JL
662}
663
5907e628
JL
664/* This function handles relaxing for the H8..
665
4cc11e76 666 There are a few relaxing opportunities available on the H8:
5907e628 667
07d6d2b8 668 jmp/jsr:24 -> bra/bsr:8 2 bytes
5907e628
JL
669 The jmp may be completely eliminated if the previous insn is a
670 conditional branch to the insn after the jump. In that case
671 we invert the branch and delete the jump and save 4 bytes.
672
07d6d2b8
AM
673 bCC:16 -> bCC:8 2 bytes
674 bsr:16 -> bsr:8 2 bytes
5907e628 675
07d6d2b8
AM
676 bset:16 -> bset:8 2 bytes
677 bset:24/32 -> bset:8 4 bytes
630a7b0a
KH
678 (also applicable to other bit manipulation instructions)
679
07d6d2b8
AM
680 mov.b:16 -> mov.b:8 2 bytes
681 mov.b:24/32 -> mov.b:8 4 bytes
5907e628 682
07d6d2b8 683 bset:24/32 -> bset:16 2 bytes
7e89635a
KH
684 (also applicable to other bit manipulation instructions)
685
07d6d2b8 686 mov.[bwl]:24/32 -> mov.[bwl]:16 2 bytes
81f5558e 687
07d6d2b8 688 mov.[bwl] @(displ:24/32+ERx) -> mov.[bwl] @(displ:16+ERx) 4 bytes. */
5907e628 689
b34976b6 690static bfd_boolean
c6baf75e
RS
691elf32_h8_relax_section (bfd *abfd, asection *sec,
692 struct bfd_link_info *link_info, bfd_boolean *again)
5907e628
JL
693{
694 Elf_Internal_Shdr *symtab_hdr;
695 Elf_Internal_Rela *internal_relocs;
5907e628
JL
696 Elf_Internal_Rela *irel, *irelend;
697 bfd_byte *contents = NULL;
6cdc0ccc 698 Elf_Internal_Sym *isymbuf = NULL;
5907e628
JL
699 static asection *last_input_section = NULL;
700 static Elf_Internal_Rela *last_reloc = NULL;
701
702 /* Assume nothing changes. */
b34976b6 703 *again = FALSE;
5907e628 704
1049f94e 705 /* We don't have to do anything for a relocatable link, if
5907e628
JL
706 this section does not have relocs, or if this is not a
707 code section. */
0e1862bb 708 if (bfd_link_relocatable (link_info)
5907e628
JL
709 || (sec->flags & SEC_RELOC) == 0
710 || sec->reloc_count == 0
711 || (sec->flags & SEC_CODE) == 0)
b34976b6 712 return TRUE;
5907e628 713
5907e628
JL
714 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
715
716 /* Get a copy of the native relocations. */
45d6a902 717 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 718 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
5907e628
JL
719 link_info->keep_memory));
720 if (internal_relocs == NULL)
721 goto error_return;
5907e628
JL
722
723 if (sec != last_input_section)
724 last_reloc = NULL;
725
726 last_input_section = sec;
727
728 /* Walk through the relocs looking for relaxing opportunities. */
729 irelend = internal_relocs + sec->reloc_count;
730 for (irel = internal_relocs; irel < irelend; irel++)
731 {
732 bfd_vma symval;
733
bcb012d3
DD
734 {
735 arelent bfd_reloc;
bcb012d3 736
f3185997
NC
737 if (! elf32_h8_info_to_howto (abfd, &bfd_reloc, irel))
738 continue;
bcb012d3 739 }
5907e628
JL
740 /* Keep track of the previous reloc so that we can delete
741 some long jumps created by the compiler. */
742 if (irel != internal_relocs)
743 last_reloc = irel - 1;
1b786873 744
81f5558e
NC
745 switch(ELF32_R_TYPE (irel->r_info))
746 {
747 case R_H8_DIR24R8:
748 case R_H8_PCREL16:
749 case R_H8_DIR16A8:
750 case R_H8_DIR24A8:
751 case R_H8_DIR32A16:
752 case R_H8_DISP32A16:
753 break;
754 default:
755 continue;
756 }
76f99c63 757
5907e628
JL
758 /* Get the section contents if we haven't done so already. */
759 if (contents == NULL)
760 {
761 /* Get cached copy if it exists. */
762 if (elf_section_data (sec)->this_hdr.contents != NULL)
763 contents = elf_section_data (sec)->this_hdr.contents;
764 else
765 {
766 /* Go get them off disk. */
eea6121a 767 if (!bfd_malloc_and_get_section (abfd, sec, &contents))
5907e628
JL
768 goto error_return;
769 }
770 }
771
9ad5cbcf 772 /* Read this BFD's local symbols if we haven't done so already. */
6cdc0ccc 773 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
5907e628 774 {
6cdc0ccc
AM
775 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
776 if (isymbuf == NULL)
777 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
778 symtab_hdr->sh_info, 0,
779 NULL, NULL, NULL);
780 if (isymbuf == NULL)
781 goto error_return;
5907e628
JL
782 }
783
784 /* Get the value of the symbol referred to by the reloc. */
785 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
786 {
5907e628 787 /* A local symbol. */
6cdc0ccc
AM
788 Elf_Internal_Sym *isym;
789 asection *sym_sec;
5907e628 790
32ac2c9a 791 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6cdc0ccc 792 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
03d14457
NC
793 symval = isym->st_value;
794 /* If the reloc is absolute, it will not have
795 a symbol or section associated with it. */
796 if (sym_sec)
797 symval += sym_sec->output_section->vma
798 + sym_sec->output_offset;
5907e628
JL
799 }
800 else
801 {
802 unsigned long indx;
803 struct elf_link_hash_entry *h;
804
805 /* An external symbol. */
806 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
807 h = elf_sym_hashes (abfd)[indx];
808 BFD_ASSERT (h != NULL);
809 if (h->root.type != bfd_link_hash_defined
810 && h->root.type != bfd_link_hash_defweak)
811 {
812 /* This appears to be a reference to an undefined
07d6d2b8
AM
813 symbol. Just ignore it--it will be caught by the
814 regular reloc processing. */
5907e628
JL
815 continue;
816 }
817
818 symval = (h->root.u.def.value
819 + h->root.u.def.section->output_section->vma
820 + h->root.u.def.section->output_offset);
821 }
822
823 /* For simplicity of coding, we are going to modify the section
824 contents, the section relocs, and the BFD symbol table. We
825 must tell the rest of the code not to free up this
826 information. It would be possible to instead create a table
827 of changes which have to be made, as is done in coff-mips.c;
828 that would be more work, but would require less memory when
829 the linker is run. */
830 switch (ELF32_R_TYPE (irel->r_info))
831 {
81f5558e
NC
832 /* Try to turn a 24-bit absolute branch/call into an 8-bit
833 pc-relative branch/call. */
5907e628
JL
834 case R_H8_DIR24R8:
835 {
836 bfd_vma value = symval + irel->r_addend;
837 bfd_vma dot, gap;
838
839 /* Get the address of this instruction. */
840 dot = (sec->output_section->vma
841 + sec->output_offset + irel->r_offset - 1);
842
843 /* Compute the distance from this insn to the branch target. */
844 gap = value - dot;
845
846 /* If the distance is within -126..+130 inclusive, then we can
847 relax this jump. +130 is valid since the target will move
848 two bytes closer if we do relax this branch. */
dc810e39 849 if ((int) gap >= -126 && (int) gap <= 130)
5907e628
JL
850 {
851 unsigned char code;
852
853 /* Note that we've changed the relocs, section contents,
854 etc. */
855 elf_section_data (sec)->relocs = internal_relocs;
5907e628 856 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 857 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 858
e514ac71
NC
859 /* Get the instruction code being relaxed. */
860 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
861
5907e628
JL
862 /* If the previous instruction conditionally jumped around
863 this instruction, we may be able to reverse the condition
864 and redirect the previous instruction to the target of
865 this instruction.
866
867 Such sequences are used by the compiler to deal with
e514ac71
NC
868 long conditional branches.
869
870 Only perform this optimisation for jumps (code 0x5a) not
871 subroutine calls, as otherwise it could transform:
b34976b6 872
81f5558e
NC
873 mov.w r0,r0
874 beq .L1
875 jsr @_bar
876 .L1: rts
877 _bar: rts
e514ac71 878 into:
81f5558e
NC
879 mov.w r0,r0
880 bne _bar
881 rts
882 _bar: rts
e514ac71
NC
883
884 which changes the call (jsr) into a branch (bne). */
81f5558e 885 if (code == 0x5a /* jmp24. */
e514ac71 886 && (int) gap <= 130
dc810e39 887 && (int) gap >= -128
5907e628
JL
888 && last_reloc
889 && ELF32_R_TYPE (last_reloc->r_info) == R_H8_PCREL8
890 && ELF32_R_SYM (last_reloc->r_info) < symtab_hdr->sh_info)
891 {
892 bfd_vma last_value;
893 asection *last_sym_sec;
6cdc0ccc 894 Elf_Internal_Sym *last_sym;
5907e628
JL
895
896 /* We will need to examine the symbol used by the
897 previous relocation. */
dc810e39 898
6cdc0ccc 899 last_sym = isymbuf + ELF32_R_SYM (last_reloc->r_info);
5907e628 900 last_sym_sec
6cdc0ccc
AM
901 = bfd_section_from_elf_index (abfd, last_sym->st_shndx);
902 last_value = (last_sym->st_value
5907e628
JL
903 + last_sym_sec->output_section->vma
904 + last_sym_sec->output_offset);
905
906 /* Verify that the previous relocation was for a
907 branch around this instruction and that no symbol
908 exists at the current location. */
909 if (last_value == dot + 4
910 && last_reloc->r_offset + 2 == irel->r_offset
9ad5cbcf 911 && ! elf32_h8_symbol_address_p (abfd, sec, dot))
5907e628
JL
912 {
913 /* We can eliminate this jump. Twiddle the
914 previous relocation as necessary. */
915 irel->r_info
916 = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
917 ELF32_R_TYPE (R_H8_NONE));
918
bc7eab72 919 last_reloc->r_info
5907e628 920 = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
bc7eab72
KH
921 ELF32_R_TYPE (R_H8_PCREL8));
922 last_reloc->r_addend = irel->r_addend;
5907e628
JL
923
924 code = bfd_get_8 (abfd,
925 contents + last_reloc->r_offset - 1);
926 code ^= 1;
927 bfd_put_8 (abfd,
928 code,
81f5558e 929 contents + last_reloc->r_offset - 1);
5907e628
JL
930
931 /* Delete four bytes of data. */
932 if (!elf32_h8_relax_delete_bytes (abfd, sec,
933 irel->r_offset - 1,
934 4))
935 goto error_return;
936
b34976b6 937 *again = TRUE;
5907e628
JL
938 break;
939 }
940 }
941
5907e628 942 if (code == 0x5e)
81f5558e
NC
943 /* This is jsr24 */
944 bfd_put_8 (abfd, 0x55, contents + irel->r_offset - 1); /* bsr8. */
5907e628 945 else if (code == 0x5a)
81f5558e
NC
946 /* This is jmp24 */
947 bfd_put_8 (abfd, 0x40, contents + irel->r_offset - 1); /* bra8. */
5907e628
JL
948 else
949 abort ();
950
951 /* Fix the relocation's type. */
952 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
953 R_H8_PCREL8);
954
955 /* Delete two bytes of data. */
956 if (!elf32_h8_relax_delete_bytes (abfd, sec,
957 irel->r_offset + 1, 2))
958 goto error_return;
959
960 /* That will change things, so, we should relax again.
961 Note that this is not required, and it may be slow. */
b34976b6 962 *again = TRUE;
5907e628
JL
963 }
964 break;
965 }
966
81f5558e
NC
967 /* Try to turn a 16-bit pc-relative branch into a 8-bit pc-relative
968 branch. */
5907e628
JL
969 case R_H8_PCREL16:
970 {
971 bfd_vma value = symval + irel->r_addend;
972 bfd_vma dot;
973 bfd_vma gap;
974
975 /* Get the address of this instruction. */
976 dot = (sec->output_section->vma
977 + sec->output_offset
978 + irel->r_offset - 2);
dc810e39 979
5907e628
JL
980 gap = value - dot;
981
982 /* If the distance is within -126..+130 inclusive, then we can
983 relax this jump. +130 is valid since the target will move
984 two bytes closer if we do relax this branch. */
bc7eab72 985 if ((int) gap >= -126 && (int) gap <= 130)
5907e628 986 {
bc7eab72 987 unsigned char code;
5907e628 988
bc7eab72 989 /* Note that we've changed the relocs, section contents,
5907e628 990 etc. */
bc7eab72
KH
991 elf_section_data (sec)->relocs = internal_relocs;
992 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 993 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 994
bc7eab72
KH
995 /* Get the opcode. */
996 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
5907e628
JL
997
998 if (code == 0x58)
999 {
1000 /* bCC:16 -> bCC:8 */
7e89635a
KH
1001 /* Get the second byte of the original insn, which
1002 contains the condition code. */
5907e628 1003 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
7e89635a 1004
81f5558e 1005 /* Compute the first byte of the relaxed
7e89635a
KH
1006 instruction. The original sequence 0x58 0xX0
1007 is relaxed to 0x4X, where X represents the
1008 condition code. */
5907e628
JL
1009 code &= 0xf0;
1010 code >>= 4;
1011 code |= 0x40;
81f5558e 1012 bfd_put_8 (abfd, code, contents + irel->r_offset - 2); /* bCC:8. */
5907e628 1013 }
81f5558e 1014 else if (code == 0x5c) /* bsr16. */
7e89635a 1015 /* This is bsr. */
81f5558e 1016 bfd_put_8 (abfd, 0x55, contents + irel->r_offset - 2); /* bsr8. */
5907e628 1017 else
bcb012d3
DD
1018 /* Might be MOVSD. */
1019 break;
5907e628
JL
1020
1021 /* Fix the relocation's type. */
bc7eab72 1022 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
5907e628 1023 R_H8_PCREL8);
bc7eab72 1024 irel->r_offset--;
5907e628 1025
bc7eab72
KH
1026 /* Delete two bytes of data. */
1027 if (!elf32_h8_relax_delete_bytes (abfd, sec,
5907e628
JL
1028 irel->r_offset + 1, 2))
1029 goto error_return;
1030
bc7eab72 1031 /* That will change things, so, we should relax again.
5907e628 1032 Note that this is not required, and it may be slow. */
b34976b6 1033 *again = TRUE;
5907e628
JL
1034 }
1035 break;
1036 }
1037
81f5558e
NC
1038 /* This is a 16-bit absolute address in one of the following
1039 instructions:
630a7b0a
KH
1040
1041 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
1042 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
1043 "mov.b"
1044
81f5558e
NC
1045 We may relax this into an 8-bit absolute address if it's in
1046 the right range. */
5907e628
JL
1047 case R_H8_DIR16A8:
1048 {
7a9823f1 1049 bfd_vma value;
5907e628 1050
7a9823f1
RS
1051 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1052 if (value >= 0xffffff00u)
5907e628 1053 {
bc7eab72 1054 unsigned char code;
ca9a79a1 1055 unsigned char temp_code;
5907e628 1056
bc7eab72 1057 /* Note that we've changed the relocs, section contents,
5907e628 1058 etc. */
bc7eab72
KH
1059 elf_section_data (sec)->relocs = internal_relocs;
1060 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1061 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 1062
bc7eab72
KH
1063 /* Get the opcode. */
1064 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
5907e628 1065
630a7b0a
KH
1066 /* All instructions with R_H8_DIR16A8 start with
1067 0x6a. */
bc7eab72 1068 if (code != 0x6a)
5907e628
JL
1069 abort ();
1070
ca9a79a1 1071 temp_code = code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
630a7b0a
KH
1072 /* If this is a mov.b instruction, clear the lower
1073 nibble, which contains the source/destination
1074 register number. */
ca9a79a1
NC
1075 if ((temp_code & 0x10) != 0x10)
1076 temp_code &= 0xf0;
5907e628 1077
ca9a79a1
NC
1078 switch (temp_code)
1079 {
1080 case 0x00:
630a7b0a 1081 /* This is mov.b @aa:16,Rd. */
ca9a79a1
NC
1082 bfd_put_8 (abfd, (code & 0xf) | 0x20,
1083 contents + irel->r_offset - 2);
1084 break;
1085 case 0x80:
630a7b0a 1086 /* This is mov.b Rs,@aa:16. */
ca9a79a1
NC
1087 bfd_put_8 (abfd, (code & 0xf) | 0x30,
1088 contents + irel->r_offset - 2);
1089 break;
1090 case 0x18:
630a7b0a
KH
1091 /* This is a bit-maniputation instruction that
1092 stores one bit into memory, one of "bclr",
1093 "bist", "bnot", "bset", and "bst". */
ca9a79a1
NC
1094 bfd_put_8 (abfd, 0x7f, contents + irel->r_offset - 2);
1095 break;
1096 case 0x10:
630a7b0a
KH
1097 /* This is a bit-maniputation instruction that
1098 loads one bit from memory, one of "band",
1099 "biand", "bild", "bior", "bixor", "bld", "bor",
1100 "btst", and "bxor". */
ca9a79a1
NC
1101 bfd_put_8 (abfd, 0x7e, contents + irel->r_offset - 2);
1102 break;
1103 default:
1104 abort ();
1105 }
5907e628 1106
bc7eab72
KH
1107 /* Fix the relocation's type. */
1108 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
5907e628
JL
1109 R_H8_DIR8);
1110
8c17da6e
NC
1111 /* Move the relocation. */
1112 irel->r_offset--;
1113
bc7eab72
KH
1114 /* Delete two bytes of data. */
1115 if (!elf32_h8_relax_delete_bytes (abfd, sec,
5907e628
JL
1116 irel->r_offset + 1, 2))
1117 goto error_return;
1118
bc7eab72 1119 /* That will change things, so, we should relax again.
5907e628 1120 Note that this is not required, and it may be slow. */
b34976b6 1121 *again = TRUE;
5907e628
JL
1122 }
1123 break;
1124 }
1125
81f5558e
NC
1126 /* This is a 24-bit absolute address in one of the following
1127 instructions:
630a7b0a
KH
1128
1129 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
1130 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
1131 "mov.b"
1132
81f5558e
NC
1133 We may relax this into an 8-bit absolute address if it's in
1134 the right range. */
5907e628
JL
1135 case R_H8_DIR24A8:
1136 {
7a9823f1 1137 bfd_vma value;
5907e628 1138
7a9823f1
RS
1139 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1140 if (value >= 0xffffff00u)
5907e628 1141 {
bc7eab72 1142 unsigned char code;
ca9a79a1 1143 unsigned char temp_code;
5907e628 1144
bc7eab72 1145 /* Note that we've changed the relocs, section contents,
5907e628 1146 etc. */
bc7eab72
KH
1147 elf_section_data (sec)->relocs = internal_relocs;
1148 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1149 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 1150
bc7eab72
KH
1151 /* Get the opcode. */
1152 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
5907e628 1153
630a7b0a
KH
1154 /* All instructions with R_H8_DIR24A8 start with
1155 0x6a. */
bc7eab72 1156 if (code != 0x6a)
5907e628
JL
1157 abort ();
1158
ca9a79a1
NC
1159 temp_code = code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
1160
630a7b0a
KH
1161 /* If this is a mov.b instruction, clear the lower
1162 nibble, which contains the source/destination
1163 register number. */
ca9a79a1
NC
1164 if ((temp_code & 0x30) != 0x30)
1165 temp_code &= 0xf0;
5907e628 1166
ca9a79a1 1167 switch (temp_code)
03d14457 1168 {
7a9823f1 1169 case 0x20:
630a7b0a 1170 /* This is mov.b @aa:24/32,Rd. */
03d14457
NC
1171 bfd_put_8 (abfd, (code & 0xf) | 0x20,
1172 contents + irel->r_offset - 2);
1173 break;
7a9823f1 1174 case 0xa0:
630a7b0a 1175 /* This is mov.b Rs,@aa:24/32. */
03d14457
NC
1176 bfd_put_8 (abfd, (code & 0xf) | 0x30,
1177 contents + irel->r_offset - 2);
1178 break;
ca9a79a1 1179 case 0x38:
630a7b0a
KH
1180 /* This is a bit-maniputation instruction that
1181 stores one bit into memory, one of "bclr",
1182 "bist", "bnot", "bset", and "bst". */
ca9a79a1
NC
1183 bfd_put_8 (abfd, 0x7f, contents + irel->r_offset - 2);
1184 break;
1185 case 0x30:
630a7b0a
KH
1186 /* This is a bit-maniputation instruction that
1187 loads one bit from memory, one of "band",
1188 "biand", "bild", "bior", "bixor", "bld", "bor",
1189 "btst", and "bxor". */
ca9a79a1
NC
1190 bfd_put_8 (abfd, 0x7e, contents + irel->r_offset - 2);
1191 break;
03d14457 1192 default:
ca9a79a1 1193 abort();
03d14457
NC
1194 }
1195
bc7eab72
KH
1196 /* Fix the relocation's type. */
1197 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
5907e628 1198 R_H8_DIR8);
7a9823f1 1199 irel->r_offset--;
5907e628 1200
81f5558e 1201 /* Delete four bytes of data. */
7a9823f1
RS
1202 if (!elf32_h8_relax_delete_bytes (abfd, sec,
1203 irel->r_offset + 1, 4))
5907e628
JL
1204 goto error_return;
1205
bc7eab72 1206 /* That will change things, so, we should relax again.
5907e628 1207 Note that this is not required, and it may be slow. */
b34976b6 1208 *again = TRUE;
7a9823f1 1209 break;
5907e628
JL
1210 }
1211 }
1212
7e89635a
KH
1213 /* Fall through. */
1214
1215 /* This is a 24-/32-bit absolute address in one of the
1216 following instructions:
1217
81f5558e
NC
1218 "band", "bclr", "biand", "bild", "bior", "bist",
1219 "bixor", "bld", "bnot", "bor", "bset", "bst", "btst",
1220 "bxor", "ldc.w", "stc.w" and "mov.[bwl]"
5907e628 1221
7e89635a
KH
1222 We may relax this into an 16-bit absolute address if it's
1223 in the right range. */
5907e628
JL
1224 case R_H8_DIR32A16:
1225 {
7a9823f1 1226 bfd_vma value;
5907e628 1227
7a9823f1
RS
1228 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1229 if (value <= 0x7fff || value >= 0xffff8000u)
5907e628 1230 {
bc7eab72 1231 unsigned char code;
bcb012d3
DD
1232 unsigned char op0, op1, op2, op3;
1233 unsigned char *op_ptr;
5907e628 1234
bc7eab72 1235 /* Note that we've changed the relocs, section contents,
5907e628 1236 etc. */
bc7eab72
KH
1237 elf_section_data (sec)->relocs = internal_relocs;
1238 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1239 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 1240
bcb012d3
DD
1241 if (irel->r_offset >= 4)
1242 {
81f5558e 1243 /* Check for 4-byte MOVA relaxation (SH-specific). */
bcb012d3
DD
1244 int second_reloc = 0;
1245
1246 op_ptr = contents + irel->r_offset - 4;
1247
1248 if (last_reloc)
1249 {
1250 arelent bfd_reloc;
1251 reloc_howto_type *h;
1252 bfd_vma last_reloc_size;
1253
f3185997
NC
1254 if (! elf32_h8_info_to_howto (abfd, &bfd_reloc, last_reloc))
1255 break;
bcb012d3
DD
1256 h = bfd_reloc.howto;
1257 last_reloc_size = 1 << h->size;
1258 if (last_reloc->r_offset + last_reloc_size
1259 == irel->r_offset)
1260 {
1261 op_ptr -= last_reloc_size;
1262 second_reloc = 1;
1263 }
1264 }
81f5558e 1265
d79dcc73 1266 if (irel + 1 < irelend)
bcb012d3
DD
1267 {
1268 Elf_Internal_Rela *next_reloc = irel + 1;
1269 arelent bfd_reloc;
1270 reloc_howto_type *h;
1271 bfd_vma next_reloc_size;
1272
f3185997
NC
1273 if (! elf32_h8_info_to_howto (abfd, &bfd_reloc, next_reloc))
1274 break;
bcb012d3
DD
1275 h = bfd_reloc.howto;
1276 next_reloc_size = 1 << h->size;
1277 if (next_reloc->r_offset + next_reloc_size
1278 == irel->r_offset)
1279 {
1280 op_ptr -= next_reloc_size;
1281 second_reloc = 1;
1282 }
1283 }
1284
1285 op0 = bfd_get_8 (abfd, op_ptr + 0);
1286 op1 = bfd_get_8 (abfd, op_ptr + 1);
1287 op2 = bfd_get_8 (abfd, op_ptr + 2);
1288 op3 = bfd_get_8 (abfd, op_ptr + 3);
1289
1290 if (op0 == 0x01
1291 && (op1 & 0xdf) == 0x5f
1292 && (op2 & 0x40) == 0x40
1293 && (op3 & 0x80) == 0x80)
1294 {
1295 if ((op2 & 0x08) == 0)
1296 second_reloc = 1;
1297
1298 if (second_reloc)
1299 {
1300 op3 &= ~0x08;
1301 bfd_put_8 (abfd, op3, op_ptr + 3);
1302 }
1303 else
1304 {
1305 op2 &= ~0x08;
1306 bfd_put_8 (abfd, op2, op_ptr + 2);
1307 }
1308 goto r_h8_dir32a16_common;
1309 }
1310 }
1311
81f5558e 1312 /* Now check for short version of MOVA. (SH-specific) */
bcb012d3
DD
1313 op_ptr = contents + irel->r_offset - 2;
1314 op0 = bfd_get_8 (abfd, op_ptr + 0);
1315 op1 = bfd_get_8 (abfd, op_ptr + 1);
1316
1317 if (op0 == 0x7a
1318 && (op1 & 0x88) == 0x80)
1319 {
1320 op1 |= 0x08;
1321 bfd_put_8 (abfd, op1, op_ptr + 1);
1322 goto r_h8_dir32a16_common;
1323 }
1324
bc7eab72
KH
1325 /* Get the opcode. */
1326 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
5907e628 1327
7e89635a
KH
1328 /* Fix the opcode. For all the instructions that
1329 belong to this relaxation, we simply need to turn
1330 off bit 0x20 in the previous byte. */
bc7eab72 1331 code &= ~0x20;
5907e628 1332
bc7eab72 1333 bfd_put_8 (abfd, code, contents + irel->r_offset - 1);
5907e628 1334
bcb012d3 1335 r_h8_dir32a16_common:
bc7eab72
KH
1336 /* Fix the relocation's type. */
1337 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8c17da6e 1338 R_H8_DIR16);
5907e628 1339
bc7eab72
KH
1340 /* Delete two bytes of data. */
1341 if (!elf32_h8_relax_delete_bytes (abfd, sec,
5907e628
JL
1342 irel->r_offset + 1, 2))
1343 goto error_return;
1344
bc7eab72 1345 /* That will change things, so, we should relax again.
5907e628 1346 Note that this is not required, and it may be slow. */
b34976b6 1347 *again = TRUE;
5907e628 1348 }
81f5558e 1349 break; /* case R_H8_DIR32A16 */
5907e628
JL
1350 }
1351
81f5558e
NC
1352 case R_H8_DISP32A16:
1353 /* mov.[bwl] @(displ:24/32+ERx) -> mov.[bwl] @(displ:16+ERx) 4 bytes
1354 It is assured that instruction uses at least 4 bytes opcode before
1355 reloc entry addressing mode "register indirect with displacement"
1356 relaxing options (all saving 4 bytes):
1357 0x78 0sss0000 0x6A 0010dddd disp:32 mov.b @(d:32,ERs),Rd ->
1358 0x6E 0sssdddd disp:16 mov.b @(d:16,ERs),Rd
1359 0x78 0sss0000 0x6B 0010dddd disp:32 mov.w @(d:32,ERs),Rd ->
1360 0x6F 0sssdddd disp:16 mov.w @(d:16,ERs),Rd
1361 0x01 0x00 0x78 0sss0000 0x6B 00100ddd disp:32 mov.l @(d:32,ERs),ERd ->
1362 0x01 0x00 0x6F 0sss0ddd disp:16 mov.l @(d:16,ERs),ERd
1363
1364 0x78 0ddd0000 0x6A 1010ssss disp:32 mov.b Rs,@(d:32,ERd) ->
1365 0x6E 1dddssss disp:16 mov.b Rs,@(d:16,ERd)
1366 0x78 0ddd0000 0x6B 1010ssss disp:32 mov.w Rs,@(d:32,ERd) ->
1367 0x6F 1dddssss disp:16 mov.w Rs,@(d:16,ERd)
1368 0x01 0x00 0x78 xddd0000 0x6B 10100sss disp:32 mov.l ERs,@(d:32,ERd) ->
1369 0x01 0x00 0x6F 1ddd0sss disp:16 mov.l ERs,@(d:16,ERd)
1370 mov.l prefix 0x01 0x00 can be left as is and mov.l handled same
1371 as mov.w/ */
1372 {
1373 bfd_vma value;
1374
1375 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1376 if (value <= 0x7fff || value >= 0xffff8000u)
1377 {
1378 unsigned char op0, op1, op2, op3, op0n, op1n;
1379 int relax = 0;
1380
1381 /* Note that we've changed the relocs, section contents,
1382 etc. */
1383 elf_section_data (sec)->relocs = internal_relocs;
1384 elf_section_data (sec)->this_hdr.contents = contents;
1385 symtab_hdr->contents = (unsigned char *) isymbuf;
1386
1387 if (irel->r_offset >= 4)
1388 {
1389 op0 = bfd_get_8 (abfd, contents + irel->r_offset - 4);
1390 op1 = bfd_get_8 (abfd, contents + irel->r_offset - 3);
1391 op2 = bfd_get_8 (abfd, contents + irel->r_offset - 2);
1392 op3 = bfd_get_8 (abfd, contents + irel->r_offset - 1);
1393
1394 if (op0 == 0x78)
1395 {
1396 switch(op2)
1397 {
1398 case 0x6A:
1399 if ((op1 & 0x8F) == 0x00 && (op3 & 0x70) == 0x20)
1400 {
1401 /* mov.b. */
1402 op0n = 0x6E;
1403 relax = 1;
1404 }
1405 break;
1406 case 0x6B:
1407 if ((op1 & 0x0F) == 0x00 && (op3 & 0x70) == 0x20)
1408 {
1409 /* mov.w/l. */
1410 op0n = 0x6F;
1411 relax = 1;
1412 }
1413 break;
1414 default:
1415 break;
1416 }
1417 }
1418 }
1419
1420 if (relax)
1421 {
1422 op1n = (op3 & 0x8F) | (op1 & 0x70);
1423 bfd_put_8 (abfd, op0n, contents + irel->r_offset - 4);
1424 bfd_put_8 (abfd, op1n, contents + irel->r_offset - 3);
1425
1426 /* Fix the relocation's type. */
1427 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_H8_DIR16);
1428 irel->r_offset -= 2;
1429
1430 /* Delete four bytes of data. */
1431 if (!elf32_h8_relax_delete_bytes (abfd, sec, irel->r_offset + 2, 4))
1432 goto error_return;
1433
1434 /* That will change things, so, we should relax again.
1435 Note that this is not required, and it may be slow. */
1436 *again = TRUE;
1437 }
1438 }
1439 }
1440 break;
1441
5907e628
JL
1442 default:
1443 break;
1444 }
1445 }
1446
6cdc0ccc
AM
1447 if (isymbuf != NULL
1448 && symtab_hdr->contents != (unsigned char *) isymbuf)
5907e628 1449 {
6cdc0ccc
AM
1450 if (! link_info->keep_memory)
1451 free (isymbuf);
1452 else
1453 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628
JL
1454 }
1455
6cdc0ccc
AM
1456 if (contents != NULL
1457 && elf_section_data (sec)->this_hdr.contents != contents)
5907e628
JL
1458 {
1459 if (! link_info->keep_memory)
6cdc0ccc 1460 free (contents);
5907e628
JL
1461 else
1462 {
1463 /* Cache the section contents for elf_link_input_bfd. */
1464 elf_section_data (sec)->this_hdr.contents = contents;
1465 }
9ad5cbcf
AM
1466 }
1467
6cdc0ccc
AM
1468 if (internal_relocs != NULL
1469 && elf_section_data (sec)->relocs != internal_relocs)
1470 free (internal_relocs);
5907e628 1471
b34976b6 1472 return TRUE;
5907e628
JL
1473
1474 error_return:
6cdc0ccc
AM
1475 if (isymbuf != NULL
1476 && symtab_hdr->contents != (unsigned char *) isymbuf)
1477 free (isymbuf);
1478 if (contents != NULL
1479 && elf_section_data (sec)->this_hdr.contents != contents)
1480 free (contents);
1481 if (internal_relocs != NULL
1482 && elf_section_data (sec)->relocs != internal_relocs)
1483 free (internal_relocs);
b34976b6 1484 return FALSE;
5907e628
JL
1485}
1486
1487/* Delete some bytes from a section while relaxing. */
1488
b34976b6 1489static bfd_boolean
c6baf75e 1490elf32_h8_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count)
5907e628
JL
1491{
1492 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1493 unsigned int sec_shndx;
5907e628
JL
1494 bfd_byte *contents;
1495 Elf_Internal_Rela *irel, *irelend;
6cdc0ccc
AM
1496 Elf_Internal_Sym *isym;
1497 Elf_Internal_Sym *isymend;
5907e628 1498 bfd_vma toaddr;
9ad5cbcf
AM
1499 struct elf_link_hash_entry **sym_hashes;
1500 struct elf_link_hash_entry **end_hashes;
1501 unsigned int symcount;
5907e628 1502
9ad5cbcf 1503 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
5907e628
JL
1504
1505 contents = elf_section_data (sec)->this_hdr.contents;
1506
eea6121a 1507 toaddr = sec->size;
5907e628
JL
1508
1509 irel = elf_section_data (sec)->relocs;
1510 irelend = irel + sec->reloc_count;
1511
1512 /* Actually delete the bytes. */
dc810e39
AM
1513 memmove (contents + addr, contents + addr + count,
1514 (size_t) (toaddr - addr - count));
eea6121a 1515 sec->size -= count;
5907e628
JL
1516
1517 /* Adjust all the relocs. */
1518 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1519 {
1520 /* Get the new reloc address. */
1521 if ((irel->r_offset > addr
5c0df484 1522 && irel->r_offset <= toaddr))
5907e628
JL
1523 irel->r_offset -= count;
1524 }
1525
1526 /* Adjust the local symbols defined in this section. */
6cdc0ccc
AM
1527 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1528 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1529 isymend = isym + symtab_hdr->sh_info;
1530 for (; isym < isymend; isym++)
5907e628 1531 {
6cdc0ccc
AM
1532 if (isym->st_shndx == sec_shndx
1533 && isym->st_value > addr
5c0df484 1534 && isym->st_value <= toaddr)
6cdc0ccc 1535 isym->st_value -= count;
5907e628
JL
1536 }
1537
1538 /* Now adjust the global symbols defined in this section. */
9ad5cbcf
AM
1539 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1540 - symtab_hdr->sh_info);
1541 sym_hashes = elf_sym_hashes (abfd);
1542 end_hashes = sym_hashes + symcount;
1543 for (; sym_hashes < end_hashes; sym_hashes++)
5907e628 1544 {
9ad5cbcf 1545 struct elf_link_hash_entry *sym_hash = *sym_hashes;
5c0df484 1546
9ad5cbcf
AM
1547 if ((sym_hash->root.type == bfd_link_hash_defined
1548 || sym_hash->root.type == bfd_link_hash_defweak)
1549 && sym_hash->root.u.def.section == sec
1550 && sym_hash->root.u.def.value > addr
5c0df484
NC
1551 && sym_hash->root.u.def.value <= toaddr)
1552 sym_hash->root.u.def.value -= count;
5907e628
JL
1553 }
1554
b34976b6 1555 return TRUE;
5907e628
JL
1556}
1557
b34976b6
AM
1558/* Return TRUE if a symbol exists at the given address, else return
1559 FALSE. */
1560static bfd_boolean
c6baf75e 1561elf32_h8_symbol_address_p (bfd *abfd, asection *sec, bfd_vma addr)
5907e628
JL
1562{
1563 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1564 unsigned int sec_shndx;
6cdc0ccc
AM
1565 Elf_Internal_Sym *isym;
1566 Elf_Internal_Sym *isymend;
9ad5cbcf
AM
1567 struct elf_link_hash_entry **sym_hashes;
1568 struct elf_link_hash_entry **end_hashes;
1569 unsigned int symcount;
5907e628 1570
9ad5cbcf 1571 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
5907e628
JL
1572
1573 /* Examine all the symbols. */
9ad5cbcf 1574 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6cdc0ccc
AM
1575 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1576 isymend = isym + symtab_hdr->sh_info;
1577 for (; isym < isymend; isym++)
5907e628 1578 {
6cdc0ccc
AM
1579 if (isym->st_shndx == sec_shndx
1580 && isym->st_value == addr)
b34976b6 1581 return TRUE;
5907e628
JL
1582 }
1583
9ad5cbcf
AM
1584 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1585 - symtab_hdr->sh_info);
1586 sym_hashes = elf_sym_hashes (abfd);
1587 end_hashes = sym_hashes + symcount;
1588 for (; sym_hashes < end_hashes; sym_hashes++)
5907e628 1589 {
9ad5cbcf
AM
1590 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1591 if ((sym_hash->root.type == bfd_link_hash_defined
1592 || sym_hash->root.type == bfd_link_hash_defweak)
1593 && sym_hash->root.u.def.section == sec
1594 && sym_hash->root.u.def.value == addr)
b34976b6 1595 return TRUE;
5907e628 1596 }
9ad5cbcf 1597
b34976b6 1598 return FALSE;
5907e628
JL
1599}
1600
1601/* This is a version of bfd_generic_get_relocated_section_contents
1602 which uses elf32_h8_relocate_section. */
1603
1604static bfd_byte *
c6baf75e
RS
1605elf32_h8_get_relocated_section_contents (bfd *output_bfd,
1606 struct bfd_link_info *link_info,
1607 struct bfd_link_order *link_order,
1608 bfd_byte *data,
1609 bfd_boolean relocatable,
1610 asymbol **symbols)
5907e628
JL
1611{
1612 Elf_Internal_Shdr *symtab_hdr;
1613 asection *input_section = link_order->u.indirect.section;
1614 bfd *input_bfd = input_section->owner;
1615 asection **sections = NULL;
1616 Elf_Internal_Rela *internal_relocs = NULL;
6cdc0ccc 1617 Elf_Internal_Sym *isymbuf = NULL;
5907e628
JL
1618
1619 /* We only need to handle the case of relaxing, or of having a
1620 particular set of section contents, specially. */
1049f94e 1621 if (relocatable
5907e628
JL
1622 || elf_section_data (input_section)->this_hdr.contents == NULL)
1623 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
1624 link_order, data,
1049f94e 1625 relocatable,
5907e628
JL
1626 symbols);
1627
1628 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1629
1630 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
eea6121a 1631 (size_t) input_section->size);
5907e628
JL
1632
1633 if ((input_section->flags & SEC_RELOC) != 0
1634 && input_section->reloc_count > 0)
1635 {
5907e628 1636 asection **secpp;
6cdc0ccc 1637 Elf_Internal_Sym *isym, *isymend;
9ad5cbcf 1638 bfd_size_type amt;
5907e628 1639
45d6a902 1640 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 1641 (input_bfd, input_section, NULL,
b34976b6 1642 (Elf_Internal_Rela *) NULL, FALSE));
5907e628
JL
1643 if (internal_relocs == NULL)
1644 goto error_return;
1645
6cdc0ccc
AM
1646 if (symtab_hdr->sh_info != 0)
1647 {
1648 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1649 if (isymbuf == NULL)
1650 isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
1651 symtab_hdr->sh_info, 0,
1652 NULL, NULL, NULL);
1653 if (isymbuf == NULL)
1654 goto error_return;
1655 }
5907e628 1656
9ad5cbcf
AM
1657 amt = symtab_hdr->sh_info;
1658 amt *= sizeof (asection *);
1659 sections = (asection **) bfd_malloc (amt);
1660 if (sections == NULL && amt != 0)
5907e628
JL
1661 goto error_return;
1662
6cdc0ccc
AM
1663 isymend = isymbuf + symtab_hdr->sh_info;
1664 for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
5907e628
JL
1665 {
1666 asection *isec;
1667
6cdc0ccc 1668 if (isym->st_shndx == SHN_UNDEF)
5907e628 1669 isec = bfd_und_section_ptr;
6cdc0ccc 1670 else if (isym->st_shndx == SHN_ABS)
5907e628 1671 isec = bfd_abs_section_ptr;
6cdc0ccc 1672 else if (isym->st_shndx == SHN_COMMON)
5907e628
JL
1673 isec = bfd_com_section_ptr;
1674 else
6cdc0ccc 1675 isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
5907e628
JL
1676
1677 *secpp = isec;
1678 }
1679
1680 if (! elf32_h8_relocate_section (output_bfd, link_info, input_bfd,
1681 input_section, data, internal_relocs,
6cdc0ccc 1682 isymbuf, sections))
5907e628
JL
1683 goto error_return;
1684
1685 if (sections != NULL)
1686 free (sections);
6cdc0ccc
AM
1687 if (isymbuf != NULL
1688 && symtab_hdr->contents != (unsigned char *) isymbuf)
1689 free (isymbuf);
1690 if (elf_section_data (input_section)->relocs != internal_relocs)
5907e628 1691 free (internal_relocs);
5907e628
JL
1692 }
1693
1694 return data;
1695
1696 error_return:
5907e628
JL
1697 if (sections != NULL)
1698 free (sections);
6cdc0ccc
AM
1699 if (isymbuf != NULL
1700 && symtab_hdr->contents != (unsigned char *) isymbuf)
1701 free (isymbuf);
1702 if (internal_relocs != NULL
1703 && elf_section_data (input_section)->relocs != internal_relocs)
1704 free (internal_relocs);
5907e628
JL
1705 return NULL;
1706}
1707
0a83638b 1708
6d00b590 1709#define TARGET_BIG_SYM h8300_elf32_vec
e01b0e69
JR
1710#define TARGET_BIG_NAME "elf32-h8300"
1711#define ELF_ARCH bfd_arch_h8300
1712#define ELF_MACHINE_CODE EM_H8_300
1713#define ELF_MAXPAGESIZE 0x1
1714#define bfd_elf32_bfd_reloc_type_lookup elf32_h8_reloc_type_lookup
157090f7 1715#define bfd_elf32_bfd_reloc_name_lookup elf32_h8_reloc_name_lookup
e01b0e69
JR
1716#define elf_info_to_howto elf32_h8_info_to_howto
1717#define elf_info_to_howto_rel elf32_h8_info_to_howto_rel
1718
0a83638b
JL
1719/* So we can set/examine bits in e_flags to get the specific
1720 H8 architecture in use. */
1721#define elf_backend_final_write_processing \
1722 elf32_h8_final_write_processing
1723#define elf_backend_object_p \
1724 elf32_h8_object_p
1725#define bfd_elf32_bfd_merge_private_bfd_data \
1726 elf32_h8_merge_private_bfd_data
1727
e01b0e69
JR
1728/* ??? when elf_backend_relocate_section is not defined, elf32-target.h
1729 defaults to using _bfd_generic_link_hash_table_create, but
c152c796 1730 bfd_elf_size_dynamic_sections uses
e01b0e69
JR
1731 dynobj = elf_hash_table (info)->dynobj;
1732 and thus requires an elf hash table. */
1733#define bfd_elf32_bfd_link_hash_table_create _bfd_elf_link_hash_table_create
1734
5e47149d
JL
1735/* Use an H8 specific linker, not the ELF generic linker. */
1736#define elf_backend_relocate_section elf32_h8_relocate_section
f0fe0e16 1737#define elf_backend_rela_normal 1
2627de83 1738#define elf_backend_can_gc_sections 1
5e47149d 1739
5907e628
JL
1740/* And relaxing stuff. */
1741#define bfd_elf32_bfd_relax_section elf32_h8_relax_section
1742#define bfd_elf32_bfd_get_relocated_section_contents \
07d6d2b8 1743 elf32_h8_get_relocated_section_contents
5907e628 1744
84477db9 1745#define elf_symbol_leading_char '_'
5907e628 1746
e01b0e69 1747#include "elf32-target.h"
5518c738
YS
1748
1749#undef TARGET_BIG_SYM
1750#define TARGET_BIG_SYM h8300_elf32_linux_vec
1751#undef TARGET_BIG_NAME
1752#define TARGET_BIG_NAME "elf32-h8300-linux"
1753#undef elf_symbol_leading_char
1754#define elf32_bed elf32_h8300_linux_bed
1755
1756#include "elf32-target.h"
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