gdb/tui: Fix 'layout asm' before the inferior has started
[deliverable/binutils-gdb.git] / bfd / elf32-v850.c
CommitLineData
252b5132 1/* V850-specific support for 32-bit ELF
b3adc24a 2 Copyright (C) 1996-2020 Free Software Foundation, Inc.
252b5132 3
86aba9db 4 This file is part of BFD, the Binary File Descriptor library.
252b5132 5
86aba9db
NC
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
cd123cb7 8 the Free Software Foundation; either version 3 of the License, or
86aba9db 9 (at your option) any later version.
252b5132 10
86aba9db
NC
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
252b5132 15
86aba9db
NC
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
47b0e7ad
NC
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
cd123cb7 21
252b5132 22/* XXX FIXME: This code is littered with 32bit int, 16bit short, 8bit char
86aba9db 23 dependencies. As is the gas & simulator code for the v850. */
252b5132 24
252b5132 25#include "sysdep.h"
3db64b00 26#include "bfd.h"
252b5132
RH
27#include "bfdlink.h"
28#include "libbfd.h"
29#include "elf-bfd.h"
30#include "elf/v850.h"
e12dd2ea 31#include "libiberty.h"
d48d68b6 32#include "elf32-v850.h"
252b5132 33
1cd986c5
NC
34/* Sign-extend a 17-bit number. */
35#define SEXT17(x) ((((x) & 0x1ffff) ^ 0x10000) - 0x10000)
36
37/* Sign-extend a 22-bit number. */
38#define SEXT22(x) ((((x) & 0x3fffff) ^ 0x200000) - 0x200000)
435b1e90 39
e460dd0d
AM
40static reloc_howto_type v850_elf_howto_table[];
41
252b5132
RH
42/* Look through the relocs for a section during the first phase, and
43 allocate space in the global offset table or procedure linkage
44 table. */
45
b34976b6 46static bfd_boolean
47b0e7ad
NC
47v850_elf_check_relocs (bfd *abfd,
48 struct bfd_link_info *info,
49 asection *sec,
50 const Elf_Internal_Rela *relocs)
252b5132 51{
b34976b6 52 bfd_boolean ret = TRUE;
252b5132
RH
53 Elf_Internal_Shdr *symtab_hdr;
54 struct elf_link_hash_entry **sym_hashes;
55 const Elf_Internal_Rela *rel;
56 const Elf_Internal_Rela *rel_end;
de863c74 57 unsigned int r_type;
252b5132 58 int other = 0;
47b0e7ad 59 const char *common = NULL;
252b5132 60
0e1862bb 61 if (bfd_link_relocatable (info))
b34976b6 62 return TRUE;
252b5132
RH
63
64#ifdef DEBUG
871b3ab2 65 _bfd_error_handler ("v850_elf_check_relocs called for section %pA in %pB",
d003868e 66 sec, abfd);
252b5132
RH
67#endif
68
252b5132
RH
69 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
70 sym_hashes = elf_sym_hashes (abfd);
252b5132
RH
71
72 rel_end = relocs + sec->reloc_count;
73 for (rel = relocs; rel < rel_end; rel++)
74 {
75 unsigned long r_symndx;
76 struct elf_link_hash_entry *h;
77
78 r_symndx = ELF32_R_SYM (rel->r_info);
79 if (r_symndx < symtab_hdr->sh_info)
80 h = NULL;
81 else
973a3492
L
82 {
83 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
84 while (h->root.type == bfd_link_hash_indirect
85 || h->root.type == bfd_link_hash_warning)
86 h = (struct elf_link_hash_entry *) h->root.u.i.link;
87 }
252b5132 88
de863c74 89 r_type = ELF32_R_TYPE (rel->r_info);
252b5132
RH
90 switch (r_type)
91 {
92 default:
252b5132
RH
93 break;
94
07d6d2b8
AM
95 /* This relocation describes the C++ object vtable hierarchy.
96 Reconstruct it for later use during GC. */
97 case R_V850_GNU_VTINHERIT:
98 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
99 return FALSE;
100 break;
101
102 /* This relocation describes which C++ vtable entries
e12dd2ea 103 are actually used. Record for later use during GC. */
07d6d2b8 104 case R_V850_GNU_VTENTRY:
a0ea3a14 105 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
07d6d2b8
AM
106 return FALSE;
107 break;
252b5132
RH
108
109 case R_V850_SDA_16_16_SPLIT_OFFSET:
110 case R_V850_SDA_16_16_OFFSET:
111 case R_V850_SDA_15_16_OFFSET:
de863c74
NC
112 case R_V810_GPWLO_1:
113 case R_V850_HWLO:
114 case R_V850_HWLO_1:
252b5132
RH
115 other = V850_OTHER_SDA;
116 common = ".scommon";
117 goto small_data_common;
435b1e90 118
252b5132
RH
119 case R_V850_ZDA_16_16_SPLIT_OFFSET:
120 case R_V850_ZDA_16_16_OFFSET:
121 case R_V850_ZDA_15_16_OFFSET:
122 other = V850_OTHER_ZDA;
123 common = ".zcommon";
124 goto small_data_common;
435b1e90 125
252b5132 126 case R_V850_TDA_4_4_OFFSET:
1cd986c5
NC
127 case R_V850_TDA_4_5_OFFSET:
128 case R_V850_TDA_7_7_OFFSET:
252b5132
RH
129 case R_V850_TDA_6_8_OFFSET:
130 case R_V850_TDA_7_8_OFFSET:
252b5132
RH
131 case R_V850_TDA_16_16_OFFSET:
132 other = V850_OTHER_TDA;
133 common = ".tcommon";
134 /* fall through */
135
136#define V850_OTHER_MASK (V850_OTHER_TDA | V850_OTHER_SDA | V850_OTHER_ZDA)
137
138 small_data_common:
139 if (h)
140 {
e12dd2ea
NC
141 /* Flag which type of relocation was used. */
142 h->other |= other;
252b5132
RH
143 if ((h->other & V850_OTHER_MASK) != (other & V850_OTHER_MASK)
144 && (h->other & V850_OTHER_ERROR) == 0)
145 {
146 const char * msg;
147 static char buff[200]; /* XXX */
148
149 switch (h->other & V850_OTHER_MASK)
150 {
151 default:
38f14ab8 152 msg = _("variable `%s' cannot occupy in multiple small data regions");
252b5132
RH
153 break;
154 case V850_OTHER_SDA | V850_OTHER_ZDA | V850_OTHER_TDA:
38f14ab8 155 msg = _("variable `%s' can only be in one of the small, zero, and tiny data regions");
252b5132
RH
156 break;
157 case V850_OTHER_SDA | V850_OTHER_ZDA:
38f14ab8 158 msg = _("variable `%s' cannot be in both small and zero data regions simultaneously");
252b5132
RH
159 break;
160 case V850_OTHER_SDA | V850_OTHER_TDA:
38f14ab8 161 msg = _("variable `%s' cannot be in both small and tiny data regions simultaneously");
252b5132
RH
162 break;
163 case V850_OTHER_ZDA | V850_OTHER_TDA:
38f14ab8 164 msg = _("variable `%s' cannot be in both zero and tiny data regions simultaneously");
252b5132
RH
165 break;
166 }
167
168 sprintf (buff, msg, h->root.root.string);
169 info->callbacks->warning (info, buff, h->root.root.string,
dc810e39
AM
170 abfd, h->root.u.def.section,
171 (bfd_vma) 0);
252b5132
RH
172
173 bfd_set_error (bfd_error_bad_value);
174 h->other |= V850_OTHER_ERROR;
b34976b6 175 ret = FALSE;
252b5132
RH
176 }
177 }
178
179 if (h && h->root.type == bfd_link_hash_common
180 && h->root.u.c.p
fd361982 181 && !strcmp (bfd_section_name (h->root.u.c.p->section), "COMMON"))
252b5132 182 {
e12dd2ea
NC
183 asection * section;
184
185 section = h->root.u.c.p->section = bfd_make_section_old_way (abfd, common);
252b5132
RH
186 section->flags |= SEC_IS_COMMON;
187 }
188
189#ifdef DEBUG
190 fprintf (stderr, "v850_elf_check_relocs, found %s relocation for %s%s\n",
191 v850_elf_howto_table[ (int)r_type ].name,
192 (h && h->root.root.string) ? h->root.root.string : "<unknown>",
193 (h->root.type == bfd_link_hash_common) ? ", symbol is common" : "");
194#endif
195 break;
196 }
197 }
198
199 return ret;
200}
201
e12dd2ea
NC
202/* In the old version, when an entry was checked out from the table,
203 it was deleted. This produced an error if the entry was needed
204 more than once, as the second attempted retry failed.
205
206 In the current version, the entry is not deleted, instead we set
b34976b6 207 the field 'found' to TRUE. If a second lookup matches the same
e12dd2ea
NC
208 entry, then we know that the hi16s reloc has already been updated
209 and does not need to be updated a second time.
210
211 TODO - TOFIX: If it is possible that we need to restore 2 different
212 addresses from the same table entry, where the first generates an
213 overflow, whilst the second do not, then this code will fail. */
252b5132
RH
214
215typedef struct hi16s_location
216{
07d6d2b8
AM
217 bfd_vma addend;
218 bfd_byte * address;
219 unsigned long counter;
220 bfd_boolean found;
47b0e7ad 221 struct hi16s_location * next;
252b5132
RH
222}
223hi16s_location;
224
47b0e7ad
NC
225static hi16s_location * previous_hi16s;
226static hi16s_location * free_hi16s;
227static unsigned long hi16s_counter;
252b5132
RH
228
229static void
47b0e7ad 230remember_hi16s_reloc (bfd *abfd, bfd_vma addend, bfd_byte *address)
252b5132
RH
231{
232 hi16s_location * entry = NULL;
dc810e39 233 bfd_size_type amt = sizeof (* free_hi16s);
435b1e90 234
252b5132
RH
235 /* Find a free structure. */
236 if (free_hi16s == NULL)
47b0e7ad 237 free_hi16s = bfd_zalloc (abfd, amt);
252b5132
RH
238
239 entry = free_hi16s;
240 free_hi16s = free_hi16s->next;
435b1e90 241
252b5132
RH
242 entry->addend = addend;
243 entry->address = address;
244 entry->counter = hi16s_counter ++;
b34976b6 245 entry->found = FALSE;
252b5132
RH
246 entry->next = previous_hi16s;
247 previous_hi16s = entry;
435b1e90 248
252b5132
RH
249 /* Cope with wrap around of our counter. */
250 if (hi16s_counter == 0)
251 {
47b0e7ad 252 /* XXX: Assume that all counter entries differ only in their low 16 bits. */
252b5132
RH
253 for (entry = previous_hi16s; entry != NULL; entry = entry->next)
254 entry->counter &= 0xffff;
255
256 hi16s_counter = 0x10000;
257 }
252b5132
RH
258}
259
260static bfd_byte *
47b0e7ad 261find_remembered_hi16s_reloc (bfd_vma addend, bfd_boolean *already_found)
252b5132 262{
b34976b6
AM
263 hi16s_location *match = NULL;
264 hi16s_location *entry;
b34976b6 265 bfd_byte *addr;
435b1e90 266
252b5132
RH
267 /* Search the table. Record the most recent entry that matches. */
268 for (entry = previous_hi16s; entry; entry = entry->next)
269 {
270 if (entry->addend == addend
271 && (match == NULL || match->counter < entry->counter))
272 {
252b5132
RH
273 match = entry;
274 }
252b5132
RH
275 }
276
277 if (match == NULL)
278 return NULL;
279
280 /* Extract the address. */
281 addr = match->address;
282
4cc11e76 283 /* Remember if this entry has already been used before. */
252b5132
RH
284 if (already_found)
285 * already_found = match->found;
286
287 /* Note that this entry has now been used. */
b34976b6 288 match->found = TRUE;
435b1e90 289
252b5132 290 return addr;
435b1e90 291}
252b5132 292
1e50d24d
RS
293/* Calculate the final operand value for a R_V850_LO16 or
294 R_V850_LO16_SPLIT_OFFSET. *INSN is the current operand value and
295 ADDEND is the sum of the relocation symbol and offset. Store the
296 operand value in *INSN and return true on success.
297
298 The assembler has already done some of this: If the value stored in
299 the instruction has its 15th bit set, (counting from zero) then the
300 assembler will have added 1 to the value stored in the associated
301 HI16S reloc. So for example, these relocations:
302
303 movhi hi( fred ), r0, r1
304 movea lo( fred ), r1, r1
305
306 will store 0 in the value fields for the MOVHI and MOVEA instructions
307 and addend will be the address of fred, but for these instructions:
308
1cd986c5
NC
309 movhi hi( fred + 0x123456 ), r0, r1
310 movea lo( fred + 0x123456 ), r1, r1
1e50d24d
RS
311
312 the value stored in the MOVHI instruction will be 0x12 and the value
313 stored in the MOVEA instruction will be 0x3456. If however the
314 instructions were:
315
1cd986c5
NC
316 movhi hi( fred + 0x10ffff ), r0, r1
317 movea lo( fred + 0x10ffff ), r1, r1
1e50d24d
RS
318
319 then the value stored in the MOVHI instruction would be 0x11 (not
320 0x10) and the value stored in the MOVEA instruction would be 0xffff.
321 Thus (assuming for the moment that the addend is 0), at run time the
322 MOVHI instruction loads 0x110000 into r1, then the MOVEA instruction
323 adds 0xffffffff (sign extension!) producing 0x10ffff. Similarly if
324 the instructions were:
325
1cd986c5
NC
326 movhi hi( fred - 1 ), r0, r1
327 movea lo( fred - 1 ), r1, r1
1e50d24d
RS
328
329 then 0 is stored in the MOVHI instruction and -1 is stored in the
330 MOVEA instruction.
331
332 Overflow can occur if the addition of the value stored in the
333 instruction plus the addend sets the 15th bit when before it was clear.
334 This is because the 15th bit will be sign extended into the high part,
335 thus reducing its value by one, but since the 15th bit was originally
336 clear, the assembler will not have added 1 to the previous HI16S reloc
337 to compensate for this effect. For example:
338
1cd986c5
NC
339 movhi hi( fred + 0x123456 ), r0, r1
340 movea lo( fred + 0x123456 ), r1, r1
1e50d24d
RS
341
342 The value stored in HI16S reloc is 0x12, the value stored in the LO16
343 reloc is 0x3456. If we assume that the address of fred is 0x00007000
344 then the relocations become:
345
346 HI16S: 0x0012 + (0x00007000 >> 16) = 0x12
347 LO16: 0x3456 + (0x00007000 & 0xffff) = 0xa456
348
349 but when the instructions are executed, the MOVEA instruction's value
350 is signed extended, so the sum becomes:
351
352 0x00120000
353 + 0xffffa456
354 ------------
355 0x0011a456 but 'fred + 0x123456' = 0x0012a456
356
357 Note that if the 15th bit was set in the value stored in the LO16
358 reloc, then we do not have to do anything:
359
1cd986c5
NC
360 movhi hi( fred + 0x10ffff ), r0, r1
361 movea lo( fred + 0x10ffff ), r1, r1
1e50d24d
RS
362
363 HI16S: 0x0011 + (0x00007000 >> 16) = 0x11
364 LO16: 0xffff + (0x00007000 & 0xffff) = 0x6fff
365
366 0x00110000
367 + 0x00006fff
368 ------------
369 0x00116fff = fred + 0x10ffff = 0x7000 + 0x10ffff
370
371 Overflow can also occur if the computation carries into the 16th bit
372 and it also results in the 15th bit having the same value as the 15th
373 bit of the original value. What happens is that the HI16S reloc
374 will have already examined the 15th bit of the original value and
375 added 1 to the high part if the bit is set. This compensates for the
376 sign extension of 15th bit of the result of the computation. But now
377 there is a carry into the 16th bit, and this has not been allowed for.
378
379 So, for example if fred is at address 0xf000:
380
1cd986c5
NC
381 movhi hi( fred + 0xffff ), r0, r1 [bit 15 of the offset is set]
382 movea lo( fred + 0xffff ), r1, r1
1e50d24d
RS
383
384 HI16S: 0x0001 + (0x0000f000 >> 16) = 0x0001
385 LO16: 0xffff + (0x0000f000 & 0xffff) = 0xefff (carry into bit 16 is lost)
386
387 0x00010000
388 + 0xffffefff
389 ------------
390 0x0000efff but 'fred + 0xffff' = 0x0001efff
391
392 Similarly, if the 15th bit remains clear, but overflow occurs into
393 the 16th bit then (assuming the address of fred is 0xf000):
394
1cd986c5
NC
395 movhi hi( fred + 0x7000 ), r0, r1 [bit 15 of the offset is clear]
396 movea lo( fred + 0x7000 ), r1, r1
1e50d24d
RS
397
398 HI16S: 0x0000 + (0x0000f000 >> 16) = 0x0000
399 LO16: 0x7000 + (0x0000f000 & 0xffff) = 0x6fff (carry into bit 16 is lost)
400
401 0x00000000
402 + 0x00006fff
403 ------------
404 0x00006fff but 'fred + 0x7000' = 0x00016fff
405
406 Note - there is no need to change anything if a carry occurs, and the
407 15th bit changes its value from being set to being clear, as the HI16S
408 reloc will have already added in 1 to the high part for us:
409
1cd986c5
NC
410 movhi hi( fred + 0xffff ), r0, r1 [bit 15 of the offset is set]
411 movea lo( fred + 0xffff ), r1, r1
1e50d24d
RS
412
413 HI16S: 0x0001 + (0x00007000 >> 16)
414 LO16: 0xffff + (0x00007000 & 0xffff) = 0x6fff (carry into bit 16 is lost)
415
416 0x00010000
417 + 0x00006fff (bit 15 not set, so the top half is zero)
418 ------------
419 0x00016fff which is right (assuming that fred is at 0x7000)
420
421 but if the 15th bit goes from being clear to being set, then we must
422 once again handle overflow:
423
1cd986c5
NC
424 movhi hi( fred + 0x7000 ), r0, r1 [bit 15 of the offset is clear]
425 movea lo( fred + 0x7000 ), r1, r1
1e50d24d
RS
426
427 HI16S: 0x0000 + (0x0000ffff >> 16)
428 LO16: 0x7000 + (0x0000ffff & 0xffff) = 0x6fff (carry into bit 16)
429
430 0x00000000
431 + 0x00006fff (bit 15 not set, so the top half is zero)
432 ------------
433 0x00006fff which is wrong (assuming that fred is at 0xffff). */
434
435static bfd_boolean
436v850_elf_perform_lo16_relocation (bfd *abfd, unsigned long *insn,
437 unsigned long addend)
438{
439#define BIT15_SET(x) ((x) & 0x8000)
440#define OVERFLOWS(a,i) ((((a) & 0xffff) + (i)) > 0xffff)
47b0e7ad 441
1e50d24d
RS
442 if ((BIT15_SET (*insn + addend) && ! BIT15_SET (addend))
443 || (OVERFLOWS (addend, *insn)
444 && ((! BIT15_SET (*insn)) || (BIT15_SET (addend)))))
445 {
446 bfd_boolean already_updated;
447 bfd_byte *hi16s_address = find_remembered_hi16s_reloc
448 (addend, & already_updated);
449
450 /* Amend the matching HI16_S relocation. */
451 if (hi16s_address != NULL)
452 {
453 if (! already_updated)
454 {
455 unsigned long hi_insn = bfd_get_16 (abfd, hi16s_address);
456 hi_insn += 1;
457 bfd_put_16 (abfd, hi_insn, hi16s_address);
458 }
459 }
460 else
461 {
38f14ab8 462 _bfd_error_handler (_("failed to find previous HI16 reloc"));
1e50d24d
RS
463 return FALSE;
464 }
465 }
466#undef OVERFLOWS
467#undef BIT15_SET
468
469 /* Do not complain if value has top bit set, as this has been
470 anticipated. */
471 *insn = (*insn + addend) & 0xffff;
472 return TRUE;
473}
474
252b5132 475/* FIXME: The code here probably ought to be removed and the code in reloc.c
4cc11e76 476 allowed to do its stuff instead. At least for most of the relocs, anyway. */
e12dd2ea 477
252b5132 478static bfd_reloc_status_type
47b0e7ad
NC
479v850_elf_perform_relocation (bfd *abfd,
480 unsigned int r_type,
481 bfd_vma addend,
482 bfd_byte *address)
252b5132
RH
483{
484 unsigned long insn;
1e50d24d 485 unsigned long result;
252b5132 486 bfd_signed_vma saddend = (bfd_signed_vma) addend;
435b1e90 487
252b5132
RH
488 switch (r_type)
489 {
490 default:
de863c74 491#ifdef DEBUG
0aa13fee
AM
492 _bfd_error_handler ("%pB: unsupported relocation type %#x",
493 abfd, r_type);
de863c74 494#endif
252b5132 495 return bfd_reloc_notsupported;
435b1e90 496
e30ddb24
NC
497 case R_V850_REL32:
498 case R_V850_ABS32:
de863c74
NC
499 case R_V810_WORD:
500 case R_V850_PC32:
252b5132
RH
501 bfd_put_32 (abfd, addend, address);
502 return bfd_reloc_ok;
435b1e90 503
de863c74 504 case R_V850_WLO23:
1cd986c5
NC
505 case R_V850_23:
506 insn = bfd_get_32 (abfd, address);
507 insn &= ~((0x7f << 4) | (0x7fff80 << (16-7)));
508 insn |= ((addend & 0x7f) << 4) | ((addend & 0x7fff80) << (16-7));
509 bfd_put_32 (abfd, (bfd_vma) insn, address);
510 return bfd_reloc_ok;
511
de863c74 512 case R_V850_PCR22:
252b5132
RH
513 case R_V850_22_PCREL:
514 if (saddend > 0x1fffff || saddend < -0x200000)
515 return bfd_reloc_overflow;
435b1e90 516
252b5132
RH
517 if ((addend % 2) != 0)
518 return bfd_reloc_dangerous;
435b1e90 519
252b5132
RH
520 insn = bfd_get_32 (abfd, address);
521 insn &= ~0xfffe003f;
522 insn |= (((addend & 0xfffe) << 16) | ((addend & 0x3f0000) >> 16));
dc810e39 523 bfd_put_32 (abfd, (bfd_vma) insn, address);
252b5132 524 return bfd_reloc_ok;
435b1e90 525
de863c74 526 case R_V850_PC17:
1cd986c5
NC
527 case R_V850_17_PCREL:
528 if (saddend > 0xffff || saddend < -0x10000)
529 return bfd_reloc_overflow;
530
531 if ((addend % 2) != 0)
532 return bfd_reloc_dangerous;
533
534 insn = bfd_get_32 (abfd, address);
535 insn &= ~ 0xfffe0010;
536 insn |= ((addend & 0xfffe) << 16) | ((addend & 0x10000) >> (16-4));
537 break;
538
de863c74 539 case R_V850_PC16U:
1cd986c5
NC
540 case R_V850_16_PCREL:
541 if ((saddend < -0xffff) || (saddend > 0))
542 return bfd_reloc_overflow;
543
544 if ((addend % 2) != 0)
545 return bfd_reloc_dangerous;
546
547 insn = bfd_get_16 (abfd, address);
548 insn &= ~0xfffe;
549 insn |= (-addend & 0xfffe);
550 break;
551
de863c74 552 case R_V850_PC9:
252b5132
RH
553 case R_V850_9_PCREL:
554 if (saddend > 0xff || saddend < -0x100)
555 return bfd_reloc_overflow;
435b1e90 556
252b5132
RH
557 if ((addend % 2) != 0)
558 return bfd_reloc_dangerous;
435b1e90 559
252b5132
RH
560 insn = bfd_get_16 (abfd, address);
561 insn &= ~ 0xf870;
562 insn |= ((addend & 0x1f0) << 7) | ((addend & 0x0e) << 3);
563 break;
435b1e90 564
de863c74 565 case R_V810_WHI:
252b5132
RH
566 case R_V850_HI16:
567 addend += (bfd_get_16 (abfd, address) << 16);
568 addend = (addend >> 16);
569 insn = addend;
570 break;
435b1e90 571
de863c74 572 case R_V810_WHI1:
252b5132
RH
573 case R_V850_HI16_S:
574 /* Remember where this relocation took place. */
575 remember_hi16s_reloc (abfd, addend, address);
576
577 addend += (bfd_get_16 (abfd, address) << 16);
578 addend = (addend >> 16) + ((addend & 0x8000) != 0);
435b1e90
KH
579
580 /* This relocation cannot overflow. */
4d421096 581 if (addend > 0xffff)
252b5132 582 addend = 0;
435b1e90 583
252b5132
RH
584 insn = addend;
585 break;
435b1e90 586
de863c74 587 case R_V810_WLO:
252b5132 588 case R_V850_LO16:
1e50d24d
RS
589 insn = bfd_get_16 (abfd, address);
590 if (! v850_elf_perform_lo16_relocation (abfd, &insn, addend))
591 return bfd_reloc_overflow;
592 break;
252b5132 593
de863c74 594 case R_V810_BYTE:
252b5132
RH
595 case R_V850_8:
596 addend += (char) bfd_get_8 (abfd, address);
597
598 saddend = (bfd_signed_vma) addend;
435b1e90 599
252b5132
RH
600 if (saddend > 0x7f || saddend < -0x80)
601 return bfd_reloc_overflow;
602
603 bfd_put_8 (abfd, addend, address);
604 return bfd_reloc_ok;
605
606 case R_V850_CALLT_16_16_OFFSET:
607 addend += bfd_get_16 (abfd, address);
435b1e90 608
252b5132 609 saddend = (bfd_signed_vma) addend;
435b1e90 610
252b5132
RH
611 if (saddend > 0xffff || saddend < 0)
612 return bfd_reloc_overflow;
613
614 insn = addend;
615 break;
435b1e90 616
1cd986c5
NC
617 case R_V850_CALLT_15_16_OFFSET:
618 insn = bfd_get_16 (abfd, address);
619
5bb3703f 620 addend += insn & 0xfffe;
1cd986c5
NC
621
622 saddend = (bfd_signed_vma) addend;
623
624 if (saddend > 0xffff || saddend < 0)
625 return bfd_reloc_overflow;
626
627 insn = (0xfffe & addend)
628 | (insn & ~0xfffe);
629 break;
630
631 case R_V850_CALLT_6_7_OFFSET:
632 insn = bfd_get_16 (abfd, address);
633 addend += ((insn & 0x3f) << 1);
634
635 saddend = (bfd_signed_vma) addend;
636
637 if (saddend > 0x7e || saddend < 0)
638 return bfd_reloc_overflow;
639
640 if (addend & 1)
641 return bfd_reloc_dangerous;
642
643 insn &= 0xff80;
644 insn |= (addend >> 1);
645 break;
646
252b5132 647 case R_V850_16:
de863c74 648 case R_V810_HWORD:
252b5132
RH
649 case R_V850_SDA_16_16_OFFSET:
650 case R_V850_ZDA_16_16_OFFSET:
651 case R_V850_TDA_16_16_OFFSET:
652 addend += bfd_get_16 (abfd, address);
435b1e90 653
252b5132 654 saddend = (bfd_signed_vma) addend;
435b1e90 655
252b5132
RH
656 if (saddend > 0x7fff || saddend < -0x8000)
657 return bfd_reloc_overflow;
658
659 insn = addend;
660 break;
435b1e90 661
1cd986c5 662 case R_V850_16_S1:
252b5132
RH
663 case R_V850_SDA_15_16_OFFSET:
664 case R_V850_ZDA_15_16_OFFSET:
de863c74 665 case R_V810_GPWLO_1:
252b5132
RH
666 insn = bfd_get_16 (abfd, address);
667 addend += (insn & 0xfffe);
435b1e90 668
252b5132 669 saddend = (bfd_signed_vma) addend;
435b1e90 670
252b5132
RH
671 if (saddend > 0x7ffe || saddend < -0x8000)
672 return bfd_reloc_overflow;
435b1e90 673
252b5132 674 if (addend & 1)
07d6d2b8 675 return bfd_reloc_dangerous;
435b1e90 676
dc810e39 677 insn = (addend &~ (bfd_vma) 1) | (insn & 1);
252b5132 678 break;
435b1e90 679
252b5132
RH
680 case R_V850_TDA_6_8_OFFSET:
681 insn = bfd_get_16 (abfd, address);
682 addend += ((insn & 0x7e) << 1);
435b1e90 683
252b5132 684 saddend = (bfd_signed_vma) addend;
435b1e90 685
252b5132
RH
686 if (saddend > 0xfc || saddend < 0)
687 return bfd_reloc_overflow;
435b1e90 688
252b5132
RH
689 if (addend & 3)
690 return bfd_reloc_dangerous;
435b1e90 691
252b5132
RH
692 insn &= 0xff81;
693 insn |= (addend >> 1);
694 break;
435b1e90 695
252b5132
RH
696 case R_V850_TDA_7_8_OFFSET:
697 insn = bfd_get_16 (abfd, address);
698 addend += ((insn & 0x7f) << 1);
435b1e90 699
252b5132 700 saddend = (bfd_signed_vma) addend;
435b1e90 701
252b5132
RH
702 if (saddend > 0xfe || saddend < 0)
703 return bfd_reloc_overflow;
435b1e90 704
252b5132
RH
705 if (addend & 1)
706 return bfd_reloc_dangerous;
435b1e90 707
252b5132
RH
708 insn &= 0xff80;
709 insn |= (addend >> 1);
710 break;
435b1e90 711
252b5132
RH
712 case R_V850_TDA_7_7_OFFSET:
713 insn = bfd_get_16 (abfd, address);
714 addend += insn & 0x7f;
435b1e90 715
252b5132 716 saddend = (bfd_signed_vma) addend;
435b1e90 717
252b5132
RH
718 if (saddend > 0x7f || saddend < 0)
719 return bfd_reloc_overflow;
435b1e90 720
252b5132
RH
721 insn &= 0xff80;
722 insn |= addend;
723 break;
435b1e90 724
252b5132
RH
725 case R_V850_TDA_4_5_OFFSET:
726 insn = bfd_get_16 (abfd, address);
727 addend += ((insn & 0xf) << 1);
435b1e90 728
252b5132 729 saddend = (bfd_signed_vma) addend;
435b1e90 730
252b5132
RH
731 if (saddend > 0x1e || saddend < 0)
732 return bfd_reloc_overflow;
435b1e90 733
252b5132
RH
734 if (addend & 1)
735 return bfd_reloc_dangerous;
435b1e90 736
252b5132
RH
737 insn &= 0xfff0;
738 insn |= (addend >> 1);
739 break;
435b1e90 740
252b5132
RH
741 case R_V850_TDA_4_4_OFFSET:
742 insn = bfd_get_16 (abfd, address);
743 addend += insn & 0xf;
435b1e90 744
252b5132 745 saddend = (bfd_signed_vma) addend;
435b1e90 746
252b5132
RH
747 if (saddend > 0xf || saddend < 0)
748 return bfd_reloc_overflow;
435b1e90 749
252b5132
RH
750 insn &= 0xfff0;
751 insn |= addend;
752 break;
435b1e90 753
de863c74
NC
754 case R_V810_WLO_1:
755 case R_V850_HWLO:
756 case R_V850_HWLO_1:
1cd986c5
NC
757 case R_V850_LO16_S1:
758 insn = bfd_get_16 (abfd, address);
759 result = insn & 0xfffe;
760 if (! v850_elf_perform_lo16_relocation (abfd, &result, addend))
761 return bfd_reloc_overflow;
762 if (result & 1)
763 return bfd_reloc_overflow;
764 insn = (result & 0xfffe)
765 | (insn & ~0xfffe);
766 bfd_put_16 (abfd, insn, address);
767 return bfd_reloc_ok;
768
de863c74 769 case R_V850_BLO:
1e50d24d
RS
770 case R_V850_LO16_SPLIT_OFFSET:
771 insn = bfd_get_32 (abfd, address);
772 result = ((insn & 0xfffe0000) >> 16) | ((insn & 0x20) >> 5);
773 if (! v850_elf_perform_lo16_relocation (abfd, &result, addend))
774 return bfd_reloc_overflow;
775 insn = (((result << 16) & 0xfffe0000)
776 | ((result << 5) & 0x20)
777 | (insn & ~0xfffe0020));
778 bfd_put_32 (abfd, insn, address);
779 return bfd_reloc_ok;
780
1cd986c5 781 case R_V850_16_SPLIT_OFFSET:
252b5132 782 case R_V850_SDA_16_16_SPLIT_OFFSET:
1cd986c5 783 case R_V850_ZDA_16_16_SPLIT_OFFSET:
252b5132
RH
784 insn = bfd_get_32 (abfd, address);
785 addend += ((insn & 0xfffe0000) >> 16) + ((insn & 0x20) >> 5);
435b1e90 786
252b5132 787 saddend = (bfd_signed_vma) addend;
435b1e90 788
252b5132
RH
789 if (saddend > 0x7fff || saddend < -0x8000)
790 return bfd_reloc_overflow;
435b1e90 791
252b5132
RH
792 insn &= 0x0001ffdf;
793 insn |= (addend & 1) << 5;
dc810e39 794 insn |= (addend &~ (bfd_vma) 1) << 16;
435b1e90 795
dc810e39 796 bfd_put_32 (abfd, (bfd_vma) insn, address);
252b5132 797 return bfd_reloc_ok;
435b1e90 798
252b5132
RH
799 case R_V850_GNU_VTINHERIT:
800 case R_V850_GNU_VTENTRY:
801 return bfd_reloc_ok;
802
803 }
804
dc810e39 805 bfd_put_16 (abfd, (bfd_vma) insn, address);
252b5132
RH
806 return bfd_reloc_ok;
807}
252b5132
RH
808\f
809/* Insert the addend into the instruction. */
e12dd2ea 810
252b5132 811static bfd_reloc_status_type
47b0e7ad
NC
812v850_elf_reloc (bfd *abfd ATTRIBUTE_UNUSED,
813 arelent *reloc,
814 asymbol *symbol,
815 void * data ATTRIBUTE_UNUSED,
816 asection *isection,
817 bfd *obfd,
818 char **err ATTRIBUTE_UNUSED)
252b5132
RH
819{
820 long relocation;
435b1e90 821
252b5132
RH
822 /* If there is an output BFD,
823 and the symbol is not a section name (which is only defined at final link time),
824 and either we are not putting the addend into the instruction
e12dd2ea 825 or the addend is zero, so there is nothing to add into the instruction
252b5132 826 then just fixup the address and return. */
47b0e7ad 827 if (obfd != NULL
252b5132
RH
828 && (symbol->flags & BSF_SECTION_SYM) == 0
829 && (! reloc->howto->partial_inplace
830 || reloc->addend == 0))
831 {
832 reloc->address += isection->output_offset;
833 return bfd_reloc_ok;
834 }
435b1e90 835
252b5132
RH
836 /* Catch relocs involving undefined symbols. */
837 if (bfd_is_und_section (symbol->section)
838 && (symbol->flags & BSF_WEAK) == 0
839 && obfd == NULL)
840 return bfd_reloc_undefined;
841
842 /* We handle final linking of some relocs ourselves. */
843
844 /* Is the address of the relocation really within the section? */
07515404 845 if (reloc->address > bfd_get_section_limit (abfd, isection))
252b5132 846 return bfd_reloc_outofrange;
435b1e90 847
4cc11e76 848 /* Work out which section the relocation is targeted at and the
252b5132 849 initial relocation command value. */
435b1e90 850
b34976b6 851 if (reloc->howto->pc_relative)
86aba9db
NC
852 return bfd_reloc_ok;
853
252b5132
RH
854 /* Get symbol value. (Common symbols are special.) */
855 if (bfd_is_com_section (symbol->section))
856 relocation = 0;
857 else
858 relocation = symbol->value;
435b1e90 859
252b5132
RH
860 /* Convert input-section-relative symbol value to absolute + addend. */
861 relocation += symbol->section->output_section->vma;
862 relocation += symbol->section->output_offset;
863 relocation += reloc->addend;
435b1e90 864
435b1e90 865 reloc->addend = relocation;
252b5132
RH
866 return bfd_reloc_ok;
867}
86aba9db
NC
868
869/* This function is used for relocs which are only used
870 for relaxing, which the linker should otherwise ignore. */
871
872static bfd_reloc_status_type
47b0e7ad
NC
873v850_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED,
874 arelent *reloc_entry,
875 asymbol *symbol ATTRIBUTE_UNUSED,
876 void * data ATTRIBUTE_UNUSED,
877 asection *input_section,
878 bfd *output_bfd,
879 char **error_message ATTRIBUTE_UNUSED)
86aba9db
NC
880{
881 if (output_bfd != NULL)
882 reloc_entry->address += input_section->output_offset;
883
884 return bfd_reloc_ok;
885}
47b0e7ad 886/* Note: It is REQUIRED that the 'type' value of each entry
1cd986c5 887 in this array match the index of the entry in the array.
de863c74 888 SeeAlso: RELOC_NUBMER in include/elf/v850.h. */
47b0e7ad
NC
889static reloc_howto_type v850_elf_howto_table[] =
890{
891 /* This reloc does nothing. */
892 HOWTO (R_V850_NONE, /* Type. */
893 0, /* Rightshift. */
6346d5ca
AM
894 3, /* Size (0 = byte, 1 = short, 2 = long). */
895 0, /* Bitsize. */
47b0e7ad
NC
896 FALSE, /* PC_relative. */
897 0, /* Bitpos. */
6346d5ca 898 complain_overflow_dont, /* Complain_on_overflow. */
47b0e7ad
NC
899 bfd_elf_generic_reloc, /* Special_function. */
900 "R_V850_NONE", /* Name. */
901 FALSE, /* Partial_inplace. */
902 0, /* Src_mask. */
903 0, /* Dst_mask. */
904 FALSE), /* PCrel_offset. */
905
906 /* A PC relative 9 bit branch. */
907 HOWTO (R_V850_9_PCREL, /* Type. */
1cd986c5
NC
908 0, /* Rightshift. */
909 1, /* Size (0 = byte, 1 = short, 2 = long). */
910 9, /* Bitsize. */
47b0e7ad
NC
911 TRUE, /* PC_relative. */
912 0, /* Bitpos. */
913 complain_overflow_bitfield, /* Complain_on_overflow. */
914 v850_elf_reloc, /* Special_function. */
915 "R_V850_9_PCREL", /* Name. */
916 FALSE, /* Partial_inplace. */
917 0x00ffffff, /* Src_mask. */
918 0x00ffffff, /* Dst_mask. */
919 TRUE), /* PCrel_offset. */
920
921 /* A PC relative 22 bit branch. */
922 HOWTO (R_V850_22_PCREL, /* Type. */
1cd986c5 923 0, /* Rightshift. */
47b0e7ad
NC
924 2, /* Size (0 = byte, 1 = short, 2 = long). */
925 22, /* Bitsize. */
926 TRUE, /* PC_relative. */
1cd986c5 927 0, /* Bitpos. */
47b0e7ad
NC
928 complain_overflow_signed, /* Complain_on_overflow. */
929 v850_elf_reloc, /* Special_function. */
930 "R_V850_22_PCREL", /* Name. */
931 FALSE, /* Partial_inplace. */
932 0x07ffff80, /* Src_mask. */
933 0x07ffff80, /* Dst_mask. */
934 TRUE), /* PCrel_offset. */
935
936 /* High 16 bits of symbol value. */
937 HOWTO (R_V850_HI16_S, /* Type. */
938 0, /* Rightshift. */
939 1, /* Size (0 = byte, 1 = short, 2 = long). */
940 16, /* Bitsize. */
941 FALSE, /* PC_relative. */
942 0, /* Bitpos. */
943 complain_overflow_dont, /* Complain_on_overflow. */
944 v850_elf_reloc, /* Special_function. */
945 "R_V850_HI16_S", /* Name. */
946 FALSE, /* Partial_inplace. */
947 0xffff, /* Src_mask. */
948 0xffff, /* Dst_mask. */
949 FALSE), /* PCrel_offset. */
950
951 /* High 16 bits of symbol value. */
952 HOWTO (R_V850_HI16, /* Type. */
953 0, /* Rightshift. */
954 1, /* Size (0 = byte, 1 = short, 2 = long). */
955 16, /* Bitsize. */
956 FALSE, /* PC_relative. */
957 0, /* Bitpos. */
958 complain_overflow_dont, /* Complain_on_overflow. */
959 v850_elf_reloc, /* Special_function. */
960 "R_V850_HI16", /* Name. */
961 FALSE, /* Partial_inplace. */
962 0xffff, /* Src_mask. */
963 0xffff, /* Dst_mask. */
964 FALSE), /* PCrel_offset. */
965
966 /* Low 16 bits of symbol value. */
967 HOWTO (R_V850_LO16, /* Type. */
968 0, /* Rightshift. */
969 1, /* Size (0 = byte, 1 = short, 2 = long). */
970 16, /* Bitsize. */
971 FALSE, /* PC_relative. */
972 0, /* Bitpos. */
973 complain_overflow_dont, /* Complain_on_overflow. */
974 v850_elf_reloc, /* Special_function. */
975 "R_V850_LO16", /* Name. */
976 FALSE, /* Partial_inplace. */
977 0xffff, /* Src_mask. */
978 0xffff, /* Dst_mask. */
979 FALSE), /* PCrel_offset. */
980
981 /* Simple 32bit reloc. */
982 HOWTO (R_V850_ABS32, /* Type. */
983 0, /* Rightshift. */
984 2, /* Size (0 = byte, 1 = short, 2 = long). */
985 32, /* Bitsize. */
986 FALSE, /* PC_relative. */
987 0, /* Bitpos. */
988 complain_overflow_dont, /* Complain_on_overflow. */
989 v850_elf_reloc, /* Special_function. */
990 "R_V850_ABS32", /* Name. */
991 FALSE, /* Partial_inplace. */
992 0xffffffff, /* Src_mask. */
993 0xffffffff, /* Dst_mask. */
994 FALSE), /* PCrel_offset. */
995
996 /* Simple 16bit reloc. */
997 HOWTO (R_V850_16, /* Type. */
998 0, /* Rightshift. */
999 1, /* Size (0 = byte, 1 = short, 2 = long). */
1000 16, /* Bitsize. */
1001 FALSE, /* PC_relative. */
1002 0, /* Bitpos. */
1003 complain_overflow_dont, /* Complain_on_overflow. */
1004 bfd_elf_generic_reloc, /* Special_function. */
1005 "R_V850_16", /* Name. */
1006 FALSE, /* Partial_inplace. */
1007 0xffff, /* Src_mask. */
1008 0xffff, /* Dst_mask. */
1009 FALSE), /* PCrel_offset. */
1010
07d6d2b8 1011 /* Simple 8bit reloc. */
47b0e7ad
NC
1012 HOWTO (R_V850_8, /* Type. */
1013 0, /* Rightshift. */
1014 0, /* Size (0 = byte, 1 = short, 2 = long). */
1015 8, /* Bitsize. */
1016 FALSE, /* PC_relative. */
1017 0, /* Bitpos. */
1018 complain_overflow_dont, /* Complain_on_overflow. */
1019 bfd_elf_generic_reloc, /* Special_function. */
1020 "R_V850_8", /* Name. */
1021 FALSE, /* Partial_inplace. */
1022 0xff, /* Src_mask. */
1023 0xff, /* Dst_mask. */
1024 FALSE), /* PCrel_offset. */
1025
1026 /* 16 bit offset from the short data area pointer. */
1027 HOWTO (R_V850_SDA_16_16_OFFSET, /* Type. */
1028 0, /* Rightshift. */
1029 1, /* Size (0 = byte, 1 = short, 2 = long). */
1030 16, /* Bitsize. */
1031 FALSE, /* PC_relative. */
1032 0, /* Bitpos. */
1033 complain_overflow_dont, /* Complain_on_overflow. */
1034 v850_elf_reloc, /* Special_function. */
1035 "R_V850_SDA_16_16_OFFSET", /* Name. */
1036 FALSE, /* Partial_inplace. */
1037 0xffff, /* Src_mask. */
1038 0xffff, /* Dst_mask. */
1039 FALSE), /* PCrel_offset. */
1040
1041 /* 15 bit offset from the short data area pointer. */
1042 HOWTO (R_V850_SDA_15_16_OFFSET, /* Type. */
1043 1, /* Rightshift. */
1044 1, /* Size (0 = byte, 1 = short, 2 = long). */
1045 16, /* Bitsize. */
1046 FALSE, /* PC_relative. */
1047 1, /* Bitpos. */
1048 complain_overflow_dont, /* Complain_on_overflow. */
1049 v850_elf_reloc, /* Special_function. */
1050 "R_V850_SDA_15_16_OFFSET", /* Name. */
1051 FALSE, /* Partial_inplace. */
1052 0xfffe, /* Src_mask. */
1053 0xfffe, /* Dst_mask. */
1054 FALSE), /* PCrel_offset. */
1055
1056 /* 16 bit offset from the zero data area pointer. */
1057 HOWTO (R_V850_ZDA_16_16_OFFSET, /* Type. */
1058 0, /* Rightshift. */
1059 1, /* Size (0 = byte, 1 = short, 2 = long). */
1060 16, /* Bitsize. */
1061 FALSE, /* PC_relative. */
1062 0, /* Bitpos. */
1063 complain_overflow_dont, /* Complain_on_overflow. */
1064 v850_elf_reloc, /* Special_function. */
1065 "R_V850_ZDA_16_16_OFFSET", /* Name. */
1066 FALSE, /* Partial_inplace. */
1067 0xffff, /* Src_mask. */
1068 0xffff, /* Dst_mask. */
1069 FALSE), /* PCrel_offset. */
1070
1071 /* 15 bit offset from the zero data area pointer. */
1072 HOWTO (R_V850_ZDA_15_16_OFFSET, /* Type. */
1073 1, /* Rightshift. */
1074 1, /* Size (0 = byte, 1 = short, 2 = long). */
1075 16, /* Bitsize. */
1076 FALSE, /* PC_relative. */
1077 1, /* Bitpos. */
1078 complain_overflow_dont, /* Complain_on_overflow. */
1079 v850_elf_reloc, /* Special_function. */
1080 "R_V850_ZDA_15_16_OFFSET", /* Name. */
1081 FALSE, /* Partial_inplace. */
1082 0xfffe, /* Src_mask. */
1083 0xfffe, /* Dst_mask. */
1084 FALSE), /* PCrel_offset. */
1085
1086 /* 6 bit offset from the tiny data area pointer. */
1087 HOWTO (R_V850_TDA_6_8_OFFSET, /* Type. */
1088 2, /* Rightshift. */
1089 1, /* Size (0 = byte, 1 = short, 2 = long). */
1090 8, /* Bitsize. */
1091 FALSE, /* PC_relative. */
1092 1, /* Bitpos. */
1093 complain_overflow_dont, /* Complain_on_overflow. */
1094 v850_elf_reloc, /* Special_function. */
1095 "R_V850_TDA_6_8_OFFSET", /* Name. */
1096 FALSE, /* Partial_inplace. */
1097 0x7e, /* Src_mask. */
1098 0x7e, /* Dst_mask. */
1099 FALSE), /* PCrel_offset. */
1100
1101 /* 8 bit offset from the tiny data area pointer. */
1102 HOWTO (R_V850_TDA_7_8_OFFSET, /* Type. */
1103 1, /* Rightshift. */
1104 1, /* Size (0 = byte, 1 = short, 2 = long). */
1105 8, /* Bitsize. */
1106 FALSE, /* PC_relative. */
1107 0, /* Bitpos. */
1108 complain_overflow_dont, /* Complain_on_overflow. */
1109 v850_elf_reloc, /* Special_function. */
1110 "R_V850_TDA_7_8_OFFSET", /* Name. */
1111 FALSE, /* Partial_inplace. */
1112 0x7f, /* Src_mask. */
1113 0x7f, /* Dst_mask. */
1114 FALSE), /* PCrel_offset. */
1115
1116 /* 7 bit offset from the tiny data area pointer. */
1117 HOWTO (R_V850_TDA_7_7_OFFSET, /* Type. */
1118 0, /* Rightshift. */
1119 1, /* Size (0 = byte, 1 = short, 2 = long). */
1120 7, /* Bitsize. */
1121 FALSE, /* PC_relative. */
1122 0, /* Bitpos. */
1123 complain_overflow_dont, /* Complain_on_overflow. */
1124 v850_elf_reloc, /* Special_function. */
1125 "R_V850_TDA_7_7_OFFSET", /* Name. */
1126 FALSE, /* Partial_inplace. */
1127 0x7f, /* Src_mask. */
1128 0x7f, /* Dst_mask. */
1129 FALSE), /* PCrel_offset. */
1130
1131 /* 16 bit offset from the tiny data area pointer! */
1132 HOWTO (R_V850_TDA_16_16_OFFSET, /* Type. */
1133 0, /* Rightshift. */
1134 1, /* Size (0 = byte, 1 = short, 2 = long). */
1135 16, /* Bitsize. */
1136 FALSE, /* PC_relative. */
1137 0, /* Bitpos. */
1138 complain_overflow_dont, /* Complain_on_overflow. */
1139 v850_elf_reloc, /* Special_function. */
1140 "R_V850_TDA_16_16_OFFSET", /* Name. */
1141 FALSE, /* Partial_inplace. */
1142 0xffff, /* Src_mask. */
1143 0xfff, /* Dst_mask. */
1144 FALSE), /* PCrel_offset. */
1145
1146 /* 5 bit offset from the tiny data area pointer. */
1147 HOWTO (R_V850_TDA_4_5_OFFSET, /* Type. */
1148 1, /* Rightshift. */
1149 1, /* Size (0 = byte, 1 = short, 2 = long). */
1150 5, /* Bitsize. */
1151 FALSE, /* PC_relative. */
1152 0, /* Bitpos. */
1153 complain_overflow_dont, /* Complain_on_overflow. */
1154 v850_elf_reloc, /* Special_function. */
1155 "R_V850_TDA_4_5_OFFSET", /* Name. */
1156 FALSE, /* Partial_inplace. */
1157 0x0f, /* Src_mask. */
1158 0x0f, /* Dst_mask. */
1159 FALSE), /* PCrel_offset. */
1160
1161 /* 4 bit offset from the tiny data area pointer. */
1162 HOWTO (R_V850_TDA_4_4_OFFSET, /* Type. */
1163 0, /* Rightshift. */
1164 1, /* Size (0 = byte, 1 = short, 2 = long). */
1165 4, /* Bitsize. */
1166 FALSE, /* PC_relative. */
1167 0, /* Bitpos. */
1168 complain_overflow_dont, /* Complain_on_overflow. */
1169 v850_elf_reloc, /* Special_function. */
1170 "R_V850_TDA_4_4_OFFSET", /* Name. */
1171 FALSE, /* Partial_inplace. */
1172 0x0f, /* Src_mask. */
1173 0x0f, /* Dst_mask. */
1174 FALSE), /* PCrel_offset. */
1175
1176 /* 16 bit offset from the short data area pointer. */
1177 HOWTO (R_V850_SDA_16_16_SPLIT_OFFSET, /* Type. */
1178 0, /* Rightshift. */
1179 2, /* Size (0 = byte, 1 = short, 2 = long). */
1180 16, /* Bitsize. */
1181 FALSE, /* PC_relative. */
1182 0, /* Bitpos. */
1183 complain_overflow_dont, /* Complain_on_overflow. */
1184 v850_elf_reloc, /* Special_function. */
1185 "R_V850_SDA_16_16_SPLIT_OFFSET",/* Name. */
1186 FALSE, /* Partial_inplace. */
1187 0xfffe0020, /* Src_mask. */
1188 0xfffe0020, /* Dst_mask. */
1189 FALSE), /* PCrel_offset. */
1190
1191 /* 16 bit offset from the zero data area pointer. */
1192 HOWTO (R_V850_ZDA_16_16_SPLIT_OFFSET, /* Type. */
1193 0, /* Rightshift. */
1194 2, /* Size (0 = byte, 1 = short, 2 = long). */
1195 16, /* Bitsize. */
1196 FALSE, /* PC_relative. */
1197 0, /* Bitpos. */
1198 complain_overflow_dont, /* Complain_on_overflow. */
1199 v850_elf_reloc, /* Special_function. */
1200 "R_V850_ZDA_16_16_SPLIT_OFFSET",/* Name. */
1201 FALSE, /* Partial_inplace. */
1202 0xfffe0020, /* Src_mask. */
1203 0xfffe0020, /* Dst_mask. */
1204 FALSE), /* PCrel_offset. */
1205
1206 /* 6 bit offset from the call table base pointer. */
1207 HOWTO (R_V850_CALLT_6_7_OFFSET, /* Type. */
1208 0, /* Rightshift. */
1209 1, /* Size (0 = byte, 1 = short, 2 = long). */
1210 7, /* Bitsize. */
1211 FALSE, /* PC_relative. */
1212 0, /* Bitpos. */
1213 complain_overflow_dont, /* Complain_on_overflow. */
1214 v850_elf_reloc, /* Special_function. */
1215 "R_V850_CALLT_6_7_OFFSET", /* Name. */
1216 FALSE, /* Partial_inplace. */
1217 0x3f, /* Src_mask. */
1218 0x3f, /* Dst_mask. */
1219 FALSE), /* PCrel_offset. */
1220
1221 /* 16 bit offset from the call table base pointer. */
1222 HOWTO (R_V850_CALLT_16_16_OFFSET, /* Type. */
1223 0, /* Rightshift. */
1224 1, /* Size (0 = byte, 1 = short, 2 = long). */
1225 16, /* Bitsize. */
1226 FALSE, /* PC_relative. */
1227 0, /* Bitpos. */
1228 complain_overflow_dont, /* Complain_on_overflow. */
1229 v850_elf_reloc, /* Special_function. */
1230 "R_V850_CALLT_16_16_OFFSET", /* Name. */
1231 FALSE, /* Partial_inplace. */
1232 0xffff, /* Src_mask. */
1233 0xffff, /* Dst_mask. */
1234 FALSE), /* PCrel_offset. */
1235
1cd986c5 1236
47b0e7ad
NC
1237 /* GNU extension to record C++ vtable hierarchy */
1238 HOWTO (R_V850_GNU_VTINHERIT, /* Type. */
07d6d2b8
AM
1239 0, /* Rightshift. */
1240 2, /* Size (0 = byte, 1 = short, 2 = long). */
1241 0, /* Bitsize. */
1242 FALSE, /* PC_relative. */
1243 0, /* Bitpos. */
1cd986c5 1244 complain_overflow_dont, /* Complain_on_overflow. */
07d6d2b8 1245 NULL, /* Special_function. */
1cd986c5 1246 "R_V850_GNU_VTINHERIT", /* Name. */
07d6d2b8
AM
1247 FALSE, /* Partial_inplace. */
1248 0, /* Src_mask. */
1249 0, /* Dst_mask. */
1250 FALSE), /* PCrel_offset. */
1cd986c5
NC
1251
1252 /* GNU extension to record C++ vtable member usage. */
07d6d2b8
AM
1253 HOWTO (R_V850_GNU_VTENTRY, /* Type. */
1254 0, /* Rightshift. */
1255 2, /* Size (0 = byte, 1 = short, 2 = long). */
1256 0, /* Bitsize. */
1257 FALSE, /* PC_relative. */
1258 0, /* Bitpos. */
1cd986c5 1259 complain_overflow_dont, /* Complain_on_overflow. */
07d6d2b8
AM
1260 _bfd_elf_rel_vtable_reloc_fn, /* Special_function. */
1261 "R_V850_GNU_VTENTRY", /* Name. */
1262 FALSE, /* Partial_inplace. */
1263 0, /* Src_mask. */
1264 0, /* Dst_mask. */
1265 FALSE), /* PCrel_offset. */
47b0e7ad
NC
1266
1267 /* Indicates a .longcall pseudo-op. The compiler will generate a .longcall
1268 pseudo-op when it finds a function call which can be relaxed. */
1269 HOWTO (R_V850_LONGCALL, /* Type. */
07d6d2b8
AM
1270 0, /* Rightshift. */
1271 2, /* Size (0 = byte, 1 = short, 2 = long). */
1272 32, /* Bitsize. */
1273 TRUE, /* PC_relative. */
1274 0, /* Bitpos. */
1cd986c5
NC
1275 complain_overflow_signed, /* Complain_on_overflow. */
1276 v850_elf_ignore_reloc, /* Special_function. */
07d6d2b8
AM
1277 "R_V850_LONGCALL", /* Name. */
1278 FALSE, /* Partial_inplace. */
1279 0, /* Src_mask. */
1280 0, /* Dst_mask. */
1281 TRUE), /* PCrel_offset. */
47b0e7ad
NC
1282
1283 /* Indicates a .longjump pseudo-op. The compiler will generate a
1284 .longjump pseudo-op when it finds a branch which can be relaxed. */
1285 HOWTO (R_V850_LONGJUMP, /* Type. */
07d6d2b8
AM
1286 0, /* Rightshift. */
1287 2, /* Size (0 = byte, 1 = short, 2 = long). */
1288 32, /* Bitsize. */
1289 TRUE, /* PC_relative. */
1290 0, /* Bitpos. */
1cd986c5
NC
1291 complain_overflow_signed, /* Complain_on_overflow. */
1292 v850_elf_ignore_reloc, /* Special_function. */
07d6d2b8
AM
1293 "R_V850_LONGJUMP", /* Name. */
1294 FALSE, /* Partial_inplace. */
1295 0, /* Src_mask. */
1296 0, /* Dst_mask. */
1297 TRUE), /* PCrel_offset. */
1298
1299 HOWTO (R_V850_ALIGN, /* Type. */
1300 0, /* Rightshift. */
1301 1, /* Size (0 = byte, 1 = short, 2 = long). */
1302 0, /* Bitsize. */
1303 FALSE, /* PC_relative. */
1304 0, /* Bitpos. */
1cd986c5
NC
1305 complain_overflow_unsigned, /* Complain_on_overflow. */
1306 v850_elf_ignore_reloc, /* Special_function. */
07d6d2b8
AM
1307 "R_V850_ALIGN", /* Name. */
1308 FALSE, /* Partial_inplace. */
1309 0, /* Src_mask. */
1310 0, /* Dst_mask. */
1311 TRUE), /* PCrel_offset. */
1cd986c5 1312
47b0e7ad
NC
1313 /* Simple pc-relative 32bit reloc. */
1314 HOWTO (R_V850_REL32, /* Type. */
1315 0, /* Rightshift. */
1316 2, /* Size (0 = byte, 1 = short, 2 = long). */
1317 32, /* Bitsize. */
1318 TRUE, /* PC_relative. */
1319 0, /* Bitpos. */
1320 complain_overflow_dont, /* Complain_on_overflow. */
1321 v850_elf_reloc, /* Special_function. */
1322 "R_V850_REL32", /* Name. */
1323 FALSE, /* Partial_inplace. */
1324 0xffffffff, /* Src_mask. */
1325 0xffffffff, /* Dst_mask. */
1326 FALSE), /* PCrel_offset. */
1327
1328 /* An ld.bu version of R_V850_LO16. */
1329 HOWTO (R_V850_LO16_SPLIT_OFFSET, /* Type. */
1330 0, /* Rightshift. */
1331 2, /* Size (0 = byte, 1 = short, 2 = long). */
1332 16, /* Bitsize. */
1333 FALSE, /* PC_relative. */
1334 0, /* Bitpos. */
1335 complain_overflow_dont, /* Complain_on_overflow. */
1336 v850_elf_reloc, /* Special_function. */
1337 "R_V850_LO16_SPLIT_OFFSET", /* Name. */
1338 FALSE, /* Partial_inplace. */
1339 0xfffe0020, /* Src_mask. */
1340 0xfffe0020, /* Dst_mask. */
1341 FALSE), /* PCrel_offset. */
1cd986c5
NC
1342
1343 /* A unsigned PC relative 16 bit loop. */
1344 HOWTO (R_V850_16_PCREL, /* Type. */
1345 0, /* Rightshift. */
1346 1, /* Size (0 = byte, 1 = short, 2 = long). */
1347 16, /* Bitsize. */
1348 TRUE, /* PC_relative. */
1349 0, /* Bitpos. */
1350 complain_overflow_bitfield, /* Complain_on_overflow. */
1351 v850_elf_reloc, /* Special_function. */
1352 "R_V850_16_PCREL", /* Name. */
1353 FALSE, /* Partial_inplace. */
1354 0xfffe, /* Src_mask. */
1355 0xfffe, /* Dst_mask. */
1356 TRUE), /* PCrel_offset. */
1357
1358 /* A PC relative 17 bit branch. */
1359 HOWTO (R_V850_17_PCREL, /* Type. */
1360 0, /* Rightshift. */
1361 2, /* Size (0 = byte, 1 = short, 2 = long). */
1362 17, /* Bitsize. */
1363 TRUE, /* PC_relative. */
1364 0, /* Bitpos. */
1365 complain_overflow_bitfield, /* Complain_on_overflow. */
1366 v850_elf_reloc, /* Special_function. */
1367 "R_V850_17_PCREL", /* Name. */
1368 FALSE, /* Partial_inplace. */
1369 0x0010fffe, /* Src_mask. */
1370 0x0010fffe, /* Dst_mask. */
1371 TRUE), /* PCrel_offset. */
1372
1373 /* A 23bit offset ld/st. */
1374 HOWTO (R_V850_23, /* type. */
1375 0, /* rightshift. */
1376 2, /* size (0 = byte, 1 = short, 2 = long). */
1377 23, /* bitsize. */
1378 FALSE, /* pc_relative. */
1379 0, /* bitpos. */
1380 complain_overflow_dont, /* complain_on_overflow. */
1381 v850_elf_reloc, /* special_function. */
1382 "R_V850_23", /* name. */
1383 FALSE, /* partial_inplace. */
1384 0xffff07f0, /* src_mask. */
1385 0xffff07f0, /* dst_mask. */
1386 FALSE), /* pcrel_offset. */
1387
1388 /* A PC relative 32 bit branch. */
1389 HOWTO (R_V850_32_PCREL, /* type. */
1390 1, /* rightshift. */
1391 2, /* size (0 = byte, 1 = short, 2 = long). */
1392 32, /* bitsize. */
1393 TRUE, /* pc_relative. */
1394 1, /* bitpos. */
1395 complain_overflow_signed, /* complain_on_overflow. */
1396 v850_elf_reloc, /* special_function. */
1397 "R_V850_32_PCREL", /* name. */
1398 FALSE, /* partial_inplace. */
1399 0xfffffffe, /* src_mask. */
1400 0xfffffffe, /* dst_mask. */
1401 TRUE), /* pcrel_offset. */
1402
07d6d2b8 1403 /* A absolute 32 bit branch. */
1cd986c5
NC
1404 HOWTO (R_V850_32_ABS, /* type. */
1405 1, /* rightshift. */
1406 2, /* size (0 = byte, 1 = short, 2 = long). */
1407 32, /* bitsize. */
1408 TRUE, /* pc_relative. */
1409 1, /* bitpos. */
1410 complain_overflow_signed, /* complain_on_overflow. */
1411 v850_elf_reloc, /* special_function. */
1412 "R_V850_32_ABS", /* name. */
1413 FALSE, /* partial_inplace. */
1414 0xfffffffe, /* src_mask. */
1415 0xfffffffe, /* dst_mask. */
1416 FALSE), /* pcrel_offset. */
1417
1418 /* High 16 bits of symbol value. */
1419 HOWTO (R_V850_HI16, /* Type. */
1420 0, /* Rightshift. */
1421 1, /* Size (0 = byte, 1 = short, 2 = long). */
1422 16, /* Bitsize. */
1423 FALSE, /* PC_relative. */
1424 0, /* Bitpos. */
1425 complain_overflow_dont, /* Complain_on_overflow. */
1426 v850_elf_reloc, /* Special_function. */
1427 "R_V850_HI16", /* Name. */
1428 FALSE, /* Partial_inplace. */
1429 0xffff, /* Src_mask. */
1430 0xffff, /* Dst_mask. */
1431 FALSE), /* PCrel_offset. */
1432
1433 /* Low 16 bits of symbol value. */
1434 HOWTO (R_V850_16_S1, /* type. */
1435 1, /* rightshift. */
1436 1, /* size (0 = byte, 1 = short, 2 = long). */
1437 16, /* bitsize. */
1438 FALSE, /* pc_relative. */
1439 1, /* bitpos. */
1440 complain_overflow_dont, /* complain_on_overflow. */
1441 v850_elf_reloc, /* special_function. */
1442 "R_V850_16_S1", /* name. */
1443 FALSE, /* partial_inplace. */
1444 0xfffe, /* src_mask. */
1445 0xfffe, /* dst_mask. */
1446 FALSE), /* pcrel_offset. */
1447
1448 /* Low 16 bits of symbol value. */
1449 HOWTO (R_V850_LO16_S1, /* type. */
1450 1, /* rightshift. */
1451 1, /* size (0 = byte, 1 = short, 2 = long). */
1452 16, /* bitsize. */
1453 FALSE, /* pc_relative. */
1454 1, /* bitpos. */
1455 complain_overflow_dont, /* complain_on_overflow. */
1456 v850_elf_reloc, /* special_function. */
1457 "R_V850_LO16_S1", /* name. */
1458 FALSE, /* partial_inplace. */
1459 0xfffe, /* src_mask. */
1460 0xfffe, /* dst_mask. */
1461 FALSE), /* pcrel_offset. */
1462
1463 /* 16 bit offset from the call table base pointer. */
1464 HOWTO (R_V850_CALLT_15_16_OFFSET, /* type. */
1465 1, /* rightshift. */
1466 1, /* size (0 = byte, 1 = short, 2 = long). */
1467 16, /* bitsize. */
1468 FALSE, /* pc_relative. */
1469 1, /* bitpos. */
1470 complain_overflow_dont, /* complain_on_overflow. */
1471 v850_elf_reloc, /* special_function. */
1472 "R_V850_CALLT_15_16_OFFSET", /* name. */
1473 FALSE, /* partial_inplace. */
1474 0xfffe, /* src_mask. */
1475 0xfffe, /* dst_mask. */
1476 FALSE), /* pcrel_offset. */
1477
1478 /* Like R_V850_32 PCREL, but referring to the GOT table entry for
1479 the symbol. */
1480 HOWTO (R_V850_32_GOTPCREL, /* type. */
1481 0, /* rightshift. */
1482 2, /* size (0 = byte, 1 = short, 2 = long). */
1483 32, /* bitsize. */
1484 TRUE, /* pc_relative. */
1485 0, /* bitpos. */
1486 complain_overflow_unsigned, /* complain_on_overflow. */
1487 v850_elf_reloc, /* special_function. */
1488 "R_V850_32_GOTPCREL", /* name. */
1489 FALSE, /* partial_inplace. */
1490 0xffffffff, /* src_mask. */
1491 0xffffffff, /* dst_mask. */
1492 TRUE), /* pcrel_offset. */
1493
1494 /* Like R_V850_SDA_, but referring to the GOT table entry for
1495 the symbol. */
1496 HOWTO (R_V850_16_GOT, /* type. */
1497 0, /* rightshift. */
1498 2, /* size (0 = byte, 1 = short, 2 = long). */
1499 16, /* bitsize. */
1500 FALSE, /* pc_relative. */
1501 0, /* bitpos. */
1502 complain_overflow_unsigned, /* complain_on_overflow. */
1503 bfd_elf_generic_reloc, /* special_function. */
1504 "R_V850_16_GOT", /* name. */
1505 FALSE, /* partial_inplace. */
1506 0xffff, /* src_mask. */
1507 0xffff, /* dst_mask. */
1508 FALSE), /* pcrel_offset. */
1509
1510 HOWTO (R_V850_32_GOT, /* type. */
1511 0, /* rightshift. */
1512 2, /* size (0 = byte, 1 = short, 2 = long). */
1513 32, /* bitsize. */
1514 FALSE, /* pc_relative. */
1515 0, /* bitpos. */
1516 complain_overflow_unsigned, /* complain_on_overflow. */
1517 bfd_elf_generic_reloc, /* special_function. */
1518 "R_V850_32_GOT", /* name. */
1519 FALSE, /* partial_inplace. */
1520 0xffffffff, /* src_mask. */
1521 0xffffffff, /* dst_mask. */
1522 FALSE), /* pcrel_offset. */
1523
1524 /* Like R_V850_22_PCREL, but referring to the procedure linkage table
1525 entry for the symbol. */
1526 HOWTO (R_V850_22_PLT, /* type. */
1527 1, /* rightshift. */
1528 2, /* size (0 = byte, 1 = short, 2 = long). */
1529 22, /* bitsize. */
1530 TRUE, /* pc_relative. */
1531 7, /* bitpos. */
1532 complain_overflow_signed, /* complain_on_overflow. */
1533 bfd_elf_generic_reloc, /* special_function. */
1534 "R_V850_22_PLT", /* name. */
1535 FALSE, /* partial_inplace. */
1536 0x07ffff80, /* src_mask. */
1537 0x07ffff80, /* dst_mask. */
1538 TRUE), /* pcrel_offset. */
1539
1540 HOWTO (R_V850_32_PLT, /* type. */
1541 1, /* rightshift. */
1542 2, /* size (0 = byte, 1 = short, 2 = long). */
1543 32, /* bitsize. */
1544 TRUE, /* pc_relative. */
1545 1, /* bitpos. */
1546 complain_overflow_signed, /* complain_on_overflow. */
1547 bfd_elf_generic_reloc, /* special_function. */
1548 "R_V850_32_PLT", /* name. */
1549 FALSE, /* partial_inplace. */
1550 0xffffffff, /* src_mask. */
1551 0xffffffff, /* dst_mask. */
1552 TRUE), /* pcrel_offset. */
1553
1554 /* This is used only by the dynamic linker. The symbol should exist
1555 both in the object being run and in some shared library. The
1556 dynamic linker copies the data addressed by the symbol from the
1557 shared library into the object, because the object being
1558 run has to have the data at some particular address. */
1559 HOWTO (R_V850_COPY, /* type. */
1560 0, /* rightshift. */
1561 2, /* size (0 = byte, 1 = short, 2 = long). */
1562 32, /* bitsize. */
1563 FALSE, /* pc_relative. */
1564 0, /* bitpos. */
1565 complain_overflow_bitfield, /* complain_on_overflow. */
1566 bfd_elf_generic_reloc, /* special_function. */
1567 "R_V850_COPY", /* name. */
1568 FALSE, /* partial_inplace. */
1569 0xffffffff, /* src_mask. */
1570 0xffffffff, /* dst_mask. */
1571 FALSE), /* pcrel_offset. */
1572
1573 /* Like R_M32R_24, but used when setting global offset table
1574 entries. */
1575 HOWTO (R_V850_GLOB_DAT, /* type. */
1576 0, /* rightshift. */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 32, /* bitsize. */
1579 FALSE, /* pc_relative. */
1580 0, /* bitpos. */
1581 complain_overflow_bitfield, /* complain_on_overflow. */
1582 bfd_elf_generic_reloc, /* special_function. */
1583 "R_V850_GLOB_DAT", /* name. */
1584 FALSE, /* partial_inplace. */
1585 0xffffffff, /* src_mask. */
1586 0xffffffff, /* dst_mask. */
1587 FALSE), /* pcrel_offset. */
1588
1589 /* Marks a procedure linkage table entry for a symbol. */
1590 HOWTO (R_V850_JMP_SLOT, /* type. */
1591 0, /* rightshift. */
1592 2, /* size (0 = byte, 1 = short, 2 = long) */
1593 32, /* bitsize. */
1594 FALSE, /* pc_relative. */
1595 0, /* bitpos. */
1596 complain_overflow_bitfield, /* complain_on_overflow. */
1597 bfd_elf_generic_reloc, /* special_function. */
1598 "R_V850_JMP_SLOT", /* name. */
1599 FALSE, /* partial_inplace. */
1600 0xffffffff, /* src_mask. */
1601 0xffffffff, /* dst_mask. */
1602 FALSE), /* pcrel_offset. */
1603
1604 /* Used only by the dynamic linker. When the object is run, this
1605 longword is set to the load address of the object, plus the
1606 addend. */
1607 HOWTO (R_V850_RELATIVE, /* type. */
1608 0, /* rightshift. */
1609 2, /* size (0 = byte, 1 = short, 2 = long) */
1610 32, /* bitsize. */
1611 FALSE, /* pc_relative. */
1612 0, /* bitpos. */
1613 complain_overflow_bitfield, /* complain_on_overflow. */
1614 bfd_elf_generic_reloc, /* special_function. */
1615 "R_V850_RELATIVE", /* name. */
1616 FALSE, /* partial_inplace. */
1617 0xffffffff, /* src_mask. */
1618 0xffffffff, /* dst_mask. */
1619 FALSE), /* pcrel_offset. */
1620
1621 HOWTO (R_V850_16_GOTOFF, /* type. */
1622 0, /* rightshift. */
1623 2, /* size (0 = byte, 1 = short, 2 = long) */
1624 16, /* bitsize. */
1625 FALSE, /* pc_relative. */
1626 0, /* bitpos. */
1627 complain_overflow_bitfield, /* complain_on_overflow. */
1628 bfd_elf_generic_reloc, /* special_function. */
1629 "R_V850_16_GOTOFF", /* name. */
1630 FALSE, /* partial_inplace. */
1631 0xffff, /* src_mask. */
1632 0xffff, /* dst_mask. */
1633 FALSE), /* pcrel_offset. */
1634
1635 HOWTO (R_V850_32_GOTOFF, /* type. */
1636 0, /* rightshift. */
1637 2, /* size (0 = byte, 1 = short, 2 = long) */
1638 32, /* bitsize. */
1639 FALSE, /* pc_relative. */
1640 0, /* bitpos. */
1641 complain_overflow_bitfield, /* complain_on_overflow. */
1642 bfd_elf_generic_reloc, /* special_function. */
1643 "R_V850_32_GOTOFF", /* name. */
1644 FALSE, /* partial_inplace. */
1645 0xffffffff, /* src_mask. */
1646 0xffffffff, /* dst_mask. */
1647 FALSE), /* pcrel_offset. */
1648
1649 HOWTO (R_V850_CODE, /* type. */
1650 0, /* rightshift. */
1651 1, /* size (0 = byte, 1 = short, 2 = long) */
1652 0, /* bitsize. */
1653 FALSE, /* pc_relative. */
1654 0, /* bitpos. */
1655 complain_overflow_unsigned, /* complain_on_overflow. */
1656 v850_elf_ignore_reloc, /* special_function. */
1657 "R_V850_CODE", /* name. */
1658 FALSE, /* partial_inplace. */
1659 0, /* src_mask. */
1660 0, /* dst_mask. */
1661 TRUE), /* pcrel_offset. */
1662
1663 HOWTO (R_V850_DATA, /* type. */
1664 0, /* rightshift. */
1665 1, /* size (0 = byte, 1 = short, 2 = long) */
1666 0, /* bitsize. */
1667 FALSE, /* pc_relative. */
1668 0, /* bitpos. */
1669 complain_overflow_unsigned, /* complain_on_overflow. */
1670 v850_elf_ignore_reloc, /* special_function. */
1671 "R_V850_DATA", /* name. */
1672 FALSE, /* partial_inplace. */
1673 0, /* src_mask. */
1674 0, /* dst_mask. */
1675 TRUE), /* pcrel_offset. */
1676
47b0e7ad
NC
1677};
1678
1679/* Map BFD reloc types to V850 ELF reloc types. */
1680
1681struct v850_elf_reloc_map
1682{
1683 /* BFD_RELOC_V850_CALLT_16_16_OFFSET is 258, which will not fix in an
1684 unsigned char. */
1685 bfd_reloc_code_real_type bfd_reloc_val;
1686 unsigned int elf_reloc_val;
1687};
1688
1689static const struct v850_elf_reloc_map v850_elf_reloc_map[] =
1690{
07d6d2b8
AM
1691 { BFD_RELOC_NONE, R_V850_NONE },
1692 { BFD_RELOC_V850_9_PCREL, R_V850_9_PCREL },
1693 { BFD_RELOC_V850_22_PCREL, R_V850_22_PCREL },
1694 { BFD_RELOC_HI16_S, R_V850_HI16_S },
1695 { BFD_RELOC_HI16, R_V850_HI16 },
1696 { BFD_RELOC_LO16, R_V850_LO16 },
1697 { BFD_RELOC_32, R_V850_ABS32 },
1698 { BFD_RELOC_32_PCREL, R_V850_REL32 },
1699 { BFD_RELOC_16, R_V850_16 },
1700 { BFD_RELOC_8, R_V850_8 },
1701 { BFD_RELOC_V850_SDA_16_16_OFFSET, R_V850_SDA_16_16_OFFSET },
1702 { BFD_RELOC_V850_SDA_15_16_OFFSET, R_V850_SDA_15_16_OFFSET },
1703 { BFD_RELOC_V850_ZDA_16_16_OFFSET, R_V850_ZDA_16_16_OFFSET },
1704 { BFD_RELOC_V850_ZDA_15_16_OFFSET, R_V850_ZDA_15_16_OFFSET },
1705 { BFD_RELOC_V850_TDA_6_8_OFFSET, R_V850_TDA_6_8_OFFSET },
1706 { BFD_RELOC_V850_TDA_7_8_OFFSET, R_V850_TDA_7_8_OFFSET },
1707 { BFD_RELOC_V850_TDA_7_7_OFFSET, R_V850_TDA_7_7_OFFSET },
1708 { BFD_RELOC_V850_TDA_16_16_OFFSET, R_V850_TDA_16_16_OFFSET },
1709 { BFD_RELOC_V850_TDA_4_5_OFFSET, R_V850_TDA_4_5_OFFSET },
1710 { BFD_RELOC_V850_TDA_4_4_OFFSET, R_V850_TDA_4_4_OFFSET },
1711 { BFD_RELOC_V850_LO16_SPLIT_OFFSET, R_V850_LO16_SPLIT_OFFSET },
47b0e7ad
NC
1712 { BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET, R_V850_SDA_16_16_SPLIT_OFFSET },
1713 { BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET, R_V850_ZDA_16_16_SPLIT_OFFSET },
07d6d2b8
AM
1714 { BFD_RELOC_V850_CALLT_6_7_OFFSET, R_V850_CALLT_6_7_OFFSET },
1715 { BFD_RELOC_V850_CALLT_16_16_OFFSET, R_V850_CALLT_16_16_OFFSET },
1716 { BFD_RELOC_VTABLE_INHERIT, R_V850_GNU_VTINHERIT },
1717 { BFD_RELOC_VTABLE_ENTRY, R_V850_GNU_VTENTRY },
1718 { BFD_RELOC_V850_LONGCALL, R_V850_LONGCALL },
1719 { BFD_RELOC_V850_LONGJUMP, R_V850_LONGJUMP },
1720 { BFD_RELOC_V850_ALIGN, R_V850_ALIGN },
1721 { BFD_RELOC_V850_16_PCREL, R_V850_16_PCREL },
1722 { BFD_RELOC_V850_17_PCREL, R_V850_17_PCREL },
1723 { BFD_RELOC_V850_23, R_V850_23 },
1724 { BFD_RELOC_V850_32_PCREL, R_V850_32_PCREL },
1725 { BFD_RELOC_V850_32_ABS, R_V850_32_ABS },
1726 { BFD_RELOC_V850_16_SPLIT_OFFSET, R_V850_HI16 },
1727 { BFD_RELOC_V850_16_S1, R_V850_16_S1 },
1728 { BFD_RELOC_V850_LO16_S1, R_V850_LO16_S1 },
1729 { BFD_RELOC_V850_CALLT_15_16_OFFSET, R_V850_CALLT_15_16_OFFSET },
1730 { BFD_RELOC_V850_32_GOTPCREL, R_V850_32_GOTPCREL },
1731 { BFD_RELOC_V850_16_GOT, R_V850_16_GOT },
1732 { BFD_RELOC_V850_32_GOT, R_V850_32_GOT },
1733 { BFD_RELOC_V850_22_PLT_PCREL, R_V850_22_PLT },
1734 { BFD_RELOC_V850_32_PLT_PCREL, R_V850_32_PLT },
1735 { BFD_RELOC_V850_COPY, R_V850_COPY },
1736 { BFD_RELOC_V850_GLOB_DAT, R_V850_GLOB_DAT },
1737 { BFD_RELOC_V850_JMP_SLOT, R_V850_JMP_SLOT },
1738 { BFD_RELOC_V850_RELATIVE, R_V850_RELATIVE },
1739 { BFD_RELOC_V850_16_GOTOFF, R_V850_16_GOTOFF },
1740 { BFD_RELOC_V850_32_GOTOFF, R_V850_32_GOTOFF },
1741 { BFD_RELOC_V850_CODE, R_V850_CODE },
1742 { BFD_RELOC_V850_DATA, R_V850_DATA },
47b0e7ad 1743};
de863c74
NC
1744
1745#define V800_RELOC(name,sz,bit,shift,complain,pcrel,resolver) \
1746 HOWTO (name, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
1747 bfd_elf_ ## resolver ## _reloc, #name, FALSE, 0, ~0, FALSE)
1748
1749#define V800_EMPTY(name) EMPTY_HOWTO (name - R_V810_NONE)
1750
1751#define bfd_elf_v850_reloc v850_elf_reloc
1752
1753/* Note: It is REQUIRED that the 'type' value (R_V810_...) of each entry
1754 in this array match the index of the entry in the array minus 0x30.
1755 See: bfd_elf_v850_relocate_section(), v800_elf_reloc_type_lookup()
1756 and v800_elf_info_to_howto(). */
1757
1758static reloc_howto_type v800_elf_howto_table[] =
1759{
1760 V800_RELOC (R_V810_NONE, 0, 0, 0, dont, FALSE, generic), /* Type = 0x30 */
1761 V800_RELOC (R_V810_BYTE, 0, 8, 0, dont, FALSE, generic),
1762 V800_RELOC (R_V810_HWORD, 1, 16, 0, dont, FALSE, generic),
1763 V800_RELOC (R_V810_WORD, 2, 32, 0, dont, FALSE, generic),
1764 V800_RELOC (R_V810_WLO, 1, 16, 0, dont, FALSE, generic),
1765 V800_RELOC (R_V810_WHI, 1, 16, 0, dont, FALSE, generic),
1766 V800_RELOC (R_V810_WHI1, 1, 16, 0, dont, FALSE, generic),
1767 V800_RELOC (R_V810_GPBYTE, 0, 8, 0, dont, FALSE, v850),
1768 V800_RELOC (R_V810_GPHWORD, 1, 16, 0, dont, FALSE, v850),
1769 V800_RELOC (R_V810_GPWORD, 2, 32, 0, dont, FALSE, v850),
1770 V800_RELOC (R_V810_GPWLO, 1, 16, 0, dont, FALSE, v850),
1771 V800_RELOC (R_V810_GPWHI, 1, 16, 0, dont, FALSE, v850),
1772 V800_RELOC (R_V810_GPWHI1, 1, 16, 0, dont, FALSE, v850),
1773 V800_RELOC (R_V850_HWLO, 1, 16, 0, dont, FALSE, generic),
1774 V800_EMPTY (R_V810_reserved1),
1775 V800_RELOC (R_V850_EP7BIT, 0, 7, 0, unsigned, FALSE, v850),
1776 V800_RELOC (R_V850_EPHBYTE, 0, 8, 1, unsigned, FALSE, v850),
1777 V800_RELOC (R_V850_EPWBYTE, 0, 8, 2, unsigned, FALSE, v850),
1778 V800_RELOC (R_V850_REGHWLO, 1, 16, 0, dont, FALSE, v850),
1779 V800_EMPTY (R_V810_reserved2),
1780 V800_RELOC (R_V850_GPHWLO, 1, 16, 0, dont, FALSE, v850),
1781 V800_EMPTY (R_V810_reserved3),
1782 V800_RELOC (R_V850_PCR22, 2, 22, 0, signed, TRUE, generic),
1783 V800_RELOC (R_V850_BLO, 2, 24, 0, dont, FALSE, v850),
1784 V800_RELOC (R_V850_EP4BIT, 0, 4, 0, unsigned, FALSE, v850),
1785 V800_RELOC (R_V850_EP5BIT, 0, 5, 0, unsigned, FALSE, v850),
1786 V800_RELOC (R_V850_REGBLO, 2, 24, 0, dont, FALSE, v850),
1787 V800_RELOC (R_V850_GPBLO, 2, 24, 0, dont, FALSE, v850),
1788 V800_RELOC (R_V810_WLO_1, 1, 16, 0, dont, FALSE, v850),
1789 V800_RELOC (R_V810_GPWLO_1, 1, 16, 0, signed, FALSE, v850),
1790 V800_RELOC (R_V850_BLO_1, 2, 16, 0, signed, FALSE, v850),
1791 V800_RELOC (R_V850_HWLO_1, 1, 16, 0, signed, FALSE, v850),
1792 V800_EMPTY (R_V810_reserved4),
1793 V800_RELOC (R_V850_GPBLO_1, 2, 16, 1, signed, FALSE, v850),
1794 V800_RELOC (R_V850_GPHWLO_1, 1, 16, 1, signed, FALSE, v850),
1795 V800_EMPTY (R_V810_reserved5),
1796 V800_RELOC (R_V850_EPBLO, 2, 16, 1, signed, FALSE, v850),
1797 V800_RELOC (R_V850_EPHWLO, 1, 16, 1, signed, FALSE, v850),
1798 V800_EMPTY (R_V810_reserved6),
1799 V800_RELOC (R_V850_EPWLO_N, 1, 16, 1, signed, FALSE, v850),
1800 V800_RELOC (R_V850_PC32, 2, 32, 1, signed, TRUE, v850),
1801 V800_RELOC (R_V850_W23BIT, 2, 23, 1, signed, FALSE, v850),
1802 V800_RELOC (R_V850_GPW23BIT, 2, 23, 1, signed, FALSE, v850),
1803 V800_RELOC (R_V850_EPW23BIT, 2, 23, 1, signed, FALSE, v850),
1804 V800_RELOC (R_V850_B23BIT, 2, 23, 1, signed, FALSE, v850),
1805 V800_RELOC (R_V850_GPB23BIT, 2, 23, 1, signed, FALSE, v850),
1806 V800_RELOC (R_V850_EPB23BIT, 2, 23, 1, signed, FALSE, v850),
1807 V800_RELOC (R_V850_PC16U, 1, 16, 1, unsigned, TRUE, generic),
1808 V800_RELOC (R_V850_PC17, 2, 17, 1, signed, TRUE, generic),
1809 V800_RELOC (R_V850_DW8, 2, 8, 2, signed, FALSE, v850),
1810 V800_RELOC (R_V850_GPDW8, 2, 8, 2, signed, FALSE, v850),
1811 V800_RELOC (R_V850_EPDW8, 2, 8, 2, signed, FALSE, v850),
1812 V800_RELOC (R_V850_PC9, 1, 9, 3, signed, TRUE, v850),
1813 V800_RELOC (R_V810_REGBYTE, 0, 8, 0, dont, FALSE, v850),
1814 V800_RELOC (R_V810_REGHWORD, 1, 16, 0, dont, FALSE, v850),
1815 V800_RELOC (R_V810_REGWORD, 2, 32, 0, dont, FALSE, v850),
1816 V800_RELOC (R_V810_REGWLO, 1, 16, 0, dont, FALSE, v850),
1817 V800_RELOC (R_V810_REGWHI, 1, 16, 0, dont, FALSE, v850),
1818 V800_RELOC (R_V810_REGWHI1, 1, 16, 0, dont, FALSE, v850),
1819 V800_RELOC (R_V850_REGW23BIT, 2, 23, 1, signed, FALSE, v850),
1820 V800_RELOC (R_V850_REGB23BIT, 2, 23, 1, signed, FALSE, v850),
1821 V800_RELOC (R_V850_REGDW8, 2, 8, 2, signed, FALSE, v850),
1822 V800_RELOC (R_V810_EPBYTE, 0, 8, 0, dont, FALSE, v850),
1823 V800_RELOC (R_V810_EPHWORD, 1, 16, 0, dont, FALSE, v850),
1824 V800_RELOC (R_V810_EPWORD, 2, 32, 0, dont, FALSE, v850),
1825 V800_RELOC (R_V850_WLO23, 2, 32, 1, dont, FALSE, v850),
1826 V800_RELOC (R_V850_WORD_E, 2, 32, 1, dont, FALSE, v850),
1827 V800_RELOC (R_V850_REGWORD_E, 2, 32, 1, dont, FALSE, v850),
1828 V800_RELOC (R_V850_WORD, 2, 32, 0, dont, FALSE, v850),
1829 V800_RELOC (R_V850_GPWORD, 2, 32, 0, dont, FALSE, v850),
1830 V800_RELOC (R_V850_REGWORD, 2, 32, 0, dont, FALSE, v850),
1831 V800_RELOC (R_V850_EPWORD, 2, 32, 0, dont, FALSE, v850),
1832 V800_RELOC (R_V810_TPBYTE, 0, 8, 0, dont, FALSE, v850),
1833 V800_RELOC (R_V810_TPHWORD, 1, 16, 0, dont, FALSE, v850),
1834 V800_RELOC (R_V810_TPWORD, 2, 32, 0, dont, FALSE, v850),
1835 V800_RELOC (R_V810_TPWLO, 1, 16, 0, dont, FALSE, v850),
1836 V800_RELOC (R_V810_TPWHI, 1, 16, 0, dont, FALSE, v850),
1837 V800_RELOC (R_V810_TPWHI1, 1, 16, 0, dont, FALSE, v850),
1838 V800_RELOC (R_V850_TPHWLO, 1, 16, 1, dont, FALSE, v850),
1839 V800_RELOC (R_V850_TPBLO, 2, 24, 0, dont, FALSE, v850),
1840 V800_RELOC (R_V810_TPWLO_1, 1, 16, 0, signed, FALSE, v850),
1841 V800_RELOC (R_V850_TPBLO_1, 2, 16, 0, signed, FALSE, v850),
1842 V800_RELOC (R_V850_TPHWLO_1, 1, 16, 0, signed, FALSE, v850),
1843 V800_RELOC (R_V850_TP23BIT, 2, 23, 0, signed, FALSE, v850),
1844 V800_RELOC (R_V850_TPW23BIT, 2, 23, 0, signed, FALSE, v850),
1845 V800_RELOC (R_V850_TPDW8, 2, 8, 0, signed, FALSE, v850)
1846};
47b0e7ad
NC
1847\f
1848/* Map a bfd relocation into the appropriate howto structure. */
1849
1850static reloc_howto_type *
1851v850_elf_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1852 bfd_reloc_code_real_type code)
1853{
1854 unsigned int i;
1855
1856 for (i = ARRAY_SIZE (v850_elf_reloc_map); i --;)
1857 if (v850_elf_reloc_map[i].bfd_reloc_val == code)
1858 {
1859 unsigned int elf_reloc_val = v850_elf_reloc_map[i].elf_reloc_val;
1860
1861 BFD_ASSERT (v850_elf_howto_table[elf_reloc_val].type == elf_reloc_val);
1862
1863 return v850_elf_howto_table + elf_reloc_val;
1864 }
1865
1866 return NULL;
1867}
157090f7
AM
1868
1869static reloc_howto_type *
1870v850_elf_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1871 const char *r_name)
1872{
1873 unsigned int i;
1874
1875 for (i = 0;
1876 i < sizeof (v850_elf_howto_table) / sizeof (v850_elf_howto_table[0]);
1877 i++)
1878 if (v850_elf_howto_table[i].name != NULL
1879 && strcasecmp (v850_elf_howto_table[i].name, r_name) == 0)
1880 return &v850_elf_howto_table[i];
1881
1882 return NULL;
1883}
47b0e7ad
NC
1884\f
1885/* Set the howto pointer for an V850 ELF reloc. */
1886
f3185997 1887static bfd_boolean
0aa13fee 1888v850_elf_info_to_howto_rel (bfd *abfd,
47b0e7ad
NC
1889 arelent *cache_ptr,
1890 Elf_Internal_Rela *dst)
1891{
1892 unsigned int r_type;
1893
1894 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC
1895 if (r_type >= (unsigned int) R_V850_max)
1896 {
695344c0 1897 /* xgettext:c-format */
0aa13fee
AM
1898 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1899 abfd, r_type);
f3185997
NC
1900 bfd_set_error (bfd_error_bad_value);
1901 return FALSE;
5860e3f8 1902 }
47b0e7ad 1903 cache_ptr->howto = &v850_elf_howto_table[r_type];
f3185997 1904 return TRUE;
47b0e7ad
NC
1905}
1906
1907/* Set the howto pointer for a V850 ELF reloc (type RELA). */
1908
f3185997 1909static bfd_boolean
0aa13fee 1910v850_elf_info_to_howto_rela (bfd *abfd,
f3185997 1911 arelent * cache_ptr,
47b0e7ad
NC
1912 Elf_Internal_Rela *dst)
1913{
1914 unsigned int r_type;
1915
1916 r_type = ELF32_R_TYPE (dst->r_info);
cd21f5da
NC
1917 if (r_type >= (unsigned int) R_V850_max)
1918 {
695344c0 1919 /* xgettext:c-format */
0aa13fee
AM
1920 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1921 abfd, r_type);
f3185997
NC
1922 bfd_set_error (bfd_error_bad_value);
1923 return FALSE;
cd21f5da 1924 }
47b0e7ad 1925 cache_ptr->howto = &v850_elf_howto_table[r_type];
f3185997 1926 return TRUE;
47b0e7ad 1927}
252b5132 1928\f
b34976b6 1929static bfd_boolean
47b0e7ad 1930v850_elf_is_local_label_name (bfd *abfd ATTRIBUTE_UNUSED, const char *name)
252b5132
RH
1931{
1932 return ( (name[0] == '.' && (name[1] == 'L' || name[1] == '.'))
1933 || (name[0] == '_' && name[1] == '.' && name[2] == 'L' && name[3] == '_'));
1934}
41702d50
NC
1935
1936static bfd_boolean
1937v850_elf_is_target_special_symbol (bfd *abfd, asymbol *sym)
1938{
1939 return v850_elf_is_local_label_name (abfd, sym->name);
1940}
252b5132 1941\f
5cec6941
NC
1942/* We overload some of the bfd_reloc error codes for own purposes. */
1943#define bfd_reloc_gp_not_found bfd_reloc_other
1944#define bfd_reloc_ep_not_found bfd_reloc_continue
1945#define bfd_reloc_ctbp_not_found (bfd_reloc_dangerous + 1)
1946
252b5132 1947/* Perform a relocation as part of a final link. */
e12dd2ea 1948
252b5132 1949static bfd_reloc_status_type
47b0e7ad
NC
1950v850_elf_final_link_relocate (reloc_howto_type *howto,
1951 bfd *input_bfd,
1952 bfd *output_bfd ATTRIBUTE_UNUSED,
1953 asection *input_section,
1954 bfd_byte *contents,
1955 bfd_vma offset,
1956 bfd_vma value,
1957 bfd_vma addend,
1958 struct bfd_link_info *info,
1959 asection *sym_sec,
1960 int is_local ATTRIBUTE_UNUSED)
252b5132 1961{
b34976b6
AM
1962 unsigned int r_type = howto->type;
1963 bfd_byte *hit_data = contents + offset;
252b5132
RH
1964
1965 /* Adjust the value according to the relocation. */
1966 switch (r_type)
1967 {
de863c74 1968 case R_V850_PC9:
252b5132
RH
1969 case R_V850_9_PCREL:
1970 value -= (input_section->output_section->vma
1971 + input_section->output_offset);
1972 value -= offset;
1973 break;
435b1e90 1974
de863c74 1975 case R_V850_PC16U:
1cd986c5
NC
1976 case R_V850_16_PCREL:
1977 value -= (input_section->output_section->vma
1978 + input_section->output_offset
1979 + offset);
1980
1981 /* If the sign extension will corrupt the value then we have overflowed. */
1982 if ((value & 0xffff0000) != 0xffff0000)
1983 return bfd_reloc_overflow;
1984
1985 break;
1986
de863c74 1987 case R_V850_PC17:
1cd986c5
NC
1988 case R_V850_17_PCREL:
1989 value -= (input_section->output_section->vma
1990 + input_section->output_offset
1991 + offset);
1992
1993 /* If the sign extension will corrupt the value then we have overflowed. */
1994 if (((value & 0xffff0000) != 0x0) && ((value & 0xffff0000) != 0xffff0000))
1995 return bfd_reloc_overflow;
1996
1997 value = SEXT17 (value);
1998 break;
1999
de863c74 2000 case R_V850_PCR22:
252b5132
RH
2001 case R_V850_22_PCREL:
2002 value -= (input_section->output_section->vma
2003 + input_section->output_offset
2004 + offset);
2005
232fb1a3 2006 /* If the sign extension will corrupt the value then we have overflowed. */
1cd986c5 2007 if (((value & 0xffe00000) != 0x0) && ((value & 0xffe00000) != 0xffe00000))
232fb1a3 2008 return bfd_reloc_overflow;
435b1e90 2009
1cd986c5
NC
2010 /* Only the bottom 22 bits of the PC are valid. */
2011 value = SEXT22 (value);
252b5132 2012 break;
435b1e90 2013
de863c74 2014 case R_V850_PC32:
1cd986c5 2015 case R_V850_32_PCREL:
e30ddb24
NC
2016 value -= (input_section->output_section->vma
2017 + input_section->output_offset
2018 + offset);
2019 break;
2020
1cd986c5
NC
2021 case R_V850_32_ABS:
2022 case R_V850_23:
252b5132
RH
2023 case R_V850_HI16_S:
2024 case R_V850_HI16:
2025 case R_V850_LO16:
1cd986c5 2026 case R_V850_LO16_S1:
1e50d24d 2027 case R_V850_LO16_SPLIT_OFFSET:
252b5132 2028 case R_V850_16:
e30ddb24 2029 case R_V850_ABS32:
252b5132 2030 case R_V850_8:
de863c74
NC
2031 case R_V810_BYTE:
2032 case R_V810_HWORD:
2033 case R_V810_WORD:
2034 case R_V810_WLO:
2035 case R_V810_WHI:
2036 case R_V810_WHI1:
2037 case R_V810_WLO_1:
2038 case R_V850_WLO23:
2039 case R_V850_BLO:
252b5132
RH
2040 break;
2041
435b1e90 2042 case R_V850_ZDA_15_16_OFFSET:
252b5132
RH
2043 case R_V850_ZDA_16_16_OFFSET:
2044 case R_V850_ZDA_16_16_SPLIT_OFFSET:
2045 if (sym_sec == NULL)
2046 return bfd_reloc_undefined;
435b1e90 2047
252b5132
RH
2048 value -= sym_sec->output_section->vma;
2049 break;
2050
2051 case R_V850_SDA_15_16_OFFSET:
2052 case R_V850_SDA_16_16_OFFSET:
2053 case R_V850_SDA_16_16_SPLIT_OFFSET:
de863c74 2054 case R_V810_GPWLO_1:
252b5132 2055 {
07d6d2b8 2056 unsigned long gp;
252b5132
RH
2057 struct bfd_link_hash_entry * h;
2058
2059 if (sym_sec == NULL)
2060 return bfd_reloc_undefined;
435b1e90 2061
252b5132 2062 /* Get the value of __gp. */
b34976b6 2063 h = bfd_link_hash_lookup (info->hash, "__gp", FALSE, FALSE, TRUE);
47b0e7ad 2064 if (h == NULL
252b5132 2065 || h->type != bfd_link_hash_defined)
5cec6941 2066 return bfd_reloc_gp_not_found;
252b5132
RH
2067
2068 gp = (h->u.def.value
2069 + h->u.def.section->output_section->vma
2070 + h->u.def.section->output_offset);
2071
2072 value -= sym_sec->output_section->vma;
2073 value -= (gp - sym_sec->output_section->vma);
2074 }
2075 break;
2076
2077 case R_V850_TDA_4_4_OFFSET:
2078 case R_V850_TDA_4_5_OFFSET:
252b5132
RH
2079 case R_V850_TDA_7_7_OFFSET:
2080 case R_V850_TDA_7_8_OFFSET:
2081 case R_V850_TDA_6_8_OFFSET:
1cd986c5 2082 case R_V850_TDA_16_16_OFFSET:
252b5132 2083 {
07d6d2b8 2084 unsigned long ep;
252b5132 2085 struct bfd_link_hash_entry * h;
435b1e90 2086
252b5132 2087 /* Get the value of __ep. */
b34976b6 2088 h = bfd_link_hash_lookup (info->hash, "__ep", FALSE, FALSE, TRUE);
47b0e7ad 2089 if (h == NULL
252b5132 2090 || h->type != bfd_link_hash_defined)
5cec6941 2091 return bfd_reloc_ep_not_found;
252b5132
RH
2092
2093 ep = (h->u.def.value
2094 + h->u.def.section->output_section->vma
2095 + h->u.def.section->output_offset);
2096
2097 value -= ep;
2098 }
2099 break;
435b1e90 2100
252b5132
RH
2101 case R_V850_CALLT_6_7_OFFSET:
2102 {
07d6d2b8 2103 unsigned long ctbp;
252b5132 2104 struct bfd_link_hash_entry * h;
435b1e90 2105
252b5132 2106 /* Get the value of __ctbp. */
b34976b6 2107 h = bfd_link_hash_lookup (info->hash, "__ctbp", FALSE, FALSE, TRUE);
47b0e7ad 2108 if (h == NULL
252b5132 2109 || h->type != bfd_link_hash_defined)
5cec6941 2110 return bfd_reloc_ctbp_not_found;
252b5132
RH
2111
2112 ctbp = (h->u.def.value
2113 + h->u.def.section->output_section->vma
2114 + h->u.def.section->output_offset);
2115 value -= ctbp;
2116 }
2117 break;
435b1e90 2118
1cd986c5 2119 case R_V850_CALLT_15_16_OFFSET:
252b5132
RH
2120 case R_V850_CALLT_16_16_OFFSET:
2121 {
07d6d2b8 2122 unsigned long ctbp;
252b5132
RH
2123 struct bfd_link_hash_entry * h;
2124
2125 if (sym_sec == NULL)
2126 return bfd_reloc_undefined;
435b1e90 2127
252b5132 2128 /* Get the value of __ctbp. */
b34976b6 2129 h = bfd_link_hash_lookup (info->hash, "__ctbp", FALSE, FALSE, TRUE);
47b0e7ad 2130 if (h == NULL
252b5132 2131 || h->type != bfd_link_hash_defined)
5cec6941 2132 return bfd_reloc_ctbp_not_found;
252b5132
RH
2133
2134 ctbp = (h->u.def.value
2135 + h->u.def.section->output_section->vma
2136 + h->u.def.section->output_offset);
2137
2138 value -= sym_sec->output_section->vma;
2139 value -= (ctbp - sym_sec->output_section->vma);
2140 }
2141 break;
435b1e90 2142
252b5132 2143 case R_V850_NONE:
de863c74 2144 case R_V810_NONE:
252b5132
RH
2145 case R_V850_GNU_VTINHERIT:
2146 case R_V850_GNU_VTENTRY:
86aba9db
NC
2147 case R_V850_LONGCALL:
2148 case R_V850_LONGJUMP:
2149 case R_V850_ALIGN:
252b5132
RH
2150 return bfd_reloc_ok;
2151
2152 default:
de863c74 2153#ifdef DEBUG
0aa13fee
AM
2154 _bfd_error_handler ("%pB: unsupported relocation type %#x",
2155 input_bfd, r_type);
de863c74 2156#endif
252b5132
RH
2157 return bfd_reloc_notsupported;
2158 }
2159
2160 /* Perform the relocation. */
435b1e90 2161 return v850_elf_perform_relocation (input_bfd, r_type, value + addend, hit_data);
252b5132 2162}
252b5132
RH
2163\f
2164/* Relocate an V850 ELF section. */
e12dd2ea 2165
b34976b6 2166static bfd_boolean
47b0e7ad
NC
2167v850_elf_relocate_section (bfd *output_bfd,
2168 struct bfd_link_info *info,
2169 bfd *input_bfd,
2170 asection *input_section,
2171 bfd_byte *contents,
2172 Elf_Internal_Rela *relocs,
2173 Elf_Internal_Sym *local_syms,
2174 asection **local_sections)
252b5132 2175{
b34976b6
AM
2176 Elf_Internal_Shdr *symtab_hdr;
2177 struct elf_link_hash_entry **sym_hashes;
2178 Elf_Internal_Rela *rel;
2179 Elf_Internal_Rela *relend;
252b5132
RH
2180
2181 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
2182 sym_hashes = elf_sym_hashes (input_bfd);
2183
252b5132
RH
2184 /* Reset the list of remembered HI16S relocs to empty. */
2185 free_hi16s = previous_hi16s;
2186 previous_hi16s = NULL;
2187 hi16s_counter = 0;
435b1e90 2188
252b5132
RH
2189 rel = relocs;
2190 relend = relocs + input_section->reloc_count;
2191 for (; rel < relend; rel++)
2192 {
de863c74 2193 unsigned int r_type;
b34976b6
AM
2194 reloc_howto_type *howto;
2195 unsigned long r_symndx;
2196 Elf_Internal_Sym *sym;
2197 asection *sec;
2198 struct elf_link_hash_entry *h;
2199 bfd_vma relocation;
2200 bfd_reloc_status_type r;
252b5132
RH
2201
2202 r_symndx = ELF32_R_SYM (rel->r_info);
2203 r_type = ELF32_R_TYPE (rel->r_info);
2204
2205 if (r_type == R_V850_GNU_VTENTRY
07d6d2b8
AM
2206 || r_type == R_V850_GNU_VTINHERIT)
2207 continue;
252b5132 2208
de863c74
NC
2209 if (bfd_get_arch (input_bfd) == bfd_arch_v850_rh850)
2210 howto = v800_elf_howto_table + (r_type - R_V810_NONE);
2211 else
2212 howto = v850_elf_howto_table + r_type;
2213
2214 BFD_ASSERT (r_type == howto->type);
2215
252b5132
RH
2216 h = NULL;
2217 sym = NULL;
2218 sec = NULL;
2219 if (r_symndx < symtab_hdr->sh_info)
2220 {
2221 sym = local_syms + r_symndx;
2222 sec = local_sections[r_symndx];
8517fae7 2223 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH
2224 }
2225 else
2226 {
62d887d4 2227 bfd_boolean unresolved_reloc, warned, ignored;
435b1e90 2228
47b0e7ad
NC
2229 /* Note - this check is delayed until now as it is possible and
2230 valid to have a file without any symbols but with relocs that
2231 can be processed. */
641bd093
NC
2232 if (sym_hashes == NULL)
2233 {
2234 info->callbacks->warning
2235 (info, "no hash table available",
2236 NULL, input_bfd, input_section, (bfd_vma) 0);
2237
2238 return FALSE;
2239 }
2240
b2a8e766
AM
2241 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
2242 r_symndx, symtab_hdr, sym_hashes,
2243 h, sec, relocation,
62d887d4 2244 unresolved_reloc, warned, ignored);
252b5132
RH
2245 }
2246
dbaa2011 2247 if (sec != NULL && discarded_section (sec))
e4067dbb 2248 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 2249 rel, 1, relend, howto, 0, contents);
ab96bf03 2250
0e1862bb 2251 if (bfd_link_relocatable (info))
ab96bf03
AM
2252 continue;
2253
e12dd2ea 2254 /* FIXME: We should use the addend, but the COFF relocations don't. */
252b5132
RH
2255 r = v850_elf_final_link_relocate (howto, input_bfd, output_bfd,
2256 input_section,
2257 contents, rel->r_offset,
2258 relocation, rel->r_addend,
2259 info, sec, h == NULL);
2260
2261 if (r != bfd_reloc_ok)
2262 {
2263 const char * name;
47b0e7ad 2264 const char * msg = NULL;
252b5132
RH
2265
2266 if (h != NULL)
2267 name = h->root.root.string;
2268 else
2269 {
2270 name = (bfd_elf_string_from_elf_section
2271 (input_bfd, symtab_hdr->sh_link, sym->st_name));
2272 if (name == NULL || *name == '\0')
fd361982 2273 name = bfd_section_name (sec);
252b5132
RH
2274 }
2275
ceaf50a2 2276 switch ((int) r)
252b5132
RH
2277 {
2278 case bfd_reloc_overflow:
1a72702b
AM
2279 (*info->callbacks->reloc_overflow)
2280 (info, (h ? &h->root : NULL), name, howto->name,
2281 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
252b5132
RH
2282 break;
2283
2284 case bfd_reloc_undefined:
1a72702b
AM
2285 (*info->callbacks->undefined_symbol)
2286 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
252b5132
RH
2287 break;
2288
2289 case bfd_reloc_outofrange:
2290 msg = _("internal error: out of range error");
2291 goto common_error;
2292
2293 case bfd_reloc_notsupported:
2294 msg = _("internal error: unsupported relocation error");
2295 goto common_error;
2296
2297 case bfd_reloc_dangerous:
2298 msg = _("internal error: dangerous relocation");
2299 goto common_error;
2300
5cec6941 2301 case bfd_reloc_gp_not_found:
252b5132
RH
2302 msg = _("could not locate special linker symbol __gp");
2303 goto common_error;
2304
5cec6941 2305 case bfd_reloc_ep_not_found:
252b5132
RH
2306 msg = _("could not locate special linker symbol __ep");
2307 goto common_error;
2308
5cec6941 2309 case bfd_reloc_ctbp_not_found:
252b5132
RH
2310 msg = _("could not locate special linker symbol __ctbp");
2311 goto common_error;
435b1e90 2312
252b5132
RH
2313 default:
2314 msg = _("internal error: unknown error");
2315 /* fall through */
2316
2317 common_error:
1a72702b
AM
2318 (*info->callbacks->warning) (info, msg, name, input_bfd,
2319 input_section, rel->r_offset);
252b5132
RH
2320 break;
2321 }
2322 }
2323 }
2324
b34976b6 2325 return TRUE;
252b5132
RH
2326}
2327
252b5132 2328static asection *
47b0e7ad 2329v850_elf_gc_mark_hook (asection *sec,
07adf181 2330 struct bfd_link_info *info,
47b0e7ad
NC
2331 Elf_Internal_Rela *rel,
2332 struct elf_link_hash_entry *h,
2333 Elf_Internal_Sym *sym)
252b5132
RH
2334{
2335 if (h != NULL)
07adf181 2336 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH
2337 {
2338 case R_V850_GNU_VTINHERIT:
2339 case R_V850_GNU_VTENTRY:
07adf181
AM
2340 return NULL;
2341 }
9ad5cbcf 2342
07adf181 2343 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132 2344}
e12dd2ea 2345
685080f2
NC
2346static void
2347v850_set_note (bfd * abfd, asection * s, enum v850_notes note, unsigned int val)
2348{
2349 bfd_byte * data = s->contents + ((note - 1) * SIZEOF_V850_NOTE);
2350
2351 bfd_put_32 (abfd, 4, data + 0);
2352 bfd_put_32 (abfd, 4, data + 4);
2353 bfd_put_32 (abfd, note, data + 8);
2354 memcpy (data + 12, V850_NOTE_NAME, 4);
2355 bfd_put_32 (abfd, val, data + 16);
2356}
2357
2358/* Create the note section if not already present. This is done early so
2359 that the linker maps the sections to the right place in the output. */
2360
2361static asection *
2362v850_elf_make_note_section (bfd * abfd)
1b786873 2363{
685080f2
NC
2364 asection *s;
2365 bfd_byte *data;
2366 flagword flags;
2367 enum v850_notes id;
2368
2369 /* Make the note section. */
2370 flags = SEC_READONLY | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_MERGE;
2371
2372 s = bfd_make_section_anyway_with_flags (abfd, V850_NOTE_SECNAME, flags);
2373 if (s == NULL)
2374 return NULL;
2375
fd361982 2376 if (!bfd_set_section_alignment (s, 2))
685080f2
NC
2377 return NULL;
2378
2379 /* Allocate space for all known notes. */
fd361982 2380 if (!bfd_set_section_size (s, NUM_V850_NOTES * SIZEOF_V850_NOTE))
685080f2
NC
2381 return NULL;
2382
2383 data = bfd_zalloc (abfd, NUM_V850_NOTES * SIZEOF_V850_NOTE);
2384 if (data == NULL)
2385 return NULL;
2386
2387 s->contents = data;
2388
2389 /* Provide default (= uninitilaised) values for all of the notes. */
2390 for (id = V850_NOTE_ALIGNMENT; id <= NUM_V850_NOTES; id++)
2391 v850_set_note (abfd, s, id, 0);
2392
2393 return s;
2394}
2395
2396/* Create the note section if not already present. This is done early so
2397 that the linker maps the sections to the right place in the output. */
2398
2399bfd_boolean
2400v850_elf_create_sections (struct bfd_link_info * info)
2401{
2402 bfd * ibfd;
2403
2404 /* If we already have a note section, do not make another. */
2405 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
2406 if (bfd_get_section_by_name (ibfd, V850_NOTE_SECNAME) != NULL)
2407 return TRUE;
2408
2409 return v850_elf_make_note_section (info->input_bfds) != NULL;
2410}
2411
2412bfd_boolean
2413v850_elf_set_note (bfd * abfd, enum v850_notes note, unsigned int val)
2414{
2415 asection * notes = bfd_get_section_by_name (abfd, V850_NOTE_SECNAME);
2416
2417 if (val > 2)
2418 /* At the moment, no known note has a value over 2. */
2419 return FALSE;
2420
2421 if (notes == NULL)
2422 notes = v850_elf_make_note_section (abfd);
2423 if (notes == NULL)
2424 return FALSE;
2425
2426 v850_set_note (abfd, notes, note, val);
2427 return TRUE;
2428}
2429
71de3413 2430/* Copy a v850 note section from one object module to another. */
685080f2 2431
71de3413
MR
2432static void
2433v850_elf_copy_notes (bfd *ibfd, bfd *obfd)
685080f2
NC
2434{
2435 asection * onotes;
2436 asection * inotes;
2437
2438 /* If the output bfd does not have a note section, then
2439 skip the merge. The normal input to output section
2440 copying will take care of everythng for us. */
2441 if ((onotes = bfd_get_section_by_name (obfd, V850_NOTE_SECNAME)) == NULL)
71de3413 2442 return;
685080f2 2443
e43fb831 2444 if ((inotes = bfd_get_section_by_name (ibfd, V850_NOTE_SECNAME)) == NULL)
71de3413 2445 return;
e43fb831 2446
fd361982 2447 if (bfd_section_size (inotes) == bfd_section_size (onotes))
685080f2
NC
2448 {
2449 bfd_byte * icont;
2450 bfd_byte * ocont;
2451
685080f2
NC
2452 if ((icont = elf_section_data (inotes)->this_hdr.contents) == NULL)
2453 BFD_ASSERT (bfd_malloc_and_get_section (ibfd, inotes, & icont));
2454
2455 if ((ocont = elf_section_data (onotes)->this_hdr.contents) == NULL)
cfd14a50
NC
2456 /* If the output is being stripped then it is possible for
2457 the notes section to disappear. In this case do nothing. */
2458 return;
685080f2
NC
2459
2460 /* Copy/overwrite notes from the input to the output. */
fd361982 2461 memcpy (ocont, icont, bfd_section_size (onotes));
685080f2 2462 }
71de3413 2463}
685080f2 2464
71de3413
MR
2465/* Copy backend specific data from one object module to another. */
2466
2467static bfd_boolean
2468v850_elf_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
2469{
2470 v850_elf_copy_notes (ibfd, obfd);
2471 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
685080f2
NC
2472}
2473#define bfd_elf32_bfd_copy_private_bfd_data v850_elf_copy_private_bfd_data
2474
1b786873 2475static bfd_boolean
685080f2
NC
2476v850_elf_merge_notes (bfd * ibfd, bfd *obfd)
2477{
2478 asection * onotes;
2479 asection * inotes;
2480 bfd_boolean result = TRUE;
2481
2482 /* If the output bfd does not have a note section, then
2483 skip the merge. The normal input to output section
2484 copying will take care of everythng for us. */
2485 if ((onotes = bfd_get_section_by_name (obfd, V850_NOTE_SECNAME)) == NULL)
2486 return TRUE;
2487
2488 if ((inotes = bfd_get_section_by_name (ibfd, V850_NOTE_SECNAME)) != NULL)
2489 {
2490 enum v850_notes id;
2491 bfd_byte * icont;
2492 bfd_byte * ocont;
2493
fd361982 2494 BFD_ASSERT (bfd_section_size (inotes) == bfd_section_size (onotes));
685080f2
NC
2495
2496 if ((icont = elf_section_data (inotes)->this_hdr.contents) == NULL)
2497 BFD_ASSERT (bfd_malloc_and_get_section (ibfd, inotes, & icont));
2498
2499 if ((ocont = elf_section_data (onotes)->this_hdr.contents) == NULL)
2500 BFD_ASSERT (bfd_malloc_and_get_section (obfd, onotes, & ocont));
2501
2502 for (id = V850_NOTE_ALIGNMENT; id <= NUM_V850_NOTES; id++)
2503 {
2504 unsigned int ival;
2505 unsigned int oval;
2506 bfd_byte * idata = icont + ((id - 1) * SIZEOF_V850_NOTE) + 16;
2507 bfd_byte * odata = ocont + ((id - 1) * SIZEOF_V850_NOTE) + 16;
2508
2509 ival = bfd_get_32 (ibfd, idata);
2510 oval = bfd_get_32 (obfd, odata);
2511
2512 if (ival == 0 || ival == oval)
2513 continue;
1b786873 2514
685080f2
NC
2515 if (oval == 0)
2516 {
2517 bfd_put_32 (obfd, ival, odata);
2518 v850_set_note (obfd, onotes, id, ival);
2519 continue;
2520 }
2521
2522 /* We have a mismatch. The ABI defines how to handle
2523 this siutation on a per note type basis. */
2524 switch (id)
2525 {
2526 case V850_NOTE_ALIGNMENT:
2527 if (oval == EF_RH850_DATA_ALIGN4)
2528 {
2529 _bfd_error_handler
695344c0 2530 /* xgettext:c-format */
871b3ab2 2531 (_("error: %pB needs 8-byte alignment but %pB is set for 4-byte alignment"),
685080f2
NC
2532 ibfd, obfd);
2533 result = FALSE;
2534 }
2535 else
2536 /* ibfd uses 4-byte alignment, obfd uses 8-byte alignment.
2537 Leave the obfd alignment as it is. */
2538 BFD_ASSERT (oval == EF_RH850_DATA_ALIGN8);
2539
2540 break;
2541
2542 case V850_NOTE_DATA_SIZE:
2543 if (oval == EF_RH850_DOUBLE32)
2544 {
4eca0228 2545 _bfd_error_handler
695344c0 2546 /* xgettext:c-format */
871b3ab2
AM
2547 (_("error: %pB uses 64-bit doubles but "
2548 "%pB uses 32-bit doubles"), ibfd, obfd);
685080f2
NC
2549 result = FALSE;
2550 }
2551 else
2552 /* ibfd uses 32-bit doubles, obfd uses 64-bit doubles.
2553 This is acceptable. Honest, that is what the ABI says. */
2554 BFD_ASSERT (oval == EF_RH850_DOUBLE64);
2555 break;
2556
2557 case V850_NOTE_FPU_INFO:
2558 if (oval == EF_RH850_FPU20)
2559 {
4eca0228 2560 _bfd_error_handler
695344c0 2561 /* xgettext:c-format */
871b3ab2 2562 (_("error: %pB uses FPU-3.0 but %pB only supports FPU-2.0"),
4eca0228 2563 ibfd, obfd);
685080f2
NC
2564 result = FALSE;
2565 }
2566 else
2567 /* ibfd uses FPU-2.0, obfd uses FPU-3.0. Leave obfd as it is. */
2568 BFD_ASSERT (oval == EF_RH850_FPU30);
2569
2570 break;
2571
2572 default:
2573 /* None of the other conflicts matter.
2574 Stick with the current output values. */
2575 break;
2576 }
2577 }
2578
2579 /* FIXME: We should also check for conflicts between the notes
2580 and the EF flags in the ELF header. */
2581 }
2582
2583 return result;
2584}
2585
2586static void
2587print_v850_note (bfd * abfd, FILE * file, bfd_byte * data, enum v850_notes id)
2588{
2589 unsigned int value = bfd_get_32 (abfd, data + ((id - 1) * SIZEOF_V850_NOTE) + 16);
2590
2591 switch (id)
2592 {
2593 case V850_NOTE_ALIGNMENT:
2594 fprintf (file, _(" alignment of 8-byte entities: "));
2595 switch (value)
2596 {
2597 case EF_RH850_DATA_ALIGN4: fprintf (file, _("4-byte")); break;
2598 case EF_RH850_DATA_ALIGN8: fprintf (file, _("8-byte")); break;
2599 case 0: fprintf (file, _("not set")); break;
2600 default: fprintf (file, _("unknown: %x"), value); break;
2601 }
2602 fputc ('\n', file);
2603 break;
1b786873 2604
685080f2
NC
2605 case V850_NOTE_DATA_SIZE:
2606 fprintf (file, _(" size of doubles: "));
2607 switch (value)
2608 {
2609 case EF_RH850_DOUBLE32: fprintf (file, _("4-bytes")); break;
2610 case EF_RH850_DOUBLE64: fprintf (file, _("8-bytes")); break;
2611 case 0: fprintf (file, _("not set")); break;
2612 default: fprintf (file, _("unknown: %x"), value); break;
2613 }
2614 fputc ('\n', file);
2615 break;
1b786873 2616
685080f2
NC
2617 case V850_NOTE_FPU_INFO:
2618 fprintf (file, _(" FPU support required: "));
2619 switch (value)
2620 {
2621 case EF_RH850_FPU20: fprintf (file, _("FPU-2.0")); break;
2622 case EF_RH850_FPU30: fprintf (file, _("FPU-3.0")); break;
2623 case 0: fprintf (file, _("none")); break;
2624 default: fprintf (file, _("unknown: %x"), value); break;
2625 }
2626 fputc ('\n', file);
2627 break;
1b786873 2628
685080f2
NC
2629 case V850_NOTE_SIMD_INFO:
2630 fprintf (file, _("SIMD use: "));
2631 switch (value)
2632 {
2633 case EF_RH850_SIMD: fprintf (file, _("yes")); break;
2634 case 0: fprintf (file, _("no")); break;
2635 default: fprintf (file, _("unknown: %x"), value); break;
2636 }
2637 fputc ('\n', file);
2638 break;
1b786873 2639
685080f2
NC
2640 case V850_NOTE_CACHE_INFO:
2641 fprintf (file, _("CACHE use: "));
2642 switch (value)
2643 {
2644 case EF_RH850_CACHE: fprintf (file, _("yes")); break;
2645 case 0: fprintf (file, _("no")); break;
2646 default: fprintf (file, _("unknown: %x"), value); break;
2647 }
2648 fputc ('\n', file);
2649 break;
1b786873 2650
685080f2
NC
2651 case V850_NOTE_MMU_INFO:
2652 fprintf (file, _("MMU use: "));
2653 switch (value)
2654 {
2655 case EF_RH850_MMU: fprintf (file, _("yes")); break;
2656 case 0: fprintf (file, _("no")); break;
2657 default: fprintf (file, _("unknown: %x"), value); break;
2658 }
2659 fputc ('\n', file);
2660 break;
1b786873 2661
685080f2
NC
2662 default:
2663 BFD_ASSERT (0);
2664 }
2665}
2666
2667static void
2668v850_elf_print_notes (bfd * abfd, FILE * file)
2669{
2670 asection * notes = bfd_get_section_by_name (abfd, V850_NOTE_SECNAME);
2671 enum v850_notes id;
2672
2673 if (notes == NULL || notes->contents == NULL)
2674 return;
2675
fd361982 2676 BFD_ASSERT (bfd_section_size (notes) == NUM_V850_NOTES * SIZEOF_V850_NOTE);
685080f2
NC
2677
2678 for (id = V850_NOTE_ALIGNMENT; id <= NUM_V850_NOTES; id++)
2679 print_v850_note (abfd, file, notes->contents, id);
2680}
2681
de863c74 2682/* Set the right machine number and architecture. */
e12dd2ea 2683
b34976b6 2684static bfd_boolean
47b0e7ad 2685v850_elf_object_p (bfd *abfd)
252b5132 2686{
de863c74
NC
2687 enum bfd_architecture arch;
2688 unsigned long mach;
2689
2690 switch (elf_elfheader (abfd)->e_machine)
252b5132 2691 {
de863c74
NC
2692 case EM_V800:
2693 arch = bfd_arch_v850_rh850;
78c8d46c
NC
2694 mach = (elf_elfheader (abfd)->e_flags & EF_V800_850E3)
2695 ? bfd_mach_v850e3v5 : bfd_mach_v850e2v3;
8ad30312 2696 break;
de863c74
NC
2697
2698 case EM_CYGNUS_V850:
2699 case EM_V850:
2700 arch = bfd_arch_v850;
2701 switch (elf_elfheader (abfd)->e_flags & EF_V850_ARCH)
2702 {
2703 default:
2704 case E_V850_ARCH: mach = bfd_mach_v850; break;
2705 case E_V850E_ARCH: mach = bfd_mach_v850e; break;
2706 case E_V850E1_ARCH: mach = bfd_mach_v850e1; break;
2707 case E_V850E2_ARCH: mach = bfd_mach_v850e2; break;
2708 case E_V850E2V3_ARCH: mach = bfd_mach_v850e2v3; break;
78c8d46c 2709 case E_V850E3V5_ARCH: mach = bfd_mach_v850e3v5; break;
de863c74 2710 }
1cd986c5 2711 break;
de863c74
NC
2712
2713 default:
2714 return FALSE;
252b5132 2715 }
de863c74
NC
2716
2717 return bfd_default_set_arch_mach (abfd, arch, mach);
252b5132
RH
2718}
2719
2720/* Store the machine number in the flags field. */
e12dd2ea 2721
cc364be6
AM
2722static bfd_boolean
2723v850_elf_final_write_processing (bfd *abfd)
252b5132
RH
2724{
2725 unsigned long val;
2726
de863c74 2727 switch (bfd_get_arch (abfd))
252b5132 2728 {
de863c74
NC
2729 case bfd_arch_v850_rh850:
2730 val = EF_RH850_ABI;
78c8d46c
NC
2731 if (bfd_get_mach (abfd) == bfd_mach_v850e3v5)
2732 val |= EF_V800_850E3;
de863c74
NC
2733 elf_elfheader (abfd)->e_flags |= val;
2734 break;
2735
2736 case bfd_arch_v850:
2737 switch (bfd_get_mach (abfd))
2738 {
2739 default:
2740 case bfd_mach_v850: val = E_V850_ARCH; break;
2741 case bfd_mach_v850e: val = E_V850E_ARCH; break;
2742 case bfd_mach_v850e1: val = E_V850E1_ARCH; break;
2743 case bfd_mach_v850e2: val = E_V850E2_ARCH; break;
2744 case bfd_mach_v850e2v3: val = E_V850E2V3_ARCH; break;
78c8d46c 2745 case bfd_mach_v850e3v5: val = E_V850E3V5_ARCH; break;
de863c74
NC
2746 }
2747 elf_elfheader (abfd)->e_flags &=~ EF_V850_ARCH;
2748 elf_elfheader (abfd)->e_flags |= val;
2749 break;
b34976b6 2750 default:
de863c74 2751 break;
252b5132 2752 }
cc364be6 2753 return _bfd_elf_final_write_processing (abfd);
252b5132
RH
2754}
2755
435b1e90 2756/* Function to keep V850 specific file flags. */
e12dd2ea 2757
b34976b6 2758static bfd_boolean
47b0e7ad 2759v850_elf_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH
2760{
2761 BFD_ASSERT (!elf_flags_init (abfd)
2762 || elf_elfheader (abfd)->e_flags == flags);
2763
2764 elf_elfheader (abfd)->e_flags = flags;
b34976b6
AM
2765 elf_flags_init (abfd) = TRUE;
2766 return TRUE;
252b5132
RH
2767}
2768
e12dd2ea
NC
2769/* Merge backend specific data from an object file
2770 to the output object file when linking. */
47b0e7ad 2771
b34976b6 2772static bfd_boolean
50e03d47 2773v850_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
252b5132 2774{
50e03d47 2775 bfd *obfd = info->output_bfd;
252b5132
RH
2776 flagword out_flags;
2777 flagword in_flags;
685080f2 2778 bfd_boolean result = TRUE;
252b5132
RH
2779
2780 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
2781 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
b34976b6 2782 return TRUE;
252b5132 2783
685080f2
NC
2784 result &= v850_elf_merge_notes (ibfd, obfd);
2785
252b5132
RH
2786 in_flags = elf_elfheader (ibfd)->e_flags;
2787 out_flags = elf_elfheader (obfd)->e_flags;
2788
2789 if (! elf_flags_init (obfd))
2790 {
2791 /* If the input is the default architecture then do not
2792 bother setting the flags for the output architecture,
2793 instead allow future merges to do this. If no future
2794 merges ever set these flags then they will retain their
2795 unitialised values, which surprise surprise, correspond
2796 to the default values. */
2797 if (bfd_get_arch_info (ibfd)->the_default)
b34976b6 2798 return TRUE;
435b1e90 2799
b34976b6 2800 elf_flags_init (obfd) = TRUE;
252b5132
RH
2801 elf_elfheader (obfd)->e_flags = in_flags;
2802
2803 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
2804 && bfd_get_arch_info (obfd)->the_default)
685080f2 2805 result &= bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
252b5132 2806
685080f2 2807 return result;
252b5132
RH
2808 }
2809
2810 /* Check flag compatibility. */
2811 if (in_flags == out_flags)
685080f2 2812 return result;
252b5132 2813
de863c74
NC
2814 if (bfd_get_arch (obfd) == bfd_arch_v850_rh850)
2815 {
2816 if ((in_flags & EF_V800_850E3) != (out_flags & EF_V800_850E3))
2817 {
4eca0228 2818 _bfd_error_handler
38f14ab8 2819 (_("%pB: architecture mismatch with previous modules"), ibfd);
de863c74
NC
2820 elf_elfheader (obfd)->e_flags |= EF_V800_850E3;
2821 }
2822
685080f2 2823 return result;
de863c74
NC
2824 }
2825
252b5132
RH
2826 if ((in_flags & EF_V850_ARCH) != (out_flags & EF_V850_ARCH)
2827 && (in_flags & EF_V850_ARCH) != E_V850_ARCH)
8ad30312 2828 {
de863c74 2829 /* Allow earlier architecture binaries to be linked with later binaries.
07d6d2b8
AM
2830 Set the output binary to the later architecture, except for v850e1,
2831 which we set to v850e. */
de863c74 2832 if ( (in_flags & EF_V850_ARCH) == E_V850E1_ARCH
07d6d2b8
AM
2833 && (out_flags & EF_V850_ARCH) == E_V850E_ARCH)
2834 return result;
8ad30312 2835
de863c74 2836 if ( (in_flags & EF_V850_ARCH) == E_V850_ARCH
1cd986c5 2837 && (out_flags & EF_V850_ARCH) == E_V850E_ARCH)
8ad30312
NC
2838 {
2839 elf_elfheader (obfd)->e_flags =
2840 ((out_flags & ~ EF_V850_ARCH) | E_V850E_ARCH);
685080f2 2841 return result;
8ad30312
NC
2842 }
2843
de863c74 2844 if (( (in_flags & EF_V850_ARCH) == E_V850_ARCH
1cd986c5
NC
2845 || (in_flags & EF_V850_ARCH) == E_V850E_ARCH)
2846 && (out_flags & EF_V850_ARCH) == E_V850E2_ARCH)
2847 {
2848 elf_elfheader (obfd)->e_flags =
2849 ((out_flags & ~ EF_V850_ARCH) | E_V850E2_ARCH);
685080f2 2850 return result;
1cd986c5
NC
2851 }
2852
de863c74 2853 if (( (in_flags & EF_V850_ARCH) == E_V850_ARCH
1cd986c5
NC
2854 || (in_flags & EF_V850_ARCH) == E_V850E_ARCH
2855 || (in_flags & EF_V850_ARCH) == E_V850E2_ARCH)
2856 && (out_flags & EF_V850_ARCH) == E_V850E2V3_ARCH)
2857 {
2858 elf_elfheader (obfd)->e_flags =
2859 ((out_flags & ~ EF_V850_ARCH) | E_V850E2V3_ARCH);
685080f2 2860 return result;
1cd986c5
NC
2861 }
2862
78c8d46c
NC
2863 if (( (in_flags & EF_V850_ARCH) == E_V850_ARCH
2864 || (in_flags & EF_V850_ARCH) == E_V850E_ARCH
2865 || (in_flags & EF_V850_ARCH) == E_V850E2_ARCH
07d6d2b8 2866 || (in_flags & EF_V850_ARCH) == E_V850E2V3_ARCH)
78c8d46c
NC
2867 && (out_flags & EF_V850_ARCH) == E_V850E3V5_ARCH)
2868 {
2869 elf_elfheader (obfd)->e_flags =
2870 ((out_flags & ~ EF_V850_ARCH) | E_V850E3V5_ARCH);
685080f2 2871 return result;
78c8d46c
NC
2872 }
2873
4eca0228 2874 _bfd_error_handler
38f14ab8 2875 (_("%pB: architecture mismatch with previous modules"), ibfd);
8ad30312 2876 }
252b5132 2877
685080f2 2878 return result;
252b5132 2879}
e12dd2ea
NC
2880
2881/* Display the flags field. */
252b5132 2882
b34976b6 2883static bfd_boolean
47b0e7ad 2884v850_elf_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132
RH
2885{
2886 FILE * file = (FILE *) ptr;
435b1e90 2887
252b5132 2888 BFD_ASSERT (abfd != NULL && ptr != NULL);
435b1e90 2889
252b5132 2890 _bfd_elf_print_private_bfd_data (abfd, ptr);
435b1e90 2891
1cd986c5 2892 /* xgettext:c-format. */
252b5132 2893 fprintf (file, _("private flags = %lx: "), elf_elfheader (abfd)->e_flags);
435b1e90 2894
de863c74 2895 if (bfd_get_arch (abfd) == bfd_arch_v850_rh850)
252b5132 2896 {
de863c74 2897 if ((elf_elfheader (abfd)->e_flags & EF_RH850_ABI) != EF_RH850_ABI)
68ffbac6 2898 fprintf (file, _("unknown v850 architecture"));
de863c74
NC
2899 else if (elf_elfheader (abfd)->e_flags & EF_V800_850E3)
2900 fprintf (file, _("v850 E3 architecture"));
2901 else
2902 fprintf (file, _("v850 architecture"));
de863c74
NC
2903 }
2904 else
2905 {
2906 switch (elf_elfheader (abfd)->e_flags & EF_V850_ARCH)
2907 {
2908 default:
2909 case E_V850_ARCH: fprintf (file, _("v850 architecture")); break;
2910 case E_V850E_ARCH: fprintf (file, _("v850e architecture")); break;
2911 case E_V850E1_ARCH: fprintf (file, _("v850e1 architecture")); break;
2912 case E_V850E2_ARCH: fprintf (file, _("v850e2 architecture")); break;
2913 case E_V850E2V3_ARCH: fprintf (file, _("v850e2v3 architecture")); break;
78c8d46c 2914 case E_V850E3V5_ARCH: fprintf (file, _("v850e3v5 architecture")); break;
de863c74 2915 }
252b5132 2916 }
435b1e90 2917
252b5132 2918 fputc ('\n', file);
435b1e90 2919
685080f2
NC
2920 v850_elf_print_notes (abfd, file);
2921
b34976b6 2922 return TRUE;
252b5132
RH
2923}
2924
2925/* V850 ELF uses four common sections. One is the usual one, and the
2926 others are for (small) objects in one of the special data areas:
2927 small, tiny and zero. All the objects are kept together, and then
2928 referenced via the gp register, the ep register or the r0 register
2929 respectively, which yields smaller, faster assembler code. This
2930 approach is copied from elf32-mips.c. */
2931
2932static asection v850_elf_scom_section;
2933static asymbol v850_elf_scom_symbol;
2934static asymbol * v850_elf_scom_symbol_ptr;
2935static asection v850_elf_tcom_section;
2936static asymbol v850_elf_tcom_symbol;
2937static asymbol * v850_elf_tcom_symbol_ptr;
2938static asection v850_elf_zcom_section;
2939static asymbol v850_elf_zcom_symbol;
2940static asymbol * v850_elf_zcom_symbol_ptr;
2941
e12dd2ea
NC
2942/* Given a BFD section, try to locate the
2943 corresponding ELF section index. */
252b5132 2944
b34976b6 2945static bfd_boolean
47b0e7ad
NC
2946v850_elf_section_from_bfd_section (bfd *abfd ATTRIBUTE_UNUSED,
2947 asection *sec,
2948 int *retval)
252b5132 2949{
fd361982 2950 if (strcmp (bfd_section_name (sec), ".scommon") == 0)
252b5132 2951 *retval = SHN_V850_SCOMMON;
fd361982 2952 else if (strcmp (bfd_section_name (sec), ".tcommon") == 0)
252b5132 2953 *retval = SHN_V850_TCOMMON;
fd361982 2954 else if (strcmp (bfd_section_name (sec), ".zcommon") == 0)
252b5132
RH
2955 *retval = SHN_V850_ZCOMMON;
2956 else
b34976b6 2957 return FALSE;
435b1e90 2958
b34976b6 2959 return TRUE;
252b5132
RH
2960}
2961
2962/* Handle the special V850 section numbers that a symbol may use. */
2963
2964static void
47b0e7ad 2965v850_elf_symbol_processing (bfd *abfd, asymbol *asym)
252b5132
RH
2966{
2967 elf_symbol_type * elfsym = (elf_symbol_type *) asym;
9ad5cbcf 2968 unsigned int indx;
435b1e90 2969
9ad5cbcf 2970 indx = elfsym->internal_elf_sym.st_shndx;
252b5132
RH
2971
2972 /* If the section index is an "ordinary" index, then it may
2973 refer to a v850 specific section created by the assembler.
2974 Check the section's type and change the index it matches.
435b1e90 2975
252b5132 2976 FIXME: Should we alter the st_shndx field as well ? */
435b1e90 2977
9ad5cbcf 2978 if (indx < elf_numsections (abfd))
1cd986c5 2979 switch (elf_elfsections (abfd)[indx]->sh_type)
252b5132
RH
2980 {
2981 case SHT_V850_SCOMMON:
9ad5cbcf 2982 indx = SHN_V850_SCOMMON;
252b5132 2983 break;
435b1e90 2984
252b5132 2985 case SHT_V850_TCOMMON:
9ad5cbcf 2986 indx = SHN_V850_TCOMMON;
252b5132 2987 break;
435b1e90 2988
252b5132 2989 case SHT_V850_ZCOMMON:
9ad5cbcf 2990 indx = SHN_V850_ZCOMMON;
252b5132 2991 break;
435b1e90 2992
252b5132
RH
2993 default:
2994 break;
2995 }
435b1e90 2996
9ad5cbcf 2997 switch (indx)
252b5132
RH
2998 {
2999 case SHN_V850_SCOMMON:
3000 if (v850_elf_scom_section.name == NULL)
3001 {
3002 /* Initialize the small common section. */
07d6d2b8
AM
3003 v850_elf_scom_section.name = ".scommon";
3004 v850_elf_scom_section.flags = SEC_IS_COMMON | SEC_ALLOC | SEC_DATA;
252b5132 3005 v850_elf_scom_section.output_section = & v850_elf_scom_section;
07d6d2b8 3006 v850_elf_scom_section.symbol = & v850_elf_scom_symbol;
252b5132 3007 v850_elf_scom_section.symbol_ptr_ptr = & v850_elf_scom_symbol_ptr;
07d6d2b8
AM
3008 v850_elf_scom_symbol.name = ".scommon";
3009 v850_elf_scom_symbol.flags = BSF_SECTION_SYM;
3010 v850_elf_scom_symbol.section = & v850_elf_scom_section;
3011 v850_elf_scom_symbol_ptr = & v850_elf_scom_symbol;
252b5132
RH
3012 }
3013 asym->section = & v850_elf_scom_section;
3014 asym->value = elfsym->internal_elf_sym.st_size;
3015 break;
435b1e90 3016
252b5132
RH
3017 case SHN_V850_TCOMMON:
3018 if (v850_elf_tcom_section.name == NULL)
3019 {
3020 /* Initialize the tcommon section. */
07d6d2b8
AM
3021 v850_elf_tcom_section.name = ".tcommon";
3022 v850_elf_tcom_section.flags = SEC_IS_COMMON;
252b5132 3023 v850_elf_tcom_section.output_section = & v850_elf_tcom_section;
07d6d2b8 3024 v850_elf_tcom_section.symbol = & v850_elf_tcom_symbol;
252b5132 3025 v850_elf_tcom_section.symbol_ptr_ptr = & v850_elf_tcom_symbol_ptr;
07d6d2b8
AM
3026 v850_elf_tcom_symbol.name = ".tcommon";
3027 v850_elf_tcom_symbol.flags = BSF_SECTION_SYM;
3028 v850_elf_tcom_symbol.section = & v850_elf_tcom_section;
3029 v850_elf_tcom_symbol_ptr = & v850_elf_tcom_symbol;
252b5132
RH
3030 }
3031 asym->section = & v850_elf_tcom_section;
3032 asym->value = elfsym->internal_elf_sym.st_size;
3033 break;
3034
3035 case SHN_V850_ZCOMMON:
3036 if (v850_elf_zcom_section.name == NULL)
3037 {
3038 /* Initialize the zcommon section. */
07d6d2b8
AM
3039 v850_elf_zcom_section.name = ".zcommon";
3040 v850_elf_zcom_section.flags = SEC_IS_COMMON;
252b5132 3041 v850_elf_zcom_section.output_section = & v850_elf_zcom_section;
07d6d2b8 3042 v850_elf_zcom_section.symbol = & v850_elf_zcom_symbol;
252b5132 3043 v850_elf_zcom_section.symbol_ptr_ptr = & v850_elf_zcom_symbol_ptr;
07d6d2b8
AM
3044 v850_elf_zcom_symbol.name = ".zcommon";
3045 v850_elf_zcom_symbol.flags = BSF_SECTION_SYM;
3046 v850_elf_zcom_symbol.section = & v850_elf_zcom_section;
3047 v850_elf_zcom_symbol_ptr = & v850_elf_zcom_symbol;
252b5132
RH
3048 }
3049 asym->section = & v850_elf_zcom_section;
3050 asym->value = elfsym->internal_elf_sym.st_size;
3051 break;
3052 }
3053}
3054
3055/* Hook called by the linker routine which adds symbols from an object
3056 file. We must handle the special v850 section numbers here. */
3057
b34976b6 3058static bfd_boolean
47b0e7ad
NC
3059v850_elf_add_symbol_hook (bfd *abfd,
3060 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3061 Elf_Internal_Sym *sym,
3062 const char **namep ATTRIBUTE_UNUSED,
3063 flagword *flagsp ATTRIBUTE_UNUSED,
3064 asection **secp,
3065 bfd_vma *valp)
252b5132 3066{
9ad5cbcf 3067 unsigned int indx = sym->st_shndx;
435b1e90 3068
252b5132
RH
3069 /* If the section index is an "ordinary" index, then it may
3070 refer to a v850 specific section created by the assembler.
3071 Check the section's type and change the index it matches.
435b1e90 3072
252b5132 3073 FIXME: Should we alter the st_shndx field as well ? */
435b1e90 3074
9ad5cbcf 3075 if (indx < elf_numsections (abfd))
1cd986c5 3076 switch (elf_elfsections (abfd)[indx]->sh_type)
252b5132
RH
3077 {
3078 case SHT_V850_SCOMMON:
9ad5cbcf 3079 indx = SHN_V850_SCOMMON;
252b5132 3080 break;
435b1e90 3081
252b5132 3082 case SHT_V850_TCOMMON:
9ad5cbcf 3083 indx = SHN_V850_TCOMMON;
252b5132 3084 break;
435b1e90 3085
252b5132 3086 case SHT_V850_ZCOMMON:
9ad5cbcf 3087 indx = SHN_V850_ZCOMMON;
252b5132 3088 break;
435b1e90 3089
252b5132
RH
3090 default:
3091 break;
3092 }
435b1e90 3093
9ad5cbcf 3094 switch (indx)
252b5132
RH
3095 {
3096 case SHN_V850_SCOMMON:
3097 *secp = bfd_make_section_old_way (abfd, ".scommon");
3098 (*secp)->flags |= SEC_IS_COMMON;
3099 *valp = sym->st_size;
3100 break;
435b1e90 3101
252b5132
RH
3102 case SHN_V850_TCOMMON:
3103 *secp = bfd_make_section_old_way (abfd, ".tcommon");
3104 (*secp)->flags |= SEC_IS_COMMON;
3105 *valp = sym->st_size;
3106 break;
435b1e90 3107
252b5132
RH
3108 case SHN_V850_ZCOMMON:
3109 *secp = bfd_make_section_old_way (abfd, ".zcommon");
3110 (*secp)->flags |= SEC_IS_COMMON;
3111 *valp = sym->st_size;
3112 break;
3113 }
3114
b34976b6 3115 return TRUE;
252b5132
RH
3116}
3117
6e0b88f1 3118static int
47b0e7ad
NC
3119v850_elf_link_output_symbol_hook (struct bfd_link_info *info ATTRIBUTE_UNUSED,
3120 const char *name ATTRIBUTE_UNUSED,
3121 Elf_Internal_Sym *sym,
3122 asection *input_sec,
3dd2d30b 3123 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
252b5132
RH
3124{
3125 /* If we see a common symbol, which implies a relocatable link, then
3126 if a symbol was in a special common section in an input file, mark
3127 it as a special common in the output file. */
435b1e90 3128
252b5132
RH
3129 if (sym->st_shndx == SHN_COMMON)
3130 {
3131 if (strcmp (input_sec->name, ".scommon") == 0)
3132 sym->st_shndx = SHN_V850_SCOMMON;
3133 else if (strcmp (input_sec->name, ".tcommon") == 0)
3134 sym->st_shndx = SHN_V850_TCOMMON;
3135 else if (strcmp (input_sec->name, ".zcommon") == 0)
3136 sym->st_shndx = SHN_V850_ZCOMMON;
3137 }
3138
d4c87fc1
AM
3139 /* The price we pay for using h->other unused bits as flags in the
3140 linker is cleaning up after ourselves. */
3dd2d30b
AM
3141
3142 sym->st_other &= ~(V850_OTHER_SDA | V850_OTHER_ZDA | V850_OTHER_TDA
3143 | V850_OTHER_ERROR);
d4c87fc1 3144
6e0b88f1 3145 return 1;
252b5132
RH
3146}
3147
b34976b6 3148static bfd_boolean
6dc132d9
L
3149v850_elf_section_from_shdr (bfd *abfd,
3150 Elf_Internal_Shdr *hdr,
3151 const char *name,
3152 int shindex)
252b5132
RH
3153{
3154 /* There ought to be a place to keep ELF backend specific flags, but
3155 at the moment there isn't one. We just keep track of the
3156 sections by their name, instead. */
3157
6dc132d9 3158 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
b34976b6 3159 return FALSE;
252b5132
RH
3160
3161 switch (hdr->sh_type)
3162 {
3163 case SHT_V850_SCOMMON:
3164 case SHT_V850_TCOMMON:
3165 case SHT_V850_ZCOMMON:
fd361982
AM
3166 if (!bfd_set_section_flags (hdr->bfd_section,
3167 (bfd_section_flags (hdr->bfd_section)
3168 | SEC_IS_COMMON)))
b34976b6 3169 return FALSE;
252b5132
RH
3170 }
3171
b34976b6 3172 return TRUE;
252b5132
RH
3173}
3174
e12dd2ea
NC
3175/* Set the correct type for a V850 ELF section. We do this
3176 by the section name, which is a hack, but ought to work. */
3177
b34976b6 3178static bfd_boolean
47b0e7ad
NC
3179v850_elf_fake_sections (bfd *abfd ATTRIBUTE_UNUSED,
3180 Elf_Internal_Shdr *hdr,
3181 asection *sec)
252b5132 3182{
47b0e7ad 3183 const char * name;
252b5132 3184
fd361982 3185 name = bfd_section_name (sec);
252b5132
RH
3186
3187 if (strcmp (name, ".scommon") == 0)
47b0e7ad 3188 hdr->sh_type = SHT_V850_SCOMMON;
252b5132 3189 else if (strcmp (name, ".tcommon") == 0)
47b0e7ad 3190 hdr->sh_type = SHT_V850_TCOMMON;
252b5132
RH
3191 else if (strcmp (name, ".zcommon") == 0)
3192 hdr->sh_type = SHT_V850_ZCOMMON;
685080f2
NC
3193 /* Tweak the section type of .note.renesas. */
3194 else if (strcmp (name, V850_NOTE_SECNAME) == 0)
3195 {
3196 hdr->sh_type = SHT_RENESAS_INFO;
3197 hdr->sh_entsize = SIZEOF_V850_NOTE;
3198 }
435b1e90 3199
b34976b6 3200 return TRUE;
252b5132 3201}
86aba9db
NC
3202
3203/* Delete some bytes from a section while relaxing. */
3204
b34976b6 3205static bfd_boolean
47b0e7ad
NC
3206v850_elf_relax_delete_bytes (bfd *abfd,
3207 asection *sec,
3208 bfd_vma addr,
3209 bfd_vma toaddr,
3210 int count)
86aba9db 3211{
b34976b6
AM
3212 Elf_Internal_Shdr *symtab_hdr;
3213 Elf32_External_Sym *extsyms;
3214 Elf32_External_Sym *esym;
3215 Elf32_External_Sym *esymend;
91d6fa6a 3216 int sym_index;
b34976b6
AM
3217 unsigned int sec_shndx;
3218 bfd_byte *contents;
3219 Elf_Internal_Rela *irel;
3220 Elf_Internal_Rela *irelend;
3221 struct elf_link_hash_entry *sym_hash;
b34976b6 3222 Elf_External_Sym_Shndx *shndx;
86aba9db
NC
3223
3224 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
3225 extsyms = (Elf32_External_Sym *) symtab_hdr->contents;
3226
3227 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
3228
3229 contents = elf_section_data (sec)->this_hdr.contents;
3230
3231 /* The deletion must stop at the next ALIGN reloc for an alignment
3232 power larger than the number of bytes we are deleting. */
3233
3234 /* Actually delete the bytes. */
3235#if (DEBUG_RELAX & 2)
3236 fprintf (stderr, "relax_delete: contents: sec: %s %p .. %p %x\n",
3237 sec->name, addr, toaddr, count );
3238#endif
3239 memmove (contents + addr, contents + addr + count,
3240 toaddr - addr - count);
3241 memset (contents + toaddr-count, 0, count);
3242
3243 /* Adjust all the relocs. */
3244 irel = elf_section_data (sec)->relocs;
3245 irelend = irel + sec->reloc_count;
6a40cf0c
NC
3246 if (elf_symtab_shndx_list (abfd))
3247 {
3248 Elf_Internal_Shdr *shndx_hdr;
3249
3250 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr;
3251 shndx = (Elf_External_Sym_Shndx *) shndx_hdr->contents;
3252 }
3253 else
3254 {
3255 shndx = NULL;
3256 }
86aba9db
NC
3257
3258 for (; irel < irelend; irel++)
3259 {
3260 bfd_vma raddr, paddr, symval;
3261 Elf_Internal_Sym isym;
3262
3263 /* Get the new reloc address. */
3264 raddr = irel->r_offset;
3265 if ((raddr >= (addr + count) && raddr < toaddr))
b34976b6 3266 irel->r_offset -= count;
86aba9db
NC
3267
3268 if (raddr >= addr && raddr < addr + count)
3269 {
3270 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
3271 (int) R_V850_NONE);
3272 continue;
3273 }
b34976b6 3274
86aba9db
NC
3275 if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_ALIGN)
3276 continue;
3277
3278 bfd_elf32_swap_symbol_in (abfd,
3279 extsyms + ELF32_R_SYM (irel->r_info),
3280 shndx ? shndx + ELF32_R_SYM (irel->r_info) : NULL,
3281 & isym);
b34976b6 3282
86aba9db
NC
3283 if (isym.st_shndx != sec_shndx)
3284 continue;
3285
3286 /* Get the value of the symbol referred to by the reloc. */
3287 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
3288 {
3289 symval = isym.st_value;
3290#if (DEBUG_RELAX & 2)
3291 {
3292 char * name = bfd_elf_string_from_elf_section
07d6d2b8 3293 (abfd, symtab_hdr->sh_link, isym.st_name);
86aba9db
NC
3294 fprintf (stderr,
3295 "relax_delete: local: sec: %s, sym: %s (%d), value: %x + %x + %x addend %x\n",
3296 sec->name, name, isym.st_name,
3297 sec->output_section->vma, sec->output_offset,
3298 isym.st_value, irel->r_addend);
3299 }
3300#endif
3301 }
3302 else
3303 {
3304 unsigned long indx;
3305 struct elf_link_hash_entry * h;
3306
3307 /* An external symbol. */
3308 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
3309
3310 h = elf_sym_hashes (abfd) [indx];
3311 BFD_ASSERT (h != NULL);
3312
3313 symval = h->root.u.def.value;
3314#if (DEBUG_RELAX & 2)
3315 fprintf (stderr,
3316 "relax_delete: defined: sec: %s, name: %s, value: %x + %x + %x addend %x\n",
3317 sec->name, h->root.root.string, h->root.u.def.value,
3318 sec->output_section->vma, sec->output_offset, irel->r_addend);
3319#endif
3320 }
b34976b6 3321
86aba9db 3322 paddr = symval + irel->r_addend;
b34976b6 3323
86aba9db
NC
3324 if ( (symval >= addr + count && symval < toaddr)
3325 && (paddr < addr + count || paddr >= toaddr))
3326 irel->r_addend += count;
3327 else if ( (symval < addr + count || symval >= toaddr)
07d6d2b8 3328 && (paddr >= addr + count && paddr < toaddr))
86aba9db
NC
3329 irel->r_addend -= count;
3330 }
3331
3332 /* Adjust the local symbols defined in this section. */
3333 esym = extsyms;
3334 esymend = esym + symtab_hdr->sh_info;
3335
3336 for (; esym < esymend; esym++, shndx = (shndx ? shndx + 1 : NULL))
3337 {
3338 Elf_Internal_Sym isym;
3339
3340 bfd_elf32_swap_symbol_in (abfd, esym, shndx, & isym);
3341
3342 if (isym.st_shndx == sec_shndx
3343 && isym.st_value >= addr + count
3344 && isym.st_value < toaddr)
3345 {
3346 isym.st_value -= count;
3347
3348 if (isym.st_value + isym.st_size >= toaddr)
b34976b6
AM
3349 isym.st_size += count;
3350
63a23799 3351 bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx);
86aba9db
NC
3352 }
3353 else if (isym.st_shndx == sec_shndx
3354 && isym.st_value < addr + count)
3355 {
3356 if (isym.st_value+isym.st_size >= addr + count
3357 && isym.st_value+isym.st_size < toaddr)
3358 isym.st_size -= count;
3359
3360 if (isym.st_value >= addr
3361 && isym.st_value < addr + count)
3362 isym.st_value = addr;
3363
63a23799 3364 bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx);
86aba9db
NC
3365 }
3366 }
3367
3368 /* Now adjust the global symbols defined in this section. */
3369 esym = extsyms + symtab_hdr->sh_info;
3370 esymend = extsyms + (symtab_hdr->sh_size / sizeof (Elf32_External_Sym));
3371
91d6fa6a 3372 for (sym_index = 0; esym < esymend; esym ++, sym_index ++)
86aba9db
NC
3373 {
3374 Elf_Internal_Sym isym;
3375
3376 bfd_elf32_swap_symbol_in (abfd, esym, shndx, & isym);
91d6fa6a 3377 sym_hash = elf_sym_hashes (abfd) [sym_index];
86aba9db
NC
3378
3379 if (isym.st_shndx == sec_shndx
3380 && ((sym_hash)->root.type == bfd_link_hash_defined
3381 || (sym_hash)->root.type == bfd_link_hash_defweak)
3382 && (sym_hash)->root.u.def.section == sec
3383 && (sym_hash)->root.u.def.value >= addr + count
3384 && (sym_hash)->root.u.def.value < toaddr)
3385 {
3386 if ((sym_hash)->root.u.def.value + isym.st_size >= toaddr)
3387 {
3388 isym.st_size += count;
63a23799 3389 bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx);
86aba9db
NC
3390 }
3391
3392 (sym_hash)->root.u.def.value -= count;
3393 }
3394 else if (isym.st_shndx == sec_shndx
3395 && ((sym_hash)->root.type == bfd_link_hash_defined
3396 || (sym_hash)->root.type == bfd_link_hash_defweak)
3397 && (sym_hash)->root.u.def.section == sec
3398 && (sym_hash)->root.u.def.value < addr + count)
3399 {
3400 if ((sym_hash)->root.u.def.value+isym.st_size >= addr + count
3401 && (sym_hash)->root.u.def.value+isym.st_size < toaddr)
3402 isym.st_size -= count;
3403
3404 if ((sym_hash)->root.u.def.value >= addr
3405 && (sym_hash)->root.u.def.value < addr + count)
3406 (sym_hash)->root.u.def.value = addr;
3407
63a23799 3408 bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx);
86aba9db
NC
3409 }
3410
3411 if (shndx)
3412 ++ shndx;
3413 }
3414
b34976b6 3415 return TRUE;
86aba9db
NC
3416}
3417
07d6d2b8
AM
3418#define NOP_OPCODE (0x0000)
3419#define MOVHI 0x0640 /* 4byte. */
3420#define MOVHI_MASK 0x07e0
1cd986c5 3421#define MOVHI_R1(insn) ((insn) & 0x1f) /* 4byte. */
86aba9db 3422#define MOVHI_R2(insn) ((insn) >> 11)
07d6d2b8
AM
3423#define MOVEA 0x0620 /* 2byte. */
3424#define MOVEA_MASK 0x07e0
86aba9db
NC
3425#define MOVEA_R1(insn) ((insn) & 0x1f)
3426#define MOVEA_R2(insn) ((insn) >> 11)
07d6d2b8
AM
3427#define JARL_4 0x00040780 /* 4byte. */
3428#define JARL_4_MASK 0xFFFF07FF
86aba9db 3429#define JARL_R2(insn) (int)(((insn) & (~JARL_4_MASK)) >> 11)
07d6d2b8
AM
3430#define ADD_I 0x0240 /* 2byte. */
3431#define ADD_I_MASK 0x07e0
1cd986c5 3432#define ADD_I5(insn) ((((insn) & 0x001f) << 11) >> 11) /* 2byte. */
86aba9db 3433#define ADD_R2(insn) ((insn) >> 11)
07d6d2b8
AM
3434#define JMP_R 0x0060 /* 2byte. */
3435#define JMP_R_MASK 0xFFE0
86aba9db
NC
3436#define JMP_R1(insn) ((insn) & 0x1f)
3437
b34976b6 3438static bfd_boolean
47b0e7ad
NC
3439v850_elf_relax_section (bfd *abfd,
3440 asection *sec,
3441 struct bfd_link_info *link_info,
3442 bfd_boolean *again)
86aba9db 3443{
b34976b6
AM
3444 Elf_Internal_Shdr *symtab_hdr;
3445 Elf_Internal_Rela *internal_relocs;
3446 Elf_Internal_Rela *irel;
3447 Elf_Internal_Rela *irelend;
3448 Elf_Internal_Rela *irelalign = NULL;
3449 Elf_Internal_Sym *isymbuf = NULL;
3450 bfd_byte *contents = NULL;
3451 bfd_vma addr = 0;
3452 bfd_vma toaddr;
3453 int align_pad_size = 0;
3454 bfd_boolean result = TRUE;
3455
3456 *again = FALSE;
86aba9db 3457
0e1862bb 3458 if (bfd_link_relocatable (link_info)
86aba9db
NC
3459 || (sec->flags & SEC_RELOC) == 0
3460 || sec->reloc_count == 0)
b34976b6 3461 return TRUE;
86aba9db 3462
86aba9db
NC
3463 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
3464
45d6a902 3465 internal_relocs = (_bfd_elf_link_read_relocs
47b0e7ad 3466 (abfd, sec, NULL, NULL, link_info->keep_memory));
86aba9db
NC
3467 if (internal_relocs == NULL)
3468 goto error_return;
86aba9db
NC
3469
3470 irelend = internal_relocs + sec->reloc_count;
b34976b6 3471
eea6121a 3472 while (addr < sec->size)
86aba9db 3473 {
eea6121a 3474 toaddr = sec->size;
86aba9db
NC
3475
3476 for (irel = internal_relocs; irel < irelend; irel ++)
3477 if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_ALIGN
3478 && irel->r_offset > addr
3479 && irel->r_offset < toaddr)
3480 toaddr = irel->r_offset;
b34976b6 3481
86aba9db
NC
3482#ifdef DEBUG_RELAX
3483 fprintf (stderr, "relax region 0x%x to 0x%x align pad %d\n",
3484 addr, toaddr, align_pad_size);
3485#endif
3486 if (irelalign)
3487 {
3488 bfd_vma alignto;
3489 bfd_vma alignmoveto;
3490
3491 alignmoveto = BFD_ALIGN (addr - align_pad_size, 1 << irelalign->r_addend);
3492 alignto = BFD_ALIGN (addr, 1 << irelalign->r_addend);
3493
3494 if (alignmoveto < alignto)
3495 {
544008aa 3496 bfd_vma i;
86aba9db
NC
3497
3498 align_pad_size = alignto - alignmoveto;
3499#ifdef DEBUG_RELAX
3500 fprintf (stderr, "relax move region 0x%x to 0x%x delete size 0x%x\n",
3501 alignmoveto, toaddr, align_pad_size);
3502#endif
3503 if (!v850_elf_relax_delete_bytes (abfd, sec, alignmoveto,
3504 toaddr, align_pad_size))
b34976b6 3505 goto error_return;
86aba9db
NC
3506
3507 for (i = BFD_ALIGN (toaddr - align_pad_size, 1);
3508 (i + 1) < toaddr; i += 2)
3509 bfd_put_16 (abfd, NOP_OPCODE, contents + i);
3510
3511 addr = alignmoveto;
3512 }
3513 else
3514 align_pad_size = 0;
3515 }
3516
3517 for (irel = internal_relocs; irel < irelend; irel++)
3518 {
b34976b6
AM
3519 bfd_vma laddr;
3520 bfd_vma addend;
3521 bfd_vma symval;
3522 int insn[5];
3523 int no_match = -1;
3524 Elf_Internal_Rela *hi_irelfn;
3525 Elf_Internal_Rela *lo_irelfn;
3526 Elf_Internal_Rela *irelcall;
3527 bfd_signed_vma foff;
de863c74 3528 unsigned int r_type;
86aba9db
NC
3529
3530 if (! (irel->r_offset >= addr && irel->r_offset < toaddr
3531 && (ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGCALL
3532 || ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGJUMP)))
3533 continue;
3534
3535#ifdef DEBUG_RELAX
3536 fprintf (stderr, "relax check r_info 0x%x r_offset 0x%x r_addend 0x%x\n",
3537 irel->r_info,
3538 irel->r_offset,
3539 irel->r_addend );
3540#endif
3541
3542 /* Get the section contents. */
3543 if (contents == NULL)
3544 {
3545 if (elf_section_data (sec)->this_hdr.contents != NULL)
3546 contents = elf_section_data (sec)->this_hdr.contents;
3547 else
3548 {
47b0e7ad 3549 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
86aba9db
NC
3550 goto error_return;
3551 }
3552 }
3553
5cec6941
NC
3554 /* Read this BFD's local symbols if we haven't done so already. */
3555 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
86aba9db 3556 {
5cec6941
NC
3557 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
3558 if (isymbuf == NULL)
3559 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
3560 symtab_hdr->sh_info, 0,
3561 NULL, NULL, NULL);
3562 if (isymbuf == NULL)
3563 goto error_return;
86aba9db
NC
3564 }
3565
3566 laddr = irel->r_offset;
3567
3568 if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGCALL)
3569 {
3570 /* Check code for -mlong-calls output. */
eea6121a 3571 if (laddr + 16 <= (bfd_vma) sec->size)
86aba9db
NC
3572 {
3573 insn[0] = bfd_get_16 (abfd, contents + laddr);
3574 insn[1] = bfd_get_16 (abfd, contents + laddr + 4);
3575 insn[2] = bfd_get_32 (abfd, contents + laddr + 8);
3576 insn[3] = bfd_get_16 (abfd, contents + laddr + 12);
3577 insn[4] = bfd_get_16 (abfd, contents + laddr + 14);
b34976b6 3578
86aba9db
NC
3579 if ((insn[0] & MOVHI_MASK) != MOVHI
3580 || MOVHI_R1 (insn[0]) != 0)
3581 no_match = 0;
3582
3583 if (no_match < 0
3584 && ((insn[1] & MOVEA_MASK) != MOVEA
3585 || MOVHI_R2 (insn[0]) != MOVEA_R1 (insn[1])))
3586 no_match = 1;
3587
3588 if (no_match < 0
3589 && (insn[2] & JARL_4_MASK) != JARL_4)
3590 no_match = 2;
3591
3592 if (no_match < 0
3593 && ((insn[3] & ADD_I_MASK) != ADD_I
3594 || ADD_I5 (insn[3]) != 4
3595 || JARL_R2 (insn[2]) != ADD_R2 (insn[3])))
3596 no_match = 3;
3597
3598 if (no_match < 0
3599 && ((insn[4] & JMP_R_MASK) != JMP_R
3600 || MOVEA_R2 (insn[1]) != JMP_R1 (insn[4])))
3601 no_match = 4;
3602 }
3603 else
3604 {
4eca0228 3605 _bfd_error_handler
695344c0 3606 /* xgettext:c-format */
38f14ab8 3607 (_("%pB: %#" PRIx64 ": warning: %s points to "
695344c0 3608 "unrecognized insns"),
38f14ab8 3609 abfd, (uint64_t) irel->r_offset, "R_V850_LONGCALL");
86aba9db
NC
3610 continue;
3611 }
3612
3613 if (no_match >= 0)
3614 {
4eca0228 3615 _bfd_error_handler
695344c0 3616 /* xgettext:c-format */
38f14ab8 3617 (_("%pB: %#" PRIx64 ": warning: %s points to "
d42c267e 3618 "unrecognized insn %#x"),
dae82561 3619 abfd,
2dcf00ce 3620 (uint64_t) (irel->r_offset + no_match),
38f14ab8 3621 "R_V850_LONGCALL",
4eca0228 3622 insn[no_match]);
86aba9db 3623 continue;
b34976b6 3624 }
86aba9db
NC
3625
3626 /* Get the reloc for the address from which the register is
07d6d2b8
AM
3627 being loaded. This reloc will tell us which function is
3628 actually being called. */
68ffbac6 3629
86aba9db 3630 for (hi_irelfn = internal_relocs; hi_irelfn < irelend; hi_irelfn ++)
de863c74
NC
3631 {
3632 r_type = ELF32_R_TYPE (hi_irelfn->r_info);
3633
3634 if (hi_irelfn->r_offset == laddr + 2
3635 && (r_type == (int) R_V850_HI16_S || r_type == (int) R_V810_WHI1))
3636 break;
3637 }
86aba9db
NC
3638
3639 for (lo_irelfn = internal_relocs; lo_irelfn < irelend; lo_irelfn ++)
de863c74
NC
3640 {
3641 r_type = ELF32_R_TYPE (lo_irelfn->r_info);
3642
3643 if (lo_irelfn->r_offset == laddr + 6
3644 && (r_type == (int) R_V850_LO16 || r_type == (int) R_V810_WLO))
3645 break;
3646 }
86aba9db
NC
3647
3648 for (irelcall = internal_relocs; irelcall < irelend; irelcall ++)
de863c74
NC
3649 {
3650 r_type = ELF32_R_TYPE (irelcall->r_info);
3651
3652 if (irelcall->r_offset == laddr + 8
3653 && (r_type == (int) R_V850_22_PCREL || r_type == (int) R_V850_PCR22))
3654 break;
3655 }
86aba9db
NC
3656
3657 if ( hi_irelfn == irelend
3658 || lo_irelfn == irelend
3659 || irelcall == irelend)
3660 {
4eca0228 3661 _bfd_error_handler
695344c0 3662 /* xgettext:c-format */
38f14ab8 3663 (_("%pB: %#" PRIx64 ": warning: %s points to "
695344c0 3664 "unrecognized reloc"),
38f14ab8 3665 abfd, (uint64_t) irel->r_offset, "R_V850_LONGCALL");
86aba9db
NC
3666
3667 continue;
3668 }
b34976b6 3669
86aba9db
NC
3670 if (ELF32_R_SYM (irelcall->r_info) < symtab_hdr->sh_info)
3671 {
5cec6941 3672 Elf_Internal_Sym * isym;
86aba9db
NC
3673
3674 /* A local symbol. */
5cec6941 3675 isym = isymbuf + ELF32_R_SYM (irelcall->r_info);
86aba9db 3676
5cec6941 3677 symval = isym->st_value;
86aba9db
NC
3678 }
3679 else
3680 {
3681 unsigned long indx;
3682 struct elf_link_hash_entry * h;
3683
3684 /* An external symbol. */
3685 indx = ELF32_R_SYM (irelcall->r_info) - symtab_hdr->sh_info;
3686 h = elf_sym_hashes (abfd)[indx];
3687 BFD_ASSERT (h != NULL);
3688
3689 if ( h->root.type != bfd_link_hash_defined
3690 && h->root.type != bfd_link_hash_defweak)
3691 /* This appears to be a reference to an undefined
3692 symbol. Just ignore it--it will be caught by the
3693 regular reloc processing. */
3694 continue;
3695
3696 symval = h->root.u.def.value;
3697 }
3698
3699 if (symval + irelcall->r_addend != irelcall->r_offset + 4)
3700 {
4eca0228 3701 _bfd_error_handler
695344c0 3702 /* xgettext:c-format */
38f14ab8 3703 (_("%pB: %#" PRIx64 ": warning: %s points to "
2dcf00ce 3704 "unrecognized reloc %#" PRIx64),
38f14ab8 3705 abfd, (uint64_t) irel->r_offset, "R_V850_LONGCALL",
2dcf00ce 3706 (uint64_t) irelcall->r_offset);
86aba9db
NC
3707 continue;
3708 }
3709
3710 /* Get the value of the symbol referred to by the reloc. */
3711 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
3712 {
b34976b6
AM
3713 Elf_Internal_Sym *isym;
3714 asection *sym_sec;
86aba9db
NC
3715
3716 /* A local symbol. */
5cec6941 3717 isym = isymbuf + ELF32_R_SYM (hi_irelfn->r_info);
b34976b6 3718
5cec6941 3719 if (isym->st_shndx == SHN_UNDEF)
86aba9db 3720 sym_sec = bfd_und_section_ptr;
5cec6941 3721 else if (isym->st_shndx == SHN_ABS)
86aba9db 3722 sym_sec = bfd_abs_section_ptr;
5cec6941 3723 else if (isym->st_shndx == SHN_COMMON)
86aba9db
NC
3724 sym_sec = bfd_com_section_ptr;
3725 else
5cec6941
NC
3726 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
3727 symval = (isym->st_value
86aba9db
NC
3728 + sym_sec->output_section->vma
3729 + sym_sec->output_offset);
3730 }
3731 else
3732 {
3733 unsigned long indx;
b34976b6 3734 struct elf_link_hash_entry *h;
86aba9db
NC
3735
3736 /* An external symbol. */
5cec6941 3737 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
86aba9db
NC
3738 h = elf_sym_hashes (abfd)[indx];
3739 BFD_ASSERT (h != NULL);
3740
3741 if ( h->root.type != bfd_link_hash_defined
3742 && h->root.type != bfd_link_hash_defweak)
3743 /* This appears to be a reference to an undefined
3744 symbol. Just ignore it--it will be caught by the
3745 regular reloc processing. */
3746 continue;
3747
3748 symval = (h->root.u.def.value
3749 + h->root.u.def.section->output_section->vma
3750 + h->root.u.def.section->output_offset);
3751 }
3752
3753 addend = irel->r_addend;
3754
3755 foff = (symval + addend
3756 - (irel->r_offset
3757 + sec->output_section->vma
3758 + sec->output_offset
3759 + 4));
3760#ifdef DEBUG_RELAX
3761 fprintf (stderr, "relax longcall r_offset 0x%x ptr 0x%x symbol 0x%x addend 0x%x distance 0x%x\n",
3762 irel->r_offset,
3763 (irel->r_offset
3764 + sec->output_section->vma
3765 + sec->output_offset),
3766 symval, addend, foff);
3767#endif
3768
3769 if (foff < -0x100000 || foff >= 0x100000)
3770 /* After all that work, we can't shorten this function call. */
3771 continue;
3772
3773 /* For simplicity of coding, we are going to modify the section
07d6d2b8
AM
3774 contents, the section relocs, and the BFD symbol table. We
3775 must tell the rest of the code not to free up this
3776 information. It would be possible to instead create a table
3777 of changes which have to be made, as is done in coff-mips.c;
3778 that would be more work, but would require less memory when
3779 the linker is run. */
86aba9db 3780 elf_section_data (sec)->relocs = internal_relocs;
86aba9db 3781 elf_section_data (sec)->this_hdr.contents = contents;
5cec6941 3782 symtab_hdr->contents = (bfd_byte *) isymbuf;
b34976b6 3783
86aba9db 3784 /* Replace the long call with a jarl. */
de863c74
NC
3785 if (bfd_get_arch (abfd) == bfd_arch_v850_rh850)
3786 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_PCR22);
3787 else
3788 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_22_PCREL);
86aba9db
NC
3789
3790 addend = 0;
3791
3792 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
3793 /* If this needs to be changed because of future relaxing,
3794 it will be handled here like other internal IND12W
3795 relocs. */
3796 bfd_put_32 (abfd,
3797 0x00000780 | (JARL_R2 (insn[2])<<11) | ((addend << 16) & 0xffff) | ((addend >> 16) & 0xf),
3798 contents + irel->r_offset);
3799 else
3800 /* We can't fully resolve this yet, because the external
3801 symbol value may be changed by future relaxing.
3802 We let the final link phase handle it. */
3803 bfd_put_32 (abfd, 0x00000780 | (JARL_R2 (insn[2])<<11),
3804 contents + irel->r_offset);
3805
b34976b6 3806 hi_irelfn->r_info =
86aba9db
NC
3807 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_NONE);
3808 lo_irelfn->r_info =
3809 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_V850_NONE);
3810 irelcall->r_info =
3811 ELF32_R_INFO (ELF32_R_SYM (irelcall->r_info), R_V850_NONE);
3812
3813 if (! v850_elf_relax_delete_bytes (abfd, sec,
3814 irel->r_offset + 4, toaddr, 12))
3815 goto error_return;
3816
3817 align_pad_size += 12;
3818 }
3819 else if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGJUMP)
3820 {
3821 /* Check code for -mlong-jumps output. */
eea6121a 3822 if (laddr + 10 <= (bfd_vma) sec->size)
86aba9db
NC
3823 {
3824 insn[0] = bfd_get_16 (abfd, contents + laddr);
3825 insn[1] = bfd_get_16 (abfd, contents + laddr + 4);
3826 insn[2] = bfd_get_16 (abfd, contents + laddr + 8);
3827
3828 if ((insn[0] & MOVHI_MASK) != MOVHI
3829 || MOVHI_R1 (insn[0]) != 0)
3830 no_match = 0;
3831
3832 if (no_match < 0
3833 && ((insn[1] & MOVEA_MASK) != MOVEA
3834 || MOVHI_R2 (insn[0]) != MOVEA_R1 (insn[1])))
3835 no_match = 1;
3836
3837 if (no_match < 0
3838 && ((insn[2] & JMP_R_MASK) != JMP_R
3839 || MOVEA_R2 (insn[1]) != JMP_R1 (insn[2])))
3840 no_match = 4;
3841 }
3842 else
3843 {
4eca0228 3844 _bfd_error_handler
695344c0 3845 /* xgettext:c-format */
38f14ab8 3846 (_("%pB: %#" PRIx64 ": warning: %s points to "
695344c0 3847 "unrecognized insns"),
38f14ab8 3848 abfd, (uint64_t) irel->r_offset, "R_V850_LONGJUMP");
86aba9db
NC
3849 continue;
3850 }
3851
3852 if (no_match >= 0)
3853 {
4eca0228 3854 _bfd_error_handler
695344c0 3855 /* xgettext:c-format */
38f14ab8 3856 (_("%pB: %#" PRIx64 ": warning: %s points to "
d42c267e 3857 "unrecognized insn %#x"),
dae82561 3858 abfd,
2dcf00ce 3859 (uint64_t) (irel->r_offset + no_match),
38f14ab8 3860 "R_V850_LONGJUMP",
4eca0228 3861 insn[no_match]);
86aba9db
NC
3862 continue;
3863 }
3864
3865 /* Get the reloc for the address from which the register is
07d6d2b8
AM
3866 being loaded. This reloc will tell us which function is
3867 actually being called. */
86aba9db 3868 for (hi_irelfn = internal_relocs; hi_irelfn < irelend; hi_irelfn ++)
de863c74
NC
3869 {
3870 r_type = ELF32_R_TYPE (hi_irelfn->r_info);
3871
3872 if (hi_irelfn->r_offset == laddr + 2
3873 && ((r_type == (int) R_V850_HI16_S) || r_type == (int) R_V810_WHI1))
3874 break;
3875 }
86aba9db
NC
3876
3877 for (lo_irelfn = internal_relocs; lo_irelfn < irelend; lo_irelfn ++)
de863c74
NC
3878 {
3879 r_type = ELF32_R_TYPE (lo_irelfn->r_info);
3880
3881 if (lo_irelfn->r_offset == laddr + 6
3882 && (r_type == (int) R_V850_LO16 || r_type == (int) R_V810_WLO))
3883 break;
3884 }
86aba9db
NC
3885
3886 if ( hi_irelfn == irelend
3887 || lo_irelfn == irelend)
3888 {
4eca0228 3889 _bfd_error_handler
695344c0 3890 /* xgettext:c-format */
38f14ab8 3891 (_("%pB: %#" PRIx64 ": warning: %s points to "
695344c0 3892 "unrecognized reloc"),
38f14ab8 3893 abfd, (uint64_t) irel->r_offset, "R_V850_LONGJUMP");
86aba9db
NC
3894 continue;
3895 }
b34976b6 3896
86aba9db
NC
3897 /* Get the value of the symbol referred to by the reloc. */
3898 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
3899 {
5cec6941 3900 Elf_Internal_Sym * isym;
07d6d2b8 3901 asection * sym_sec;
86aba9db
NC
3902
3903 /* A local symbol. */
5cec6941
NC
3904 isym = isymbuf + ELF32_R_SYM (hi_irelfn->r_info);
3905
3906 if (isym->st_shndx == SHN_UNDEF)
86aba9db 3907 sym_sec = bfd_und_section_ptr;
5cec6941 3908 else if (isym->st_shndx == SHN_ABS)
86aba9db 3909 sym_sec = bfd_abs_section_ptr;
5cec6941 3910 else if (isym->st_shndx == SHN_COMMON)
86aba9db
NC
3911 sym_sec = bfd_com_section_ptr;
3912 else
5cec6941
NC
3913 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
3914 symval = (isym->st_value
86aba9db
NC
3915 + sym_sec->output_section->vma
3916 + sym_sec->output_offset);
3917#ifdef DEBUG_RELAX
3918 {
3919 char * name = bfd_elf_string_from_elf_section
5cec6941 3920 (abfd, symtab_hdr->sh_link, isym->st_name);
86aba9db
NC
3921
3922 fprintf (stderr, "relax long jump local: sec: %s, sym: %s (%d), value: %x + %x + %x addend %x\n",
5cec6941
NC
3923 sym_sec->name, name, isym->st_name,
3924 sym_sec->output_section->vma,
3925 sym_sec->output_offset,
3926 isym->st_value, irel->r_addend);
86aba9db
NC
3927 }
3928#endif
3929 }
3930 else
3931 {
3932 unsigned long indx;
3933 struct elf_link_hash_entry * h;
3934
3935 /* An external symbol. */
3936 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
3937 h = elf_sym_hashes (abfd)[indx];
3938 BFD_ASSERT (h != NULL);
3939
3940 if ( h->root.type != bfd_link_hash_defined
3941 && h->root.type != bfd_link_hash_defweak)
3942 /* This appears to be a reference to an undefined
3943 symbol. Just ignore it--it will be caught by the
3944 regular reloc processing. */
3945 continue;
3946
3947 symval = (h->root.u.def.value
3948 + h->root.u.def.section->output_section->vma
3949 + h->root.u.def.section->output_offset);
3950#ifdef DEBUG_RELAX
3951 fprintf (stderr,
3952 "relax longjump defined: sec: %s, name: %s, value: %x + %x + %x addend %x\n",
3953 sec->name, h->root.root.string, h->root.u.def.value,
3954 sec->output_section->vma, sec->output_offset, irel->r_addend);
3955#endif
3956 }
3957
3958 addend = irel->r_addend;
3959
3960 foff = (symval + addend
3961 - (irel->r_offset
3962 + sec->output_section->vma
3963 + sec->output_offset
3964 + 4));
3965#ifdef DEBUG_RELAX
3966 fprintf (stderr, "relax longjump r_offset 0x%x ptr 0x%x symbol 0x%x addend 0x%x distance 0x%x\n",
3967 irel->r_offset,
3968 (irel->r_offset
3969 + sec->output_section->vma
3970 + sec->output_offset),
3971 symval, addend, foff);
3972#endif
3973 if (foff < -0x100000 || foff >= 0x100000)
3974 /* After all that work, we can't shorten this function call. */
3975 continue;
3976
3977 /* For simplicity of coding, we are going to modify the section
07d6d2b8
AM
3978 contents, the section relocs, and the BFD symbol table. We
3979 must tell the rest of the code not to free up this
3980 information. It would be possible to instead create a table
3981 of changes which have to be made, as is done in coff-mips.c;
3982 that would be more work, but would require less memory when
3983 the linker is run. */
86aba9db 3984 elf_section_data (sec)->relocs = internal_relocs;
86aba9db 3985 elf_section_data (sec)->this_hdr.contents = contents;
5cec6941 3986 symtab_hdr->contents = (bfd_byte *) isymbuf;
86aba9db
NC
3987
3988 if (foff < -0x100 || foff >= 0x100)
3989 {
3990 /* Replace the long jump with a jr. */
3991
de863c74
NC
3992 if (bfd_get_arch (abfd) == bfd_arch_v850_rh850)
3993 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_V850_PCR22);
3994 else
3995 irel->r_info =
3996 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_V850_22_PCREL);
b34976b6 3997
86aba9db
NC
3998 irel->r_addend = addend;
3999 addend = 0;
4000
4001 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
4002 /* If this needs to be changed because of future relaxing,
4003 it will be handled here like other internal IND12W
4004 relocs. */
4005 bfd_put_32 (abfd,
4006 0x00000780 | ((addend << 15) & 0xffff0000) | ((addend >> 17) & 0xf),
4007 contents + irel->r_offset);
4008 else
4009 /* We can't fully resolve this yet, because the external
4010 symbol value may be changed by future relaxing.
4011 We let the final link phase handle it. */
4012 bfd_put_32 (abfd, 0x00000780, contents + irel->r_offset);
4013
4014 hi_irelfn->r_info =
4015 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_NONE);
4016 lo_irelfn->r_info =
4017 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_V850_NONE);
4018 if (!v850_elf_relax_delete_bytes (abfd, sec,
4019 irel->r_offset + 4, toaddr, 6))
4020 goto error_return;
4021
4022 align_pad_size += 6;
4023 }
4024 else
4025 {
4026 /* Replace the long jump with a br. */
4027
de863c74
NC
4028 if (bfd_get_arch (abfd) == bfd_arch_v850_rh850)
4029 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_V850_PC9);
4030 else
4031 irel->r_info =
4032 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_V850_9_PCREL);
86aba9db
NC
4033
4034 irel->r_addend = addend;
4035 addend = 0;
4036
4037 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
4038 /* If this needs to be changed because of future relaxing,
4039 it will be handled here like other internal IND12W
4040 relocs. */
4041 bfd_put_16 (abfd,
4042 0x0585 | ((addend << 10) & 0xf800) | ((addend << 3) & 0x0070),
4043 contents + irel->r_offset);
4044 else
4045 /* We can't fully resolve this yet, because the external
4046 symbol value may be changed by future relaxing.
4047 We let the final link phase handle it. */
4048 bfd_put_16 (abfd, 0x0585, contents + irel->r_offset);
4049
4050 hi_irelfn->r_info =
4051 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_NONE);
4052 lo_irelfn->r_info =
4053 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_V850_NONE);
4054 if (!v850_elf_relax_delete_bytes (abfd, sec,
4055 irel->r_offset + 2, toaddr, 8))
4056 goto error_return;
4057
4058 align_pad_size += 8;
4059 }
4060 }
4061 }
4062
4063 irelalign = NULL;
4064 for (irel = internal_relocs; irel < irelend; irel++)
4065 {
4066 if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_ALIGN
4067 && irel->r_offset == toaddr)
4068 {
4069 irel->r_offset -= align_pad_size;
4070
4071 if (irelalign == NULL || irelalign->r_addend > irel->r_addend)
4072 irelalign = irel;
4073 }
4074 }
4075
4076 addr = toaddr;
4077 }
4078
4079 if (!irelalign)
4080 {
4081#ifdef DEBUG_RELAX
4082 fprintf (stderr, "relax pad %d shorten %d -> %d\n",
4083 align_pad_size,
eea6121a
AM
4084 sec->size,
4085 sec->size - align_pad_size);
86aba9db 4086#endif
eea6121a 4087 sec->size -= align_pad_size;
86aba9db
NC
4088 }
4089
5cec6941
NC
4090 finish:
4091 if (internal_relocs != NULL
4092 && elf_section_data (sec)->relocs != internal_relocs)
4093 free (internal_relocs);
86aba9db 4094
5cec6941
NC
4095 if (contents != NULL
4096 && elf_section_data (sec)->this_hdr.contents != (unsigned char *) contents)
4097 free (contents);
86aba9db 4098
5cec6941
NC
4099 if (isymbuf != NULL
4100 && symtab_hdr->contents != (bfd_byte *) isymbuf)
4101 free (isymbuf);
86aba9db 4102
5cec6941 4103 return result;
86aba9db 4104
5cec6941 4105 error_return:
b34976b6 4106 result = FALSE;
5cec6941 4107 goto finish;
86aba9db 4108}
2f89ff8d 4109
b35d266b 4110static const struct bfd_elf_special_section v850_elf_special_sections[] =
7f4d3958 4111{
0112cd26
NC
4112 { STRING_COMMA_LEN (".call_table_data"), 0, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE) },
4113 { STRING_COMMA_LEN (".call_table_text"), 0, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE
4114 + SHF_EXECINSTR) },
07d6d2b8 4115 { STRING_COMMA_LEN (".rosdata"), -2, SHT_PROGBITS, (SHF_ALLOC
0112cd26 4116 + SHF_V850_GPREL) },
07d6d2b8 4117 { STRING_COMMA_LEN (".rozdata"), -2, SHT_PROGBITS, (SHF_ALLOC
0112cd26 4118 + SHF_V850_R0REL) },
07d6d2b8 4119 { STRING_COMMA_LEN (".sbss"), -2, SHT_NOBITS, (SHF_ALLOC + SHF_WRITE
0112cd26 4120 + SHF_V850_GPREL) },
07d6d2b8 4121 { STRING_COMMA_LEN (".scommon"), -2, SHT_V850_SCOMMON, (SHF_ALLOC + SHF_WRITE
0112cd26 4122 + SHF_V850_GPREL) },
07d6d2b8 4123 { STRING_COMMA_LEN (".sdata"), -2, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE
0112cd26 4124 + SHF_V850_GPREL) },
07d6d2b8 4125 { STRING_COMMA_LEN (".tbss"), -2, SHT_NOBITS, (SHF_ALLOC + SHF_WRITE
0112cd26 4126 + SHF_V850_EPREL) },
07d6d2b8 4127 { STRING_COMMA_LEN (".tcommon"), -2, SHT_V850_TCOMMON, (SHF_ALLOC + SHF_WRITE
0112cd26 4128 + SHF_V850_R0REL) },
07d6d2b8 4129 { STRING_COMMA_LEN (".tdata"), -2, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE
0112cd26 4130 + SHF_V850_EPREL) },
07d6d2b8 4131 { STRING_COMMA_LEN (".zbss"), -2, SHT_NOBITS, (SHF_ALLOC + SHF_WRITE
0112cd26 4132 + SHF_V850_R0REL) },
07d6d2b8 4133 { STRING_COMMA_LEN (".zcommon"), -2, SHT_V850_ZCOMMON, (SHF_ALLOC + SHF_WRITE
0112cd26 4134 + SHF_V850_R0REL) },
07d6d2b8 4135 { STRING_COMMA_LEN (".zdata"), -2, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE
0112cd26 4136 + SHF_V850_R0REL) },
07d6d2b8 4137 { NULL, 0, 0, 0, 0 }
7f4d3958 4138};
252b5132 4139\f
6d00b590 4140#define TARGET_LITTLE_SYM v850_elf32_vec
252b5132
RH
4141#define TARGET_LITTLE_NAME "elf32-v850"
4142#define ELF_ARCH bfd_arch_v850
aa4f99bb
AO
4143#define ELF_MACHINE_CODE EM_V850
4144#define ELF_MACHINE_ALT1 EM_CYGNUS_V850
252b5132 4145#define ELF_MAXPAGESIZE 0x1000
435b1e90 4146
252b5132
RH
4147#define elf_info_to_howto v850_elf_info_to_howto_rela
4148#define elf_info_to_howto_rel v850_elf_info_to_howto_rel
4149
4150#define elf_backend_check_relocs v850_elf_check_relocs
07d6d2b8 4151#define elf_backend_relocate_section v850_elf_relocate_section
252b5132 4152#define elf_backend_object_p v850_elf_object_p
07d6d2b8
AM
4153#define elf_backend_final_write_processing v850_elf_final_write_processing
4154#define elf_backend_section_from_bfd_section v850_elf_section_from_bfd_section
252b5132
RH
4155#define elf_backend_symbol_processing v850_elf_symbol_processing
4156#define elf_backend_add_symbol_hook v850_elf_add_symbol_hook
07d6d2b8 4157#define elf_backend_link_output_symbol_hook v850_elf_link_output_symbol_hook
252b5132
RH
4158#define elf_backend_section_from_shdr v850_elf_section_from_shdr
4159#define elf_backend_fake_sections v850_elf_fake_sections
07d6d2b8 4160#define elf_backend_gc_mark_hook v850_elf_gc_mark_hook
29ef7005 4161#define elf_backend_special_sections v850_elf_special_sections
252b5132 4162
07d6d2b8 4163#define elf_backend_can_gc_sections 1
685080f2 4164#define elf_backend_rela_normal 1
252b5132 4165
252b5132 4166#define bfd_elf32_bfd_is_local_label_name v850_elf_is_local_label_name
41702d50
NC
4167#define bfd_elf32_bfd_is_target_special_symbol v850_elf_is_target_special_symbol
4168
252b5132 4169#define bfd_elf32_bfd_reloc_type_lookup v850_elf_reloc_type_lookup
07d6d2b8
AM
4170#define bfd_elf32_bfd_reloc_name_lookup v850_elf_reloc_name_lookup
4171#define bfd_elf32_bfd_merge_private_bfd_data v850_elf_merge_private_bfd_data
252b5132
RH
4172#define bfd_elf32_bfd_set_private_flags v850_elf_set_private_flags
4173#define bfd_elf32_bfd_print_private_bfd_data v850_elf_print_private_bfd_data
86aba9db 4174#define bfd_elf32_bfd_relax_section v850_elf_relax_section
252b5132
RH
4175
4176#define elf_symbol_leading_char '_'
4177
de863c74
NC
4178#undef elf32_bed
4179#define elf32_bed elf32_v850_bed
4180
4181#include "elf32-target.h"
4182
4183/* Map BFD reloc types to V800 ELF reloc types. */
4184
4185static const struct v850_elf_reloc_map v800_elf_reloc_map[] =
4186{
07d6d2b8
AM
4187 { BFD_RELOC_NONE, R_V810_NONE },
4188 { BFD_RELOC_8, R_V810_BYTE },
4189 { BFD_RELOC_16, R_V810_HWORD },
4190 { BFD_RELOC_32, R_V810_WORD },
4191 { BFD_RELOC_LO16, R_V810_WLO },
4192 { BFD_RELOC_HI16, R_V810_WHI },
4193 { BFD_RELOC_HI16_S, R_V810_WHI1 },
4194 { BFD_RELOC_V850_32_PCREL, R_V850_PC32 },
4195 { BFD_RELOC_V850_22_PCREL, R_V850_PCR22 },
4196 { BFD_RELOC_V850_17_PCREL, R_V850_PC17 },
4197 { BFD_RELOC_V850_16_PCREL, R_V850_PC16U },
de863c74 4198 { BFD_RELOC_V850_9_PCREL, R_V850_PC9 },
07d6d2b8
AM
4199 { BFD_RELOC_V850_LO16_S1, R_V810_WLO_1 }, /* Or R_V850_HWLO or R_V850_HWLO_1. */
4200 { BFD_RELOC_V850_23, R_V850_WLO23 },
de863c74
NC
4201 { BFD_RELOC_V850_LO16_SPLIT_OFFSET, R_V850_BLO },
4202 { BFD_RELOC_V850_ZDA_16_16_OFFSET, R_V810_HWORD },
4203 { BFD_RELOC_V850_TDA_16_16_OFFSET, R_V810_HWORD },
4204 { BFD_RELOC_V850_SDA_16_16_OFFSET, R_V810_HWORD },
4205 { BFD_RELOC_V850_SDA_15_16_OFFSET, R_V810_GPWLO_1 }
4206};
4207
4208/* Map a bfd relocation into the appropriate howto structure. */
4209
4210static reloc_howto_type *
4211v800_elf_reloc_type_lookup (bfd * abfd, bfd_reloc_code_real_type code)
4212{
4213 unsigned int i;
4214
4215 BFD_ASSERT (bfd_get_arch (abfd) == bfd_arch_v850_rh850);
4216
4217 for (i = ARRAY_SIZE (v800_elf_reloc_map); i --;)
4218 if (v800_elf_reloc_map[i].bfd_reloc_val == code)
4219 {
4220 unsigned int elf_reloc_val = v800_elf_reloc_map[i].elf_reloc_val;
4221 unsigned int idx = elf_reloc_val - R_V810_NONE;
4222
4223 BFD_ASSERT (v800_elf_howto_table[idx].type == elf_reloc_val);
4224
4225 return v800_elf_howto_table + idx;
4226 }
4227
4228#ifdef DEBUG
4229 fprintf (stderr, "failed to find v800 equiv of bfd reloc code %d\n", code);
4230#endif
4231 return NULL;
4232}
4233
4234static reloc_howto_type *
4235v800_elf_reloc_name_lookup (bfd * abfd, const char * r_name)
4236{
4237 unsigned int i;
4238
4239 BFD_ASSERT (bfd_get_arch (abfd) == bfd_arch_v850_rh850);
4240
4241 for (i = ARRAY_SIZE (v800_elf_howto_table); i--;)
4242 if (v800_elf_howto_table[i].name != NULL
4243 && strcasecmp (v800_elf_howto_table[i].name, r_name) == 0)
4244 return v800_elf_howto_table + i;
4245
4246 return NULL;
4247}
4248
4249
4250/* Set the howto pointer in CACHE_PTR for a V800 ELF reloc. */
4251
f3185997 4252static bfd_boolean
07d6d2b8
AM
4253v800_elf_info_to_howto (bfd * abfd,
4254 arelent * cache_ptr,
de863c74
NC
4255 Elf_Internal_Rela * dst)
4256{
4257 unsigned int r_type = ELF32_R_TYPE (dst->r_info);
4258
de863c74
NC
4259 if (r_type == R_V800_NONE)
4260 r_type = R_V810_NONE;
4261
f3185997
NC
4262 if (bfd_get_arch (abfd) != bfd_arch_v850_rh850
4263 || r_type >= (unsigned int) R_V800_max
4264 || r_type < (unsigned int) R_V810_NONE
4265 || (r_type - R_V810_NONE) >= ARRAY_SIZE (v800_elf_howto_table))
4266 {
4267 /* xgettext:c-format */
4268 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
4269 abfd, r_type);
4270 bfd_set_error (bfd_error_bad_value);
4271 return FALSE;
4272 }
de863c74 4273
f3185997
NC
4274 cache_ptr->howto = v800_elf_howto_table + (r_type - R_V810_NONE);
4275 return TRUE;
de863c74
NC
4276}
4277\f
de863c74 4278#undef TARGET_LITTLE_SYM
6d00b590 4279#define TARGET_LITTLE_SYM v800_elf32_vec
de863c74
NC
4280#undef TARGET_LITTLE_NAME
4281#define TARGET_LITTLE_NAME "elf32-v850-rh850"
4282#undef ELF_ARCH
4283#define ELF_ARCH bfd_arch_v850_rh850
4284#undef ELF_MACHINE_CODE
4285#define ELF_MACHINE_CODE EM_V800
4286#undef ELF_MACHINE_ALT1
4287
4288#undef elf32_bed
4289#define elf32_bed elf32_v850_rh850_bed
4290
4291#undef elf_info_to_howto
4292#define elf_info_to_howto v800_elf_info_to_howto
4293#undef elf_info_to_howto_rel
4294#define elf_info_to_howto_rel NULL
4295#undef bfd_elf32_bfd_reloc_type_lookup
4296#define bfd_elf32_bfd_reloc_type_lookup v800_elf_reloc_type_lookup
4297#undef bfd_elf32_bfd_reloc_name_lookup
4298#define bfd_elf32_bfd_reloc_name_lookup v800_elf_reloc_name_lookup
4299
252b5132 4300#include "elf32-target.h"
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