gdb: add target_ops::supports_displaced_step
[deliverable/binutils-gdb.git] / gas / NEWS
CommitLineData
252b5132 1-*- text -*-
96a84ea3 2
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3* Extend .symver directive to update visibility of the original symbol
4 and assign one original symbol to different versioned symbols.
5
6e0e8b45
L
6* Add support for Intel SERIALIZE and TSXLDTRK instructions.
7
9e8f1c90
L
8* Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
9 -mlfence-before-ret= options to x86 assembler to help mitigate
10 CVE-2020-0551.
11
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NC
12* Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
13 (if such output is being generated). Added the ability to generate
14 version 5 .debug_line sections.
15
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TC
16* Add -mbig-obj support to i386 MingW targets.
17
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NC
18Changes in 2.34:
19
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L
20* Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
21 -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
22 options to x86 assembler to align branches within a fixed boundary
23 with segment prefixes or NOPs.
24
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SB
25* Add support for Zilog eZ80 and Zilog Z180 CPUs.
26
27* Add support for z80-elf target.
28
29* Add support for relocation of each byte or word of multibyte value to Z80
30 targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
31 with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
32
33* Add SDCC support for Z80 targets.
34
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35Changes in 2.33:
36
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MM
37* Add support for the Arm Scalable Vector Extension version 2 (SVE2)
38 instructions.
39
40* Add support for the Arm Transactional Memory Extension (TME)
41 instructions.
42
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AV
43* Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
44 instructions.
45
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BW
46* For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
47 LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
48 time option to set the default behavior. Set the default if the configure
49 option is not used to "no".
6f2117ba 50
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DZ
51* Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
52 processors.
53
54* Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
55 Cortex-A76AE, and Cortex-A77 processors.
56
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BW
57* Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
58 floating point literals. Add .float16_format directive and
59 -mfp16-format=[ieee|alternative] option for Arm to control the format of the
60 encoding.
61
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AB
62* Add --gdwarf-cie-version command line flag. This allows control over which
63 version of DWARF CIE the assembler creates.
64
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65Changes in 2.32:
66
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67* Add -mvexwig=[0|1] option to x86 assembler to control encoding of
68 VEX.W-ignored (WIG) VEX instructions.
69
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L
70* Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
71 notes. Add a --enable-x86-used-note configure time option to set the
72 default behavior. Set the default if the configure option is not used
73 to "no".
74
a693765e
CX
75* Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
76
bdc6c06e
CX
77* Add support for the MIPS Loongson EXTensions (EXT) instructions.
78
716c08de
CX
79* Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
80
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AJ
81* Add support for the C-SKY processor series.
82
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CX
83* Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
84 ASE.
85
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NC
86Changes in 2.31:
87
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NC
88* The ADR and ADRL pseudo-instructions supported by the ARM assembler
89 now only set the bottom bit of the address of thumb function symbols
90 if the -mthumb-interwork command line option is active.
91
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FS
92* Add support for the MIPS Global INValidate (GINV) ASE.
93
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SE
94* Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
95
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JD
96* Add support for the Freescale S12Z architecture.
97
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NC
98* Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
99 Build Attribute notes if none are present in the input sources. Add a
100 --enable-generate-build-notes=[yes|no] configure time option to set the
101 default behaviour. Set the default if the configure option is not used
102 to "no".
103
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104* Remove -mold-gcc command-line option for x86 targets.
105
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L
106* Add -O[2|s] command-line options to x86 assembler to enable alternate
107 shorter instruction encoding.
108
8f065d3b 109* Add support for .nops directive. It is currently supported only for
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110 x86 targets.
111
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NC
112Changes in 2.30:
113
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114* Add support for loaction views in DWARF debug line information.
115
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116Changes in 2.29:
117
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118* Add support for ELF SHF_GNU_MBIND.
119
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120* Add support for the WebAssembly file format and wasm32 ELF conversion.
121
7e0de605 122* PowerPC gas now checks that the correct register class is used in
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123 instructions. For instance, "addi %f4,%cr3,%r31" warns three times
124 that the registers are invalid.
7e0de605 125
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126* Add support for the Texas Instruments PRU processor.
127
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TP
128* Support for the ARMv8-R architecture and Cortex-R52 processor has been
129 added to the ARM port.
ced40572 130
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131Changes in 2.28:
132
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133* Add support for the RISC-V architecture.
134
b19ea8d2 135* Add support for the ARM Cortex-M23 and Cortex-M33 processors.
ce1b0a45 136
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137Changes in 2.27:
138
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139* Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
140
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141* Add --no-pad-sections to stop the assembler from padding the end of output
142 sections up to their alignment boundary.
143
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TP
144* Support for the ARMv8-M architecture has been added to the ARM port. Support
145 for the ARMv8-M Security and DSP Extensions has also been added to the ARM
146 port.
147
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CZ
148* ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
149 .extCoreRegister pseudo-ops that allow an user to define custom
150 instructions, conditional codes, auxiliary and core registers.
151
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L
152* Add a configure option --enable-elf-stt-common to decide whether ELF
153 assembler should generate common symbols with the STT_COMMON type by
154 default. Default to no.
155
a05a5b64 156* New command-line option --elf-stt-common= for ELF targets to control
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157 whether to generate common symbols with the STT_COMMON type.
158
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159* Add ability to set section flags and types via numeric values for ELF
160 based targets.
81c23f82 161
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162* Add a configure option --enable-x86-relax-relocations to decide whether
163 x86 assembler should generate relax relocations by default. Default to
164 yes, except for x86 Solaris targets older than Solaris 12.
165
a05a5b64 166* New command-line option -mrelax-relocations= for x86 target to control
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167 whether to generate relax relocations.
168
a05a5b64 169* New command-line option -mfence-as-lock-add=yes for x86 target to encode
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170 lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
171
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172* Add assembly-time relaxation option for ARC cpus.
173
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174* Add --with-cpu=TYPE configure option for ARC gas. This allows the default
175 cpu type to be adjusted at configure time.
176
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177Changes in 2.26:
178
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179* Add a configure option --enable-compressed-debug-sections={all,gas} to
180 decide whether DWARF debug sections should be compressed by default.
e12fe555 181
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NC
182* Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
183 assembler support for Argonaut RISC architectures.
184
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NC
185* Symbol and label names can now be enclosed in double quotes (") which allows
186 them to contain characters that are not part of valid symbol names in high
187 level languages.
188
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189* Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
190 previous spelling, -march=armv6zk, is still accepted.
191
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192* Support for the ARMv8.1 architecture has been added to the Aarch64 port.
193 Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
194 extensions has also been added to the Aarch64 port.
195
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196* Support for the ARMv8.1 architecture has been added to the ARM port. Support
197 for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
198 been added to the ARM port.
199
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200* Extend --compress-debug-sections option to support
201 --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
202 targets.
203
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204* --compress-debug-sections is turned on for Linux/x86 by default.
205
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206Changes in 2.25:
207
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208* Add support for the AVR Tiny microcontrollers.
209
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210* Replace support for openrisc and or32 with support for or1k.
211
2e6976a8 212* Enhanced the ARM port to accept the assembler output from the CodeComposer
a05a5b64 213 Studio tool. Support is enabled via the new command-line option -mccs.
2e6976a8 214
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215* Add support for the Andes NDS32.
216
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217Changes in 2.24:
218
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NC
219* Add support for the Texas Instruments MSP430X processor.
220
a05a5b64 221* Add -gdwarf-sections command-line option to enable per-code-section
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222 generation of DWARF .debug_line sections.
223
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224* Add support for Altera Nios II.
225
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NC
226* Add support for the Imagination Technologies Meta processor.
227
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228* Add support for the v850e3v5.
229
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230* Remove assembler support for MIPS ECOFF targets.
231
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TG
232Changes in 2.23:
233
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NC
234* Add support for the 64-bit ARM architecture: AArch64.
235
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NC
236* Add support for S12X processor.
237
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JL
238* Add support for the VLE extension to the PowerPC architecture.
239
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240* Add support for the Freescale XGATE architecture.
241
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RM
242* Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
243 directives. These are currently available only for x86 and ARM targets.
244
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DD
245* Add support for the Renesas RL78 architecture.
246
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NC
247* Add support for the Adapteva EPIPHANY architecture.
248
fe13e45b 249* For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
29c048b6 250
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251Changes in 2.22:
252
69f56ae1 253* Add support for the Tilera TILEPro and TILE-Gx architectures.
44f45767 254
90b3661c 255Changes in 2.21:
44f45767 256
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257* Gas no longer requires doubling of ampersands in macros.
258
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JM
259* Add support for the TMS320C6000 (TI C6X) processor family.
260
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261* GAS now understands an extended syntax in the .section directive flags
262 for COFF targets that allows the section's alignment to be specified. This
263 feature has also been backported to the 2.20 release series, starting with
264 2.20.1.
265
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266* Add support for the Renesas RX processor.
267
a05a5b64 268* New command-line option, --compress-debug-sections, which requests
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269 compression of DWARF debug information sections in the relocatable output
270 file. Compressed debug sections are supported by readelf, objdump, and
271 gold, but not currently by Gnu ld.
272
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273Changes in 2.20:
274
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275* Added support for v850e2 and v850e2v3.
276
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NC
277* GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
278 pseudo op. It marks the symbol as being globally unique in the entire
279 process.
280
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281* ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
282 in binary rather than text.
6e33da12 283
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284* Add support for common symbol alignment to PE formats.
285
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286* Add support for the new discriminator column in the DWARF line table,
287 with a discriminator operand for the .loc directive.
288
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289* Add support for Sunplus score architecture.
290
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NC
291* The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
292 indicate that if the symbol is the target of a relocation, its value should
293 not be use. Instead the function should be invoked and its result used as
294 the value.
fa94de6b 295
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296* Add support for Lattice Mico32 (lm32) architecture.
297
fa94de6b 298* Add support for Xilinx MicroBlaze architecture.
caa03924 299
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TG
300Changes in 2.19:
301
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302* New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
303 tables without runtime relocation.
304
a05a5b64 305* New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
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DD
306 adds compatibility with H'00 style hex constants.
307
a05a5b64 308* New command-line option, -msse-check=[none|error|warning], for x86
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309 targets.
310
a05a5b64 311* New sub-option added to the assembler's -a command-line switch to
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NC
312 generate a listing output. The 'g' sub-option will insert into the listing
313 various information about the assembly, such as assembler version, the
a05a5b64 314 command-line options used, and a time stamp.
83f10cb2 315
a05a5b64 316* New command-line option -msse2avx for x86 target to encode SSE
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317 instructions with VEX prefix.
318
f1f8f695 319* Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
c0f3af97 320
a05a5b64 321* New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
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322 -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
323 -mnaked-reg and -mold-gcc, for x86 targets.
324
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325* Support for generating wide character strings has been added via the new
326 pseudo ops: .string16, .string32 and .string64.
327
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328* Support for SSE5 has been added to the i386 port.
329
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330Changes in 2.18:
331
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332* The GAS sources are now released under the GPLv3.
333
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NC
334* Support for the National Semiconductor CR16 target has been added.
335
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AM
336* Added gas .reloc pseudo. This is a low-level interface for creating
337 relocations.
338
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339* Add support for x86_64 PE+ target.
340
1c0d3aa6 341* Add support for Score target.
83518699 342
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343Changes in 2.17:
344
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345* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
346
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347* Support for ms2 architecture has been added.
348
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349* Support for the Z80 processor family has been added.
350
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MM
351* Add support for the "@<file>" syntax to the command line, so that extra
352 switches can be read from <file>.
353
a05a5b64 354* The SH target supports a new command-line switch --enable-reg-prefix which,
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355 if enabled, will allow register names to be optionally prefixed with a $
356 character. This allows register names to be distinguished from label names.
fa94de6b 357
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358* Macros with a variable number of arguments are now supported. See the
359 documentation for how this works.
360
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NC
361* Added --reduce-memory-overheads switch to reduce the size of the hash
362 tables used, at the expense of longer assembly times, and
363 --hash-size=<NUMBER> to set the size of the hash tables used by gas.
364
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365* Macro names and macro parameter names can now be any identifier that would
366 also be legal as a symbol elsewhere. For macro parameter names, this is
367 known to cause problems in certain sources when the respective target uses
368 characters inconsistently, and thus macro parameter references may no longer
369 be recognized as such (see the documentation for details).
fa94de6b 370
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NC
371* Support the .f_floating, .d_floating, .g_floating and .h_floating directives
372 for the VAX target in order to be more compatible with the VAX MACRO
373 assembler.
374
a05a5b64 375* New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
8c2fda1d 376
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NC
377Changes in 2.16:
378
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379* Redefinition of macros now results in an error.
380
a05a5b64 381* New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
91d777ee 382
a05a5b64 383* New command-line option -munwind-check=[warning|error] for IA64
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384 targets.
385
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386* The IA64 port now uses automatic dependency violation removal as its default
387 mode.
388
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389* Port to MAXQ processor contributed by HCL Tech.
390
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NC
391* Added support for generating unwind tables for ARM ELF targets.
392
a05a5b64 393* Add a -g command-line option to generate debug information in the target's
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394 preferred debug format.
395
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396* Support for the crx-elf target added.
397
1a320fbb 398* Support for the sh-symbianelf target added.
1fe1f39c 399
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BF
400* Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
401 on pe[i]-i386; required for this target's DWARF 2 support.
402
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403* Support for Motorola MCF521x/5249/547x/548x added.
404
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NC
405* Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
406 instrucitons.
407
a05a5b64 408* New command-line option -mno-shared for MIPS ELF targets.
aa6975fb 409
a05a5b64 410* New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
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411 added to enter (and leave) alternate macro syntax mode.
412
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NC
413Changes in 2.15:
414
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CD
415* The MIPS -membedded-pic option (Embedded-PIC code generation) is
416 deprecated and will be removed in a future release.
417
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NC
418* Added PIC m32r Linux (ELF) and support to M32R assembler.
419
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MM
420* Added support for ARM V6.
421
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422* Added support for sh4a and variants.
423
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424* Support for Renesas M32R2 added.
425
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426* Limited support for Mapping Symbols as specified in the ARM ELF
427 specification has been added to the arm assembler.
ed769ec1 428
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NC
429* On ARM architectures, added a new gas directive ".unreq" that undoes
430 definitions created by ".req".
431
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NC
432* Support for Motorola ColdFire MCF528x added.
433
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NC
434* Added --gstabs+ switch to enable the generation of STABS debug format
435 information with GNU extensions.
fa94de6b 436
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CD
437* Added support for MIPS64 Release 2.
438
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NC
439* Added support for v850e1.
440
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L
441* Added -n switch for x86 assembler. By default, x86 GAS replaces
442 multiple nop instructions used for alignment within code sections
443 with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
444 switch disables the optimization.
445
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446* Removed -n option from MIPS assembler. It was not useful, and confused the
447 existing -non_shared option.
448
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CD
449Changes in 2.14:
450
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CD
451* Added support for MIPS32 Release 2.
452
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NC
453* Added support for Xtensa architecture.
454
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NC
455* Support for Intel's iWMMXt processor (an ARM variant) added.
456
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NC
457* An assembler test generator has been contributed and an example file that
458 uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
fa94de6b 459
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NC
460* Support for SH2E added.
461
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NC
462* GASP has now been removed.
463
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NC
464* Support for Texas Instruments TMS320C4x and TMS320C3x series of
465 DSP's contributed by Michael Hayes and Svein E. Seldal.
fa94de6b 466
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NC
467* Support for the Ubicom IP2xxx microcontroller added.
468
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NC
469Changes in 2.13:
470
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471* Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
472 and FR500 included.
0ebb9a87 473
a40cbfa3 474* Support for DLX processor added.
52216602 475
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NC
476* GASP has now been deprecated and will be removed in a future release. Use
477 the macro facilities in GAS instead.
3f965e60 478
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NC
479* GASP now correctly parses floating point numbers. Unless the base is
480 explicitly specified, they are interpreted as decimal numbers regardless of
481 the currently specified base.
1ac57253 482
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NC
483Changes in 2.12:
484
a40cbfa3 485* Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
49fda6c8 486
a40cbfa3 487* Support for the OpenRISC 32-bit embedded processor by OpenCores.
3b16e843 488
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RM
489* The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
490 specifying the target instruction set. The old method of specifying the
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NC
491 target processor has been deprecated, but is still accepted for
492 compatibility.
03b1477f 493
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494* Support for the VFP floating-point instruction set has been added to
495 the ARM assembler.
252b5132 496
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NC
497* New psuedo op: .incbin to include a set of binary data at a given point
498 in the assembly. Contributed by Anders Norlander.
7e005732 499
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NC
500* The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
501 but still works for compatability.
ec68c924 502
fa94de6b 503* The MIPS assembler no longer issues a warning by default when it
a05a5b64 504 generates a nop instruction from a macro. The new command-line option
a40cbfa3 505 -n will turn on the warning.
63486801 506
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JW
507Changes in 2.11:
508
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NC
509* Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
510
a40cbfa3 511* x86 gas now supports the full Pentium4 instruction set.
a167610d 512
a40cbfa3 513* Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
c0d8940f 514
a40cbfa3 515* Support for Motorola 68HC11 and 68HC12.
df86943d 516
a40cbfa3 517* Support for Texas Instruments TMS320C54x (tic54x).
39bec121 518
a40cbfa3 519* Support for IA-64.
2dac7317 520
a40cbfa3 521* Support for i860, by Jason Eckhardt.
22b36938 522
a40cbfa3 523* Support for CRIS (Axis Communications ETRAX series).
5bcac8a4 524
a40cbfa3 525* x86 gas has a new .arch pseudo op to specify the target CPU architecture.
a38cf1db 526
a05a5b64 527* x86 gas -q command-line option quietens warnings about register size changes
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528 due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
529 translating various deprecated floating point instructions.
a38cf1db 530
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531Changes in 2.10:
532
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533* Support for the ARM msr instruction was changed to only allow an immediate
534 operand when altering the flags field.
d14442f4 535
a40cbfa3 536* Support for ATMEL AVR.
adde6300 537
a40cbfa3 538* Support for IBM 370 ELF. Somewhat experimental.
b5ebe70e 539
a40cbfa3 540* Support for numbers with suffixes.
3fd9f047 541
a40cbfa3 542* Added support for breaking to the end of repeat loops.
6a6987a9 543
a40cbfa3 544* Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
6a6987a9 545
a40cbfa3 546* New .elseif pseudo-op added.
3fd9f047 547
a40cbfa3 548* New --fatal-warnings option.
1f776aa5 549
a40cbfa3 550* picoJava architecture support added.
252b5132 551
a40cbfa3 552* Motorola MCore 210 processor support added.
041dd5a9 553
fa94de6b 554* A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
a40cbfa3 555 assembly programs with intel syntax.
252b5132 556
a40cbfa3 557* New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
252b5132 558
a40cbfa3 559* Added -gdwarf2 option to generate DWARF 2 debugging information.
041dd5a9 560
a40cbfa3 561* Full 16-bit mode support for i386.
252b5132 562
fa94de6b 563* Greatly improved instruction operand checking for i386. This change will
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564 produce errors or warnings on incorrect assembly code that previous versions
565 of gas accepted. If you get unexpected messages from code that worked with
566 older versions of gas, please double check the code before reporting a bug.
252b5132 567
a40cbfa3 568* Weak symbol support added for COFF targets.
252b5132 569
a40cbfa3 570* Mitsubishi D30V support added.
252b5132 571
a40cbfa3 572* Texas Instruments c80 (tms320c80) support added.
252b5132 573
a40cbfa3 574* i960 ELF support added.
bedf545c 575
a40cbfa3 576* ARM ELF support added.
a057431b 577
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578Changes in 2.9:
579
a40cbfa3 580* Texas Instruments c30 (tms320c30) support added.
252b5132 581
fa94de6b 582* The assembler now optimizes the exception frame information generated by egcs
a40cbfa3 583 and gcc 2.8. The new --traditional-format option disables this optimization.
252b5132 584
a40cbfa3 585* Added --gstabs option to generate stabs debugging information.
252b5132 586
fa94de6b 587* The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
a40cbfa3 588 listing.
252b5132 589
a40cbfa3 590* Added -MD option to print dependencies.
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591
592Changes in 2.8:
593
a40cbfa3 594* BeOS support added.
252b5132 595
a40cbfa3 596* MIPS16 support added.
252b5132 597
a40cbfa3 598* Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
252b5132 599
a40cbfa3 600* Alpha/VMS support added.
252b5132 601
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602* m68k options --base-size-default-16, --base-size-default-32,
603 --disp-size-default-16, and --disp-size-default-32 added.
252b5132 604
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605* The alignment directives now take an optional third argument, which is the
606 maximum number of bytes to skip. If doing the alignment would require
607 skipping more than the given number of bytes, the alignment is not done at
608 all.
252b5132 609
a40cbfa3 610* The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
252b5132 611
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612* The -a option takes a new suboption, c (e.g., -alc), to skip false
613 conditionals in listings.
252b5132 614
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615* Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
616 the symbol is already defined.
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617
618Changes in 2.7:
619
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620* The PowerPC assembler now allows the use of symbolic register names (r0,
621 etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
622 can be used any time. PowerPC 860 move to/from SPR instructions have been
623 added.
252b5132 624
a40cbfa3 625* Alpha Linux (ELF) support added.
252b5132 626
a40cbfa3 627* PowerPC ELF support added.
252b5132 628
a40cbfa3 629* m68k Linux (ELF) support added.
252b5132 630
a40cbfa3 631* i960 Hx/Jx support added.
252b5132 632
a40cbfa3 633* i386/PowerPC gnu-win32 support added.
252b5132 634
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635* SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
636 default is to build COFF-only support. To get a set of tools that generate
fa94de6b 637 ELF (they'll understand both COFF and ELF), you must configure with
a40cbfa3 638 target=i386-unknown-sco3.2v5elf.
252b5132 639
a40cbfa3 640* m88k-motorola-sysv3* support added.
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641
642Changes in 2.6:
643
a40cbfa3 644* Gas now directly supports macros, without requiring GASP.
252b5132 645
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646* Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
647 MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
648 ``.mri 0'' is seen; this can be convenient for inline assembler code.
252b5132 649
a40cbfa3 650* Added --defsym SYM=VALUE option.
252b5132 651
a40cbfa3 652* Added -mips4 support to MIPS assembler.
252b5132 653
a40cbfa3 654* Added PIC support to Solaris and SPARC SunOS 4 assembler.
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655
656Changes in 2.4:
657
a40cbfa3 658* Converted this directory to use an autoconf-generated configure script.
252b5132 659
a40cbfa3 660* ARM support, from Richard Earnshaw.
252b5132 661
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662* Updated VMS support, from Pat Rankin, including considerably improved
663 debugging support.
252b5132 664
a40cbfa3 665* Support for the control registers in the 68060.
252b5132 666
a40cbfa3 667* Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
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668 provide for possible future gcc changes, for targets where gas provides some
669 features not available in the native assembler. If the native assembler is
a40cbfa3 670 used, it should become obvious pretty quickly what the problem is.
252b5132 671
a40cbfa3 672* Usage message is available with "--help".
252b5132 673
fa94de6b 674* The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
a40cbfa3 675 also, but didn't get into the NEWS file.)
252b5132 676
a40cbfa3 677* Weak symbol support for a.out.
252b5132 678
fa94de6b 679* A bug in the listing code which could cause an infinite loop has been fixed.
a40cbfa3 680 Bugs in listings when generating a COFF object file have also been fixed.
252b5132 681
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682* Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
683 Paul Kranenburg.
252b5132 684
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685* Improved Alpha support. Immediate constants can have a much larger range
686 now. Support for the 21164 has been contributed by Digital.
252b5132 687
a40cbfa3 688* Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
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689
690Changes in 2.3:
691
a40cbfa3 692* Mach i386 support, by David Mackenzie and Ken Raeburn.
252b5132 693
a40cbfa3 694* RS/6000 and PowerPC support by Ian Taylor.
252b5132 695
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696* VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
697 based on mail received from various people. The `-h#' option should work
698 again too.
252b5132 699
a40cbfa3 700* HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
fa94de6b 701 with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
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702 version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
703 this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
704 in the "dist" directory.
252b5132 705
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706* Vax support in gas fixed for BSD, so it builds and seems to run a couple
707 simple tests okay. I haven't put it through extensive testing. (GNU make is
708 currently required for BSD 4.3 builds.)
252b5132 709
fa94de6b 710* Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
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711 based on code donated by CMU, which used an a.out-based format. I'm afraid
712 the alpha-a.out support is pretty badly mangled, and much of it removed;
713 making it work will require rewriting it as BFD support for the format anyways.
252b5132 714
a40cbfa3 715* Irix 5 support.
252b5132 716
fa94de6b 717* The test suites have been fixed up a bit, so that they should work with a
a40cbfa3 718 couple different versions of expect and dejagnu.
252b5132 719
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720* Symbols' values are now handled internally as expressions, permitting more
721 flexibility in evaluating them in some cases. Some details of relocation
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722 handling have also changed, and simple constant pool management has been
723 added, to make the Alpha port easier.
252b5132 724
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725* New option "--statistics" for printing out program run times. This is
726 intended to be used with the gcc "-Q" option, which prints out times spent in
727 various phases of compilation. (You should be able to get all of them
728 printed out with "gcc -Q -Wa,--statistics", I think.)
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729
730Changes in 2.2:
731
a40cbfa3 732* RS/6000 AIX and MIPS SGI Irix 5 support has been added.
252b5132 733
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734* Configurations that are still in development (and therefore are convenient to
735 have listed in configure.in) still get rejected without a minor change to
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736 gas/Makefile.in, so people not doing development work shouldn't get the
737 impression that support for such configurations is actually believed to be
738 reliable.
252b5132 739
fa94de6b 740* The program name (usually "as") is printed when a fatal error message is
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741 displayed. This should prevent some confusion about the source of occasional
742 messages about "internal errors".
252b5132 743
fa94de6b 744* ELF support is falling into place. Support for the 386 should be working.
a40cbfa3 745 Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
252b5132 746
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747* Symbol values are maintained as expressions instead of being immediately
748 boiled down to add-symbol, sub-symbol, and constant. This permits slightly
749 more complex calculations involving symbols whose values are not alreadey
750 known.
252b5132 751
a40cbfa3 752* DBX-style debugging info ("stabs") is now supported for COFF formats.
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753 If any stabs directives are seen in the source, GAS will create two new
754 sections: a ".stab" and a ".stabstr" section. The format of the .stab
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755 section is nearly identical to the a.out symbol format, and .stabstr is
756 its string table. For this to be useful, you must have configured GCC
757 to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
758 that can use the stab sections (4.11 or later).
252b5132 759
fa94de6b 760* LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
a40cbfa3 761 support is in progress.
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762
763Changes in 2.1:
764
fa94de6b 765* Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
a40cbfa3 766 incorporated, but not well tested yet.
252b5132 767
fa94de6b 768* Altered the opcode table split for m68k; it should require less VM to compile
a40cbfa3 769 with gcc now.
252b5132 770
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771* Some minor adjustments to add (Convergent Technologies') Miniframe support,
772 suggested by Ronald Cole.
252b5132 773
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774* HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
775 includes improved ELF support, which I've started adapting for SPARC Solaris
776 2.x. Integration isn't completely, so it probably won't work.
252b5132 777
a40cbfa3 778* HP9000/300 support, donated by HP, has been merged in.
252b5132 779
a40cbfa3 780* Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
252b5132 781
a40cbfa3 782* Better error messages for unsupported configurations (e.g., hppa-hpux).
252b5132 783
a40cbfa3 784* Test suite framework is starting to become reasonable.
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785
786Changes in 2.0:
787
a40cbfa3 788* Mostly bug fixes.
252b5132 789
a40cbfa3 790* Some more merging of BFD and ELF code, but ELF still doesn't work.
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791
792Changes in 1.94:
793
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794* BFD merge is partly done. Adventurous souls may try giving configure the
795 "--with-bfd-assembler" option. Currently, ELF format requires it, a.out
796 format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
797 or "solaris". (ELF isn't really supported yet. It needs work. I've got
798 some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
799 fully merged yet.)
252b5132 800
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801* The 68K opcode table has been split in half. It should now compile under gcc
802 without consuming ridiculous amounts of memory.
252b5132 803
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804* A couple data structures have been reduced in size. This should result in
805 saving a little bit of space at runtime.
252b5132 806
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807* Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
808 code provided ROSE format support, which I haven't merged in yet. (I can
809 make it available, if anyone wants to try it out.) Ralph's code, for BSD
810 4.4, supports a.out format. We don't have ECOFF support in just yet; it's
811 coming.
252b5132 812
a40cbfa3 813* Support for the Hitachi H8/500 has been added.
252b5132 814
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815* VMS host and target support should be working now, thanks chiefly to Eric
816 Youngdale.
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817
818Changes in 1.93.01:
819
a40cbfa3 820* For m68k, support for more processors has been added: 68040, CPU32, 68851.
252b5132 821
a40cbfa3 822* For i386, .align is now power-of-two; was number-of-bytes.
252b5132 823
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824* For m68k, "%" is now accepted before register names. For COFF format, which
825 doesn't use underscore prefixes for C labels, it is required, so variable "a0"
826 can be distinguished from the register.
252b5132 827
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828* Last public release was 1.38. Lots of configuration changes since then, lots
829 of new CPUs and formats, lots of bugs fixed.
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830
831\f
b3adc24a 832Copyright (C) 2012-2020 Free Software Foundation, Inc.
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833
834Copying and distribution of this file, with or without modification,
835are permitted in any medium without royalty provided the copyright
836notice and this notice are preserved.
837
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838Local variables:
839fill-column: 79
840End:
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