gdb: add target_ops::supports_displaced_step
[deliverable/binutils-gdb.git] / gdb / ppc-linux-tdep.c
CommitLineData
c877c8e6 1/* Target-dependent code for GDB, the GNU debugger.
4e052eda 2
b811d2c2 3 Copyright (C) 1986-2020 Free Software Foundation, Inc.
c877c8e6
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
a9762ec7 9 the Free Software Foundation; either version 3 of the License, or
c877c8e6
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10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
a9762ec7 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c877c8e6
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19
20#include "defs.h"
21#include "frame.h"
22#include "inferior.h"
23#include "symtab.h"
24#include "target.h"
25#include "gdbcore.h"
26#include "gdbcmd.h"
27#include "symfile.h"
28#include "objfiles.h"
4e052eda 29#include "regcache.h"
fd0407d6 30#include "value.h"
4be87837 31#include "osabi.h"
f9be684a 32#include "regset.h"
6ded7999 33#include "solib-svr4.h"
cc5f0d61
UW
34#include "solib.h"
35#include "solist.h"
9aa1e687 36#include "ppc-tdep.h"
d78489bf 37#include "ppc64-tdep.h"
7284e1be 38#include "ppc-linux-tdep.h"
bd64614e
PFC
39#include "arch/ppc-linux-common.h"
40#include "arch/ppc-linux-tdesc.h"
5d853008 41#include "glibc-tdep.h"
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42#include "trad-frame.h"
43#include "frame-unwind.h"
a8f60bfc 44#include "tramp-frame.h"
76727919 45#include "observable.h"
85e747d2
UW
46#include "auxv.h"
47#include "elf/common.h"
591a12a1 48#include "elf/ppc64.h"
cc5f0d61 49#include "arch-utils.h"
a96d9b2e 50#include "xml-syscall.h"
a5ee0f0c 51#include "linux-tdep.h"
b4cdae6f
WW
52#include "linux-record.h"
53#include "record-full.h"
cf90fd9a 54#include "infrun.h"
9aa1e687 55
55aa24fb
SDJ
56#include "stap-probe.h"
57#include "ax.h"
58#include "ax-gdb.h"
59#include "cli/cli-utils.h"
60#include "parser-defs.h"
61#include "user-regs.h"
62#include <ctype.h>
a2f63b2e 63#include "elf-bfd.h"
55aa24fb 64
7284e1be
UW
65#include "features/rs6000/powerpc-32l.c"
66#include "features/rs6000/powerpc-altivec32l.c"
604c2f83 67#include "features/rs6000/powerpc-vsx32l.c"
69abc51c
TJB
68#include "features/rs6000/powerpc-isa205-32l.c"
69#include "features/rs6000/powerpc-isa205-altivec32l.c"
70#include "features/rs6000/powerpc-isa205-vsx32l.c"
7ca18ed6 71#include "features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.c"
f2cf6173 72#include "features/rs6000/powerpc-isa207-vsx32l.c"
8d619c01 73#include "features/rs6000/powerpc-isa207-htm-vsx32l.c"
7284e1be
UW
74#include "features/rs6000/powerpc-64l.c"
75#include "features/rs6000/powerpc-altivec64l.c"
604c2f83 76#include "features/rs6000/powerpc-vsx64l.c"
69abc51c
TJB
77#include "features/rs6000/powerpc-isa205-64l.c"
78#include "features/rs6000/powerpc-isa205-altivec64l.c"
79#include "features/rs6000/powerpc-isa205-vsx64l.c"
7ca18ed6 80#include "features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.c"
f2cf6173 81#include "features/rs6000/powerpc-isa207-vsx64l.c"
8d619c01 82#include "features/rs6000/powerpc-isa207-htm-vsx64l.c"
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UW
83#include "features/rs6000/powerpc-e500l.c"
84
5d853008
ME
85/* Shared library operations for PowerPC-Linux. */
86static struct target_so_ops powerpc_so_ops;
87
a96d9b2e
SDJ
88/* The syscall's XML filename for PPC and PPC64. */
89#define XML_SYSCALL_FILENAME_PPC "syscalls/ppc-linux.xml"
90#define XML_SYSCALL_FILENAME_PPC64 "syscalls/ppc64-linux.xml"
c877c8e6 91
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92/* ppc_linux_memory_remove_breakpoints attempts to remove a breakpoint
93 in much the same fashion as memory_remove_breakpoint in mem-break.c,
94 but is careful not to write back the previous contents if the code
95 in question has changed in between inserting the breakpoint and
96 removing it.
97
98 Here is the problem that we're trying to solve...
99
100 Once upon a time, before introducing this function to remove
101 breakpoints from the inferior, setting a breakpoint on a shared
102 library function prior to running the program would not work
103 properly. In order to understand the problem, it is first
104 necessary to understand a little bit about dynamic linking on
105 this platform.
106
107 A call to a shared library function is accomplished via a bl
108 (branch-and-link) instruction whose branch target is an entry
109 in the procedure linkage table (PLT). The PLT in the object
110 file is uninitialized. To gdb, prior to running the program, the
111 entries in the PLT are all zeros.
112
113 Once the program starts running, the shared libraries are loaded
114 and the procedure linkage table is initialized, but the entries in
115 the table are not (necessarily) resolved. Once a function is
116 actually called, the code in the PLT is hit and the function is
117 resolved. In order to better illustrate this, an example is in
118 order; the following example is from the gdb testsuite.
119
120 We start the program shmain.
121
122 [kev@arroyo testsuite]$ ../gdb gdb.base/shmain
123 [...]
124
125 We place two breakpoints, one on shr1 and the other on main.
126
127 (gdb) b shr1
128 Breakpoint 1 at 0x100409d4
129 (gdb) b main
130 Breakpoint 2 at 0x100006a0: file gdb.base/shmain.c, line 44.
131
132 Examine the instruction (and the immediatly following instruction)
133 upon which the breakpoint was placed. Note that the PLT entry
134 for shr1 contains zeros.
135
136 (gdb) x/2i 0x100409d4
137 0x100409d4 <shr1>: .long 0x0
138 0x100409d8 <shr1+4>: .long 0x0
139
140 Now run 'til main.
141
142 (gdb) r
143 Starting program: gdb.base/shmain
144 Breakpoint 1 at 0xffaf790: file gdb.base/shr1.c, line 19.
145
146 Breakpoint 2, main ()
147 at gdb.base/shmain.c:44
148 44 g = 1;
149
150 Examine the PLT again. Note that the loading of the shared
151 library has initialized the PLT to code which loads a constant
152 (which I think is an index into the GOT) into r11 and then
30baf67b 153 branches a short distance to the code which actually does the
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154 resolving.
155
156 (gdb) x/2i 0x100409d4
157 0x100409d4 <shr1>: li r11,4
158 0x100409d8 <shr1+4>: b 0x10040984 <sg+4>
159 (gdb) c
160 Continuing.
161
162 Breakpoint 1, shr1 (x=1)
163 at gdb.base/shr1.c:19
164 19 l = 1;
165
166 Now we've hit the breakpoint at shr1. (The breakpoint was
167 reset from the PLT entry to the actual shr1 function after the
168 shared library was loaded.) Note that the PLT entry has been
0df8b418 169 resolved to contain a branch that takes us directly to shr1.
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170 (The real one, not the PLT entry.)
171
172 (gdb) x/2i 0x100409d4
173 0x100409d4 <shr1>: b 0xffaf76c <shr1>
174 0x100409d8 <shr1+4>: b 0x10040984 <sg+4>
175
176 The thing to note here is that the PLT entry for shr1 has been
177 changed twice.
178
179 Now the problem should be obvious. GDB places a breakpoint (a
0df8b418 180 trap instruction) on the zero value of the PLT entry for shr1.
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181 Later on, after the shared library had been loaded and the PLT
182 initialized, GDB gets a signal indicating this fact and attempts
183 (as it always does when it stops) to remove all the breakpoints.
184
185 The breakpoint removal was causing the former contents (a zero
186 word) to be written back to the now initialized PLT entry thus
187 destroying a portion of the initialization that had occurred only a
188 short time ago. When execution continued, the zero word would be
766062f6 189 executed as an instruction an illegal instruction trap was
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190 generated instead. (0 is not a legal instruction.)
191
192 The fix for this problem was fairly straightforward. The function
193 memory_remove_breakpoint from mem-break.c was copied to this file,
194 modified slightly, and renamed to ppc_linux_memory_remove_breakpoint.
195 In tm-linux.h, MEMORY_REMOVE_BREAKPOINT is defined to call this new
196 function.
197
198 The differences between ppc_linux_memory_remove_breakpoint () and
199 memory_remove_breakpoint () are minor. All that the former does
200 that the latter does not is check to make sure that the breakpoint
201 location actually contains a breakpoint (trap instruction) prior
202 to attempting to write back the old contents. If it does contain
0df8b418 203 a trap instruction, we allow the old contents to be written back.
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204 Otherwise, we silently do nothing.
205
206 The big question is whether memory_remove_breakpoint () should be
207 changed to have the same functionality. The downside is that more
208 traffic is generated for remote targets since we'll have an extra
209 fetch of a memory word each time a breakpoint is removed.
210
211 For the time being, we'll leave this self-modifying-code-friendly
212 version in ppc-linux-tdep.c, but it ought to be migrated somewhere
213 else in the event that some other platform has similar needs with
214 regard to removing breakpoints in some potentially self modifying
215 code. */
63807e1d 216static int
ae4b2284
MD
217ppc_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
218 struct bp_target_info *bp_tgt)
482ca3f5 219{
0d5ed153 220 CORE_ADDR addr = bp_tgt->reqstd_address;
f4f9705a 221 const unsigned char *bp;
482ca3f5
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222 int val;
223 int bplen;
50fd1280 224 gdb_byte old_contents[BREAKPOINT_MAX];
482ca3f5
KB
225
226 /* Determine appropriate breakpoint contents and size for this address. */
ae4b2284 227 bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
482ca3f5 228
8defab1a 229 /* Make sure we see the memory breakpoints. */
cb85b21b
TT
230 scoped_restore restore_memory
231 = make_scoped_restore_show_memory_breakpoints (1);
482ca3f5
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232 val = target_read_memory (addr, old_contents, bplen);
233
234 /* If our breakpoint is no longer at the address, this means that the
235 program modified the code on us, so it is wrong to put back the
0df8b418 236 old value. */
482ca3f5 237 if (val == 0 && memcmp (bp, old_contents, bplen) == 0)
dd110abf 238 val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen);
482ca3f5
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239
240 return val;
241}
6ded7999 242
b9ff3018
AC
243/* For historic reasons, PPC 32 GNU/Linux follows PowerOpen rather
244 than the 32 bit SYSV R4 ABI structure return convention - all
245 structures, no matter their size, are put in memory. Vectors,
246 which were added later, do get returned in a register though. */
247
05580c65 248static enum return_value_convention
6a3a010b 249ppc_linux_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
CV
250 struct type *valtype, struct regcache *regcache,
251 gdb_byte *readbuf, const gdb_byte *writebuf)
b9ff3018 252{
78134374
SM
253 if ((valtype->code () == TYPE_CODE_STRUCT
254 || valtype->code () == TYPE_CODE_UNION)
05580c65
AC
255 && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8)
256 && TYPE_VECTOR (valtype)))
257 return RETURN_VALUE_STRUCT_CONVENTION;
258 else
6a3a010b 259 return ppc_sysv_abi_return_value (gdbarch, function, valtype, regcache,
c055b101 260 readbuf, writebuf);
b9ff3018
AC
261}
262
7433498b
AM
263/* PLT stub in an executable. */
264static const struct ppc_insn_pattern powerpc32_plt_stub[] =
5d853008
ME
265 {
266 { 0xffff0000, 0x3d600000, 0 }, /* lis r11, xxxx */
267 { 0xffff0000, 0x816b0000, 0 }, /* lwz r11, xxxx(r11) */
268 { 0xffffffff, 0x7d6903a6, 0 }, /* mtctr r11 */
269 { 0xffffffff, 0x4e800420, 0 }, /* bctr */
270 { 0, 0, 0 }
271 };
272
7433498b
AM
273/* PLT stubs in a shared library or PIE.
274 The first variant is used when the PLT entry is within +/-32k of
275 the GOT pointer (r30). */
276static const struct ppc_insn_pattern powerpc32_plt_stub_so_1[] =
5d853008
ME
277 {
278 { 0xffff0000, 0x817e0000, 0 }, /* lwz r11, xxxx(r30) */
279 { 0xffffffff, 0x7d6903a6, 0 }, /* mtctr r11 */
280 { 0xffffffff, 0x4e800420, 0 }, /* bctr */
5d853008
ME
281 { 0, 0, 0 }
282 };
7433498b
AM
283
284/* The second variant is used when the PLT entry is more than +/-32k
285 from the GOT pointer (r30). */
286static const struct ppc_insn_pattern powerpc32_plt_stub_so_2[] =
287 {
288 { 0xffff0000, 0x3d7e0000, 0 }, /* addis r11, r30, xxxx */
289 { 0xffff0000, 0x816b0000, 0 }, /* lwz r11, xxxx(r11) */
290 { 0xffffffff, 0x7d6903a6, 0 }, /* mtctr r11 */
291 { 0xffffffff, 0x4e800420, 0 }, /* bctr */
292 { 0, 0, 0 }
293 };
294
295/* The max number of insns we check using ppc_insns_match_pattern. */
296#define POWERPC32_PLT_CHECK_LEN (ARRAY_SIZE (powerpc32_plt_stub) - 1)
5d853008
ME
297
298/* Check if PC is in PLT stub. For non-secure PLT, stub is in .plt
299 section. For secure PLT, stub is in .text and we need to check
300 instruction patterns. */
301
302static int
303powerpc_linux_in_dynsym_resolve_code (CORE_ADDR pc)
304{
7cbd4a93 305 struct bound_minimal_symbol sym;
5d853008
ME
306
307 /* Check whether PC is in the dynamic linker. This also checks
308 whether it is in the .plt section, used by non-PIC executables. */
309 if (svr4_in_dynsym_resolve_code (pc))
310 return 1;
311
312 /* Check if we are in the resolver. */
313 sym = lookup_minimal_symbol_by_pc (pc);
7cbd4a93 314 if (sym.minsym != NULL
c9d95fa3
CB
315 && (strcmp (sym.minsym->linkage_name (), "__glink") == 0
316 || strcmp (sym.minsym->linkage_name (), "__glink_PLTresolve") == 0))
5d853008
ME
317 return 1;
318
319 return 0;
320}
321
ddeca1df
WW
322/* Follow PLT stub to actual routine.
323
324 When the execution direction is EXEC_REVERSE, scan backward to
325 check whether we are in the middle of a PLT stub. Currently,
7433498b 326 we only look-behind at most 4 instructions (the max length of a PLT
ddeca1df 327 stub sequence. */
5d853008
ME
328
329static CORE_ADDR
330ppc_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
331{
7433498b 332 unsigned int insnbuf[POWERPC32_PLT_CHECK_LEN];
5d853008
ME
333 struct gdbarch *gdbarch = get_frame_arch (frame);
334 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
335 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
336 CORE_ADDR target = 0;
cf90fd9a 337 int scan_limit, i;
5d853008 338
cf90fd9a
WW
339 scan_limit = 1;
340 /* When reverse-debugging, scan backward to check whether we are
341 in the middle of trampoline code. */
342 if (execution_direction == EXEC_REVERSE)
7433498b 343 scan_limit = 4; /* At most 4 instructions. */
5d853008 344
cf90fd9a 345 for (i = 0; i < scan_limit; i++)
5d853008 346 {
cf90fd9a
WW
347 if (ppc_insns_match_pattern (frame, pc, powerpc32_plt_stub, insnbuf))
348 {
7433498b 349 /* Calculate PLT entry address from
cf90fd9a 350 lis r11, xxxx
7433498b
AM
351 lwz r11, xxxx(r11). */
352 target = ((ppc_insn_d_field (insnbuf[0]) << 16)
353 + ppc_insn_d_field (insnbuf[1]));
354 }
355 else if (i < ARRAY_SIZE (powerpc32_plt_stub_so_1) - 1
356 && ppc_insns_match_pattern (frame, pc, powerpc32_plt_stub_so_1,
357 insnbuf))
358 {
359 /* Calculate PLT entry address from
360 lwz r11, xxxx(r30). */
361 target = (ppc_insn_d_field (insnbuf[0])
362 + get_frame_register_unsigned (frame,
363 tdep->ppc_gp0_regnum + 30));
cf90fd9a 364 }
7433498b 365 else if (ppc_insns_match_pattern (frame, pc, powerpc32_plt_stub_so_2,
cf90fd9a
WW
366 insnbuf))
367 {
7433498b
AM
368 /* Calculate PLT entry address from
369 addis r11, r30, xxxx
370 lwz r11, xxxx(r11). */
371 target = ((ppc_insn_d_field (insnbuf[0]) << 16)
372 + ppc_insn_d_field (insnbuf[1])
373 + get_frame_register_unsigned (frame,
374 tdep->ppc_gp0_regnum + 30));
cf90fd9a
WW
375 }
376 else
377 {
7433498b 378 /* Scan backward one more instruction if it doesn't match. */
cf90fd9a
WW
379 pc -= 4;
380 continue;
381 }
382
7433498b 383 target = read_memory_unsigned_integer (target, 4, byte_order);
cf90fd9a 384 return target;
5d853008
ME
385 }
386
cf90fd9a 387 return 0;
5d853008 388}
f470a70a 389
7284e1be
UW
390/* Wrappers to handle Linux-only registers. */
391
392static void
393ppc_linux_supply_gregset (const struct regset *regset,
394 struct regcache *regcache,
395 int regnum, const void *gregs, size_t len)
396{
19ba03f4
SM
397 const struct ppc_reg_offsets *offsets
398 = (const struct ppc_reg_offsets *) regset->regmap;
7284e1be
UW
399
400 ppc_supply_gregset (regset, regcache, regnum, gregs, len);
401
ac7936df 402 if (ppc_linux_trap_reg_p (regcache->arch ()))
7284e1be
UW
403 {
404 /* "orig_r3" is stored 2 slots after "pc". */
405 if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM)
19ba03f4 406 ppc_supply_reg (regcache, PPC_ORIG_R3_REGNUM, (const gdb_byte *) gregs,
7284e1be
UW
407 offsets->pc_offset + 2 * offsets->gpr_size,
408 offsets->gpr_size);
409
410 /* "trap" is stored 8 slots after "pc". */
411 if (regnum == -1 || regnum == PPC_TRAP_REGNUM)
19ba03f4 412 ppc_supply_reg (regcache, PPC_TRAP_REGNUM, (const gdb_byte *) gregs,
7284e1be
UW
413 offsets->pc_offset + 8 * offsets->gpr_size,
414 offsets->gpr_size);
415 }
416}
f2db237a 417
f9be684a 418static void
f2db237a
AM
419ppc_linux_collect_gregset (const struct regset *regset,
420 const struct regcache *regcache,
421 int regnum, void *gregs, size_t len)
f9be684a 422{
19ba03f4
SM
423 const struct ppc_reg_offsets *offsets
424 = (const struct ppc_reg_offsets *) regset->regmap;
7284e1be
UW
425
426 /* Clear areas in the linux gregset not written elsewhere. */
f2db237a
AM
427 if (regnum == -1)
428 memset (gregs, 0, len);
7284e1be 429
f2db237a 430 ppc_collect_gregset (regset, regcache, regnum, gregs, len);
7284e1be 431
ac7936df 432 if (ppc_linux_trap_reg_p (regcache->arch ()))
7284e1be
UW
433 {
434 /* "orig_r3" is stored 2 slots after "pc". */
435 if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM)
19ba03f4 436 ppc_collect_reg (regcache, PPC_ORIG_R3_REGNUM, (gdb_byte *) gregs,
7284e1be
UW
437 offsets->pc_offset + 2 * offsets->gpr_size,
438 offsets->gpr_size);
439
440 /* "trap" is stored 8 slots after "pc". */
441 if (regnum == -1 || regnum == PPC_TRAP_REGNUM)
19ba03f4 442 ppc_collect_reg (regcache, PPC_TRAP_REGNUM, (gdb_byte *) gregs,
7284e1be
UW
443 offsets->pc_offset + 8 * offsets->gpr_size,
444 offsets->gpr_size);
445 }
f9be684a
AC
446}
447
f2db237a
AM
448/* Regset descriptions. */
449static const struct ppc_reg_offsets ppc32_linux_reg_offsets =
450 {
451 /* General-purpose registers. */
452 /* .r0_offset = */ 0,
453 /* .gpr_size = */ 4,
454 /* .xr_size = */ 4,
455 /* .pc_offset = */ 128,
456 /* .ps_offset = */ 132,
457 /* .cr_offset = */ 152,
458 /* .lr_offset = */ 144,
459 /* .ctr_offset = */ 140,
460 /* .xer_offset = */ 148,
461 /* .mq_offset = */ 156,
462
463 /* Floating-point registers. */
464 /* .f0_offset = */ 0,
465 /* .fpscr_offset = */ 256,
1d75a658 466 /* .fpscr_size = */ 8
f2db237a 467 };
f9be684a 468
f2db237a
AM
469static const struct ppc_reg_offsets ppc64_linux_reg_offsets =
470 {
471 /* General-purpose registers. */
472 /* .r0_offset = */ 0,
473 /* .gpr_size = */ 8,
474 /* .xr_size = */ 8,
475 /* .pc_offset = */ 256,
476 /* .ps_offset = */ 264,
477 /* .cr_offset = */ 304,
478 /* .lr_offset = */ 288,
479 /* .ctr_offset = */ 280,
480 /* .xer_offset = */ 296,
481 /* .mq_offset = */ 312,
482
483 /* Floating-point registers. */
484 /* .f0_offset = */ 0,
485 /* .fpscr_offset = */ 256,
1d75a658 486 /* .fpscr_size = */ 8
f2db237a 487 };
2fda4977 488
f2db237a
AM
489static const struct regset ppc32_linux_gregset = {
490 &ppc32_linux_reg_offsets,
7284e1be 491 ppc_linux_supply_gregset,
09424cff 492 ppc_linux_collect_gregset
f9be684a
AC
493};
494
f2db237a
AM
495static const struct regset ppc64_linux_gregset = {
496 &ppc64_linux_reg_offsets,
7284e1be 497 ppc_linux_supply_gregset,
09424cff 498 ppc_linux_collect_gregset
f2db237a 499};
f9be684a 500
f2db237a
AM
501static const struct regset ppc32_linux_fpregset = {
502 &ppc32_linux_reg_offsets,
503 ppc_supply_fpregset,
09424cff 504 ppc_collect_fpregset
f9be684a
AC
505};
506
1d75a658
PFC
507static const struct regcache_map_entry ppc32_le_linux_vrregmap[] =
508 {
509 { 32, PPC_VR0_REGNUM, 16 },
510 { 1, PPC_VSCR_REGNUM, 4 },
511 { 1, REGCACHE_MAP_SKIP, 12 },
512 { 1, PPC_VRSAVE_REGNUM, 4 },
513 { 1, REGCACHE_MAP_SKIP, 12 },
514 { 0 }
515 };
516
517static const struct regcache_map_entry ppc32_be_linux_vrregmap[] =
518 {
519 { 32, PPC_VR0_REGNUM, 16 },
520 { 1, REGCACHE_MAP_SKIP, 12},
521 { 1, PPC_VSCR_REGNUM, 4 },
522 { 1, PPC_VRSAVE_REGNUM, 4 },
523 { 1, REGCACHE_MAP_SKIP, 12 },
524 { 0 }
525 };
526
527static const struct regset ppc32_le_linux_vrregset = {
528 ppc32_le_linux_vrregmap,
529 regcache_supply_regset,
5c849b22 530 regcache_collect_regset
1d75a658
PFC
531};
532
533static const struct regset ppc32_be_linux_vrregset = {
534 ppc32_be_linux_vrregmap,
535 regcache_supply_regset,
5c849b22 536 regcache_collect_regset
06caf7d2
CES
537};
538
2c3305f6
PFC
539static const struct regcache_map_entry ppc32_linux_vsxregmap[] =
540 {
541 { 32, PPC_VSR0_UPPER_REGNUM, 8 },
542 { 0 }
543 };
544
604c2f83 545static const struct regset ppc32_linux_vsxregset = {
2c3305f6
PFC
546 ppc32_linux_vsxregmap,
547 regcache_supply_regset,
548 regcache_collect_regset
604c2f83
LM
549};
550
7ca18ed6
EBM
551/* Program Priorty Register regmap. */
552
553static const struct regcache_map_entry ppc32_regmap_ppr[] =
554 {
555 { 1, PPC_PPR_REGNUM, 8 },
556 { 0 }
557 };
558
559/* Program Priorty Register regset. */
560
561const struct regset ppc32_linux_pprregset = {
562 ppc32_regmap_ppr,
563 regcache_supply_regset,
564 regcache_collect_regset
565};
566
567/* Data Stream Control Register regmap. */
568
569static const struct regcache_map_entry ppc32_regmap_dscr[] =
570 {
571 { 1, PPC_DSCR_REGNUM, 8 },
572 { 0 }
573 };
574
575/* Data Stream Control Register regset. */
576
577const struct regset ppc32_linux_dscrregset = {
578 ppc32_regmap_dscr,
579 regcache_supply_regset,
580 regcache_collect_regset
581};
582
f2cf6173
EBM
583/* Target Address Register regmap. */
584
585static const struct regcache_map_entry ppc32_regmap_tar[] =
586 {
587 { 1, PPC_TAR_REGNUM, 8 },
588 { 0 }
589 };
590
591/* Target Address Register regset. */
592
593const struct regset ppc32_linux_tarregset = {
594 ppc32_regmap_tar,
595 regcache_supply_regset,
596 regcache_collect_regset
597};
598
232bfb86
EBM
599/* Event-Based Branching regmap. */
600
601static const struct regcache_map_entry ppc32_regmap_ebb[] =
602 {
603 { 1, PPC_EBBRR_REGNUM, 8 },
604 { 1, PPC_EBBHR_REGNUM, 8 },
605 { 1, PPC_BESCR_REGNUM, 8 },
606 { 0 }
607 };
608
609/* Event-Based Branching regset. */
610
611const struct regset ppc32_linux_ebbregset = {
612 ppc32_regmap_ebb,
613 regcache_supply_regset,
614 regcache_collect_regset
615};
616
617/* Performance Monitoring Unit regmap. */
618
619static const struct regcache_map_entry ppc32_regmap_pmu[] =
620 {
621 { 1, PPC_SIAR_REGNUM, 8 },
622 { 1, PPC_SDAR_REGNUM, 8 },
623 { 1, PPC_SIER_REGNUM, 8 },
624 { 1, PPC_MMCR2_REGNUM, 8 },
625 { 1, PPC_MMCR0_REGNUM, 8 },
626 { 0 }
627 };
628
629/* Performance Monitoring Unit regset. */
630
631const struct regset ppc32_linux_pmuregset = {
632 ppc32_regmap_pmu,
633 regcache_supply_regset,
634 regcache_collect_regset
635};
636
8d619c01
EBM
637/* Hardware Transactional Memory special-purpose register regmap. */
638
639static const struct regcache_map_entry ppc32_regmap_tm_spr[] =
640 {
641 { 1, PPC_TFHAR_REGNUM, 8 },
642 { 1, PPC_TEXASR_REGNUM, 8 },
643 { 1, PPC_TFIAR_REGNUM, 8 },
644 { 0 }
645 };
646
647/* Hardware Transactional Memory special-purpose register regset. */
648
649const struct regset ppc32_linux_tm_sprregset = {
650 ppc32_regmap_tm_spr,
651 regcache_supply_regset,
652 regcache_collect_regset
653};
654
655/* Regmaps for the Hardware Transactional Memory checkpointed
656 general-purpose regsets for 32-bit, 64-bit big-endian, and 64-bit
657 little endian targets. The ptrace and core file buffers for 64-bit
658 targets use 8-byte fields for the 4-byte registers, and the
405feb71 659 position of the register in the fields depends on the endianness.
8d619c01
EBM
660 The 32-bit regmap is the same for both endian types because the
661 fields are all 4-byte long.
662
663 The layout of checkpointed GPR regset is the same as a regular
664 struct pt_regs, but we skip all registers that are not actually
665 checkpointed by the processor (e.g. msr, nip), except when
666 generating a core file. The 64-bit regset is 48 * 8 bytes long.
667 In some 64-bit kernels, the regset for a 32-bit inferior has the
668 same length, but all the registers are squeezed in the first half
669 (48 * 4 bytes). The pt_regs struct calls the regular cr ccr, but
670 we use ccr for "checkpointed condition register". Note that CR
671 (condition register) field 0 is not checkpointed, but the kernel
672 returns all 4 bytes. The skipped registers should not be touched
673 when writing the regset to the inferior (with
674 PTRACE_SETREGSET). */
675
676static const struct regcache_map_entry ppc32_regmap_cgpr[] =
677 {
678 { 32, PPC_CR0_REGNUM, 4 },
679 { 3, REGCACHE_MAP_SKIP, 4 }, /* nip, msr, orig_gpr3. */
680 { 1, PPC_CCTR_REGNUM, 4 },
681 { 1, PPC_CLR_REGNUM, 4 },
682 { 1, PPC_CXER_REGNUM, 4 },
683 { 1, PPC_CCR_REGNUM, 4 },
684 { 9, REGCACHE_MAP_SKIP, 4 }, /* All the rest. */
685 { 0 }
686 };
687
688static const struct regcache_map_entry ppc64_le_regmap_cgpr[] =
689 {
690 { 32, PPC_CR0_REGNUM, 8 },
691 { 3, REGCACHE_MAP_SKIP, 8 },
692 { 1, PPC_CCTR_REGNUM, 8 },
693 { 1, PPC_CLR_REGNUM, 8 },
694 { 1, PPC_CXER_REGNUM, 4 },
695 { 1, REGCACHE_MAP_SKIP, 4 }, /* CXER padding. */
696 { 1, PPC_CCR_REGNUM, 4 },
697 { 1, REGCACHE_MAP_SKIP, 4}, /* CCR padding. */
698 { 9, REGCACHE_MAP_SKIP, 8},
699 { 0 }
700 };
701
702static const struct regcache_map_entry ppc64_be_regmap_cgpr[] =
703 {
704 { 32, PPC_CR0_REGNUM, 8 },
705 { 3, REGCACHE_MAP_SKIP, 8 },
706 { 1, PPC_CCTR_REGNUM, 8 },
707 { 1, PPC_CLR_REGNUM, 8 },
708 { 1, REGCACHE_MAP_SKIP, 4}, /* CXER padding. */
709 { 1, PPC_CXER_REGNUM, 4 },
710 { 1, REGCACHE_MAP_SKIP, 4}, /* CCR padding. */
711 { 1, PPC_CCR_REGNUM, 4 },
712 { 9, REGCACHE_MAP_SKIP, 8},
713 { 0 }
714 };
715
716/* Regsets for the Hardware Transactional Memory checkpointed
717 general-purpose registers for 32-bit, 64-bit big-endian, and 64-bit
718 little endian targets.
719
720 Some 64-bit kernels generate a checkpointed gpr note section with
721 48*8 bytes for a 32-bit thread, of which only 48*4 are actually
722 used, so we set the variable size flag in the corresponding regset
723 to accept this case. */
724
725static const struct regset ppc32_linux_cgprregset = {
726 ppc32_regmap_cgpr,
727 regcache_supply_regset,
728 regcache_collect_regset,
729 REGSET_VARIABLE_SIZE
730};
731
732static const struct regset ppc64_be_linux_cgprregset = {
733 ppc64_be_regmap_cgpr,
734 regcache_supply_regset,
735 regcache_collect_regset
736};
737
738static const struct regset ppc64_le_linux_cgprregset = {
739 ppc64_le_regmap_cgpr,
740 regcache_supply_regset,
741 regcache_collect_regset
742};
743
744/* Hardware Transactional Memory checkpointed floating-point regmap. */
745
746static const struct regcache_map_entry ppc32_regmap_cfpr[] =
747 {
748 { 32, PPC_CF0_REGNUM, 8 },
749 { 1, PPC_CFPSCR_REGNUM, 8 },
750 { 0 }
751 };
752
753/* Hardware Transactional Memory checkpointed floating-point regset. */
754
755const struct regset ppc32_linux_cfprregset = {
756 ppc32_regmap_cfpr,
757 regcache_supply_regset,
758 regcache_collect_regset
759};
760
761/* Regmaps for the Hardware Transactional Memory checkpointed vector
762 regsets, for big and little endian targets. The position of the
405feb71 763 4-byte VSCR in its 16-byte field depends on the endianness. */
8d619c01
EBM
764
765static const struct regcache_map_entry ppc32_le_regmap_cvmx[] =
766 {
767 { 32, PPC_CVR0_REGNUM, 16 },
768 { 1, PPC_CVSCR_REGNUM, 4 },
769 { 1, REGCACHE_MAP_SKIP, 12 },
770 { 1, PPC_CVRSAVE_REGNUM, 4 },
771 { 1, REGCACHE_MAP_SKIP, 12 },
772 { 0 }
773 };
774
775static const struct regcache_map_entry ppc32_be_regmap_cvmx[] =
776 {
777 { 32, PPC_CVR0_REGNUM, 16 },
778 { 1, REGCACHE_MAP_SKIP, 12 },
779 { 1, PPC_CVSCR_REGNUM, 4 },
780 { 1, PPC_CVRSAVE_REGNUM, 4 },
781 { 1, REGCACHE_MAP_SKIP, 12},
782 { 0 }
783 };
784
785/* Hardware Transactional Memory checkpointed vector regsets, for little
786 and big endian targets. */
787
788static const struct regset ppc32_le_linux_cvmxregset = {
789 ppc32_le_regmap_cvmx,
790 regcache_supply_regset,
791 regcache_collect_regset
792};
793
794static const struct regset ppc32_be_linux_cvmxregset = {
795 ppc32_be_regmap_cvmx,
796 regcache_supply_regset,
797 regcache_collect_regset
798};
799
800/* Hardware Transactional Memory checkpointed vector-scalar regmap. */
801
802static const struct regcache_map_entry ppc32_regmap_cvsx[] =
803 {
804 { 32, PPC_CVSR0_UPPER_REGNUM, 8 },
805 { 0 }
806 };
807
808/* Hardware Transactional Memory checkpointed vector-scalar regset. */
809
810const struct regset ppc32_linux_cvsxregset = {
811 ppc32_regmap_cvsx,
812 regcache_supply_regset,
813 regcache_collect_regset
814};
815
816/* Hardware Transactional Memory checkpointed Program Priority Register
817 regmap. */
818
819static const struct regcache_map_entry ppc32_regmap_cppr[] =
820 {
821 { 1, PPC_CPPR_REGNUM, 8 },
822 { 0 }
823 };
824
825/* Hardware Transactional Memory checkpointed Program Priority Register
826 regset. */
827
828const struct regset ppc32_linux_cpprregset = {
829 ppc32_regmap_cppr,
830 regcache_supply_regset,
831 regcache_collect_regset
832};
833
834/* Hardware Transactional Memory checkpointed Data Stream Control
835 Register regmap. */
836
837static const struct regcache_map_entry ppc32_regmap_cdscr[] =
838 {
839 { 1, PPC_CDSCR_REGNUM, 8 },
840 { 0 }
841 };
842
843/* Hardware Transactional Memory checkpointed Data Stream Control
844 Register regset. */
845
846const struct regset ppc32_linux_cdscrregset = {
847 ppc32_regmap_cdscr,
848 regcache_supply_regset,
849 regcache_collect_regset
850};
851
852/* Hardware Transactional Memory checkpointed Target Address Register
853 regmap. */
854
855static const struct regcache_map_entry ppc32_regmap_ctar[] =
856 {
857 { 1, PPC_CTAR_REGNUM, 8 },
858 { 0 }
859 };
860
861/* Hardware Transactional Memory checkpointed Target Address Register
862 regset. */
863
864const struct regset ppc32_linux_ctarregset = {
865 ppc32_regmap_ctar,
866 regcache_supply_regset,
867 regcache_collect_regset
868};
869
f2db237a
AM
870const struct regset *
871ppc_linux_gregset (int wordsize)
2fda4977 872{
f2db237a 873 return wordsize == 8 ? &ppc64_linux_gregset : &ppc32_linux_gregset;
2fda4977
DJ
874}
875
f2db237a
AM
876const struct regset *
877ppc_linux_fpregset (void)
878{
879 return &ppc32_linux_fpregset;
880}
2fda4977 881
1d75a658
PFC
882const struct regset *
883ppc_linux_vrregset (struct gdbarch *gdbarch)
884{
885 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
886 return &ppc32_be_linux_vrregset;
887 else
888 return &ppc32_le_linux_vrregset;
889}
890
2c3305f6
PFC
891const struct regset *
892ppc_linux_vsxregset (void)
893{
894 return &ppc32_linux_vsxregset;
895}
896
8d619c01
EBM
897const struct regset *
898ppc_linux_cgprregset (struct gdbarch *gdbarch)
899{
900 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
901
902 if (tdep->wordsize == 4)
903 {
904 return &ppc32_linux_cgprregset;
905 }
906 else
907 {
908 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
909 return &ppc64_be_linux_cgprregset;
910 else
911 return &ppc64_le_linux_cgprregset;
912 }
913}
914
915const struct regset *
916ppc_linux_cvmxregset (struct gdbarch *gdbarch)
917{
918 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
919 return &ppc32_be_linux_cvmxregset;
920 else
921 return &ppc32_le_linux_cvmxregset;
922}
923
924/* Collect function used to generate the core note for the
925 checkpointed GPR regset. Here, we don't want to skip the
926 "checkpointed" NIP and MSR, so that the note section we generate is
927 similar to the one generated by the kernel. To avoid having to
928 define additional registers in GDB which are not actually
929 checkpointed in the architecture, we copy TFHAR to the checkpointed
930 NIP slot, which is what the kernel does, and copy the regular MSR
931 to the checkpointed MSR slot, which will have a similar value in
932 most cases. */
933
934static void
935ppc_linux_collect_core_cpgrregset (const struct regset *regset,
936 const struct regcache *regcache,
937 int regnum, void *buf, size_t len)
938{
939 struct gdbarch *gdbarch = regcache->arch ();
940 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
941
942 const struct regset *cgprregset = ppc_linux_cgprregset (gdbarch);
943
944 /* We collect the checkpointed GPRs already defined in the regular
945 regmap, then overlay TFHAR/MSR on the checkpointed NIP/MSR
946 slots. */
947 cgprregset->collect_regset (cgprregset, regcache, regnum, buf, len);
948
949 /* Check that we are collecting all the registers, which should be
950 the case when generating a core file. */
951 if (regnum != -1)
952 return;
953
954 /* PT_NIP and PT_MSR are 32 and 33 for powerpc. Don't redefine
955 these symbols since this file can run on clients in other
956 architectures where they can already be defined to other
957 values. */
958 int pt_offset = 32;
959
960 /* Check that our buffer is long enough to hold two slots at
961 pt_offset * wordsize, one for NIP and one for MSR. */
962 gdb_assert ((pt_offset + 2) * tdep->wordsize <= len);
963
964 /* TFHAR is 8 bytes wide, but the NIP slot for a 32-bit thread is
965 4-bytes long. We use raw_collect_integer which handles
966 differences in the sizes for the source and destination buffers
967 for both endian modes. */
968 (regcache->raw_collect_integer
969 (PPC_TFHAR_REGNUM, ((gdb_byte *) buf) + pt_offset * tdep->wordsize,
970 tdep->wordsize, false));
971
972 pt_offset = 33;
973
974 (regcache->raw_collect_integer
975 (PPC_MSR_REGNUM, ((gdb_byte *) buf) + pt_offset * tdep->wordsize,
976 tdep->wordsize, false));
977}
978
5aa82d05
AA
979/* Iterate over supported core file register note sections. */
980
981static void
982ppc_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
983 iterate_over_regset_sections_cb *cb,
984 void *cb_data,
985 const struct regcache *regcache)
986{
987 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
988 int have_altivec = tdep->ppc_vr0_regnum != -1;
989 int have_vsx = tdep->ppc_vsr0_upper_regnum != -1;
7ca18ed6
EBM
990 int have_ppr = tdep->ppc_ppr_regnum != -1;
991 int have_dscr = tdep->ppc_dscr_regnum != -1;
f2cf6173 992 int have_tar = tdep->ppc_tar_regnum != -1;
5aa82d05 993
8f0435f7 994 if (tdep->wordsize == 4)
a616bb94 995 cb (".reg", 48 * 4, 48 * 4, &ppc32_linux_gregset, NULL, cb_data);
8f0435f7 996 else
a616bb94 997 cb (".reg", 48 * 8, 48 * 8, &ppc64_linux_gregset, NULL, cb_data);
8f0435f7 998
a616bb94 999 cb (".reg2", 264, 264, &ppc32_linux_fpregset, NULL, cb_data);
5aa82d05
AA
1000
1001 if (have_altivec)
1d75a658
PFC
1002 {
1003 const struct regset *vrregset = ppc_linux_vrregset (gdbarch);
a616bb94
AH
1004 cb (".reg-ppc-vmx", PPC_LINUX_SIZEOF_VRREGSET, PPC_LINUX_SIZEOF_VRREGSET,
1005 vrregset, "ppc Altivec", cb_data);
1d75a658 1006 }
5aa82d05
AA
1007
1008 if (have_vsx)
a616bb94 1009 cb (".reg-ppc-vsx", PPC_LINUX_SIZEOF_VSXREGSET, PPC_LINUX_SIZEOF_VSXREGSET,
d078308a 1010 &ppc32_linux_vsxregset, "POWER7 VSX", cb_data);
7ca18ed6
EBM
1011
1012 if (have_ppr)
1013 cb (".reg-ppc-ppr", PPC_LINUX_SIZEOF_PPRREGSET,
1014 PPC_LINUX_SIZEOF_PPRREGSET,
1015 &ppc32_linux_pprregset, "Priority Program Register", cb_data);
1016
1017 if (have_dscr)
1018 cb (".reg-ppc-dscr", PPC_LINUX_SIZEOF_DSCRREGSET,
1019 PPC_LINUX_SIZEOF_DSCRREGSET,
1020 &ppc32_linux_dscrregset, "Data Stream Control Register",
1021 cb_data);
f2cf6173
EBM
1022
1023 if (have_tar)
1024 cb (".reg-ppc-tar", PPC_LINUX_SIZEOF_TARREGSET,
1025 PPC_LINUX_SIZEOF_TARREGSET,
1026 &ppc32_linux_tarregset, "Target Address Register", cb_data);
232bfb86
EBM
1027
1028 /* EBB registers are unavailable when ptrace returns ENODATA. Check
1029 availability when generating a core file (regcache != NULL). */
1030 if (tdep->have_ebb)
1031 if (regcache == NULL
1032 || REG_VALID == regcache->get_register_status (PPC_BESCR_REGNUM))
1033 cb (".reg-ppc-ebb", PPC_LINUX_SIZEOF_EBBREGSET,
1034 PPC_LINUX_SIZEOF_EBBREGSET,
1035 &ppc32_linux_ebbregset, "Event-based Branching Registers",
1036 cb_data);
1037
1038 if (tdep->ppc_mmcr0_regnum != -1)
1039 cb (".reg-ppc-pmu", PPC_LINUX_SIZEOF_PMUREGSET,
1040 PPC_LINUX_SIZEOF_PMUREGSET,
1041 &ppc32_linux_pmuregset, "Performance Monitor Registers",
1042 cb_data);
8d619c01
EBM
1043
1044 if (tdep->have_htm_spr)
1045 cb (".reg-ppc-tm-spr", PPC_LINUX_SIZEOF_TM_SPRREGSET,
1046 PPC_LINUX_SIZEOF_TM_SPRREGSET,
1047 &ppc32_linux_tm_sprregset,
1048 "Hardware Transactional Memory Special Purpose Registers",
1049 cb_data);
1050
1051 /* Checkpointed registers can be unavailable, don't call back if
1052 we are generating a core file. */
1053
1054 if (tdep->have_htm_core)
1055 {
1056 /* Only generate the checkpointed GPR core note if we also have
1057 access to the HTM SPRs, because we need TFHAR to fill the
1058 "checkpointed" NIP slot. We can read a core file without it
1059 since GDB is not aware of this NIP as a visible register. */
1060 if (regcache == NULL ||
1061 (REG_VALID == regcache->get_register_status (PPC_CR0_REGNUM)
1062 && tdep->have_htm_spr))
1063 {
1064 int cgpr_size = (tdep->wordsize == 4?
1065 PPC32_LINUX_SIZEOF_CGPRREGSET
1066 : PPC64_LINUX_SIZEOF_CGPRREGSET);
1067
1068 const struct regset *cgprregset =
1069 ppc_linux_cgprregset (gdbarch);
1070
1071 if (regcache != NULL)
1072 {
1073 struct regset core_cgprregset = *cgprregset;
1074
1075 core_cgprregset.collect_regset
1076 = ppc_linux_collect_core_cpgrregset;
1077
1078 cb (".reg-ppc-tm-cgpr",
1079 cgpr_size, cgpr_size,
1080 &core_cgprregset,
1081 "Checkpointed General Purpose Registers", cb_data);
1082 }
1083 else
1084 {
1085 cb (".reg-ppc-tm-cgpr",
1086 cgpr_size, cgpr_size,
1087 cgprregset,
1088 "Checkpointed General Purpose Registers", cb_data);
1089 }
1090 }
1091 }
1092
1093 if (tdep->have_htm_fpu)
1094 {
1095 if (regcache == NULL ||
1096 REG_VALID == regcache->get_register_status (PPC_CF0_REGNUM))
1097 cb (".reg-ppc-tm-cfpr", PPC_LINUX_SIZEOF_CFPRREGSET,
1098 PPC_LINUX_SIZEOF_CFPRREGSET,
1099 &ppc32_linux_cfprregset,
1100 "Checkpointed Floating Point Registers", cb_data);
1101 }
1102
1103 if (tdep->have_htm_altivec)
1104 {
1105 if (regcache == NULL ||
1106 REG_VALID == regcache->get_register_status (PPC_CVR0_REGNUM))
1107 {
1108 const struct regset *cvmxregset =
1109 ppc_linux_cvmxregset (gdbarch);
1110
1111 cb (".reg-ppc-tm-cvmx", PPC_LINUX_SIZEOF_CVMXREGSET,
1112 PPC_LINUX_SIZEOF_CVMXREGSET,
1113 cvmxregset,
1114 "Checkpointed Altivec (VMX) Registers", cb_data);
1115 }
1116 }
1117
1118 if (tdep->have_htm_vsx)
1119 {
1120 if (regcache == NULL ||
1121 (REG_VALID
1122 == regcache->get_register_status (PPC_CVSR0_UPPER_REGNUM)))
1123 cb (".reg-ppc-tm-cvsx", PPC_LINUX_SIZEOF_CVSXREGSET,
1124 PPC_LINUX_SIZEOF_CVSXREGSET,
1125 &ppc32_linux_cvsxregset,
1126 "Checkpointed VSX Registers", cb_data);
1127 }
1128
1129 if (tdep->ppc_cppr_regnum != -1)
1130 {
1131 if (regcache == NULL ||
1132 REG_VALID == regcache->get_register_status (PPC_CPPR_REGNUM))
1133 cb (".reg-ppc-tm-cppr", PPC_LINUX_SIZEOF_CPPRREGSET,
1134 PPC_LINUX_SIZEOF_CPPRREGSET,
1135 &ppc32_linux_cpprregset,
1136 "Checkpointed Priority Program Register", cb_data);
1137 }
1138
1139 if (tdep->ppc_cdscr_regnum != -1)
1140 {
1141 if (regcache == NULL ||
1142 REG_VALID == regcache->get_register_status (PPC_CDSCR_REGNUM))
1143 cb (".reg-ppc-tm-cdscr", PPC_LINUX_SIZEOF_CDSCRREGSET,
1144 PPC_LINUX_SIZEOF_CDSCRREGSET,
1145 &ppc32_linux_cdscrregset,
1146 "Checkpointed Data Stream Control Register", cb_data);
1147 }
1148
1149 if (tdep->ppc_ctar_regnum)
1150 {
1151 if ( regcache == NULL ||
1152 REG_VALID == regcache->get_register_status (PPC_CTAR_REGNUM))
1153 cb (".reg-ppc-tm-ctar", PPC_LINUX_SIZEOF_CTARREGSET,
1154 PPC_LINUX_SIZEOF_CTARREGSET,
1155 &ppc32_linux_ctarregset,
1156 "Checkpointed Target Address Register", cb_data);
1157 }
5aa82d05
AA
1158}
1159
a8f60bfc 1160static void
5366653e 1161ppc_linux_sigtramp_cache (struct frame_info *this_frame,
a8f60bfc
AC
1162 struct trad_frame_cache *this_cache,
1163 CORE_ADDR func, LONGEST offset,
1164 int bias)
1165{
1166 CORE_ADDR base;
1167 CORE_ADDR regs;
1168 CORE_ADDR gpregs;
1169 CORE_ADDR fpregs;
1170 int i;
5366653e 1171 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8f60bfc 1172 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 1173 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8f60bfc 1174
5366653e
DJ
1175 base = get_frame_register_unsigned (this_frame,
1176 gdbarch_sp_regnum (gdbarch));
1177 if (bias > 0 && get_frame_pc (this_frame) != func)
a8f60bfc
AC
1178 /* See below, some signal trampolines increment the stack as their
1179 first instruction, need to compensate for that. */
1180 base -= bias;
1181
1182 /* Find the address of the register buffer pointer. */
1183 regs = base + offset;
1184 /* Use that to find the address of the corresponding register
1185 buffers. */
e17a4113 1186 gpregs = read_memory_unsigned_integer (regs, tdep->wordsize, byte_order);
a8f60bfc
AC
1187 fpregs = gpregs + 48 * tdep->wordsize;
1188
1189 /* General purpose. */
1190 for (i = 0; i < 32; i++)
1191 {
1192 int regnum = i + tdep->ppc_gp0_regnum;
0df8b418
MS
1193 trad_frame_set_reg_addr (this_cache,
1194 regnum, gpregs + i * tdep->wordsize);
a8f60bfc 1195 }
3e8c568d 1196 trad_frame_set_reg_addr (this_cache,
40a6adc1 1197 gdbarch_pc_regnum (gdbarch),
3e8c568d 1198 gpregs + 32 * tdep->wordsize);
a8f60bfc
AC
1199 trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum,
1200 gpregs + 35 * tdep->wordsize);
1201 trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum,
1202 gpregs + 36 * tdep->wordsize);
1203 trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum,
1204 gpregs + 37 * tdep->wordsize);
1205 trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum,
1206 gpregs + 38 * tdep->wordsize);
1207
7284e1be
UW
1208 if (ppc_linux_trap_reg_p (gdbarch))
1209 {
1210 trad_frame_set_reg_addr (this_cache, PPC_ORIG_R3_REGNUM,
1211 gpregs + 34 * tdep->wordsize);
1212 trad_frame_set_reg_addr (this_cache, PPC_TRAP_REGNUM,
1213 gpregs + 40 * tdep->wordsize);
1214 }
1215
60f140f9
PG
1216 if (ppc_floating_point_unit_p (gdbarch))
1217 {
1218 /* Floating point registers. */
1219 for (i = 0; i < 32; i++)
1220 {
40a6adc1 1221 int regnum = i + gdbarch_fp0_regnum (gdbarch);
60f140f9
PG
1222 trad_frame_set_reg_addr (this_cache, regnum,
1223 fpregs + i * tdep->wordsize);
1224 }
1225 trad_frame_set_reg_addr (this_cache, tdep->ppc_fpscr_regnum,
4019046a 1226 fpregs + 32 * tdep->wordsize);
60f140f9 1227 }
a8f60bfc
AC
1228 trad_frame_set_id (this_cache, frame_id_build (base, func));
1229}
1230
1231static void
1232ppc32_linux_sigaction_cache_init (const struct tramp_frame *self,
5366653e 1233 struct frame_info *this_frame,
a8f60bfc
AC
1234 struct trad_frame_cache *this_cache,
1235 CORE_ADDR func)
1236{
5366653e 1237 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
a8f60bfc
AC
1238 0xd0 /* Offset to ucontext_t. */
1239 + 0x30 /* Offset to .reg. */,
1240 0);
1241}
1242
1243static void
1244ppc64_linux_sigaction_cache_init (const struct tramp_frame *self,
5366653e 1245 struct frame_info *this_frame,
a8f60bfc
AC
1246 struct trad_frame_cache *this_cache,
1247 CORE_ADDR func)
1248{
5366653e 1249 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
a8f60bfc
AC
1250 0x80 /* Offset to ucontext_t. */
1251 + 0xe0 /* Offset to .reg. */,
1252 128);
1253}
1254
1255static void
1256ppc32_linux_sighandler_cache_init (const struct tramp_frame *self,
5366653e 1257 struct frame_info *this_frame,
a8f60bfc
AC
1258 struct trad_frame_cache *this_cache,
1259 CORE_ADDR func)
1260{
5366653e 1261 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
a8f60bfc
AC
1262 0x40 /* Offset to ucontext_t. */
1263 + 0x1c /* Offset to .reg. */,
1264 0);
1265}
1266
1267static void
1268ppc64_linux_sighandler_cache_init (const struct tramp_frame *self,
5366653e 1269 struct frame_info *this_frame,
a8f60bfc
AC
1270 struct trad_frame_cache *this_cache,
1271 CORE_ADDR func)
1272{
5366653e 1273 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
a8f60bfc
AC
1274 0x80 /* Offset to struct sigcontext. */
1275 + 0x38 /* Offset to .reg. */,
1276 128);
1277}
1278
1279static struct tramp_frame ppc32_linux_sigaction_tramp_frame = {
1280 SIGTRAMP_FRAME,
1281 4,
1282 {
7bc02706
TT
1283 { 0x380000ac, ULONGEST_MAX }, /* li r0, 172 */
1284 { 0x44000002, ULONGEST_MAX }, /* sc */
a8f60bfc
AC
1285 { TRAMP_SENTINEL_INSN },
1286 },
1287 ppc32_linux_sigaction_cache_init
1288};
1289static struct tramp_frame ppc64_linux_sigaction_tramp_frame = {
1290 SIGTRAMP_FRAME,
1291 4,
1292 {
7bc02706
TT
1293 { 0x38210080, ULONGEST_MAX }, /* addi r1,r1,128 */
1294 { 0x380000ac, ULONGEST_MAX }, /* li r0, 172 */
1295 { 0x44000002, ULONGEST_MAX }, /* sc */
a8f60bfc
AC
1296 { TRAMP_SENTINEL_INSN },
1297 },
1298 ppc64_linux_sigaction_cache_init
1299};
1300static struct tramp_frame ppc32_linux_sighandler_tramp_frame = {
1301 SIGTRAMP_FRAME,
1302 4,
1303 {
7bc02706
TT
1304 { 0x38000077, ULONGEST_MAX }, /* li r0,119 */
1305 { 0x44000002, ULONGEST_MAX }, /* sc */
a8f60bfc
AC
1306 { TRAMP_SENTINEL_INSN },
1307 },
1308 ppc32_linux_sighandler_cache_init
1309};
1310static struct tramp_frame ppc64_linux_sighandler_tramp_frame = {
1311 SIGTRAMP_FRAME,
1312 4,
1313 {
7bc02706
TT
1314 { 0x38210080, ULONGEST_MAX }, /* addi r1,r1,128 */
1315 { 0x38000077, ULONGEST_MAX }, /* li r0,119 */
1316 { 0x44000002, ULONGEST_MAX }, /* sc */
a8f60bfc
AC
1317 { TRAMP_SENTINEL_INSN },
1318 },
1319 ppc64_linux_sighandler_cache_init
1320};
1321
7284e1be
UW
1322/* Return 1 if PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM are usable. */
1323int
1324ppc_linux_trap_reg_p (struct gdbarch *gdbarch)
1325{
1326 /* If we do not have a target description with registers, then
1327 the special registers will not be included in the register set. */
1328 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch)))
1329 return 0;
1330
1331 /* If we do, then it is safe to check the size. */
1332 return register_size (gdbarch, PPC_ORIG_R3_REGNUM) > 0
1333 && register_size (gdbarch, PPC_TRAP_REGNUM) > 0;
1334}
1335
a96d9b2e
SDJ
1336/* Return the current system call's number present in the
1337 r0 register. When the function fails, it returns -1. */
1338static LONGEST
1339ppc_linux_get_syscall_number (struct gdbarch *gdbarch,
00431a78 1340 thread_info *thread)
a96d9b2e 1341{
00431a78 1342 struct regcache *regcache = get_thread_regcache (thread);
a96d9b2e
SDJ
1343 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1344 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a96d9b2e
SDJ
1345
1346 /* Make sure we're in a 32- or 64-bit machine */
1347 gdb_assert (tdep->wordsize == 4 || tdep->wordsize == 8);
1348
779bc38e
TT
1349 /* The content of a register */
1350 gdb::byte_vector buf (tdep->wordsize);
a96d9b2e
SDJ
1351
1352 /* Getting the system call number from the register.
1353 When dealing with PowerPC architecture, this information
1354 is stored at 0th register. */
dca08e1f 1355 regcache->cooked_read (tdep->ppc_gp0_regnum, buf.data ());
a96d9b2e 1356
779bc38e 1357 return extract_signed_integer (buf.data (), tdep->wordsize, byte_order);
a96d9b2e
SDJ
1358}
1359
b4cdae6f
WW
1360/* PPC process record-replay */
1361
1362static struct linux_record_tdep ppc_linux_record_tdep;
1363static struct linux_record_tdep ppc64_linux_record_tdep;
1364
ddeca1df
WW
1365/* ppc_canonicalize_syscall maps from the native PowerPC Linux set of
1366 syscall ids into a canonical set of syscall ids used by process
1367 record. (See arch/powerpc/include/uapi/asm/unistd.h in kernel tree.)
1368 Return -1 if this system call is not supported by process record.
85102364 1369 Otherwise, return the syscall number for process record of given
ddeca1df
WW
1370 SYSCALL. */
1371
b4cdae6f
WW
1372static enum gdb_syscall
1373ppc_canonicalize_syscall (int syscall)
1374{
aead7601
SM
1375 int result = -1;
1376
b4cdae6f 1377 if (syscall <= 165)
aead7601 1378 result = syscall;
b4cdae6f 1379 else if (syscall >= 167 && syscall <= 190) /* Skip query_module 166 */
aead7601 1380 result = syscall + 1;
b4cdae6f 1381 else if (syscall >= 192 && syscall <= 197) /* mmap2 */
aead7601 1382 result = syscall;
b4cdae6f 1383 else if (syscall == 208) /* tkill */
aead7601 1384 result = gdb_sys_tkill;
b4cdae6f 1385 else if (syscall >= 207 && syscall <= 220) /* gettid */
aead7601 1386 result = syscall + 224 - 207;
b4cdae6f 1387 else if (syscall >= 234 && syscall <= 239) /* exit_group */
aead7601
SM
1388 result = syscall + 252 - 234;
1389 else if (syscall >= 240 && syscall <= 248) /* timer_create */
1390 result = syscall += 259 - 240;
1391 else if (syscall >= 250 && syscall <= 251) /* tgkill */
1392 result = syscall + 270 - 250;
b4cdae6f 1393 else if (syscall == 336)
aead7601 1394 result = gdb_sys_recv;
b4cdae6f 1395 else if (syscall == 337)
aead7601 1396 result = gdb_sys_recvfrom;
b4cdae6f 1397 else if (syscall == 342)
aead7601
SM
1398 result = gdb_sys_recvmsg;
1399
1400 return (enum gdb_syscall) result;
b4cdae6f
WW
1401}
1402
ddeca1df
WW
1403/* Record registers which might be clobbered during system call.
1404 Return 0 if successful. */
1405
b4cdae6f
WW
1406static int
1407ppc_linux_syscall_record (struct regcache *regcache)
1408{
ac7936df 1409 struct gdbarch *gdbarch = regcache->arch ();
b4cdae6f
WW
1410 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1411 ULONGEST scnum;
1412 enum gdb_syscall syscall_gdb;
1413 int ret;
b4cdae6f
WW
1414
1415 regcache_raw_read_unsigned (regcache, tdep->ppc_gp0_regnum, &scnum);
1416 syscall_gdb = ppc_canonicalize_syscall (scnum);
1417
1418 if (syscall_gdb < 0)
1419 {
1420 printf_unfiltered (_("Process record and replay target doesn't "
1421 "support syscall number %d\n"), (int) scnum);
1422 return 0;
1423 }
1424
1425 if (syscall_gdb == gdb_sys_sigreturn
1426 || syscall_gdb == gdb_sys_rt_sigreturn)
1427 {
1428 int i, j;
1429 int regsets[] = { tdep->ppc_gp0_regnum,
1430 tdep->ppc_fp0_regnum,
1431 tdep->ppc_vr0_regnum,
1432 tdep->ppc_vsr0_upper_regnum };
1433
1434 for (j = 0; j < 4; j++)
1435 {
1436 if (regsets[j] == -1)
1437 continue;
1438 for (i = 0; i < 32; i++)
1439 {
1440 if (record_full_arch_list_add_reg (regcache, regsets[j] + i))
1441 return -1;
1442 }
1443 }
1444
1445 if (record_full_arch_list_add_reg (regcache, tdep->ppc_cr_regnum))
1446 return -1;
1447 if (record_full_arch_list_add_reg (regcache, tdep->ppc_ctr_regnum))
1448 return -1;
1449 if (record_full_arch_list_add_reg (regcache, tdep->ppc_lr_regnum))
1450 return -1;
1451 if (record_full_arch_list_add_reg (regcache, tdep->ppc_xer_regnum))
1452 return -1;
1453
1454 return 0;
1455 }
1456
1457 if (tdep->wordsize == 8)
1458 ret = record_linux_system_call (syscall_gdb, regcache,
1459 &ppc64_linux_record_tdep);
1460 else
1461 ret = record_linux_system_call (syscall_gdb, regcache,
1462 &ppc_linux_record_tdep);
1463
1464 if (ret != 0)
1465 return ret;
1466
1467 /* Record registers clobbered during syscall. */
b926417a 1468 for (int i = 3; i <= 12; i++)
b4cdae6f
WW
1469 {
1470 if (record_full_arch_list_add_reg (regcache, tdep->ppc_gp0_regnum + i))
1471 return -1;
1472 }
1473 if (record_full_arch_list_add_reg (regcache, tdep->ppc_gp0_regnum + 0))
1474 return -1;
1475 if (record_full_arch_list_add_reg (regcache, tdep->ppc_cr_regnum))
1476 return -1;
1477 if (record_full_arch_list_add_reg (regcache, tdep->ppc_ctr_regnum))
1478 return -1;
1479 if (record_full_arch_list_add_reg (regcache, tdep->ppc_lr_regnum))
1480 return -1;
1481
1482 return 0;
1483}
1484
ddeca1df
WW
1485/* Record registers which might be clobbered during signal handling.
1486 Return 0 if successful. */
1487
b4cdae6f
WW
1488static int
1489ppc_linux_record_signal (struct gdbarch *gdbarch, struct regcache *regcache,
1490 enum gdb_signal signal)
1491{
1492 /* See handle_rt_signal64 in arch/powerpc/kernel/signal_64.c
1493 handle_rt_signal32 in arch/powerpc/kernel/signal_32.c
1494 arch/powerpc/include/asm/ptrace.h
1495 for details. */
1496 const int SIGNAL_FRAMESIZE = 128;
1497 const int sizeof_rt_sigframe = 1440 * 2 + 8 * 2 + 4 * 6 + 8 + 8 + 128 + 512;
1498 ULONGEST sp;
1499 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1500 int i;
1501
1502 for (i = 3; i <= 12; i++)
1503 {
1504 if (record_full_arch_list_add_reg (regcache, tdep->ppc_gp0_regnum + i))
1505 return -1;
1506 }
1507
1508 if (record_full_arch_list_add_reg (regcache, tdep->ppc_lr_regnum))
1509 return -1;
1510 if (record_full_arch_list_add_reg (regcache, tdep->ppc_cr_regnum))
1511 return -1;
1512 if (record_full_arch_list_add_reg (regcache, tdep->ppc_ctr_regnum))
1513 return -1;
1514 if (record_full_arch_list_add_reg (regcache, gdbarch_pc_regnum (gdbarch)))
1515 return -1;
1516 if (record_full_arch_list_add_reg (regcache, gdbarch_sp_regnum (gdbarch)))
1517 return -1;
1518
1519 /* Record the change in the stack.
1520 frame-size = sizeof (struct rt_sigframe) + SIGNAL_FRAMESIZE */
1521 regcache_raw_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch), &sp);
1522 sp -= SIGNAL_FRAMESIZE;
1523 sp -= sizeof_rt_sigframe;
1524
1525 if (record_full_arch_list_add_mem (sp, SIGNAL_FRAMESIZE + sizeof_rt_sigframe))
1526 return -1;
1527
1528 if (record_full_arch_list_add_end ())
1529 return -1;
1530
1531 return 0;
1532}
1533
7284e1be
UW
1534static void
1535ppc_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
1536{
ac7936df 1537 struct gdbarch *gdbarch = regcache->arch ();
7284e1be
UW
1538
1539 regcache_cooked_write_unsigned (regcache, gdbarch_pc_regnum (gdbarch), pc);
1540
1541 /* Set special TRAP register to -1 to prevent the kernel from
1542 messing with the PC we just installed, if we happen to be
1543 within an interrupted system call that the kernel wants to
1544 restart.
1545
1546 Note that after we return from the dummy call, the TRAP and
1547 ORIG_R3 registers will be automatically restored, and the
1548 kernel continues to restart the system call at this point. */
1549 if (ppc_linux_trap_reg_p (gdbarch))
1550 regcache_cooked_write_unsigned (regcache, PPC_TRAP_REGNUM, -1);
1551}
1552
1553static const struct target_desc *
1554ppc_linux_core_read_description (struct gdbarch *gdbarch,
1555 struct target_ops *target,
1556 bfd *abfd)
1557{
bd64614e 1558 struct ppc_linux_features features = ppc_linux_no_features;
7284e1be 1559 asection *altivec = bfd_get_section_by_name (abfd, ".reg-ppc-vmx");
604c2f83 1560 asection *vsx = bfd_get_section_by_name (abfd, ".reg-ppc-vsx");
7284e1be 1561 asection *section = bfd_get_section_by_name (abfd, ".reg");
7ca18ed6
EBM
1562 asection *ppr = bfd_get_section_by_name (abfd, ".reg-ppc-ppr");
1563 asection *dscr = bfd_get_section_by_name (abfd, ".reg-ppc-dscr");
f2cf6173 1564 asection *tar = bfd_get_section_by_name (abfd, ".reg-ppc-tar");
232bfb86 1565 asection *pmu = bfd_get_section_by_name (abfd, ".reg-ppc-pmu");
8d619c01 1566 asection *htmspr = bfd_get_section_by_name (abfd, ".reg-ppc-tm-spr");
bd64614e 1567
7284e1be
UW
1568 if (! section)
1569 return NULL;
1570
fd361982 1571 switch (bfd_section_size (section))
7284e1be
UW
1572 {
1573 case 48 * 4:
bd64614e
PFC
1574 features.wordsize = 4;
1575 break;
7284e1be 1576 case 48 * 8:
bd64614e
PFC
1577 features.wordsize = 8;
1578 break;
7284e1be
UW
1579 default:
1580 return NULL;
1581 }
bd64614e 1582
bd64614e
PFC
1583 if (altivec)
1584 features.altivec = true;
1585
1586 if (vsx)
1587 features.vsx = true;
1588
0f83012e 1589 CORE_ADDR hwcap = linux_get_hwcap (target);
0ec848ad
PFC
1590
1591 features.isa205 = ppc_linux_has_isa205 (hwcap);
1592
7ca18ed6 1593 if (ppr && dscr)
f2cf6173
EBM
1594 {
1595 features.ppr_dscr = true;
232bfb86
EBM
1596
1597 /* We don't require the EBB note section to be present in the
1598 core file to select isa207 because these registers could have
1599 been unavailable when the core file was created. They will
1600 be in the tdep but will show as unavailable. */
1601 if (tar && pmu)
8d619c01
EBM
1602 {
1603 features.isa207 = true;
1604 if (htmspr)
1605 features.htm = true;
1606 }
f2cf6173 1607 }
7ca18ed6 1608
bd64614e 1609 return ppc_linux_match_description (features);
7284e1be
UW
1610}
1611
591a12a1
UW
1612
1613/* Implementation of `gdbarch_elf_make_msymbol_special', as defined in
1614 gdbarch.h. This implementation is used for the ELFv2 ABI only. */
1615
1616static void
1617ppc_elfv2_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym)
1618{
1619 elf_symbol_type *elf_sym = (elf_symbol_type *)sym;
1620
1621 /* If the symbol is marked as having a local entry point, set a target
1622 flag in the msymbol. We currently only support local entry point
1623 offsets of 8 bytes, which is the only entry point offset ever used
1624 by current compilers. If/when other offsets are ever used, we will
1625 have to use additional target flag bits to store them. */
1626 switch (PPC64_LOCAL_ENTRY_OFFSET (elf_sym->internal_elf_sym.st_other))
1627 {
1628 default:
1629 break;
1630 case 8:
1631 MSYMBOL_TARGET_FLAG_1 (msym) = 1;
1632 break;
1633 }
1634}
1635
1636/* Implementation of `gdbarch_skip_entrypoint', as defined in
1637 gdbarch.h. This implementation is used for the ELFv2 ABI only. */
1638
1639static CORE_ADDR
1640ppc_elfv2_skip_entrypoint (struct gdbarch *gdbarch, CORE_ADDR pc)
1641{
1642 struct bound_minimal_symbol fun;
1643 int local_entry_offset = 0;
1644
1645 fun = lookup_minimal_symbol_by_pc (pc);
1646 if (fun.minsym == NULL)
1647 return pc;
1648
1649 /* See ppc_elfv2_elf_make_msymbol_special for how local entry point
1650 offset values are encoded. */
1651 if (MSYMBOL_TARGET_FLAG_1 (fun.minsym))
1652 local_entry_offset = 8;
1653
77e371c0
TT
1654 if (BMSYMBOL_VALUE_ADDRESS (fun) <= pc
1655 && pc < BMSYMBOL_VALUE_ADDRESS (fun) + local_entry_offset)
1656 return BMSYMBOL_VALUE_ADDRESS (fun) + local_entry_offset;
591a12a1
UW
1657
1658 return pc;
1659}
1660
55aa24fb
SDJ
1661/* Implementation of `gdbarch_stap_is_single_operand', as defined in
1662 gdbarch.h. */
1663
1664static int
1665ppc_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
1666{
1667 return (*s == 'i' /* Literal number. */
1668 || (isdigit (*s) && s[1] == '('
1669 && isdigit (s[2])) /* Displacement. */
1670 || (*s == '(' && isdigit (s[1])) /* Register indirection. */
1671 || isdigit (*s)); /* Register value. */
1672}
1673
1674/* Implementation of `gdbarch_stap_parse_special_token', as defined in
1675 gdbarch.h. */
1676
1677static int
1678ppc_stap_parse_special_token (struct gdbarch *gdbarch,
1679 struct stap_parse_info *p)
1680{
1681 if (isdigit (*p->arg))
1682 {
1683 /* This temporary pointer is needed because we have to do a lookahead.
1684 We could be dealing with a register displacement, and in such case
1685 we would not need to do anything. */
1686 const char *s = p->arg;
1687 char *regname;
1688 int len;
1689 struct stoken str;
1690
1691 while (isdigit (*s))
1692 ++s;
1693
1694 if (*s == '(')
1695 {
1696 /* It is a register displacement indeed. Returning 0 means we are
1697 deferring the treatment of this case to the generic parser. */
1698 return 0;
1699 }
1700
1701 len = s - p->arg;
224c3ddb 1702 regname = (char *) alloca (len + 2);
55aa24fb
SDJ
1703 regname[0] = 'r';
1704
1705 strncpy (regname + 1, p->arg, len);
1706 ++len;
1707 regname[len] = '\0';
1708
1709 if (user_reg_map_name_to_regnum (gdbarch, regname, len) == -1)
1710 error (_("Invalid register name `%s' on expression `%s'."),
1711 regname, p->saved_arg);
1712
410a0ff2 1713 write_exp_elt_opcode (&p->pstate, OP_REGISTER);
55aa24fb
SDJ
1714 str.ptr = regname;
1715 str.length = len;
410a0ff2
SDJ
1716 write_exp_string (&p->pstate, str);
1717 write_exp_elt_opcode (&p->pstate, OP_REGISTER);
55aa24fb
SDJ
1718
1719 p->arg = s;
1720 }
1721 else
1722 {
1723 /* All the other tokens should be handled correctly by the generic
1724 parser. */
1725 return 0;
1726 }
1727
1728 return 1;
1729}
cc5f0d61 1730
ddeca1df
WW
1731/* Initialize linux_record_tdep if not initialized yet.
1732 WORDSIZE is 4 or 8 for 32- or 64-bit PowerPC Linux respectively.
1733 Sizes of data structures are initialized accordingly. */
b4cdae6f
WW
1734
1735static void
1736ppc_init_linux_record_tdep (struct linux_record_tdep *record_tdep,
1737 int wordsize)
1738{
1739 /* Simply return if it had been initialized. */
1740 if (record_tdep->size_pointer != 0)
1741 return;
1742
1743 /* These values are the size of the type that will be used in a system
1744 call. They are obtained from Linux Kernel source. */
1745
1746 if (wordsize == 8)
1747 {
1748 record_tdep->size_pointer = 8;
1749 record_tdep->size__old_kernel_stat = 32;
1750 record_tdep->size_tms = 32;
1751 record_tdep->size_loff_t = 8;
1752 record_tdep->size_flock = 32;
1753 record_tdep->size_oldold_utsname = 45;
1754 record_tdep->size_ustat = 32;
7571f7f2
MK
1755 record_tdep->size_old_sigaction = 32;
1756 record_tdep->size_old_sigset_t = 8;
b4cdae6f
WW
1757 record_tdep->size_rlimit = 16;
1758 record_tdep->size_rusage = 144;
1759 record_tdep->size_timeval = 16;
1760 record_tdep->size_timezone = 8;
1761 record_tdep->size_old_gid_t = 4;
1762 record_tdep->size_old_uid_t = 4;
1763 record_tdep->size_fd_set = 128;
72aded86 1764 record_tdep->size_old_dirent = 280;
b4cdae6f
WW
1765 record_tdep->size_statfs = 120;
1766 record_tdep->size_statfs64 = 120;
1767 record_tdep->size_sockaddr = 16;
1768 record_tdep->size_int = 4;
1769 record_tdep->size_long = 8;
1770 record_tdep->size_ulong = 8;
1771 record_tdep->size_msghdr = 56;
1772 record_tdep->size_itimerval = 32;
1773 record_tdep->size_stat = 144;
1774 record_tdep->size_old_utsname = 325;
1775 record_tdep->size_sysinfo = 112;
1776 record_tdep->size_msqid_ds = 120;
1777 record_tdep->size_shmid_ds = 112;
1778 record_tdep->size_new_utsname = 390;
1779 record_tdep->size_timex = 208;
1780 record_tdep->size_mem_dqinfo = 24;
1781 record_tdep->size_if_dqblk = 72;
1782 record_tdep->size_fs_quota_stat = 80;
1783 record_tdep->size_timespec = 16;
1784 record_tdep->size_pollfd = 8;
1785 record_tdep->size_NFS_FHSIZE = 32;
1786 record_tdep->size_knfsd_fh = 132;
c28ebe25 1787 record_tdep->size_TASK_COMM_LEN = 16;
7571f7f2
MK
1788 record_tdep->size_sigaction = 32;
1789 record_tdep->size_sigset_t = 8;
b4cdae6f
WW
1790 record_tdep->size_siginfo_t = 128;
1791 record_tdep->size_cap_user_data_t = 8;
1792 record_tdep->size_stack_t = 24;
1793 record_tdep->size_off_t = 8;
1794 record_tdep->size_stat64 = 104;
1795 record_tdep->size_gid_t = 4;
1796 record_tdep->size_uid_t = 4;
1797 record_tdep->size_PAGE_SIZE = 0x10000; /* 64KB */
1798 record_tdep->size_flock64 = 32;
1799 record_tdep->size_io_event = 32;
1800 record_tdep->size_iocb = 64;
1801 record_tdep->size_epoll_event = 16;
1802 record_tdep->size_itimerspec = 32;
1803 record_tdep->size_mq_attr = 64;
b4cdae6f
WW
1804 record_tdep->size_termios = 44;
1805 record_tdep->size_pid_t = 4;
1806 record_tdep->size_winsize = 8;
1807 record_tdep->size_serial_struct = 72;
1808 record_tdep->size_serial_icounter_struct = 80;
1809 record_tdep->size_size_t = 8;
1810 record_tdep->size_iovec = 16;
b80d067f 1811 record_tdep->size_time_t = 8;
b4cdae6f
WW
1812 }
1813 else if (wordsize == 4)
1814 {
1815 record_tdep->size_pointer = 4;
1816 record_tdep->size__old_kernel_stat = 32;
1817 record_tdep->size_tms = 16;
1818 record_tdep->size_loff_t = 8;
1819 record_tdep->size_flock = 16;
1820 record_tdep->size_oldold_utsname = 45;
1821 record_tdep->size_ustat = 20;
7571f7f2
MK
1822 record_tdep->size_old_sigaction = 16;
1823 record_tdep->size_old_sigset_t = 4;
b4cdae6f
WW
1824 record_tdep->size_rlimit = 8;
1825 record_tdep->size_rusage = 72;
1826 record_tdep->size_timeval = 8;
1827 record_tdep->size_timezone = 8;
1828 record_tdep->size_old_gid_t = 4;
1829 record_tdep->size_old_uid_t = 4;
1830 record_tdep->size_fd_set = 128;
72aded86 1831 record_tdep->size_old_dirent = 268;
b4cdae6f
WW
1832 record_tdep->size_statfs = 64;
1833 record_tdep->size_statfs64 = 88;
1834 record_tdep->size_sockaddr = 16;
1835 record_tdep->size_int = 4;
1836 record_tdep->size_long = 4;
1837 record_tdep->size_ulong = 4;
1838 record_tdep->size_msghdr = 28;
1839 record_tdep->size_itimerval = 16;
1840 record_tdep->size_stat = 88;
1841 record_tdep->size_old_utsname = 325;
1842 record_tdep->size_sysinfo = 64;
1843 record_tdep->size_msqid_ds = 68;
1844 record_tdep->size_shmid_ds = 60;
1845 record_tdep->size_new_utsname = 390;
1846 record_tdep->size_timex = 128;
1847 record_tdep->size_mem_dqinfo = 24;
1848 record_tdep->size_if_dqblk = 72;
1849 record_tdep->size_fs_quota_stat = 80;
1850 record_tdep->size_timespec = 8;
1851 record_tdep->size_pollfd = 8;
1852 record_tdep->size_NFS_FHSIZE = 32;
1853 record_tdep->size_knfsd_fh = 132;
c28ebe25 1854 record_tdep->size_TASK_COMM_LEN = 16;
7571f7f2
MK
1855 record_tdep->size_sigaction = 20;
1856 record_tdep->size_sigset_t = 8;
b4cdae6f
WW
1857 record_tdep->size_siginfo_t = 128;
1858 record_tdep->size_cap_user_data_t = 4;
1859 record_tdep->size_stack_t = 12;
1860 record_tdep->size_off_t = 4;
1861 record_tdep->size_stat64 = 104;
1862 record_tdep->size_gid_t = 4;
1863 record_tdep->size_uid_t = 4;
1864 record_tdep->size_PAGE_SIZE = 0x10000; /* 64KB */
1865 record_tdep->size_flock64 = 32;
1866 record_tdep->size_io_event = 32;
1867 record_tdep->size_iocb = 64;
1868 record_tdep->size_epoll_event = 16;
1869 record_tdep->size_itimerspec = 16;
1870 record_tdep->size_mq_attr = 32;
b4cdae6f
WW
1871 record_tdep->size_termios = 44;
1872 record_tdep->size_pid_t = 4;
1873 record_tdep->size_winsize = 8;
1874 record_tdep->size_serial_struct = 60;
1875 record_tdep->size_serial_icounter_struct = 80;
1876 record_tdep->size_size_t = 4;
1877 record_tdep->size_iovec = 8;
b80d067f 1878 record_tdep->size_time_t = 4;
b4cdae6f
WW
1879 }
1880 else
1881 internal_error (__FILE__, __LINE__, _("unexpected wordsize"));
1882
1883 /* These values are the second argument of system call "sys_fcntl"
1884 and "sys_fcntl64". They are obtained from Linux Kernel source. */
1885 record_tdep->fcntl_F_GETLK = 5;
1886 record_tdep->fcntl_F_GETLK64 = 12;
1887 record_tdep->fcntl_F_SETLK64 = 13;
1888 record_tdep->fcntl_F_SETLKW64 = 14;
1889
1890 record_tdep->arg1 = PPC_R0_REGNUM + 3;
1891 record_tdep->arg2 = PPC_R0_REGNUM + 4;
1892 record_tdep->arg3 = PPC_R0_REGNUM + 5;
1893 record_tdep->arg4 = PPC_R0_REGNUM + 6;
1894 record_tdep->arg5 = PPC_R0_REGNUM + 7;
1895 record_tdep->arg6 = PPC_R0_REGNUM + 8;
1896
1897 /* These values are the second argument of system call "sys_ioctl".
1898 They are obtained from Linux Kernel source.
1899 See arch/powerpc/include/uapi/asm/ioctls.h. */
1900 record_tdep->ioctl_TCGETS = 0x403c7413;
1901 record_tdep->ioctl_TCSETS = 0x803c7414;
1902 record_tdep->ioctl_TCSETSW = 0x803c7415;
1903 record_tdep->ioctl_TCSETSF = 0x803c7416;
1904 record_tdep->ioctl_TCGETA = 0x40147417;
1905 record_tdep->ioctl_TCSETA = 0x80147418;
1906 record_tdep->ioctl_TCSETAW = 0x80147419;
1907 record_tdep->ioctl_TCSETAF = 0x8014741c;
1908 record_tdep->ioctl_TCSBRK = 0x2000741d;
1909 record_tdep->ioctl_TCXONC = 0x2000741e;
1910 record_tdep->ioctl_TCFLSH = 0x2000741f;
1911 record_tdep->ioctl_TIOCEXCL = 0x540c;
1912 record_tdep->ioctl_TIOCNXCL = 0x540d;
1913 record_tdep->ioctl_TIOCSCTTY = 0x540e;
1914 record_tdep->ioctl_TIOCGPGRP = 0x40047477;
1915 record_tdep->ioctl_TIOCSPGRP = 0x80047476;
1916 record_tdep->ioctl_TIOCOUTQ = 0x40047473;
1917 record_tdep->ioctl_TIOCSTI = 0x5412;
1918 record_tdep->ioctl_TIOCGWINSZ = 0x40087468;
1919 record_tdep->ioctl_TIOCSWINSZ = 0x80087467;
1920 record_tdep->ioctl_TIOCMGET = 0x5415;
1921 record_tdep->ioctl_TIOCMBIS = 0x5416;
1922 record_tdep->ioctl_TIOCMBIC = 0x5417;
1923 record_tdep->ioctl_TIOCMSET = 0x5418;
1924 record_tdep->ioctl_TIOCGSOFTCAR = 0x5419;
1925 record_tdep->ioctl_TIOCSSOFTCAR = 0x541a;
1926 record_tdep->ioctl_FIONREAD = 0x4004667f;
1927 record_tdep->ioctl_TIOCINQ = 0x4004667f;
1928 record_tdep->ioctl_TIOCLINUX = 0x541c;
1929 record_tdep->ioctl_TIOCCONS = 0x541d;
1930 record_tdep->ioctl_TIOCGSERIAL = 0x541e;
1931 record_tdep->ioctl_TIOCSSERIAL = 0x541f;
1932 record_tdep->ioctl_TIOCPKT = 0x5420;
1933 record_tdep->ioctl_FIONBIO = 0x8004667e;
1934 record_tdep->ioctl_TIOCNOTTY = 0x5422;
1935 record_tdep->ioctl_TIOCSETD = 0x5423;
1936 record_tdep->ioctl_TIOCGETD = 0x5424;
1937 record_tdep->ioctl_TCSBRKP = 0x5425;
1938 record_tdep->ioctl_TIOCSBRK = 0x5427;
1939 record_tdep->ioctl_TIOCCBRK = 0x5428;
1940 record_tdep->ioctl_TIOCGSID = 0x5429;
1941 record_tdep->ioctl_TIOCGPTN = 0x40045430;
1942 record_tdep->ioctl_TIOCSPTLCK = 0x80045431;
1943 record_tdep->ioctl_FIONCLEX = 0x20006602;
1944 record_tdep->ioctl_FIOCLEX = 0x20006601;
1945 record_tdep->ioctl_FIOASYNC = 0x8004667d;
1946 record_tdep->ioctl_TIOCSERCONFIG = 0x5453;
1947 record_tdep->ioctl_TIOCSERGWILD = 0x5454;
1948 record_tdep->ioctl_TIOCSERSWILD = 0x5455;
1949 record_tdep->ioctl_TIOCGLCKTRMIOS = 0x5456;
1950 record_tdep->ioctl_TIOCSLCKTRMIOS = 0x5457;
1951 record_tdep->ioctl_TIOCSERGSTRUCT = 0x5458;
1952 record_tdep->ioctl_TIOCSERGETLSR = 0x5459;
1953 record_tdep->ioctl_TIOCSERGETMULTI = 0x545a;
1954 record_tdep->ioctl_TIOCSERSETMULTI = 0x545b;
1955 record_tdep->ioctl_TIOCMIWAIT = 0x545c;
1956 record_tdep->ioctl_TIOCGICOUNT = 0x545d;
1957 record_tdep->ioctl_FIOQSIZE = 0x40086680;
1958}
cc5f0d61 1959
00d5215e
UW
1960/* Return a floating-point format for a floating-point variable of
1961 length LEN in bits. If non-NULL, NAME is the name of its type.
1962 If no suitable type is found, return NULL. */
1963
cb8c24b6 1964static const struct floatformat **
00d5215e
UW
1965ppc_floatformat_for_type (struct gdbarch *gdbarch,
1966 const char *name, int len)
1967{
1968 if (len == 128 && name)
ed0f4273
UW
1969 {
1970 if (strcmp (name, "__float128") == 0
1971 || strcmp (name, "_Float128") == 0
1972 || strcmp (name, "_Float64x") == 0
1973 || strcmp (name, "complex _Float128") == 0
1974 || strcmp (name, "complex _Float64x") == 0)
1975 return floatformats_ia64_quad;
1976
1977 if (strcmp (name, "__ibm128") == 0)
1978 return floatformats_ibm_long_double;
1979 }
00d5215e
UW
1980
1981 return default_floatformat_for_type (gdbarch, name, len);
1982}
1983
7b112f9c
JT
1984static void
1985ppc_linux_init_abi (struct gdbarch_info info,
1986 struct gdbarch *gdbarch)
1987{
1988 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
0dba2a6c 1989 struct tdesc_arch_data *tdesc_data = info.tdesc_data;
05c0465e
SDJ
1990 static const char *const stap_integer_prefixes[] = { "i", NULL };
1991 static const char *const stap_register_indirection_prefixes[] = { "(",
1992 NULL };
1993 static const char *const stap_register_indirection_suffixes[] = { ")",
1994 NULL };
7b112f9c 1995
a5ee0f0c
PA
1996 linux_init_abi (info, gdbarch);
1997
b14d30e1 1998 /* PPC GNU/Linux uses either 64-bit or 128-bit long doubles; where
ed0f4273
UW
1999 128-bit, they can be either IBM long double or IEEE quad long double.
2000 The 64-bit long double case will be detected automatically using
2001 the size specified in debug info. We use a .gnu.attribute flag
2002 to distinguish between the IBM long double and IEEE quad cases. */
b14d30e1 2003 set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT);
ed0f4273
UW
2004 if (tdep->long_double_abi == POWERPC_LONG_DOUBLE_IEEE128)
2005 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
2006 else
2007 set_gdbarch_long_double_format (gdbarch, floatformats_ibm_long_double);
0598a43c 2008
00d5215e
UW
2009 /* Support for floating-point data type variants. */
2010 set_gdbarch_floatformat_for_type (gdbarch, ppc_floatformat_for_type);
2011
7284e1be
UW
2012 /* Handle inferior calls during interrupted system calls. */
2013 set_gdbarch_write_pc (gdbarch, ppc_linux_write_pc);
2014
a96d9b2e
SDJ
2015 /* Get the syscall number from the arch's register. */
2016 set_gdbarch_get_syscall_number (gdbarch, ppc_linux_get_syscall_number);
2017
55aa24fb 2018 /* SystemTap functions. */
05c0465e
SDJ
2019 set_gdbarch_stap_integer_prefixes (gdbarch, stap_integer_prefixes);
2020 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
2021 stap_register_indirection_prefixes);
2022 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
2023 stap_register_indirection_suffixes);
55aa24fb
SDJ
2024 set_gdbarch_stap_gdb_register_prefix (gdbarch, "r");
2025 set_gdbarch_stap_is_single_operand (gdbarch, ppc_stap_is_single_operand);
2026 set_gdbarch_stap_parse_special_token (gdbarch,
2027 ppc_stap_parse_special_token);
2028
7b112f9c
JT
2029 if (tdep->wordsize == 4)
2030 {
b9ff3018
AC
2031 /* Until November 2001, gcc did not comply with the 32 bit SysV
2032 R4 ABI requirement that structures less than or equal to 8
2033 bytes should be returned in registers. Instead GCC was using
b021a221 2034 the AIX/PowerOpen ABI - everything returned in memory
b9ff3018
AC
2035 (well ignoring vectors that is). When this was corrected, it
2036 wasn't fixed for GNU/Linux native platform. Use the
2037 PowerOpen struct convention. */
05580c65 2038 set_gdbarch_return_value (gdbarch, ppc_linux_return_value);
b9ff3018 2039
7b112f9c
JT
2040 set_gdbarch_memory_remove_breakpoint (gdbarch,
2041 ppc_linux_memory_remove_breakpoint);
61a65099 2042
f470a70a 2043 /* Shared library handling. */
5d853008 2044 set_gdbarch_skip_trampoline_code (gdbarch, ppc_skip_trampoline_code);
7b112f9c 2045 set_solib_svr4_fetch_link_map_offsets
76a9d10f 2046 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
a8f60bfc 2047
a96d9b2e 2048 /* Setting the correct XML syscall filename. */
458c8db8 2049 set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_PPC);
a96d9b2e 2050
a8f60bfc 2051 /* Trampolines. */
0df8b418
MS
2052 tramp_frame_prepend_unwinder (gdbarch,
2053 &ppc32_linux_sigaction_tramp_frame);
2054 tramp_frame_prepend_unwinder (gdbarch,
2055 &ppc32_linux_sighandler_tramp_frame);
a78c2d62
UW
2056
2057 /* BFD target for core files. */
2058 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
2059 set_gdbarch_gcore_bfd_target (gdbarch, "elf32-powerpcle");
2060 else
2061 set_gdbarch_gcore_bfd_target (gdbarch, "elf32-powerpc");
2f2241f1 2062
5d853008
ME
2063 if (powerpc_so_ops.in_dynsym_resolve_code == NULL)
2064 {
2065 powerpc_so_ops = svr4_so_ops;
2066 /* Override dynamic resolve function. */
2067 powerpc_so_ops.in_dynsym_resolve_code =
2068 powerpc_linux_in_dynsym_resolve_code;
2069 }
2070 set_solib_ops (gdbarch, &powerpc_so_ops);
2071
2072 set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
7b112f9c 2073 }
f470a70a
JB
2074
2075 if (tdep->wordsize == 8)
2076 {
d4094b6a
UW
2077 if (tdep->elf_abi == POWERPC_ELF_V1)
2078 {
2079 /* Handle PPC GNU/Linux 64-bit function pointers (which are really
2080 function descriptors). */
2081 set_gdbarch_convert_from_func_ptr_addr
2082 (gdbarch, ppc64_convert_from_func_ptr_addr);
00d5f93a 2083
d4094b6a
UW
2084 set_gdbarch_elf_make_msymbol_special
2085 (gdbarch, ppc64_elf_make_msymbol_special);
2086 }
591a12a1
UW
2087 else
2088 {
2089 set_gdbarch_elf_make_msymbol_special
2090 (gdbarch, ppc_elfv2_elf_make_msymbol_special);
2091
2092 set_gdbarch_skip_entrypoint (gdbarch, ppc_elfv2_skip_entrypoint);
2093 }
24c274a1 2094
fb318ff7 2095 /* Shared library handling. */
2bbe3cc1 2096 set_gdbarch_skip_trampoline_code (gdbarch, ppc64_skip_trampoline_code);
fb318ff7
DJ
2097 set_solib_svr4_fetch_link_map_offsets
2098 (gdbarch, svr4_lp64_fetch_link_map_offsets);
2099
a96d9b2e 2100 /* Setting the correct XML syscall filename. */
458c8db8 2101 set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_PPC64);
a96d9b2e 2102
a8f60bfc 2103 /* Trampolines. */
0df8b418
MS
2104 tramp_frame_prepend_unwinder (gdbarch,
2105 &ppc64_linux_sigaction_tramp_frame);
2106 tramp_frame_prepend_unwinder (gdbarch,
2107 &ppc64_linux_sighandler_tramp_frame);
a78c2d62
UW
2108
2109 /* BFD target for core files. */
2110 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
2111 set_gdbarch_gcore_bfd_target (gdbarch, "elf64-powerpcle");
2112 else
2113 set_gdbarch_gcore_bfd_target (gdbarch, "elf64-powerpc");
f470a70a 2114 }
b3ac9c77 2115
7284e1be 2116 set_gdbarch_core_read_description (gdbarch, ppc_linux_core_read_description);
5aa82d05
AA
2117 set_gdbarch_iterate_over_regset_sections (gdbarch,
2118 ppc_linux_iterate_over_regset_sections);
b2756930
KB
2119
2120 /* Enable TLS support. */
2121 set_gdbarch_fetch_tls_load_module_address (gdbarch,
2122 svr4_fetch_objfile_link_map);
7284e1be
UW
2123
2124 if (tdesc_data)
2125 {
2126 const struct tdesc_feature *feature;
2127
2128 /* If we have target-described registers, then we can safely
2129 reserve a number for PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM
2130 (whether they are described or not). */
2131 gdb_assert (gdbarch_num_regs (gdbarch) <= PPC_ORIG_R3_REGNUM);
2132 set_gdbarch_num_regs (gdbarch, PPC_TRAP_REGNUM + 1);
2133
2134 /* If they are present, then assign them to the reserved number. */
2135 feature = tdesc_find_feature (info.target_desc,
2136 "org.gnu.gdb.power.linux");
2137 if (feature != NULL)
2138 {
2139 tdesc_numbered_register (feature, tdesc_data,
2140 PPC_ORIG_R3_REGNUM, "orig_r3");
2141 tdesc_numbered_register (feature, tdesc_data,
2142 PPC_TRAP_REGNUM, "trap");
2143 }
2144 }
85e747d2 2145
906d60cf
PA
2146 set_gdbarch_displaced_step_location (gdbarch,
2147 linux_displaced_step_location);
2148
b4cdae6f
WW
2149 /* Support reverse debugging. */
2150 set_gdbarch_process_record (gdbarch, ppc_process_record);
2151 set_gdbarch_process_record_signal (gdbarch, ppc_linux_record_signal);
2152 tdep->ppc_syscall_record = ppc_linux_syscall_record;
2153
2154 ppc_init_linux_record_tdep (&ppc_linux_record_tdep, 4);
2155 ppc_init_linux_record_tdep (&ppc64_linux_record_tdep, 8);
7b112f9c
JT
2156}
2157
6c265988 2158void _initialize_ppc_linux_tdep ();
7b112f9c 2159void
6c265988 2160_initialize_ppc_linux_tdep ()
7b112f9c 2161{
85102364 2162 /* Register for all sub-families of the POWER/PowerPC: 32-bit and
0a0a4ac3
AC
2163 64-bit PowerPC, and the older rs6k. */
2164 gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc, GDB_OSABI_LINUX,
2165 ppc_linux_init_abi);
2166 gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc64, GDB_OSABI_LINUX,
2167 ppc_linux_init_abi);
2168 gdbarch_register_osabi (bfd_arch_rs6000, bfd_mach_rs6k, GDB_OSABI_LINUX,
2169 ppc_linux_init_abi);
7284e1be
UW
2170
2171 /* Initialize the Linux target descriptions. */
2172 initialize_tdesc_powerpc_32l ();
2173 initialize_tdesc_powerpc_altivec32l ();
604c2f83 2174 initialize_tdesc_powerpc_vsx32l ();
69abc51c
TJB
2175 initialize_tdesc_powerpc_isa205_32l ();
2176 initialize_tdesc_powerpc_isa205_altivec32l ();
2177 initialize_tdesc_powerpc_isa205_vsx32l ();
7ca18ed6 2178 initialize_tdesc_powerpc_isa205_ppr_dscr_vsx32l ();
f2cf6173 2179 initialize_tdesc_powerpc_isa207_vsx32l ();
8d619c01 2180 initialize_tdesc_powerpc_isa207_htm_vsx32l ();
7284e1be
UW
2181 initialize_tdesc_powerpc_64l ();
2182 initialize_tdesc_powerpc_altivec64l ();
604c2f83 2183 initialize_tdesc_powerpc_vsx64l ();
69abc51c
TJB
2184 initialize_tdesc_powerpc_isa205_64l ();
2185 initialize_tdesc_powerpc_isa205_altivec64l ();
2186 initialize_tdesc_powerpc_isa205_vsx64l ();
7ca18ed6 2187 initialize_tdesc_powerpc_isa205_ppr_dscr_vsx64l ();
f2cf6173 2188 initialize_tdesc_powerpc_isa207_vsx64l ();
8d619c01 2189 initialize_tdesc_powerpc_isa207_htm_vsx64l ();
7284e1be 2190 initialize_tdesc_powerpc_e500l ();
7b112f9c 2191}
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