projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
gdb: add target_ops::supports_displaced_step
[deliverable/binutils-gdb.git] / gold / aarch64-reloc.def
CommitLineData
9363c7c3
JY		 1// aarch64-reloc.def -- AArch64 relocation definitions.
2
b3adc24a 3// Copyright (C) 2014-2020 Free Software Foundation, Inc.
9363c7c3
JY		 4// Written by Han Shen <shenhan@google.com> and Jing Yu <jingyu@google.com>.
5
6// This file is part of gold.
7
8// This program is free software; you can redistribute it and/or modify
9// it under the terms of the GNU General Public License as published by
10// the Free Software Foundation; either version 3 of the License, or
11// (at your option) any later version.
12
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21// MA 02110-1301, USA.
22//
23//
24//
83a01957
HS		 25// Insn modified by relocation, see enum Reloc_inst -------------------------------------------------------------------------------------------------+
26// Symbol reference type -----------------------------------------------------------------------------+ |
27// Portion off X to retrieve -------------------------------------------------------------------+ | |
28// Checking function, see Note(A)---------------------------------------+ | | |
29// Group index---------------------------------------------------+ | | | |
30// Implemented----------------------------------------------+ | | | | |
31// Class-------------------------------------+ | | | | | |
32// Type----------------------------+ | | | | | | |
33// Name | | | | | | | |
34// | | | | | | | | |
5627d875
IK		 35ARD(NONE , STATIC , NONE , Y, -1, 0,0 , 0,0 , 0 , DATA )
36// Above is from Table 4-5, Null relocation codes
37
83a01957
HS		 38ARD(ABS64 , STATIC , DATA , Y, -1, 0,0 , 0,0 , Symbol::ABSOLUTE_REF , DATA )
39ARD(ABS32 , STATIC , DATA , Y, -1, 31,32 , 0,0 , Symbol::ABSOLUTE_REF , DATA )
40ARD(ABS16 , STATIC , DATA , Y, -1, 15,16 , 0,0 , Symbol::ABSOLUTE_REF , DATA )
41ARD(PREL64 , STATIC , DATA , Y, -1, 0,0 , 0,0 , Symbol::RELATIVE_REF , DATA )
42ARD(PREL32 , STATIC , DATA , Y, -1, 31,32 , 0,0 , Symbol::RELATIVE_REF , DATA )
43ARD(PREL16 , STATIC , DATA , Y, -1, 15,16 , 0,0 , Symbol::RELATIVE_REF , DATA )
9363c7c3
JY		 44// Above is from Table 4-6, Data relocations, 257-262.
45
8769bc4b
HS		 46ARD(MOVW_UABS_G0 , STATIC , AARCH64 , Y, 0, 0,16 , 0,15 , Symbol::ABSOLUTE_REF , MOVW )
47ARD(MOVW_UABS_G0_NC , STATIC , AARCH64 , Y, 0, 0,0 , 0,15 , Symbol::ABSOLUTE_REF , MOVW )
48ARD(MOVW_UABS_G1 , STATIC , AARCH64 , Y, 0, 0,32 , 16,31 , Symbol::ABSOLUTE_REF , MOVW )
49ARD(MOVW_UABS_G1_NC , STATIC , AARCH64 , Y, 0, 0,0 , 16,31 , Symbol::ABSOLUTE_REF , MOVW )
50ARD(MOVW_UABS_G2 , STATIC , AARCH64 , Y, 0, 0,48 , 32,47 , Symbol::ABSOLUTE_REF , MOVW )
51ARD(MOVW_UABS_G2_NC , STATIC , AARCH64 , Y, 0, 0,0 , 32,47 , Symbol::ABSOLUTE_REF , MOVW )
52ARD(MOVW_UABS_G3 , STATIC , AARCH64 , Y, 0, 0,0 , 48,63 , Symbol::ABSOLUTE_REF , MOVW )
53// Above is from Table 4-7, Group relocations to create a 16-, 32-, 48-, or 64-bit unsigned data value or address inline.
54
55ARD(MOVW_SABS_G0 , STATIC , AARCH64 , Y, 0, 16,16 , 0,15 , Symbol::ABSOLUTE_REF , MOVW )
56ARD(MOVW_SABS_G1 , STATIC , AARCH64 , Y, 0, 32,32 , 16,31 , Symbol::ABSOLUTE_REF , MOVW )
57ARD(MOVW_SABS_G2 , STATIC , AARCH64 , Y, 0, 48,48 , 32,47 , Symbol::ABSOLUTE_REF , MOVW )
58// Above is from Table 4-8, Group relocations to create a 16, 32, 48, or 64 bit signed data or offset value inline.
59
9726c3c1
HS		 60ARD(LD_PREL_LO19 , STATIC , AARCH64 , Y, -1, 20,20 , 2,20 , Symbol::RELATIVE_REF , LDST )
61ARD(ADR_PREL_LO21 , STATIC , AARCH64 , Y, -1, 20,20 , 0,20 , Symbol::RELATIVE_REF , ADR )
83a01957
HS		 62ARD(ADR_PREL_PG_HI21 , STATIC , AARCH64 , Y, -1, 32,32 , 12,32 , Symbol::RELATIVE_REF , ADRP )
63ARD(ADR_PREL_PG_HI21_NC , STATIC , AARCH64 , Y, -1, 0,0 , 12,32 , Symbol::RELATIVE_REF , ADRP )
9726c3c1 64ARD(ADD_ABS_LO12_NC , STATIC , AARCH64 , Y, -1, 0,0 , 0,11 , Symbol::ABSOLUTE_REF , ADD )
83a01957
HS		 65ARD(LDST8_ABS_LO12_NC , STATIC , AARCH64 , Y, -1, 0,0 , 0,11 , Symbol::ABSOLUTE_REF , LDST )
66ARD(LDST16_ABS_LO12_NC , STATIC , AARCH64 , Y, -1, 0,RL_CHECK_ALIGN2 , 1,11 , Symbol::ABSOLUTE_REF , LDST )
67ARD(LDST32_ABS_LO12_NC , STATIC , AARCH64 , Y, -1, 0,RL_CHECK_ALIGN4 , 2,11 , Symbol::ABSOLUTE_REF , LDST )
68ARD(LDST64_ABS_LO12_NC , STATIC , AARCH64 , Y, -1, 0,RL_CHECK_ALIGN8 , 3,11 , Symbol::ABSOLUTE_REF , LDST )
69ARD(LDST128_ABS_LO12_NC , STATIC , AARCH64 , Y, -1, 0,RL_CHECK_ALIGN16 , 4,11 , Symbol::ABSOLUTE_REF , LDST )
9726c3c1
HS		 70// Above 10 relocs are from Table 4-9, Relocations to generate 19, 21 and 33 bit PC-relative addresses.
71
83a01957
HS		 72ARD(ADR_GOT_PAGE , STATIC , AARCH64 , Y, -1, 32,32 , 12,32 , Symbol::RELATIVE_REF , ADRP )
73ARD(LD64_GOT_LO12_NC , STATIC , AARCH64 , Y, -1, 0,RL_CHECK_ALIGN8 , 3,11 , Symbol::ABSOLUTE_REF , LDST )
5c28a503 74ARD(LD64_GOTPAGE_LO15 , STATIC , AARCH64 , Y, -1, 0,15 , 3,14 , Symbol::RELATIVE_REF , LDST )
9726c3c1
HS		 75// Above 2 relocs are from Table 4-14, GOT-relative instruction relocations. (Some relocs in the table are not implemented yet.)
76
8e33481e
HS		 77ARD(TSTBR14 , STATIC , CFLOW , N, -1, 15,15 , 2,15 , (Symbol::FUNCTION_CALL|Symbol::ABSOLUTE_REF) , TBZNZ )
78ARD(CONDBR19 , STATIC , CFLOW , N, -1, 20,20 , 2,20 , (Symbol::FUNCTION_CALL|Symbol::ABSOLUTE_REF) , CONDB )
83a01957
HS		 79ARD(CALL26 , STATIC , CFLOW , Y, -1, 27,27 , 2,27 , (Symbol::FUNCTION_CALL|Symbol::RELATIVE_REF) , CALL )
80ARD(JUMP26 , STATIC , CFLOW , Y, -1, 27,27 , 2,27 , (Symbol::FUNCTION_CALL|Symbol::RELATIVE_REF) , B )
9363c7c3
JY		 81// Above is from Table 4-10, Relocations for control-flow instructions,
82// 279-283.
83
9726c3c1
HS		 84ARD(TLSGD_ADR_PAGE21 , STATIC , AARCH64 , Y, -1, 32,32 , 12,32 , Symbol::TLS_REF , ADRP )
85ARD(TLSGD_ADD_LO12_NC , STATIC , AARCH64 , Y, -1, 0,0 , 0,11 , Symbol::TLS_REF , ADD )
86// Above is from Table 4-15, General Dynamic TLS relocations, 512-516.
87
88ARD(TLSLD_ADR_PAGE21 , STATIC , AARCH64 , Y, -1, 32,32 , 12,32 , Symbol::TLS_REF , ADRP )
89ARD(TLSLD_ADD_LO12_NC , STATIC , AARCH64 , Y, -1, 0,0 , 0,11 , Symbol::TLS_REF , ADD )
90ARD(TLSLD_MOVW_DTPREL_G1 , STATIC , AARCH64 , Y, 1, 32,32 , 16,31 , Symbol::TLS_REF , ADRP )
91ARD(TLSLD_MOVW_DTPREL_G0_NC , STATIC , AARCH64 , Y, 0, 0,0 , 0,15 , Symbol::TLS_REF , MOVW )
6b0ad2eb
JY		 92ARD(TLSLD_ADD_DTPREL_HI12 , STATIC , AARCH64 , Y, -1, 0,24 , 12,23 , Symbol::TLS_REF , ADD )
93ARD(TLSLD_ADD_DTPREL_LO12_NC , STATIC , AARCH64 , Y, -1, 0,0 , 0,11 , Symbol::TLS_REF , ADD )
9726c3c1
HS		 94// Above is from Table 4-16, Local Dynamic TLS relocations, 517-573.
95
96ARD(TLSIE_MOVW_GOTTPREL_G1 , STATIC , AARCH64 , N, -1, 32,32 , 16,31 , Symbol::TLS_REF , MOVW )
97ARD(TLSIE_MOVW_GOTTPREL_G0_NC , STATIC , AARCH64 , N, -1, 0,0 , 0,15 , Symbol::TLS_REF , MOVW )
98ARD(TLSIE_ADR_GOTTPREL_PAGE21 , STATIC , AARCH64 , Y, -1, 32,32 , 12,32 , Symbol::TLS_REF , ADRP )
99ARD(TLSIE_LD64_GOTTPREL_LO12_NC , STATIC , AARCH64 , Y, -1, 0,RL_CHECK_ALIGN8 , 3,11 , Symbol::TLS_REF , LDST )
100ARD(TLSIE_LD_GOTTPREL_PREL19 , STATIC , AARCH64 , N, -1, 20,20 , 2,20 , Symbol::TLS_REF , LD )
9363c7c3
JY		 101// Above is from Table 4-17, Initial Exec TLS relocations, 539-543.
102
1a920511
JY		 103ARD(TLSLE_MOVW_TPREL_G2 , STATIC , AARCH64 , Y, 2, 48,48 , 32,47 , Symbol::TLS_REF , MOVW )
104ARD(TLSLE_MOVW_TPREL_G1 , STATIC , AARCH64 , Y, 1, 32,32 , 16,31 , Symbol::TLS_REF , MOVW )
105ARD(TLSLE_MOVW_TPREL_G1_NC , STATIC , AARCH64 , Y, 1, 0,0 , 16,31 , Symbol::TLS_REF , MOVW )
106ARD(TLSLE_MOVW_TPREL_G0 , STATIC , AARCH64 , Y, 0, 16,16 , 0,15 , Symbol::TLS_REF , MOVW )
107ARD(TLSLE_MOVW_TPREL_G0_NC , STATIC , AARCH64 , Y, 0, 0,0 , 0,15 , Symbol::TLS_REF , MOVW )
9726c3c1
HS		 108ARD(TLSLE_ADD_TPREL_HI12 , STATIC , AARCH64 , Y, -1, 0,24 , 12,23 , Symbol::TLS_REF , ADD )
109ARD(TLSLE_ADD_TPREL_LO12 , STATIC , AARCH64 , Y, -1, 0,12 , 0,11 , Symbol::TLS_REF , ADD )
110ARD(TLSLE_ADD_TPREL_LO12_NC , STATIC , AARCH64 , Y, -1, 0,0 , 0,11 , Symbol::TLS_REF , ADD )
e82e6b2b
CC		 111ARD(TLSLE_LDST8_TPREL_LO12 , STATIC , AARCH64 , Y, -1, 0,12 , 0,11 , Symbol::TLS_REF , LDST )
112ARD(TLSLE_LDST8_TPREL_LO12_NC , STATIC , AARCH64 , Y, -1, 0,0 , 0,11 , Symbol::TLS_REF , LDST )
113ARD(TLSLE_LDST16_TPREL_LO12 , STATIC , AARCH64 , Y, -1, 0,12 , 1,11 , Symbol::TLS_REF , LDST )
114ARD(TLSLE_LDST16_TPREL_LO12_NC , STATIC , AARCH64 , Y, -1, 0,0 , 1,11 , Symbol::TLS_REF , LDST )
115ARD(TLSLE_LDST32_TPREL_LO12 , STATIC , AARCH64 , Y, -1, 0,12 , 2,11 , Symbol::TLS_REF , LDST )
116ARD(TLSLE_LDST32_TPREL_LO12_NC , STATIC , AARCH64 , Y, -1, 0,0 , 2,11 , Symbol::TLS_REF , LDST )
117ARD(TLSLE_LDST64_TPREL_LO12 , STATIC , AARCH64 , Y, -1, 0,12 , 3,11 , Symbol::TLS_REF , LDST )
118ARD(TLSLE_LDST64_TPREL_LO12_NC , STATIC , AARCH64 , Y, -1, 0,0 , 3,11 , Symbol::TLS_REF , LDST )
8e33481e
HS		 119// Above is from Table 4-18, Local Exec TLS relocations, 544-571.
120
9726c3c1
HS		 121ARD(TLSDESC_ADR_PAGE21 , STATIC , AARCH64 , Y, -1, 32,32 , 12,32 , Symbol::TLS_REF , ADRP )
122ARD(TLSDESC_LD64_LO12 , STATIC , AARCH64 , Y, -1, 0,RL_CHECK_ALIGN8 , 3,11 , Symbol::TLS_REF , LDST )
123ARD(TLSDESC_ADD_LO12 , STATIC , AARCH64 , Y, -1, 0,0 , 0,11 , Symbol::TLS_REF , ADD )
124ARD(TLSDESC_CALL , STATIC , CFLOW , Y, -1, 0,0 , 0,0 , Symbol::TLS_REF , CALL )
3a531937
JY		 125// Above is from Table 4-19, TLS descriptor relocations, 560-569.
126
9363c7c3
JY		 127// Note -
128// A - Checking X, (L,U), if L == 0 && U == 0, no check. Otherwise, L!=0,
6223ef94 129// check that -2^L<=X<2^U. Also an extra alignment check could be embedded
9363c7c3 130// into U.
GDB Binutils - Deliverables
This page took 0.261557 seconds and 4 git commands to generate.