Commit | Line | Data |
---|---|---|
4b7f6baa | 1 | /* Disassemble ADI Blackfin Instructions. |
c7e2358a | 2 | Copyright 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. |
4b7f6baa | 3 | |
9b201bb5 NC |
4 | This file is part of libopcodes. |
5 | ||
6 | This library is free software; you can redistribute it and/or modify | |
4b7f6baa | 7 | it under the terms of the GNU General Public License as published by |
9b201bb5 NC |
8 | the Free Software Foundation; either version 3, or (at your option) |
9 | any later version. | |
4b7f6baa | 10 | |
9b201bb5 NC |
11 | It is distributed in the hope that it will be useful, but WITHOUT |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
13 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
14 | License for more details. | |
4b7f6baa CM |
15 | |
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, | |
19 | MA 02110-1301, USA. */ | |
20 | ||
21 | #include <stdio.h> | |
22 | #include <stdlib.h> | |
23 | #include <string.h> | |
24 | ||
25 | #include "opcode/bfin.h" | |
26 | ||
27 | #define M_S2RND 1 | |
28 | #define M_T 2 | |
29 | #define M_W32 3 | |
30 | #define M_FU 4 | |
31 | #define M_TFU 6 | |
32 | #define M_IS 8 | |
33 | #define M_ISS2 9 | |
34 | #define M_IH 11 | |
35 | #define M_IU 12 | |
36 | ||
37 | #ifndef PRINTF | |
38 | #define PRINTF printf | |
39 | #endif | |
40 | ||
41 | #ifndef EXIT | |
42 | #define EXIT exit | |
43 | #endif | |
44 | ||
45 | typedef long TIword; | |
46 | ||
b7d48530 NC |
47 | #define HOST_LONG_WORD_SIZE (sizeof (long) * 8) |
48 | #define XFIELD(w,p,s) (((w) & ((1 << (s)) - 1) << (p)) >> (p)) | |
49 | #define SIGNEXTEND(v, n) ((v << (HOST_LONG_WORD_SIZE - (n))) >> (HOST_LONG_WORD_SIZE - (n))) | |
50 | #define MASKBITS(val, bits) (val & ((1 << bits) - 1)) | |
4b7f6baa CM |
51 | |
52 | #include "dis-asm.h" | |
b7d48530 | 53 | |
b21c9cb4 BS |
54 | typedef unsigned int bu32; |
55 | ||
528c6277 MF |
56 | static char comment = 0; |
57 | static char parallel = 0; | |
58 | ||
4b7f6baa CM |
59 | typedef enum |
60 | { | |
61 | c_0, c_1, c_4, c_2, c_uimm2, c_uimm3, c_imm3, c_pcrel4, | |
086134ec BS |
62 | c_imm4, c_uimm4s4, c_uimm4s4d, c_uimm4, c_uimm4s2, c_negimm5s4, c_imm5, c_imm5d, c_uimm5, c_imm6, |
63 | c_imm7, c_imm7d, c_imm8, c_uimm8, c_pcrel8, c_uimm8s4, c_pcrel8s4, c_lppcrel10, c_pcrel10, | |
64 | c_pcrel12, c_imm16s4, c_luimm16, c_imm16, c_imm16d, c_huimm16, c_rimm16, c_imm16s2, c_uimm16s4, | |
65 | c_uimm16s4d, c_uimm16, c_pcrel24, c_uimm32, c_imm32, c_huimm32, c_huimm32e, | |
4b7f6baa CM |
66 | } const_forms_t; |
67 | ||
528c6277 | 68 | static const struct |
4b7f6baa | 69 | { |
528c6277 MF |
70 | const char *name; |
71 | const int nbits; | |
72 | const char reloc; | |
73 | const char issigned; | |
74 | const char pcrel; | |
75 | const char scale; | |
76 | const char offset; | |
77 | const char negative; | |
78 | const char positive; | |
79 | const char decimal; | |
80 | const char leading; | |
81 | const char exact; | |
4b7f6baa CM |
82 | } constant_formats[] = |
83 | { | |
086134ec BS |
84 | { "0", 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0}, |
85 | { "1", 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0}, | |
86 | { "4", 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0}, | |
87 | { "2", 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0}, | |
88 | { "uimm2", 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, | |
89 | { "uimm3", 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, | |
90 | { "imm3", 3, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0}, | |
91 | { "pcrel4", 4, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0}, | |
92 | { "imm4", 4, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0}, | |
93 | { "uimm4s4", 4, 0, 0, 0, 2, 0, 0, 1, 0, 0, 0}, | |
94 | { "uimm4s4d", 4, 0, 0, 0, 2, 0, 0, 1, 1, 0, 0}, | |
95 | { "uimm4", 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, | |
96 | { "uimm4s2", 4, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0}, | |
97 | { "negimm5s4", 5, 0, 1, 0, 2, 0, 1, 0, 0, 0, 0}, | |
98 | { "imm5", 5, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0}, | |
99 | { "imm5d", 5, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0}, | |
100 | { "uimm5", 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, | |
101 | { "imm6", 6, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0}, | |
102 | { "imm7", 7, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0}, | |
103 | { "imm7d", 7, 0, 1, 0, 0, 0, 0, 0, 1, 3, 0}, | |
104 | { "imm8", 8, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0}, | |
105 | { "uimm8", 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, | |
106 | { "pcrel8", 8, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0}, | |
107 | { "uimm8s4", 8, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0}, | |
108 | { "pcrel8s4", 8, 1, 1, 1, 2, 0, 0, 0, 0, 0, 0}, | |
109 | { "lppcrel10", 10, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0}, | |
110 | { "pcrel10", 10, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0}, | |
111 | { "pcrel12", 12, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0}, | |
112 | { "imm16s4", 16, 0, 1, 0, 2, 0, 0, 0, 0, 0, 0}, | |
113 | { "luimm16", 16, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0}, | |
114 | { "imm16", 16, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0}, | |
115 | { "imm16d", 16, 0, 1, 0, 0, 0, 0, 0, 1, 3, 0}, | |
116 | { "huimm16", 16, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0}, | |
117 | { "rimm16", 16, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0}, | |
118 | { "imm16s2", 16, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0}, | |
119 | { "uimm16s4", 16, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0}, | |
120 | { "uimm16s4d", 16, 0, 0, 0, 2, 0, 0, 0, 1, 0, 0}, | |
121 | { "uimm16", 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, | |
122 | { "pcrel24", 24, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0}, | |
123 | { "uimm32", 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, | |
124 | { "imm32", 32, 0, 1, 0, 0, 0, 0, 0, 1, 3, 0}, | |
125 | { "huimm32", 32, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0}, | |
126 | { "huimm32e", 32, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1}, | |
4b7f6baa CM |
127 | }; |
128 | ||
528c6277 MF |
129 | static const char * |
130 | fmtconst (const_forms_t cf, TIword x, bfd_vma pc, disassemble_info *outf) | |
4b7f6baa CM |
131 | { |
132 | static char buf[60]; | |
133 | ||
134 | if (constant_formats[cf].reloc) | |
135 | { | |
136 | bfd_vma ea = (((constant_formats[cf].pcrel ? SIGNEXTEND (x, constant_formats[cf].nbits) | |
137 | : x) + constant_formats[cf].offset) << constant_formats[cf].scale); | |
138 | if (constant_formats[cf].pcrel) | |
139 | ea += pc; | |
140 | ||
086134ec BS |
141 | if (outf->symbol_at_address_func (ea, outf) || !constant_formats[cf].exact) |
142 | { | |
143 | outf->print_address_func (ea, outf); | |
144 | return ""; | |
145 | } | |
146 | else | |
147 | { | |
0af1713e | 148 | sprintf (buf, "%lx", (unsigned long) x); |
086134ec BS |
149 | return buf; |
150 | } | |
4b7f6baa CM |
151 | } |
152 | ||
153 | /* Negative constants have an implied sign bit. */ | |
154 | if (constant_formats[cf].negative) | |
155 | { | |
156 | int nb = constant_formats[cf].nbits + 1; | |
b7d48530 | 157 | |
4b7f6baa CM |
158 | x = x | (1 << constant_formats[cf].nbits); |
159 | x = SIGNEXTEND (x, nb); | |
160 | } | |
161 | else | |
162 | x = constant_formats[cf].issigned ? SIGNEXTEND (x, constant_formats[cf].nbits) : x; | |
163 | ||
164 | if (constant_formats[cf].offset) | |
165 | x += constant_formats[cf].offset; | |
166 | ||
167 | if (constant_formats[cf].scale) | |
168 | x <<= constant_formats[cf].scale; | |
169 | ||
086134ec BS |
170 | if (constant_formats[cf].decimal) |
171 | { | |
172 | if (constant_formats[cf].leading) | |
173 | { | |
174 | char ps[10]; | |
175 | sprintf (ps, "%%%ii", constant_formats[cf].leading); | |
176 | sprintf (buf, ps, x); | |
177 | } | |
178 | else | |
179 | sprintf (buf, "%li", x); | |
180 | } | |
4b7f6baa | 181 | else |
086134ec BS |
182 | { |
183 | if (constant_formats[cf].issigned && x < 0) | |
184 | sprintf (buf, "-0x%x", abs (x)); | |
185 | else | |
0af1713e | 186 | sprintf (buf, "0x%lx", (unsigned long) x); |
086134ec | 187 | } |
4b7f6baa CM |
188 | |
189 | return buf; | |
190 | } | |
191 | ||
b21c9cb4 BS |
192 | static bu32 |
193 | fmtconst_val (const_forms_t cf, unsigned int x, unsigned int pc) | |
194 | { | |
195 | if (0 && constant_formats[cf].reloc) | |
196 | { | |
197 | bu32 ea = (((constant_formats[cf].pcrel | |
086134ec BS |
198 | ? SIGNEXTEND (x, constant_formats[cf].nbits) |
199 | : x) + constant_formats[cf].offset) | |
200 | << constant_formats[cf].scale); | |
b21c9cb4 | 201 | if (constant_formats[cf].pcrel) |
086134ec | 202 | ea += pc; |
b21c9cb4 BS |
203 | |
204 | return ea; | |
205 | } | |
206 | ||
207 | /* Negative constants have an implied sign bit. */ | |
208 | if (constant_formats[cf].negative) | |
209 | { | |
210 | int nb = constant_formats[cf].nbits + 1; | |
211 | x = x | (1 << constant_formats[cf].nbits); | |
212 | x = SIGNEXTEND (x, nb); | |
213 | } | |
214 | else if (constant_formats[cf].issigned) | |
215 | x = SIGNEXTEND (x, constant_formats[cf].nbits); | |
216 | ||
217 | x += constant_formats[cf].offset; | |
218 | x <<= constant_formats[cf].scale; | |
219 | ||
220 | return x; | |
221 | } | |
222 | ||
4b7f6baa CM |
223 | enum machine_registers |
224 | { | |
225 | REG_RL0, REG_RL1, REG_RL2, REG_RL3, REG_RL4, REG_RL5, REG_RL6, REG_RL7, | |
226 | REG_RH0, REG_RH1, REG_RH2, REG_RH3, REG_RH4, REG_RH5, REG_RH6, REG_RH7, | |
227 | REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7, | |
228 | REG_R1_0, REG_R3_2, REG_R5_4, REG_R7_6, REG_P0, REG_P1, REG_P2, REG_P3, | |
229 | REG_P4, REG_P5, REG_SP, REG_FP, REG_A0x, REG_A1x, REG_A0w, REG_A1w, | |
230 | REG_A0, REG_A1, REG_I0, REG_I1, REG_I2, REG_I3, REG_M0, REG_M1, | |
231 | REG_M2, REG_M3, REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, | |
232 | REG_L2, REG_L3, | |
233 | REG_AZ, REG_AN, REG_AC0, REG_AC1, REG_AV0, REG_AV1, REG_AV0S, REG_AV1S, | |
234 | REG_AQ, REG_V, REG_VS, | |
235 | REG_sftreset, REG_omode, REG_excause, REG_emucause, REG_idle_req, REG_hwerrcause, REG_CC, REG_LC0, | |
236 | REG_LC1, REG_GP, REG_ASTAT, REG_RETS, REG_LT0, REG_LB0, REG_LT1, REG_LB1, | |
237 | REG_CYCLES, REG_CYCLES2, REG_USP, REG_SEQSTAT, REG_SYSCFG, REG_RETI, REG_RETX, REG_RETN, | |
238 | REG_RETE, REG_EMUDAT, REG_BR0, REG_BR1, REG_BR2, REG_BR3, REG_BR4, REG_BR5, REG_BR6, | |
239 | REG_BR7, REG_PL0, REG_PL1, REG_PL2, REG_PL3, REG_PL4, REG_PL5, REG_SLP, REG_FLP, | |
240 | REG_PH0, REG_PH1, REG_PH2, REG_PH3, REG_PH4, REG_PH5, REG_SHP, REG_FHP, | |
241 | REG_IL0, REG_IL1, REG_IL2, REG_IL3, REG_ML0, REG_ML1, REG_ML2, REG_ML3, | |
242 | REG_BL0, REG_BL1, REG_BL2, REG_BL3, REG_LL0, REG_LL1, REG_LL2, REG_LL3, | |
243 | REG_IH0, REG_IH1, REG_IH2, REG_IH3, REG_MH0, REG_MH1, REG_MH2, REG_MH3, | |
244 | REG_BH0, REG_BH1, REG_BH2, REG_BH3, REG_LH0, REG_LH1, REG_LH2, REG_LH3, | |
22215ae0 | 245 | REG_AC0_COPY, REG_V_COPY, REG_RND_MOD, |
4b7f6baa CM |
246 | REG_LASTREG, |
247 | }; | |
248 | ||
249 | enum reg_class | |
250 | { | |
251 | rc_dregs_lo, rc_dregs_hi, rc_dregs, rc_dregs_pair, rc_pregs, rc_spfp, rc_dregs_hilo, rc_accum_ext, | |
252 | rc_accum_word, rc_accum, rc_iregs, rc_mregs, rc_bregs, rc_lregs, rc_dpregs, rc_gregs, | |
253 | rc_regs, rc_statbits, rc_ignore_bits, rc_ccstat, rc_counters, rc_dregs2_sysregs1, rc_open, rc_sysregs2, | |
254 | rc_sysregs3, rc_allregs, | |
255 | LIM_REG_CLASSES | |
256 | }; | |
257 | ||
528c6277 | 258 | static const char *reg_names[] = |
4b7f6baa CM |
259 | { |
260 | "R0.L", "R1.L", "R2.L", "R3.L", "R4.L", "R5.L", "R6.L", "R7.L", | |
261 | "R0.H", "R1.H", "R2.H", "R3.H", "R4.H", "R5.H", "R6.H", "R7.H", | |
262 | "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", | |
263 | "R1:0", "R3:2", "R5:4", "R7:6", "P0", "P1", "P2", "P3", | |
086134ec | 264 | "P4", "P5", "SP", "FP", "A0.X", "A1.X", "A0.W", "A1.W", |
4b7f6baa CM |
265 | "A0", "A1", "I0", "I1", "I2", "I3", "M0", "M1", |
266 | "M2", "M3", "B0", "B1", "B2", "B3", "L0", "L1", | |
267 | "L2", "L3", | |
268 | "AZ", "AN", "AC0", "AC1", "AV0", "AV1", "AV0S", "AV1S", | |
269 | "AQ", "V", "VS", | |
270 | "sftreset", "omode", "excause", "emucause", "idle_req", "hwerrcause", "CC", "LC0", | |
271 | "LC1", "GP", "ASTAT", "RETS", "LT0", "LB0", "LT1", "LB1", | |
272 | "CYCLES", "CYCLES2", "USP", "SEQSTAT", "SYSCFG", "RETI", "RETX", "RETN", | |
273 | "RETE", "EMUDAT", | |
274 | "R0.B", "R1.B", "R2.B", "R3.B", "R4.B", "R5.B", "R6.B", "R7.B", | |
275 | "P0.L", "P1.L", "P2.L", "P3.L", "P4.L", "P5.L", "SP.L", "FP.L", | |
276 | "P0.H", "P1.H", "P2.H", "P3.H", "P4.H", "P5.H", "SP.H", "FP.H", | |
277 | "I0.L", "I1.L", "I2.L", "I3.L", "M0.L", "M1.L", "M2.L", "M3.L", | |
278 | "B0.L", "B1.L", "B2.L", "B3.L", "L0.L", "L1.L", "L2.L", "L3.L", | |
279 | "I0.H", "I1.H", "I2.H", "I3.H", "M0.H", "M1.H", "M2.H", "M3.H", | |
280 | "B0.H", "B1.H", "B2.H", "B3.H", "L0.H", "L1.H", "L2.H", "L3.H", | |
22215ae0 | 281 | "AC0_COPY", "V_COPY", "RND_MOD", |
4b7f6baa CM |
282 | "LASTREG", |
283 | 0 | |
284 | }; | |
285 | ||
286 | #define REGNAME(x) ((x) < REG_LASTREG ? (reg_names[x]) : "...... Illegal register .......") | |
287 | ||
288 | /* RL(0..7). */ | |
289 | static enum machine_registers decode_dregs_lo[] = | |
290 | { | |
291 | REG_RL0, REG_RL1, REG_RL2, REG_RL3, REG_RL4, REG_RL5, REG_RL6, REG_RL7, | |
292 | }; | |
293 | ||
b7d48530 | 294 | #define dregs_lo(x) REGNAME (decode_dregs_lo[(x) & 7]) |
4b7f6baa CM |
295 | |
296 | /* RH(0..7). */ | |
297 | static enum machine_registers decode_dregs_hi[] = | |
298 | { | |
299 | REG_RH0, REG_RH1, REG_RH2, REG_RH3, REG_RH4, REG_RH5, REG_RH6, REG_RH7, | |
300 | }; | |
301 | ||
b7d48530 | 302 | #define dregs_hi(x) REGNAME (decode_dregs_hi[(x) & 7]) |
4b7f6baa CM |
303 | |
304 | /* R(0..7). */ | |
305 | static enum machine_registers decode_dregs[] = | |
306 | { | |
307 | REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7, | |
308 | }; | |
309 | ||
b7d48530 | 310 | #define dregs(x) REGNAME (decode_dregs[(x) & 7]) |
4b7f6baa CM |
311 | |
312 | /* R BYTE(0..7). */ | |
313 | static enum machine_registers decode_dregs_byte[] = | |
314 | { | |
315 | REG_BR0, REG_BR1, REG_BR2, REG_BR3, REG_BR4, REG_BR5, REG_BR6, REG_BR7, | |
316 | }; | |
317 | ||
b7d48530 | 318 | #define dregs_byte(x) REGNAME (decode_dregs_byte[(x) & 7]) |
4b7f6baa CM |
319 | |
320 | /* P(0..5) SP FP. */ | |
321 | static enum machine_registers decode_pregs[] = | |
322 | { | |
323 | REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, | |
324 | }; | |
325 | ||
b7d48530 NC |
326 | #define pregs(x) REGNAME (decode_pregs[(x) & 7]) |
327 | #define spfp(x) REGNAME (decode_spfp[(x) & 1]) | |
328 | #define dregs_hilo(x,i) REGNAME (decode_dregs_hilo[((i) << 3)|x]) | |
329 | #define accum_ext(x) REGNAME (decode_accum_ext[(x) & 1]) | |
330 | #define accum_word(x) REGNAME (decode_accum_word[(x) & 1]) | |
331 | #define accum(x) REGNAME (decode_accum[(x) & 1]) | |
4b7f6baa CM |
332 | |
333 | /* I(0..3). */ | |
334 | static enum machine_registers decode_iregs[] = | |
335 | { | |
336 | REG_I0, REG_I1, REG_I2, REG_I3, | |
337 | }; | |
338 | ||
b7d48530 | 339 | #define iregs(x) REGNAME (decode_iregs[(x) & 3]) |
4b7f6baa CM |
340 | |
341 | /* M(0..3). */ | |
342 | static enum machine_registers decode_mregs[] = | |
343 | { | |
344 | REG_M0, REG_M1, REG_M2, REG_M3, | |
345 | }; | |
346 | ||
b7d48530 NC |
347 | #define mregs(x) REGNAME (decode_mregs[(x) & 3]) |
348 | #define bregs(x) REGNAME (decode_bregs[(x) & 3]) | |
349 | #define lregs(x) REGNAME (decode_lregs[(x) & 3]) | |
4b7f6baa CM |
350 | |
351 | /* dregs pregs. */ | |
352 | static enum machine_registers decode_dpregs[] = | |
353 | { | |
354 | REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7, | |
355 | REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, | |
356 | }; | |
357 | ||
b7d48530 | 358 | #define dpregs(x) REGNAME (decode_dpregs[(x) & 15]) |
4b7f6baa CM |
359 | |
360 | /* [dregs pregs]. */ | |
361 | static enum machine_registers decode_gregs[] = | |
362 | { | |
363 | REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7, | |
364 | REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, | |
365 | }; | |
366 | ||
b7d48530 | 367 | #define gregs(x,i) REGNAME (decode_gregs[((i) << 3)|x]) |
4b7f6baa CM |
368 | |
369 | /* [dregs pregs (iregs mregs) (bregs lregs)]. */ | |
370 | static enum machine_registers decode_regs[] = | |
371 | { | |
372 | REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7, | |
373 | REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, | |
374 | REG_I0, REG_I1, REG_I2, REG_I3, REG_M0, REG_M1, REG_M2, REG_M3, | |
375 | REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, REG_L2, REG_L3, | |
376 | }; | |
377 | ||
b7d48530 | 378 | #define regs(x,i) REGNAME (decode_regs[((i) << 3)|x]) |
4b7f6baa CM |
379 | |
380 | /* [dregs pregs (iregs mregs) (bregs lregs) Low Half]. */ | |
381 | static enum machine_registers decode_regs_lo[] = | |
382 | { | |
383 | REG_RL0, REG_RL1, REG_RL2, REG_RL3, REG_RL4, REG_RL5, REG_RL6, REG_RL7, | |
384 | REG_PL0, REG_PL1, REG_PL2, REG_PL3, REG_PL4, REG_PL5, REG_SLP, REG_FLP, | |
385 | REG_IL0, REG_IL1, REG_IL2, REG_IL3, REG_ML0, REG_ML1, REG_ML2, REG_ML3, | |
386 | REG_BL0, REG_BL1, REG_BL2, REG_BL3, REG_LL0, REG_LL1, REG_LL2, REG_LL3, | |
387 | }; | |
388 | ||
b7d48530 | 389 | #define regs_lo(x,i) REGNAME (decode_regs_lo[((i) << 3)|x]) |
4b7f6baa CM |
390 | /* [dregs pregs (iregs mregs) (bregs lregs) High Half]. */ |
391 | static enum machine_registers decode_regs_hi[] = | |
392 | { | |
393 | REG_RH0, REG_RH1, REG_RH2, REG_RH3, REG_RH4, REG_RH5, REG_RH6, REG_RH7, | |
394 | REG_PH0, REG_PH1, REG_PH2, REG_PH3, REG_PH4, REG_PH5, REG_SHP, REG_FHP, | |
1985c81c | 395 | REG_IH0, REG_IH1, REG_IH2, REG_IH3, REG_MH0, REG_MH1, REG_MH2, REG_MH3, |
4b7f6baa CM |
396 | REG_BH0, REG_BH1, REG_BH2, REG_BH3, REG_LH0, REG_LH1, REG_LH2, REG_LH3, |
397 | }; | |
398 | ||
b7d48530 | 399 | #define regs_hi(x,i) REGNAME (decode_regs_hi[((i) << 3)|x]) |
4b7f6baa CM |
400 | |
401 | static enum machine_registers decode_statbits[] = | |
402 | { | |
22215ae0 MF |
403 | REG_AZ, REG_AN, REG_AC0_COPY, REG_V_COPY, |
404 | REG_LASTREG, REG_LASTREG, REG_AQ, REG_LASTREG, | |
405 | REG_RND_MOD, REG_LASTREG, REG_LASTREG, REG_LASTREG, | |
406 | REG_AC0, REG_AC1, REG_LASTREG, REG_LASTREG, | |
407 | REG_AV0, REG_AV0S, REG_AV1, REG_AV1S, | |
408 | REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, | |
409 | REG_V, REG_VS, REG_LASTREG, REG_LASTREG, | |
410 | REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, | |
4b7f6baa CM |
411 | }; |
412 | ||
ad15c38e | 413 | #define statbits(x) REGNAME (decode_statbits[(x) & 31]) |
4b7f6baa CM |
414 | |
415 | /* LC0 LC1. */ | |
416 | static enum machine_registers decode_counters[] = | |
417 | { | |
418 | REG_LC0, REG_LC1, | |
419 | }; | |
420 | ||
b7d48530 NC |
421 | #define counters(x) REGNAME (decode_counters[(x) & 1]) |
422 | #define dregs2_sysregs1(x) REGNAME (decode_dregs2_sysregs1[(x) & 7]) | |
4b7f6baa CM |
423 | |
424 | /* [dregs pregs (iregs mregs) (bregs lregs) | |
425 | dregs2_sysregs1 open sysregs2 sysregs3]. */ | |
426 | static enum machine_registers decode_allregs[] = | |
427 | { | |
428 | REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7, | |
429 | REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, | |
430 | REG_I0, REG_I1, REG_I2, REG_I3, REG_M0, REG_M1, REG_M2, REG_M3, | |
431 | REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, REG_L2, REG_L3, | |
432 | REG_A0x, REG_A0w, REG_A1x, REG_A1w, REG_GP, REG_LASTREG, REG_ASTAT, REG_RETS, | |
433 | REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, | |
434 | REG_LC0, REG_LT0, REG_LB0, REG_LC1, REG_LT1, REG_LB1, REG_CYCLES, REG_CYCLES2, | |
c958a8a8 JZ |
435 | REG_USP, REG_SEQSTAT, REG_SYSCFG, REG_RETI, REG_RETX, REG_RETN, REG_RETE, REG_EMUDAT, |
436 | REG_LASTREG, | |
4b7f6baa CM |
437 | }; |
438 | ||
50e2162a MF |
439 | #define IS_DREG(g,r) ((g) == 0 && (r) < 8) |
440 | #define IS_PREG(g,r) ((g) == 1 && (r) < 8) | |
c958a8a8 | 441 | #define IS_AREG(g,r) ((g) == 4 && (r) >= 0 && (r) < 4) |
50e2162a MF |
442 | #define IS_GENREG(g,r) ((((g) == 0 || (g) == 1) && (r) < 8) || IS_AREG (g, r)) |
443 | #define IS_DAGREG(g,r) (((g) == 2 || (g) == 3) && (r) < 8) | |
c958a8a8 JZ |
444 | #define IS_SYSREG(g,r) \ |
445 | (((g) == 4 && ((r) == 6 || (r) == 7)) || (g) == 6 || (g) == 7) | |
50e2162a MF |
446 | #define IS_RESERVEDREG(g,r) \ |
447 | (((r) > 7) || ((g) == 4 && ((r) == 4 || (r) == 5)) || (g) == 5) | |
448 | ||
449 | #define allreg(r,g) (!IS_RESERVEDREG (g, r)) | |
450 | #define mostreg(r,g) (!(IS_DREG (g, r) || IS_PREG (g, r) || IS_RESERVEDREG (g, r))) | |
c958a8a8 | 451 | |
b7d48530 NC |
452 | #define allregs(x,i) REGNAME (decode_allregs[((i) << 3) | x]) |
453 | #define uimm16s4(x) fmtconst (c_uimm16s4, x, 0, outf) | |
086134ec | 454 | #define uimm16s4d(x) fmtconst (c_uimm16s4d, x, 0, outf) |
b7d48530 NC |
455 | #define pcrel4(x) fmtconst (c_pcrel4, x, pc, outf) |
456 | #define pcrel8(x) fmtconst (c_pcrel8, x, pc, outf) | |
457 | #define pcrel8s4(x) fmtconst (c_pcrel8s4, x, pc, outf) | |
458 | #define pcrel10(x) fmtconst (c_pcrel10, x, pc, outf) | |
459 | #define pcrel12(x) fmtconst (c_pcrel12, x, pc, outf) | |
460 | #define negimm5s4(x) fmtconst (c_negimm5s4, x, 0, outf) | |
461 | #define rimm16(x) fmtconst (c_rimm16, x, 0, outf) | |
462 | #define huimm16(x) fmtconst (c_huimm16, x, 0, outf) | |
463 | #define imm16(x) fmtconst (c_imm16, x, 0, outf) | |
086134ec | 464 | #define imm16d(x) fmtconst (c_imm16d, x, 0, outf) |
b7d48530 NC |
465 | #define uimm2(x) fmtconst (c_uimm2, x, 0, outf) |
466 | #define uimm3(x) fmtconst (c_uimm3, x, 0, outf) | |
467 | #define luimm16(x) fmtconst (c_luimm16, x, 0, outf) | |
468 | #define uimm4(x) fmtconst (c_uimm4, x, 0, outf) | |
469 | #define uimm5(x) fmtconst (c_uimm5, x, 0, outf) | |
470 | #define imm16s2(x) fmtconst (c_imm16s2, x, 0, outf) | |
471 | #define uimm8(x) fmtconst (c_uimm8, x, 0, outf) | |
472 | #define imm16s4(x) fmtconst (c_imm16s4, x, 0, outf) | |
473 | #define uimm4s2(x) fmtconst (c_uimm4s2, x, 0, outf) | |
474 | #define uimm4s4(x) fmtconst (c_uimm4s4, x, 0, outf) | |
086134ec | 475 | #define uimm4s4d(x) fmtconst (c_uimm4s4d, x, 0, outf) |
b7d48530 NC |
476 | #define lppcrel10(x) fmtconst (c_lppcrel10, x, pc, outf) |
477 | #define imm3(x) fmtconst (c_imm3, x, 0, outf) | |
478 | #define imm4(x) fmtconst (c_imm4, x, 0, outf) | |
479 | #define uimm8s4(x) fmtconst (c_uimm8s4, x, 0, outf) | |
480 | #define imm5(x) fmtconst (c_imm5, x, 0, outf) | |
086134ec | 481 | #define imm5d(x) fmtconst (c_imm5d, x, 0, outf) |
b7d48530 NC |
482 | #define imm6(x) fmtconst (c_imm6, x, 0, outf) |
483 | #define imm7(x) fmtconst (c_imm7, x, 0, outf) | |
086134ec | 484 | #define imm7d(x) fmtconst (c_imm7d, x, 0, outf) |
b7d48530 NC |
485 | #define imm8(x) fmtconst (c_imm8, x, 0, outf) |
486 | #define pcrel24(x) fmtconst (c_pcrel24, x, pc, outf) | |
487 | #define uimm16(x) fmtconst (c_uimm16, x, 0, outf) | |
b21c9cb4 | 488 | #define uimm32(x) fmtconst (c_uimm32, x, 0, outf) |
086134ec | 489 | #define imm32(x) fmtconst (c_imm32, x, 0, outf) |
b21c9cb4 | 490 | #define huimm32(x) fmtconst (c_huimm32, x, 0, outf) |
086134ec BS |
491 | #define huimm32e(x) fmtconst (c_huimm32e, x, 0, outf) |
492 | #define imm7_val(x) fmtconst_val (c_imm7, x, 0) | |
b21c9cb4 BS |
493 | #define imm16_val(x) fmtconst_val (c_uimm16, x, 0) |
494 | #define luimm16_val(x) fmtconst_val (c_luimm16, x, 0) | |
4b7f6baa CM |
495 | |
496 | /* (arch.pm)arch_disassembler_functions. */ | |
4b7f6baa | 497 | #ifndef OUTS |
4ca47a51 | 498 | #define OUTS(p, txt) ((p) ? (((txt)[0]) ? (p->fprintf_func)(p->stream, "%s", txt) :0) :0) |
4b7f6baa CM |
499 | #endif |
500 | ||
4b7f6baa CM |
501 | static void |
502 | amod0 (int s0, int x0, disassemble_info *outf) | |
503 | { | |
b7d48530 | 504 | if (s0 == 1 && x0 == 0) |
086134ec | 505 | OUTS (outf, " (S)"); |
4b7f6baa | 506 | else if (s0 == 0 && x0 == 1) |
086134ec | 507 | OUTS (outf, " (CO)"); |
4b7f6baa | 508 | else if (s0 == 1 && x0 == 1) |
086134ec | 509 | OUTS (outf, " (SCO)"); |
4b7f6baa CM |
510 | } |
511 | ||
512 | static void | |
513 | amod1 (int s0, int x0, disassemble_info *outf) | |
514 | { | |
515 | if (s0 == 0 && x0 == 0) | |
086134ec | 516 | OUTS (outf, " (NS)"); |
4b7f6baa | 517 | else if (s0 == 1 && x0 == 0) |
086134ec | 518 | OUTS (outf, " (S)"); |
4b7f6baa CM |
519 | } |
520 | ||
521 | static void | |
522 | amod0amod2 (int s0, int x0, int aop0, disassemble_info *outf) | |
523 | { | |
b7d48530 | 524 | if (s0 == 1 && x0 == 0 && aop0 == 0) |
086134ec | 525 | OUTS (outf, " (S)"); |
4b7f6baa | 526 | else if (s0 == 0 && x0 == 1 && aop0 == 0) |
086134ec | 527 | OUTS (outf, " (CO)"); |
4b7f6baa | 528 | else if (s0 == 1 && x0 == 1 && aop0 == 0) |
086134ec | 529 | OUTS (outf, " (SCO)"); |
4b7f6baa | 530 | else if (s0 == 0 && x0 == 0 && aop0 == 2) |
086134ec | 531 | OUTS (outf, " (ASR)"); |
4b7f6baa | 532 | else if (s0 == 1 && x0 == 0 && aop0 == 2) |
086134ec | 533 | OUTS (outf, " (S, ASR)"); |
4b7f6baa | 534 | else if (s0 == 0 && x0 == 1 && aop0 == 2) |
086134ec | 535 | OUTS (outf, " (CO, ASR)"); |
4b7f6baa | 536 | else if (s0 == 1 && x0 == 1 && aop0 == 2) |
086134ec | 537 | OUTS (outf, " (SCO, ASR)"); |
4b7f6baa | 538 | else if (s0 == 0 && x0 == 0 && aop0 == 3) |
086134ec | 539 | OUTS (outf, " (ASL)"); |
4b7f6baa | 540 | else if (s0 == 1 && x0 == 0 && aop0 == 3) |
086134ec | 541 | OUTS (outf, " (S, ASL)"); |
4b7f6baa | 542 | else if (s0 == 0 && x0 == 1 && aop0 == 3) |
086134ec | 543 | OUTS (outf, " (CO, ASL)"); |
4b7f6baa | 544 | else if (s0 == 1 && x0 == 1 && aop0 == 3) |
086134ec | 545 | OUTS (outf, " (SCO, ASL)"); |
4b7f6baa CM |
546 | } |
547 | ||
548 | static void | |
549 | searchmod (int r0, disassemble_info *outf) | |
550 | { | |
b7d48530 NC |
551 | if (r0 == 0) |
552 | OUTS (outf, "GT"); | |
553 | else if (r0 == 1) | |
554 | OUTS (outf, "GE"); | |
555 | else if (r0 == 2) | |
556 | OUTS (outf, "LT"); | |
557 | else if (r0 == 3) | |
558 | OUTS (outf, "LE"); | |
4b7f6baa CM |
559 | } |
560 | ||
561 | static void | |
562 | aligndir (int r0, disassemble_info *outf) | |
563 | { | |
b7d48530 | 564 | if (r0 == 1) |
086134ec | 565 | OUTS (outf, " (R)"); |
4b7f6baa CM |
566 | } |
567 | ||
568 | static int | |
569 | decode_multfunc (int h0, int h1, int src0, int src1, disassemble_info * outf) | |
570 | { | |
528c6277 | 571 | const char *s0, *s1; |
4b7f6baa CM |
572 | |
573 | if (h0) | |
574 | s0 = dregs_hi (src0); | |
575 | else | |
576 | s0 = dregs_lo (src0); | |
577 | ||
578 | if (h1) | |
579 | s1 = dregs_hi (src1); | |
580 | else | |
581 | s1 = dregs_lo (src1); | |
582 | ||
583 | OUTS (outf, s0); | |
584 | OUTS (outf, " * "); | |
585 | OUTS (outf, s1); | |
586 | return 0; | |
587 | } | |
588 | ||
589 | static int | |
590 | decode_macfunc (int which, int op, int h0, int h1, int src0, int src1, disassemble_info * outf) | |
591 | { | |
528c6277 MF |
592 | const char *a; |
593 | const char *sop = "<unknown op>"; | |
4b7f6baa CM |
594 | |
595 | if (which) | |
086134ec | 596 | a = "A1"; |
4b7f6baa | 597 | else |
086134ec | 598 | a = "A0"; |
4b7f6baa CM |
599 | |
600 | if (op == 3) | |
601 | { | |
602 | OUTS (outf, a); | |
603 | return 0; | |
604 | } | |
605 | ||
606 | switch (op) | |
607 | { | |
086134ec BS |
608 | case 0: sop = " = "; break; |
609 | case 1: sop = " += "; break; | |
610 | case 2: sop = " -= "; break; | |
b7d48530 | 611 | default: break; |
4b7f6baa CM |
612 | } |
613 | ||
614 | OUTS (outf, a); | |
4b7f6baa | 615 | OUTS (outf, sop); |
4b7f6baa CM |
616 | decode_multfunc (h0, h1, src0, src1, outf); |
617 | ||
618 | return 0; | |
619 | } | |
620 | ||
621 | static void | |
622 | decode_optmode (int mod, int MM, disassemble_info *outf) | |
623 | { | |
624 | if (mod == 0 && MM == 0) | |
625 | return; | |
626 | ||
627 | OUTS (outf, " ("); | |
628 | ||
629 | if (MM && !mod) | |
630 | { | |
631 | OUTS (outf, "M)"); | |
632 | return; | |
633 | } | |
634 | ||
635 | if (MM) | |
636 | OUTS (outf, "M, "); | |
b7d48530 | 637 | |
4b7f6baa CM |
638 | if (mod == M_S2RND) |
639 | OUTS (outf, "S2RND"); | |
640 | else if (mod == M_T) | |
641 | OUTS (outf, "T"); | |
642 | else if (mod == M_W32) | |
643 | OUTS (outf, "W32"); | |
644 | else if (mod == M_FU) | |
645 | OUTS (outf, "FU"); | |
646 | else if (mod == M_TFU) | |
647 | OUTS (outf, "TFU"); | |
648 | else if (mod == M_IS) | |
649 | OUTS (outf, "IS"); | |
650 | else if (mod == M_ISS2) | |
651 | OUTS (outf, "ISS2"); | |
652 | else if (mod == M_IH) | |
653 | OUTS (outf, "IH"); | |
654 | else if (mod == M_IU) | |
655 | OUTS (outf, "IU"); | |
656 | else | |
657 | abort (); | |
658 | ||
659 | OUTS (outf, ")"); | |
660 | } | |
b7d48530 | 661 | |
b21c9cb4 BS |
662 | struct saved_state |
663 | { | |
664 | bu32 dpregs[16], iregs[4], mregs[4], bregs[4], lregs[4]; | |
665 | bu32 a0x, a0w, a1x, a1w; | |
666 | bu32 lt[2], lc[2], lb[2]; | |
667 | int ac0, ac0_copy, ac1, an, aq; | |
668 | int av0, av0s, av1, av1s, az, cc, v, v_copy, vs; | |
669 | int rnd_mod; | |
670 | int v_internal; | |
671 | bu32 pc, rets; | |
672 | ||
673 | int ticks; | |
674 | int insts; | |
675 | ||
676 | int exception; | |
677 | ||
678 | int end_of_registers; | |
679 | ||
680 | int msize; | |
681 | unsigned char *memory; | |
682 | unsigned long bfd_mach; | |
683 | } saved_state; | |
684 | ||
685 | #define DREG(x) (saved_state.dpregs[x]) | |
686 | #define GREG(x,i) DPREG ((x) | (i << 3)) | |
687 | #define DPREG(x) (saved_state.dpregs[x]) | |
688 | #define DREG(x) (saved_state.dpregs[x]) | |
689 | #define PREG(x) (saved_state.dpregs[x + 8]) | |
690 | #define SPREG PREG (6) | |
691 | #define FPREG PREG (7) | |
692 | #define IREG(x) (saved_state.iregs[x]) | |
693 | #define MREG(x) (saved_state.mregs[x]) | |
694 | #define BREG(x) (saved_state.bregs[x]) | |
695 | #define LREG(x) (saved_state.lregs[x]) | |
696 | #define A0XREG (saved_state.a0x) | |
697 | #define A0WREG (saved_state.a0w) | |
698 | #define A1XREG (saved_state.a1x) | |
699 | #define A1WREG (saved_state.a1w) | |
700 | #define CCREG (saved_state.cc) | |
701 | #define LC0REG (saved_state.lc[0]) | |
702 | #define LT0REG (saved_state.lt[0]) | |
703 | #define LB0REG (saved_state.lb[0]) | |
704 | #define LC1REG (saved_state.lc[1]) | |
705 | #define LT1REG (saved_state.lt[1]) | |
706 | #define LB1REG (saved_state.lb[1]) | |
707 | #define RETSREG (saved_state.rets) | |
708 | #define PCREG (saved_state.pc) | |
709 | ||
710 | static bu32 * | |
711 | get_allreg (int grp, int reg) | |
712 | { | |
713 | int fullreg = (grp << 3) | reg; | |
714 | /* REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7, | |
715 | REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, | |
716 | REG_I0, REG_I1, REG_I2, REG_I3, REG_M0, REG_M1, REG_M2, REG_M3, | |
717 | REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, REG_L2, REG_L3, | |
718 | REG_A0x, REG_A0w, REG_A1x, REG_A1w, , , REG_ASTAT, REG_RETS, | |
719 | , , , , , , , , | |
720 | REG_LC0, REG_LT0, REG_LB0, REG_LC1, REG_LT1, REG_LB1, REG_CYCLES, | |
721 | REG_CYCLES2, | |
722 | REG_USP, REG_SEQSTAT, REG_SYSCFG, REG_RETI, REG_RETX, REG_RETN, REG_RETE, | |
723 | REG_LASTREG */ | |
724 | switch (fullreg >> 2) | |
725 | { | |
726 | case 0: case 1: return &DREG (reg); break; | |
727 | case 2: case 3: return &PREG (reg); break; | |
728 | case 4: return &IREG (reg & 3); break; | |
729 | case 5: return &MREG (reg & 3); break; | |
730 | case 6: return &BREG (reg & 3); break; | |
731 | case 7: return &LREG (reg & 3); break; | |
732 | default: | |
733 | switch (fullreg) | |
086134ec BS |
734 | { |
735 | case 32: return &saved_state.a0x; | |
736 | case 33: return &saved_state.a0w; | |
737 | case 34: return &saved_state.a1x; | |
738 | case 35: return &saved_state.a1w; | |
739 | case 39: return &saved_state.rets; | |
740 | case 48: return &LC0REG; | |
741 | case 49: return <0REG; | |
742 | case 50: return &LB0REG; | |
743 | case 51: return &LC1REG; | |
744 | case 52: return <1REG; | |
745 | case 53: return &LB1REG; | |
746 | } | |
b21c9cb4 BS |
747 | return 0; |
748 | } | |
749 | } | |
750 | ||
4b7f6baa CM |
751 | static int |
752 | decode_ProgCtrl_0 (TIword iw0, disassemble_info *outf) | |
753 | { | |
b7d48530 NC |
754 | /* ProgCtrl |
755 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
756 | | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.prgfunc.......|.poprnd........| | |
757 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
758 | int poprnd = ((iw0 >> ProgCtrl_poprnd_bits) & ProgCtrl_poprnd_mask); |
759 | int prgfunc = ((iw0 >> ProgCtrl_prgfunc_bits) & ProgCtrl_prgfunc_mask); | |
760 | ||
761 | if (prgfunc == 0 && poprnd == 0) | |
b7d48530 | 762 | OUTS (outf, "NOP"); |
4b7f6baa | 763 | else if (prgfunc == 1 && poprnd == 0) |
b7d48530 | 764 | OUTS (outf, "RTS"); |
4b7f6baa | 765 | else if (prgfunc == 1 && poprnd == 1) |
b7d48530 | 766 | OUTS (outf, "RTI"); |
4b7f6baa | 767 | else if (prgfunc == 1 && poprnd == 2) |
b7d48530 | 768 | OUTS (outf, "RTX"); |
4b7f6baa | 769 | else if (prgfunc == 1 && poprnd == 3) |
b7d48530 | 770 | OUTS (outf, "RTN"); |
4b7f6baa | 771 | else if (prgfunc == 1 && poprnd == 4) |
b7d48530 | 772 | OUTS (outf, "RTE"); |
4b7f6baa | 773 | else if (prgfunc == 2 && poprnd == 0) |
b7d48530 | 774 | OUTS (outf, "IDLE"); |
4b7f6baa | 775 | else if (prgfunc == 2 && poprnd == 3) |
b7d48530 | 776 | OUTS (outf, "CSYNC"); |
4b7f6baa | 777 | else if (prgfunc == 2 && poprnd == 4) |
b7d48530 | 778 | OUTS (outf, "SSYNC"); |
4b7f6baa | 779 | else if (prgfunc == 2 && poprnd == 5) |
b7d48530 | 780 | OUTS (outf, "EMUEXCPT"); |
50e2162a | 781 | else if (prgfunc == 3 && IS_DREG (0, poprnd)) |
4b7f6baa | 782 | { |
086134ec | 783 | OUTS (outf, "CLI "); |
4b7f6baa | 784 | OUTS (outf, dregs (poprnd)); |
4b7f6baa | 785 | } |
50e2162a | 786 | else if (prgfunc == 4 && IS_DREG (0, poprnd)) |
4b7f6baa | 787 | { |
086134ec | 788 | OUTS (outf, "STI "); |
4b7f6baa | 789 | OUTS (outf, dregs (poprnd)); |
4b7f6baa | 790 | } |
50e2162a | 791 | else if (prgfunc == 5 && IS_PREG (1, poprnd)) |
4b7f6baa | 792 | { |
086134ec | 793 | OUTS (outf, "JUMP ("); |
4b7f6baa CM |
794 | OUTS (outf, pregs (poprnd)); |
795 | OUTS (outf, ")"); | |
4b7f6baa | 796 | } |
50e2162a | 797 | else if (prgfunc == 6 && IS_PREG (1, poprnd)) |
4b7f6baa | 798 | { |
086134ec | 799 | OUTS (outf, "CALL ("); |
4b7f6baa CM |
800 | OUTS (outf, pregs (poprnd)); |
801 | OUTS (outf, ")"); | |
4b7f6baa | 802 | } |
50e2162a | 803 | else if (prgfunc == 7 && IS_PREG (1, poprnd)) |
4b7f6baa | 804 | { |
086134ec | 805 | OUTS (outf, "CALL (PC + "); |
4b7f6baa CM |
806 | OUTS (outf, pregs (poprnd)); |
807 | OUTS (outf, ")"); | |
4b7f6baa | 808 | } |
50e2162a | 809 | else if (prgfunc == 8 && IS_PREG (1, poprnd)) |
4b7f6baa | 810 | { |
086134ec | 811 | OUTS (outf, "JUMP (PC + "); |
4b7f6baa CM |
812 | OUTS (outf, pregs (poprnd)); |
813 | OUTS (outf, ")"); | |
4b7f6baa CM |
814 | } |
815 | else if (prgfunc == 9) | |
816 | { | |
086134ec | 817 | OUTS (outf, "RAISE "); |
4b7f6baa | 818 | OUTS (outf, uimm4 (poprnd)); |
4b7f6baa CM |
819 | } |
820 | else if (prgfunc == 10) | |
821 | { | |
086134ec | 822 | OUTS (outf, "EXCPT "); |
4b7f6baa | 823 | OUTS (outf, uimm4 (poprnd)); |
4b7f6baa | 824 | } |
50e2162a | 825 | else if (prgfunc == 11 && IS_PREG (1, poprnd)) |
4b7f6baa | 826 | { |
086134ec | 827 | OUTS (outf, "TESTSET ("); |
4b7f6baa CM |
828 | OUTS (outf, pregs (poprnd)); |
829 | OUTS (outf, ")"); | |
4b7f6baa CM |
830 | } |
831 | else | |
b7d48530 NC |
832 | return 0; |
833 | return 2; | |
4b7f6baa CM |
834 | } |
835 | ||
836 | static int | |
837 | decode_CaCTRL_0 (TIword iw0, disassemble_info *outf) | |
838 | { | |
b7d48530 NC |
839 | /* CaCTRL |
840 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
841 | | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |.a.|.op....|.reg.......| | |
842 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
843 | int a = ((iw0 >> CaCTRL_a_bits) & CaCTRL_a_mask); |
844 | int op = ((iw0 >> CaCTRL_op_bits) & CaCTRL_op_mask); | |
845 | int reg = ((iw0 >> CaCTRL_reg_bits) & CaCTRL_reg_mask); | |
846 | ||
847 | if (a == 0 && op == 0) | |
848 | { | |
4b7f6baa CM |
849 | OUTS (outf, "PREFETCH["); |
850 | OUTS (outf, pregs (reg)); | |
851 | OUTS (outf, "]"); | |
4b7f6baa CM |
852 | } |
853 | else if (a == 0 && op == 1) | |
854 | { | |
4b7f6baa CM |
855 | OUTS (outf, "FLUSHINV["); |
856 | OUTS (outf, pregs (reg)); | |
857 | OUTS (outf, "]"); | |
4b7f6baa CM |
858 | } |
859 | else if (a == 0 && op == 2) | |
860 | { | |
4b7f6baa CM |
861 | OUTS (outf, "FLUSH["); |
862 | OUTS (outf, pregs (reg)); | |
863 | OUTS (outf, "]"); | |
4b7f6baa CM |
864 | } |
865 | else if (a == 0 && op == 3) | |
866 | { | |
4b7f6baa CM |
867 | OUTS (outf, "IFLUSH["); |
868 | OUTS (outf, pregs (reg)); | |
869 | OUTS (outf, "]"); | |
4b7f6baa CM |
870 | } |
871 | else if (a == 1 && op == 0) | |
872 | { | |
4b7f6baa CM |
873 | OUTS (outf, "PREFETCH["); |
874 | OUTS (outf, pregs (reg)); | |
875 | OUTS (outf, "++]"); | |
4b7f6baa CM |
876 | } |
877 | else if (a == 1 && op == 1) | |
878 | { | |
4b7f6baa CM |
879 | OUTS (outf, "FLUSHINV["); |
880 | OUTS (outf, pregs (reg)); | |
881 | OUTS (outf, "++]"); | |
4b7f6baa CM |
882 | } |
883 | else if (a == 1 && op == 2) | |
884 | { | |
4b7f6baa CM |
885 | OUTS (outf, "FLUSH["); |
886 | OUTS (outf, pregs (reg)); | |
887 | OUTS (outf, "++]"); | |
4b7f6baa CM |
888 | } |
889 | else if (a == 1 && op == 3) | |
890 | { | |
4b7f6baa CM |
891 | OUTS (outf, "IFLUSH["); |
892 | OUTS (outf, pregs (reg)); | |
893 | OUTS (outf, "++]"); | |
4b7f6baa CM |
894 | } |
895 | else | |
b7d48530 NC |
896 | return 0; |
897 | return 2; | |
4b7f6baa CM |
898 | } |
899 | ||
900 | static int | |
901 | decode_PushPopReg_0 (TIword iw0, disassemble_info *outf) | |
902 | { | |
b7d48530 NC |
903 | /* PushPopReg |
904 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
905 | | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.W.|.grp.......|.reg.......| | |
906 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
907 | int W = ((iw0 >> PushPopReg_W_bits) & PushPopReg_W_mask); |
908 | int grp = ((iw0 >> PushPopReg_grp_bits) & PushPopReg_grp_mask); | |
909 | int reg = ((iw0 >> PushPopReg_reg_bits) & PushPopReg_reg_mask); | |
910 | ||
50e2162a | 911 | if (W == 0 && mostreg (reg, grp)) |
4b7f6baa | 912 | { |
4b7f6baa CM |
913 | OUTS (outf, allregs (reg, grp)); |
914 | OUTS (outf, " = [SP++]"); | |
4b7f6baa | 915 | } |
50e2162a | 916 | else if (W == 1 && allreg (reg, grp)) |
4b7f6baa | 917 | { |
4b7f6baa CM |
918 | OUTS (outf, "[--SP] = "); |
919 | OUTS (outf, allregs (reg, grp)); | |
4b7f6baa CM |
920 | } |
921 | else | |
b7d48530 NC |
922 | return 0; |
923 | return 2; | |
4b7f6baa CM |
924 | } |
925 | ||
926 | static int | |
927 | decode_PushPopMultiple_0 (TIword iw0, disassemble_info *outf) | |
928 | { | |
b7d48530 NC |
929 | /* PushPopMultiple |
930 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
931 | | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.d.|.p.|.W.|.dr........|.pr........| | |
932 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
933 | int p = ((iw0 >> PushPopMultiple_p_bits) & PushPopMultiple_p_mask); |
934 | int d = ((iw0 >> PushPopMultiple_d_bits) & PushPopMultiple_d_mask); | |
935 | int W = ((iw0 >> PushPopMultiple_W_bits) & PushPopMultiple_W_mask); | |
936 | int dr = ((iw0 >> PushPopMultiple_dr_bits) & PushPopMultiple_dr_mask); | |
937 | int pr = ((iw0 >> PushPopMultiple_pr_bits) & PushPopMultiple_pr_mask); | |
4b7f6baa CM |
938 | |
939 | if (W == 1 && d == 1 && p == 1) | |
940 | { | |
4b7f6baa | 941 | OUTS (outf, "[--SP] = (R7:"); |
086134ec | 942 | OUTS (outf, imm5d (dr)); |
4b7f6baa | 943 | OUTS (outf, ", P5:"); |
086134ec | 944 | OUTS (outf, imm5d (pr)); |
4b7f6baa | 945 | OUTS (outf, ")"); |
4b7f6baa CM |
946 | } |
947 | else if (W == 1 && d == 1 && p == 0) | |
948 | { | |
4b7f6baa | 949 | OUTS (outf, "[--SP] = (R7:"); |
086134ec | 950 | OUTS (outf, imm5d (dr)); |
4b7f6baa | 951 | OUTS (outf, ")"); |
4b7f6baa CM |
952 | } |
953 | else if (W == 1 && d == 0 && p == 1) | |
954 | { | |
4b7f6baa | 955 | OUTS (outf, "[--SP] = (P5:"); |
086134ec | 956 | OUTS (outf, imm5d (pr)); |
4b7f6baa | 957 | OUTS (outf, ")"); |
4b7f6baa CM |
958 | } |
959 | else if (W == 0 && d == 1 && p == 1) | |
960 | { | |
4b7f6baa | 961 | OUTS (outf, "(R7:"); |
086134ec | 962 | OUTS (outf, imm5d (dr)); |
4b7f6baa | 963 | OUTS (outf, ", P5:"); |
086134ec | 964 | OUTS (outf, imm5d (pr)); |
4b7f6baa | 965 | OUTS (outf, ") = [SP++]"); |
4b7f6baa CM |
966 | } |
967 | else if (W == 0 && d == 1 && p == 0) | |
968 | { | |
4b7f6baa | 969 | OUTS (outf, "(R7:"); |
086134ec | 970 | OUTS (outf, imm5d (dr)); |
4b7f6baa | 971 | OUTS (outf, ") = [SP++]"); |
4b7f6baa CM |
972 | } |
973 | else if (W == 0 && d == 0 && p == 1) | |
974 | { | |
4b7f6baa | 975 | OUTS (outf, "(P5:"); |
086134ec | 976 | OUTS (outf, imm5d (pr)); |
4b7f6baa | 977 | OUTS (outf, ") = [SP++]"); |
4b7f6baa CM |
978 | } |
979 | else | |
b7d48530 NC |
980 | return 0; |
981 | return 2; | |
4b7f6baa CM |
982 | } |
983 | ||
984 | static int | |
985 | decode_ccMV_0 (TIword iw0, disassemble_info *outf) | |
986 | { | |
b7d48530 NC |
987 | /* ccMV |
988 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
989 | | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.T.|.d.|.s.|.dst.......|.src.......| | |
990 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
991 | int s = ((iw0 >> CCmv_s_bits) & CCmv_s_mask); |
992 | int d = ((iw0 >> CCmv_d_bits) & CCmv_d_mask); | |
993 | int T = ((iw0 >> CCmv_T_bits) & CCmv_T_mask); | |
994 | int src = ((iw0 >> CCmv_src_bits) & CCmv_src_mask); | |
995 | int dst = ((iw0 >> CCmv_dst_bits) & CCmv_dst_mask); | |
996 | ||
997 | if (T == 1) | |
998 | { | |
4b7f6baa CM |
999 | OUTS (outf, "IF CC "); |
1000 | OUTS (outf, gregs (dst, d)); | |
1001 | OUTS (outf, " = "); | |
1002 | OUTS (outf, gregs (src, s)); | |
4b7f6baa CM |
1003 | } |
1004 | else if (T == 0) | |
1005 | { | |
086134ec | 1006 | OUTS (outf, "IF !CC "); |
4b7f6baa CM |
1007 | OUTS (outf, gregs (dst, d)); |
1008 | OUTS (outf, " = "); | |
1009 | OUTS (outf, gregs (src, s)); | |
4b7f6baa CM |
1010 | } |
1011 | else | |
b7d48530 NC |
1012 | return 0; |
1013 | return 2; | |
4b7f6baa CM |
1014 | } |
1015 | ||
1016 | static int | |
1017 | decode_CCflag_0 (TIword iw0, disassemble_info *outf) | |
1018 | { | |
b7d48530 NC |
1019 | /* CCflag |
1020 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1021 | | 0 | 0 | 0 | 0 | 1 |.I.|.opc.......|.G.|.y.........|.x.........| | |
1022 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1023 | int x = ((iw0 >> CCflag_x_bits) & CCflag_x_mask); |
1024 | int y = ((iw0 >> CCflag_y_bits) & CCflag_y_mask); | |
1025 | int I = ((iw0 >> CCflag_I_bits) & CCflag_I_mask); | |
1026 | int G = ((iw0 >> CCflag_G_bits) & CCflag_G_mask); | |
1027 | int opc = ((iw0 >> CCflag_opc_bits) & CCflag_opc_mask); | |
1028 | ||
1029 | if (opc == 0 && I == 0 && G == 0) | |
1030 | { | |
086134ec | 1031 | OUTS (outf, "CC = "); |
4b7f6baa | 1032 | OUTS (outf, dregs (x)); |
086134ec | 1033 | OUTS (outf, " == "); |
4b7f6baa | 1034 | OUTS (outf, dregs (y)); |
4b7f6baa CM |
1035 | } |
1036 | else if (opc == 1 && I == 0 && G == 0) | |
1037 | { | |
086134ec | 1038 | OUTS (outf, "CC = "); |
4b7f6baa | 1039 | OUTS (outf, dregs (x)); |
086134ec | 1040 | OUTS (outf, " < "); |
4b7f6baa | 1041 | OUTS (outf, dregs (y)); |
4b7f6baa CM |
1042 | } |
1043 | else if (opc == 2 && I == 0 && G == 0) | |
1044 | { | |
086134ec | 1045 | OUTS (outf, "CC = "); |
4b7f6baa | 1046 | OUTS (outf, dregs (x)); |
086134ec | 1047 | OUTS (outf, " <= "); |
4b7f6baa | 1048 | OUTS (outf, dregs (y)); |
4b7f6baa CM |
1049 | } |
1050 | else if (opc == 3 && I == 0 && G == 0) | |
1051 | { | |
086134ec | 1052 | OUTS (outf, "CC = "); |
4b7f6baa | 1053 | OUTS (outf, dregs (x)); |
086134ec | 1054 | OUTS (outf, " < "); |
4b7f6baa | 1055 | OUTS (outf, dregs (y)); |
086134ec | 1056 | OUTS (outf, " (IU)"); |
4b7f6baa CM |
1057 | } |
1058 | else if (opc == 4 && I == 0 && G == 0) | |
1059 | { | |
086134ec | 1060 | OUTS (outf, "CC = "); |
4b7f6baa | 1061 | OUTS (outf, dregs (x)); |
086134ec | 1062 | OUTS (outf, " <= "); |
4b7f6baa | 1063 | OUTS (outf, dregs (y)); |
086134ec | 1064 | OUTS (outf, " (IU)"); |
4b7f6baa CM |
1065 | } |
1066 | else if (opc == 0 && I == 1 && G == 0) | |
1067 | { | |
086134ec | 1068 | OUTS (outf, "CC = "); |
4b7f6baa | 1069 | OUTS (outf, dregs (x)); |
086134ec | 1070 | OUTS (outf, " == "); |
4b7f6baa | 1071 | OUTS (outf, imm3 (y)); |
4b7f6baa CM |
1072 | } |
1073 | else if (opc == 1 && I == 1 && G == 0) | |
1074 | { | |
086134ec | 1075 | OUTS (outf, "CC = "); |
4b7f6baa | 1076 | OUTS (outf, dregs (x)); |
086134ec | 1077 | OUTS (outf, " < "); |
4b7f6baa | 1078 | OUTS (outf, imm3 (y)); |
4b7f6baa CM |
1079 | } |
1080 | else if (opc == 2 && I == 1 && G == 0) | |
1081 | { | |
086134ec | 1082 | OUTS (outf, "CC = "); |
4b7f6baa | 1083 | OUTS (outf, dregs (x)); |
086134ec | 1084 | OUTS (outf, " <= "); |
4b7f6baa | 1085 | OUTS (outf, imm3 (y)); |
4b7f6baa CM |
1086 | } |
1087 | else if (opc == 3 && I == 1 && G == 0) | |
1088 | { | |
086134ec | 1089 | OUTS (outf, "CC = "); |
4b7f6baa | 1090 | OUTS (outf, dregs (x)); |
086134ec | 1091 | OUTS (outf, " < "); |
4b7f6baa | 1092 | OUTS (outf, uimm3 (y)); |
086134ec | 1093 | OUTS (outf, " (IU)"); |
4b7f6baa CM |
1094 | } |
1095 | else if (opc == 4 && I == 1 && G == 0) | |
1096 | { | |
086134ec | 1097 | OUTS (outf, "CC = "); |
4b7f6baa | 1098 | OUTS (outf, dregs (x)); |
086134ec | 1099 | OUTS (outf, " <= "); |
4b7f6baa | 1100 | OUTS (outf, uimm3 (y)); |
086134ec | 1101 | OUTS (outf, " (IU)"); |
4b7f6baa CM |
1102 | } |
1103 | else if (opc == 0 && I == 0 && G == 1) | |
1104 | { | |
086134ec | 1105 | OUTS (outf, "CC = "); |
4b7f6baa | 1106 | OUTS (outf, pregs (x)); |
086134ec | 1107 | OUTS (outf, " == "); |
4b7f6baa | 1108 | OUTS (outf, pregs (y)); |
4b7f6baa CM |
1109 | } |
1110 | else if (opc == 1 && I == 0 && G == 1) | |
1111 | { | |
086134ec | 1112 | OUTS (outf, "CC = "); |
4b7f6baa | 1113 | OUTS (outf, pregs (x)); |
086134ec | 1114 | OUTS (outf, " < "); |
4b7f6baa | 1115 | OUTS (outf, pregs (y)); |
4b7f6baa CM |
1116 | } |
1117 | else if (opc == 2 && I == 0 && G == 1) | |
1118 | { | |
086134ec | 1119 | OUTS (outf, "CC = "); |
4b7f6baa | 1120 | OUTS (outf, pregs (x)); |
086134ec | 1121 | OUTS (outf, " <= "); |
4b7f6baa | 1122 | OUTS (outf, pregs (y)); |
4b7f6baa CM |
1123 | } |
1124 | else if (opc == 3 && I == 0 && G == 1) | |
1125 | { | |
086134ec | 1126 | OUTS (outf, "CC = "); |
4b7f6baa | 1127 | OUTS (outf, pregs (x)); |
086134ec | 1128 | OUTS (outf, " < "); |
4b7f6baa | 1129 | OUTS (outf, pregs (y)); |
086134ec | 1130 | OUTS (outf, " (IU)"); |
4b7f6baa CM |
1131 | } |
1132 | else if (opc == 4 && I == 0 && G == 1) | |
1133 | { | |
086134ec | 1134 | OUTS (outf, "CC = "); |
4b7f6baa | 1135 | OUTS (outf, pregs (x)); |
086134ec | 1136 | OUTS (outf, " <= "); |
4b7f6baa | 1137 | OUTS (outf, pregs (y)); |
086134ec | 1138 | OUTS (outf, " (IU)"); |
4b7f6baa CM |
1139 | } |
1140 | else if (opc == 0 && I == 1 && G == 1) | |
1141 | { | |
086134ec | 1142 | OUTS (outf, "CC = "); |
4b7f6baa | 1143 | OUTS (outf, pregs (x)); |
086134ec | 1144 | OUTS (outf, " == "); |
4b7f6baa | 1145 | OUTS (outf, imm3 (y)); |
4b7f6baa CM |
1146 | } |
1147 | else if (opc == 1 && I == 1 && G == 1) | |
1148 | { | |
086134ec | 1149 | OUTS (outf, "CC = "); |
4b7f6baa | 1150 | OUTS (outf, pregs (x)); |
086134ec | 1151 | OUTS (outf, " < "); |
4b7f6baa | 1152 | OUTS (outf, imm3 (y)); |
4b7f6baa CM |
1153 | } |
1154 | else if (opc == 2 && I == 1 && G == 1) | |
1155 | { | |
086134ec | 1156 | OUTS (outf, "CC = "); |
4b7f6baa | 1157 | OUTS (outf, pregs (x)); |
086134ec | 1158 | OUTS (outf, " <= "); |
4b7f6baa | 1159 | OUTS (outf, imm3 (y)); |
4b7f6baa CM |
1160 | } |
1161 | else if (opc == 3 && I == 1 && G == 1) | |
1162 | { | |
086134ec | 1163 | OUTS (outf, "CC = "); |
4b7f6baa | 1164 | OUTS (outf, pregs (x)); |
086134ec | 1165 | OUTS (outf, " < "); |
4b7f6baa | 1166 | OUTS (outf, uimm3 (y)); |
086134ec | 1167 | OUTS (outf, " (IU)"); |
4b7f6baa CM |
1168 | } |
1169 | else if (opc == 4 && I == 1 && G == 1) | |
1170 | { | |
086134ec | 1171 | OUTS (outf, "CC = "); |
4b7f6baa | 1172 | OUTS (outf, pregs (x)); |
086134ec | 1173 | OUTS (outf, " <= "); |
4b7f6baa | 1174 | OUTS (outf, uimm3 (y)); |
086134ec | 1175 | OUTS (outf, " (IU)"); |
4b7f6baa CM |
1176 | } |
1177 | else if (opc == 5 && I == 0 && G == 0) | |
086134ec | 1178 | OUTS (outf, "CC = A0 == A1"); |
b7d48530 | 1179 | |
4b7f6baa | 1180 | else if (opc == 6 && I == 0 && G == 0) |
086134ec | 1181 | OUTS (outf, "CC = A0 < A1"); |
b7d48530 | 1182 | |
4b7f6baa | 1183 | else if (opc == 7 && I == 0 && G == 0) |
086134ec | 1184 | OUTS (outf, "CC = A0 <= A1"); |
b7d48530 | 1185 | |
4b7f6baa | 1186 | else |
b7d48530 NC |
1187 | return 0; |
1188 | return 2; | |
4b7f6baa CM |
1189 | } |
1190 | ||
1191 | static int | |
1192 | decode_CC2dreg_0 (TIword iw0, disassemble_info *outf) | |
1193 | { | |
b7d48530 NC |
1194 | /* CC2dreg |
1195 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1196 | | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |.op....|.reg.......| | |
1197 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1198 | int op = ((iw0 >> CC2dreg_op_bits) & CC2dreg_op_mask); |
1199 | int reg = ((iw0 >> CC2dreg_reg_bits) & CC2dreg_reg_mask); | |
1200 | ||
1201 | if (op == 0) | |
1202 | { | |
4b7f6baa | 1203 | OUTS (outf, dregs (reg)); |
086134ec | 1204 | OUTS (outf, " = CC"); |
4b7f6baa CM |
1205 | } |
1206 | else if (op == 1) | |
1207 | { | |
086134ec | 1208 | OUTS (outf, "CC = "); |
4b7f6baa | 1209 | OUTS (outf, dregs (reg)); |
4b7f6baa | 1210 | } |
50e2162a | 1211 | else if (op == 3 && reg == 0) |
086134ec | 1212 | OUTS (outf, "CC = !CC"); |
4b7f6baa | 1213 | else |
b7d48530 NC |
1214 | return 0; |
1215 | ||
1216 | return 2; | |
4b7f6baa CM |
1217 | } |
1218 | ||
1219 | static int | |
1220 | decode_CC2stat_0 (TIword iw0, disassemble_info *outf) | |
1221 | { | |
b7d48530 NC |
1222 | /* CC2stat |
1223 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1224 | | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.D.|.op....|.cbit..............| | |
1225 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1226 | int D = ((iw0 >> CC2stat_D_bits) & CC2stat_D_mask); |
1227 | int op = ((iw0 >> CC2stat_op_bits) & CC2stat_op_mask); | |
1228 | int cbit = ((iw0 >> CC2stat_cbit_bits) & CC2stat_cbit_mask); | |
1229 | ||
1230 | if (op == 0 && D == 0) | |
1231 | { | |
4b7f6baa CM |
1232 | OUTS (outf, "CC = "); |
1233 | OUTS (outf, statbits (cbit)); | |
4b7f6baa CM |
1234 | } |
1235 | else if (op == 1 && D == 0) | |
1236 | { | |
086134ec | 1237 | OUTS (outf, "CC |= "); |
4b7f6baa | 1238 | OUTS (outf, statbits (cbit)); |
4b7f6baa CM |
1239 | } |
1240 | else if (op == 2 && D == 0) | |
1241 | { | |
086134ec | 1242 | OUTS (outf, "CC &= "); |
4b7f6baa | 1243 | OUTS (outf, statbits (cbit)); |
4b7f6baa CM |
1244 | } |
1245 | else if (op == 3 && D == 0) | |
1246 | { | |
086134ec | 1247 | OUTS (outf, "CC ^= "); |
4b7f6baa | 1248 | OUTS (outf, statbits (cbit)); |
4b7f6baa CM |
1249 | } |
1250 | else if (op == 0 && D == 1) | |
1251 | { | |
4b7f6baa | 1252 | OUTS (outf, statbits (cbit)); |
086134ec | 1253 | OUTS (outf, " = CC"); |
4b7f6baa CM |
1254 | } |
1255 | else if (op == 1 && D == 1) | |
1256 | { | |
4b7f6baa | 1257 | OUTS (outf, statbits (cbit)); |
086134ec | 1258 | OUTS (outf, " |= CC"); |
4b7f6baa CM |
1259 | } |
1260 | else if (op == 2 && D == 1) | |
1261 | { | |
4b7f6baa | 1262 | OUTS (outf, statbits (cbit)); |
086134ec | 1263 | OUTS (outf, " &= CC"); |
4b7f6baa CM |
1264 | } |
1265 | else if (op == 3 && D == 1) | |
1266 | { | |
4b7f6baa | 1267 | OUTS (outf, statbits (cbit)); |
086134ec | 1268 | OUTS (outf, " ^= CC"); |
4b7f6baa CM |
1269 | } |
1270 | else | |
b7d48530 NC |
1271 | return 0; |
1272 | ||
1273 | return 2; | |
4b7f6baa CM |
1274 | } |
1275 | ||
1276 | static int | |
1277 | decode_BRCC_0 (TIword iw0, bfd_vma pc, disassemble_info *outf) | |
1278 | { | |
b7d48530 NC |
1279 | /* BRCC |
1280 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1281 | | 0 | 0 | 0 | 1 |.T.|.B.|.offset................................| | |
1282 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1283 | int B = ((iw0 >> BRCC_B_bits) & BRCC_B_mask); |
1284 | int T = ((iw0 >> BRCC_T_bits) & BRCC_T_mask); | |
1285 | int offset = ((iw0 >> BRCC_offset_bits) & BRCC_offset_mask); | |
1286 | ||
1287 | if (T == 1 && B == 1) | |
1288 | { | |
086134ec | 1289 | OUTS (outf, "IF CC JUMP 0x"); |
4b7f6baa | 1290 | OUTS (outf, pcrel10 (offset)); |
086134ec | 1291 | OUTS (outf, " (BP)"); |
4b7f6baa CM |
1292 | } |
1293 | else if (T == 0 && B == 1) | |
1294 | { | |
086134ec | 1295 | OUTS (outf, "IF !CC JUMP 0x"); |
4b7f6baa | 1296 | OUTS (outf, pcrel10 (offset)); |
086134ec | 1297 | OUTS (outf, " (BP)"); |
4b7f6baa CM |
1298 | } |
1299 | else if (T == 1) | |
1300 | { | |
086134ec | 1301 | OUTS (outf, "IF CC JUMP 0x"); |
4b7f6baa | 1302 | OUTS (outf, pcrel10 (offset)); |
4b7f6baa CM |
1303 | } |
1304 | else if (T == 0) | |
1305 | { | |
086134ec | 1306 | OUTS (outf, "IF !CC JUMP 0x"); |
4b7f6baa | 1307 | OUTS (outf, pcrel10 (offset)); |
4b7f6baa CM |
1308 | } |
1309 | else | |
b7d48530 NC |
1310 | return 0; |
1311 | ||
1312 | return 2; | |
4b7f6baa CM |
1313 | } |
1314 | ||
1315 | static int | |
1316 | decode_UJUMP_0 (TIword iw0, bfd_vma pc, disassemble_info *outf) | |
1317 | { | |
b7d48530 NC |
1318 | /* UJUMP |
1319 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1320 | | 0 | 0 | 1 | 0 |.offset........................................| | |
1321 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1322 | int offset = ((iw0 >> UJump_offset_bits) & UJump_offset_mask); |
1323 | ||
086134ec | 1324 | OUTS (outf, "JUMP.S 0x"); |
4b7f6baa | 1325 | OUTS (outf, pcrel12 (offset)); |
b7d48530 | 1326 | return 2; |
4b7f6baa CM |
1327 | } |
1328 | ||
1329 | static int | |
1330 | decode_REGMV_0 (TIword iw0, disassemble_info *outf) | |
1331 | { | |
b7d48530 NC |
1332 | /* REGMV |
1333 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1334 | | 0 | 0 | 1 | 1 |.gd........|.gs........|.dst.......|.src.......| | |
1335 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1336 | int gs = ((iw0 >> RegMv_gs_bits) & RegMv_gs_mask); |
1337 | int gd = ((iw0 >> RegMv_gd_bits) & RegMv_gd_mask); | |
1338 | int src = ((iw0 >> RegMv_src_bits) & RegMv_src_mask); | |
1339 | int dst = ((iw0 >> RegMv_dst_bits) & RegMv_dst_mask); | |
1340 | ||
c958a8a8 JZ |
1341 | if (!((IS_GENREG (gd, dst) && IS_GENREG (gs, src)) |
1342 | || (IS_GENREG (gd, dst) && IS_DAGREG (gs, src)) | |
1343 | || (IS_DAGREG (gd, dst) && IS_GENREG (gs, src)) | |
1344 | || (IS_DAGREG (gd, dst) && IS_DAGREG (gs, src)) | |
1345 | || (IS_GENREG (gd, dst) && gs == 7 && src == 0) | |
1346 | || (gd == 7 && dst == 0 && IS_GENREG (gs, src)) | |
1347 | || (IS_DREG (gd, dst) && IS_SYSREG (gs, src)) | |
1348 | || (IS_PREG (gd, dst) && IS_SYSREG (gs, src)) | |
1349 | || (IS_SYSREG (gd, dst) && IS_DREG (gs, src)) | |
1350 | || (IS_SYSREG (gd, dst) && IS_PREG (gs, src)) | |
1351 | || (IS_SYSREG (gd, dst) && gs == 7 && src == 0))) | |
1352 | return 0; | |
1353 | ||
4b7f6baa | 1354 | OUTS (outf, allregs (dst, gd)); |
086134ec | 1355 | OUTS (outf, " = "); |
4b7f6baa | 1356 | OUTS (outf, allregs (src, gs)); |
b7d48530 | 1357 | return 2; |
4b7f6baa CM |
1358 | } |
1359 | ||
1360 | static int | |
1361 | decode_ALU2op_0 (TIword iw0, disassemble_info *outf) | |
1362 | { | |
b7d48530 NC |
1363 | /* ALU2op |
1364 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1365 | | 0 | 1 | 0 | 0 | 0 | 0 |.opc...........|.src.......|.dst.......| | |
1366 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1367 | int src = ((iw0 >> ALU2op_src_bits) & ALU2op_src_mask); |
1368 | int opc = ((iw0 >> ALU2op_opc_bits) & ALU2op_opc_mask); | |
1369 | int dst = ((iw0 >> ALU2op_dst_bits) & ALU2op_dst_mask); | |
1370 | ||
1371 | if (opc == 0) | |
1372 | { | |
4b7f6baa | 1373 | OUTS (outf, dregs (dst)); |
086134ec | 1374 | OUTS (outf, " >>>= "); |
4b7f6baa | 1375 | OUTS (outf, dregs (src)); |
4b7f6baa CM |
1376 | } |
1377 | else if (opc == 1) | |
1378 | { | |
4b7f6baa | 1379 | OUTS (outf, dregs (dst)); |
086134ec | 1380 | OUTS (outf, " >>= "); |
4b7f6baa | 1381 | OUTS (outf, dregs (src)); |
4b7f6baa CM |
1382 | } |
1383 | else if (opc == 2) | |
1384 | { | |
4b7f6baa | 1385 | OUTS (outf, dregs (dst)); |
086134ec | 1386 | OUTS (outf, " <<= "); |
4b7f6baa | 1387 | OUTS (outf, dregs (src)); |
4b7f6baa CM |
1388 | } |
1389 | else if (opc == 3) | |
1390 | { | |
4b7f6baa | 1391 | OUTS (outf, dregs (dst)); |
086134ec | 1392 | OUTS (outf, " *= "); |
4b7f6baa | 1393 | OUTS (outf, dregs (src)); |
4b7f6baa CM |
1394 | } |
1395 | else if (opc == 4) | |
1396 | { | |
4b7f6baa | 1397 | OUTS (outf, dregs (dst)); |
086134ec | 1398 | OUTS (outf, " = ("); |
4b7f6baa | 1399 | OUTS (outf, dregs (dst)); |
086134ec | 1400 | OUTS (outf, " + "); |
4b7f6baa | 1401 | OUTS (outf, dregs (src)); |
086134ec | 1402 | OUTS (outf, ") << 0x1"); |
4b7f6baa CM |
1403 | } |
1404 | else if (opc == 5) | |
1405 | { | |
4b7f6baa | 1406 | OUTS (outf, dregs (dst)); |
086134ec | 1407 | OUTS (outf, " = ("); |
4b7f6baa | 1408 | OUTS (outf, dregs (dst)); |
086134ec | 1409 | OUTS (outf, " + "); |
4b7f6baa | 1410 | OUTS (outf, dregs (src)); |
086134ec | 1411 | OUTS (outf, ") << 0x2"); |
4b7f6baa CM |
1412 | } |
1413 | else if (opc == 8) | |
1414 | { | |
086134ec | 1415 | OUTS (outf, "DIVQ ("); |
4b7f6baa | 1416 | OUTS (outf, dregs (dst)); |
086134ec | 1417 | OUTS (outf, ", "); |
4b7f6baa CM |
1418 | OUTS (outf, dregs (src)); |
1419 | OUTS (outf, ")"); | |
4b7f6baa CM |
1420 | } |
1421 | else if (opc == 9) | |
1422 | { | |
086134ec | 1423 | OUTS (outf, "DIVS ("); |
4b7f6baa | 1424 | OUTS (outf, dregs (dst)); |
086134ec | 1425 | OUTS (outf, ", "); |
4b7f6baa CM |
1426 | OUTS (outf, dregs (src)); |
1427 | OUTS (outf, ")"); | |
4b7f6baa CM |
1428 | } |
1429 | else if (opc == 10) | |
1430 | { | |
4b7f6baa | 1431 | OUTS (outf, dregs (dst)); |
086134ec | 1432 | OUTS (outf, " = "); |
4b7f6baa | 1433 | OUTS (outf, dregs_lo (src)); |
086134ec | 1434 | OUTS (outf, " (X)"); |
4b7f6baa CM |
1435 | } |
1436 | else if (opc == 11) | |
1437 | { | |
4b7f6baa | 1438 | OUTS (outf, dregs (dst)); |
086134ec | 1439 | OUTS (outf, " = "); |
4b7f6baa | 1440 | OUTS (outf, dregs_lo (src)); |
086134ec | 1441 | OUTS (outf, " (Z)"); |
4b7f6baa CM |
1442 | } |
1443 | else if (opc == 12) | |
1444 | { | |
4b7f6baa | 1445 | OUTS (outf, dregs (dst)); |
086134ec | 1446 | OUTS (outf, " = "); |
4b7f6baa | 1447 | OUTS (outf, dregs_byte (src)); |
086134ec | 1448 | OUTS (outf, " (X)"); |
4b7f6baa CM |
1449 | } |
1450 | else if (opc == 13) | |
1451 | { | |
4b7f6baa | 1452 | OUTS (outf, dregs (dst)); |
086134ec | 1453 | OUTS (outf, " = "); |
4b7f6baa | 1454 | OUTS (outf, dregs_byte (src)); |
086134ec | 1455 | OUTS (outf, " (Z)"); |
4b7f6baa CM |
1456 | } |
1457 | else if (opc == 14) | |
1458 | { | |
4b7f6baa | 1459 | OUTS (outf, dregs (dst)); |
086134ec | 1460 | OUTS (outf, " = -"); |
4b7f6baa | 1461 | OUTS (outf, dregs (src)); |
4b7f6baa CM |
1462 | } |
1463 | else if (opc == 15) | |
1464 | { | |
4b7f6baa | 1465 | OUTS (outf, dregs (dst)); |
086134ec | 1466 | OUTS (outf, " =~ "); |
4b7f6baa | 1467 | OUTS (outf, dregs (src)); |
4b7f6baa CM |
1468 | } |
1469 | else | |
b7d48530 NC |
1470 | return 0; |
1471 | ||
1472 | return 2; | |
4b7f6baa CM |
1473 | } |
1474 | ||
1475 | static int | |
1476 | decode_PTR2op_0 (TIword iw0, disassemble_info *outf) | |
1477 | { | |
b7d48530 NC |
1478 | /* PTR2op |
1479 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1480 | | 0 | 1 | 0 | 0 | 0 | 1 | 0 |.opc.......|.src.......|.dst.......| | |
1481 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1482 | int src = ((iw0 >> PTR2op_src_bits) & PTR2op_dst_mask); |
1483 | int opc = ((iw0 >> PTR2op_opc_bits) & PTR2op_opc_mask); | |
1484 | int dst = ((iw0 >> PTR2op_dst_bits) & PTR2op_dst_mask); | |
1485 | ||
1486 | if (opc == 0) | |
1487 | { | |
4b7f6baa | 1488 | OUTS (outf, pregs (dst)); |
086134ec | 1489 | OUTS (outf, " -= "); |
4b7f6baa | 1490 | OUTS (outf, pregs (src)); |
4b7f6baa CM |
1491 | } |
1492 | else if (opc == 1) | |
1493 | { | |
4b7f6baa | 1494 | OUTS (outf, pregs (dst)); |
086134ec | 1495 | OUTS (outf, " = "); |
4b7f6baa | 1496 | OUTS (outf, pregs (src)); |
086134ec | 1497 | OUTS (outf, " << 0x2"); |
4b7f6baa CM |
1498 | } |
1499 | else if (opc == 3) | |
1500 | { | |
4b7f6baa | 1501 | OUTS (outf, pregs (dst)); |
086134ec | 1502 | OUTS (outf, " = "); |
4b7f6baa | 1503 | OUTS (outf, pregs (src)); |
086134ec | 1504 | OUTS (outf, " >> 0x2"); |
4b7f6baa CM |
1505 | } |
1506 | else if (opc == 4) | |
1507 | { | |
4b7f6baa | 1508 | OUTS (outf, pregs (dst)); |
086134ec | 1509 | OUTS (outf, " = "); |
4b7f6baa | 1510 | OUTS (outf, pregs (src)); |
086134ec | 1511 | OUTS (outf, " >> 0x1"); |
4b7f6baa CM |
1512 | } |
1513 | else if (opc == 5) | |
1514 | { | |
4b7f6baa | 1515 | OUTS (outf, pregs (dst)); |
086134ec | 1516 | OUTS (outf, " += "); |
4b7f6baa | 1517 | OUTS (outf, pregs (src)); |
086134ec | 1518 | OUTS (outf, " (BREV)"); |
4b7f6baa CM |
1519 | } |
1520 | else if (opc == 6) | |
1521 | { | |
4b7f6baa | 1522 | OUTS (outf, pregs (dst)); |
086134ec | 1523 | OUTS (outf, " = ("); |
4b7f6baa | 1524 | OUTS (outf, pregs (dst)); |
086134ec | 1525 | OUTS (outf, " + "); |
4b7f6baa | 1526 | OUTS (outf, pregs (src)); |
086134ec | 1527 | OUTS (outf, ") << 0x1"); |
4b7f6baa CM |
1528 | } |
1529 | else if (opc == 7) | |
1530 | { | |
4b7f6baa | 1531 | OUTS (outf, pregs (dst)); |
086134ec | 1532 | OUTS (outf, " = ("); |
4b7f6baa | 1533 | OUTS (outf, pregs (dst)); |
086134ec | 1534 | OUTS (outf, " + "); |
4b7f6baa | 1535 | OUTS (outf, pregs (src)); |
086134ec | 1536 | OUTS (outf, ") << 0x2"); |
4b7f6baa CM |
1537 | } |
1538 | else | |
b7d48530 NC |
1539 | return 0; |
1540 | ||
1541 | return 2; | |
4b7f6baa CM |
1542 | } |
1543 | ||
1544 | static int | |
1545 | decode_LOGI2op_0 (TIword iw0, disassemble_info *outf) | |
1546 | { | |
b7d48530 NC |
1547 | /* LOGI2op |
1548 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1549 | | 0 | 1 | 0 | 0 | 1 |.opc.......|.src...............|.dst.......| | |
1550 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1551 | int src = ((iw0 >> LOGI2op_src_bits) & LOGI2op_src_mask); |
1552 | int opc = ((iw0 >> LOGI2op_opc_bits) & LOGI2op_opc_mask); | |
1553 | int dst = ((iw0 >> LOGI2op_dst_bits) & LOGI2op_dst_mask); | |
1554 | ||
1555 | if (opc == 0) | |
1556 | { | |
086134ec | 1557 | OUTS (outf, "CC = !BITTST ("); |
4b7f6baa | 1558 | OUTS (outf, dregs (dst)); |
086134ec | 1559 | OUTS (outf, ", "); |
4b7f6baa | 1560 | OUTS (outf, uimm5 (src)); |
086134ec BS |
1561 | OUTS (outf, ");\t\t/* bit"); |
1562 | OUTS (outf, imm7d (src)); | |
1563 | OUTS (outf, " */"); | |
1564 | comment = 1; | |
4b7f6baa CM |
1565 | } |
1566 | else if (opc == 1) | |
1567 | { | |
4b7f6baa CM |
1568 | OUTS (outf, "CC = BITTST ("); |
1569 | OUTS (outf, dregs (dst)); | |
086134ec | 1570 | OUTS (outf, ", "); |
4b7f6baa | 1571 | OUTS (outf, uimm5 (src)); |
086134ec BS |
1572 | OUTS (outf, ");\t\t/* bit"); |
1573 | OUTS (outf, imm7d (src)); | |
1574 | OUTS (outf, " */"); | |
1575 | comment = 1; | |
4b7f6baa CM |
1576 | } |
1577 | else if (opc == 2) | |
1578 | { | |
4b7f6baa CM |
1579 | OUTS (outf, "BITSET ("); |
1580 | OUTS (outf, dregs (dst)); | |
086134ec | 1581 | OUTS (outf, ", "); |
4b7f6baa | 1582 | OUTS (outf, uimm5 (src)); |
086134ec BS |
1583 | OUTS (outf, ");\t\t/* bit"); |
1584 | OUTS (outf, imm7d (src)); | |
1585 | OUTS (outf, " */"); | |
1586 | comment = 1; | |
4b7f6baa CM |
1587 | } |
1588 | else if (opc == 3) | |
1589 | { | |
4b7f6baa CM |
1590 | OUTS (outf, "BITTGL ("); |
1591 | OUTS (outf, dregs (dst)); | |
086134ec | 1592 | OUTS (outf, ", "); |
4b7f6baa | 1593 | OUTS (outf, uimm5 (src)); |
086134ec BS |
1594 | OUTS (outf, ");\t\t/* bit"); |
1595 | OUTS (outf, imm7d (src)); | |
1596 | OUTS (outf, " */"); | |
1597 | comment = 1; | |
4b7f6baa CM |
1598 | } |
1599 | else if (opc == 4) | |
1600 | { | |
4b7f6baa CM |
1601 | OUTS (outf, "BITCLR ("); |
1602 | OUTS (outf, dregs (dst)); | |
086134ec | 1603 | OUTS (outf, ", "); |
4b7f6baa | 1604 | OUTS (outf, uimm5 (src)); |
086134ec BS |
1605 | OUTS (outf, ");\t\t/* bit"); |
1606 | OUTS (outf, imm7d (src)); | |
1607 | OUTS (outf, " */"); | |
1608 | comment = 1; | |
4b7f6baa CM |
1609 | } |
1610 | else if (opc == 5) | |
1611 | { | |
4b7f6baa | 1612 | OUTS (outf, dregs (dst)); |
086134ec | 1613 | OUTS (outf, " >>>= "); |
4b7f6baa | 1614 | OUTS (outf, uimm5 (src)); |
4b7f6baa CM |
1615 | } |
1616 | else if (opc == 6) | |
1617 | { | |
4b7f6baa | 1618 | OUTS (outf, dregs (dst)); |
086134ec | 1619 | OUTS (outf, " >>= "); |
4b7f6baa | 1620 | OUTS (outf, uimm5 (src)); |
4b7f6baa CM |
1621 | } |
1622 | else if (opc == 7) | |
1623 | { | |
4b7f6baa | 1624 | OUTS (outf, dregs (dst)); |
086134ec | 1625 | OUTS (outf, " <<= "); |
4b7f6baa | 1626 | OUTS (outf, uimm5 (src)); |
4b7f6baa CM |
1627 | } |
1628 | else | |
b7d48530 NC |
1629 | return 0; |
1630 | ||
1631 | return 2; | |
4b7f6baa CM |
1632 | } |
1633 | ||
1634 | static int | |
1635 | decode_COMP3op_0 (TIword iw0, disassemble_info *outf) | |
1636 | { | |
b7d48530 NC |
1637 | /* COMP3op |
1638 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1639 | | 0 | 1 | 0 | 1 |.opc.......|.dst.......|.src1......|.src0......| | |
1640 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1641 | int opc = ((iw0 >> COMP3op_opc_bits) & COMP3op_opc_mask); |
1642 | int dst = ((iw0 >> COMP3op_dst_bits) & COMP3op_dst_mask); | |
1643 | int src0 = ((iw0 >> COMP3op_src0_bits) & COMP3op_src0_mask); | |
1644 | int src1 = ((iw0 >> COMP3op_src1_bits) & COMP3op_src1_mask); | |
1645 | ||
1646 | if (opc == 5 && src1 == src0) | |
1647 | { | |
4b7f6baa | 1648 | OUTS (outf, pregs (dst)); |
086134ec | 1649 | OUTS (outf, " = "); |
4b7f6baa | 1650 | OUTS (outf, pregs (src0)); |
086134ec | 1651 | OUTS (outf, " << 0x1"); |
4b7f6baa CM |
1652 | } |
1653 | else if (opc == 1) | |
1654 | { | |
4b7f6baa | 1655 | OUTS (outf, dregs (dst)); |
086134ec | 1656 | OUTS (outf, " = "); |
4b7f6baa | 1657 | OUTS (outf, dregs (src0)); |
086134ec | 1658 | OUTS (outf, " - "); |
4b7f6baa | 1659 | OUTS (outf, dregs (src1)); |
4b7f6baa CM |
1660 | } |
1661 | else if (opc == 2) | |
1662 | { | |
4b7f6baa | 1663 | OUTS (outf, dregs (dst)); |
086134ec | 1664 | OUTS (outf, " = "); |
4b7f6baa | 1665 | OUTS (outf, dregs (src0)); |
086134ec | 1666 | OUTS (outf, " & "); |
4b7f6baa | 1667 | OUTS (outf, dregs (src1)); |
4b7f6baa CM |
1668 | } |
1669 | else if (opc == 3) | |
1670 | { | |
4b7f6baa | 1671 | OUTS (outf, dregs (dst)); |
086134ec | 1672 | OUTS (outf, " = "); |
4b7f6baa | 1673 | OUTS (outf, dregs (src0)); |
086134ec | 1674 | OUTS (outf, " | "); |
4b7f6baa | 1675 | OUTS (outf, dregs (src1)); |
4b7f6baa CM |
1676 | } |
1677 | else if (opc == 4) | |
1678 | { | |
4b7f6baa | 1679 | OUTS (outf, dregs (dst)); |
086134ec | 1680 | OUTS (outf, " = "); |
4b7f6baa | 1681 | OUTS (outf, dregs (src0)); |
086134ec | 1682 | OUTS (outf, " ^ "); |
4b7f6baa | 1683 | OUTS (outf, dregs (src1)); |
4b7f6baa CM |
1684 | } |
1685 | else if (opc == 5) | |
1686 | { | |
4b7f6baa | 1687 | OUTS (outf, pregs (dst)); |
086134ec | 1688 | OUTS (outf, " = "); |
4b7f6baa | 1689 | OUTS (outf, pregs (src0)); |
086134ec | 1690 | OUTS (outf, " + "); |
4b7f6baa | 1691 | OUTS (outf, pregs (src1)); |
4b7f6baa CM |
1692 | } |
1693 | else if (opc == 6) | |
1694 | { | |
4b7f6baa | 1695 | OUTS (outf, pregs (dst)); |
086134ec | 1696 | OUTS (outf, " = "); |
4b7f6baa | 1697 | OUTS (outf, pregs (src0)); |
086134ec | 1698 | OUTS (outf, " + ("); |
4b7f6baa | 1699 | OUTS (outf, pregs (src1)); |
086134ec | 1700 | OUTS (outf, " << 0x1)"); |
4b7f6baa CM |
1701 | } |
1702 | else if (opc == 7) | |
1703 | { | |
4b7f6baa | 1704 | OUTS (outf, pregs (dst)); |
086134ec | 1705 | OUTS (outf, " = "); |
4b7f6baa | 1706 | OUTS (outf, pregs (src0)); |
086134ec | 1707 | OUTS (outf, " + ("); |
4b7f6baa | 1708 | OUTS (outf, pregs (src1)); |
086134ec | 1709 | OUTS (outf, " << 0x2)"); |
4b7f6baa CM |
1710 | } |
1711 | else if (opc == 0) | |
1712 | { | |
4b7f6baa | 1713 | OUTS (outf, dregs (dst)); |
086134ec | 1714 | OUTS (outf, " = "); |
4b7f6baa | 1715 | OUTS (outf, dregs (src0)); |
086134ec | 1716 | OUTS (outf, " + "); |
4b7f6baa | 1717 | OUTS (outf, dregs (src1)); |
4b7f6baa CM |
1718 | } |
1719 | else | |
b7d48530 NC |
1720 | return 0; |
1721 | ||
1722 | return 2; | |
4b7f6baa CM |
1723 | } |
1724 | ||
1725 | static int | |
1726 | decode_COMPI2opD_0 (TIword iw0, disassemble_info *outf) | |
1727 | { | |
b7d48530 NC |
1728 | /* COMPI2opD |
1729 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1730 | | 0 | 1 | 1 | 0 | 0 |.op|..src......................|.dst.......| | |
1731 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1732 | int op = ((iw0 >> COMPI2opD_op_bits) & COMPI2opD_op_mask); |
1733 | int dst = ((iw0 >> COMPI2opD_dst_bits) & COMPI2opD_dst_mask); | |
1734 | int src = ((iw0 >> COMPI2opD_src_bits) & COMPI2opD_src_mask); | |
1735 | ||
086134ec BS |
1736 | bu32 *pval = get_allreg (0, dst); |
1737 | ||
1738 | /* Since we don't have 32-bit immediate loads, we allow the disassembler | |
1739 | to combine them, so it prints out the right values. | |
1740 | Here we keep track of the registers. */ | |
1741 | if (op == 0) | |
1742 | { | |
1743 | *pval = imm7_val (src); | |
1744 | if (src & 0x40) | |
1745 | *pval |= 0xFFFFFF80; | |
1746 | else | |
1747 | *pval &= 0x7F; | |
1748 | } | |
1749 | ||
4b7f6baa CM |
1750 | if (op == 0) |
1751 | { | |
4b7f6baa | 1752 | OUTS (outf, dregs (dst)); |
086134ec | 1753 | OUTS (outf, " = "); |
4b7f6baa | 1754 | OUTS (outf, imm7 (src)); |
086134ec BS |
1755 | OUTS (outf, " (X);\t\t/*\t\t"); |
1756 | OUTS (outf, dregs (dst)); | |
1757 | OUTS (outf, "="); | |
1758 | OUTS (outf, uimm32 (*pval)); | |
1759 | OUTS (outf, "("); | |
1760 | OUTS (outf, imm32 (*pval)); | |
1761 | OUTS (outf, ") */"); | |
1762 | comment = 1; | |
4b7f6baa CM |
1763 | } |
1764 | else if (op == 1) | |
1765 | { | |
4b7f6baa | 1766 | OUTS (outf, dregs (dst)); |
086134ec | 1767 | OUTS (outf, " += "); |
4b7f6baa | 1768 | OUTS (outf, imm7 (src)); |
086134ec BS |
1769 | OUTS (outf, ";\t\t/* ("); |
1770 | OUTS (outf, imm7d (src)); | |
1771 | OUTS (outf, ") */"); | |
1772 | comment = 1; | |
4b7f6baa CM |
1773 | } |
1774 | else | |
b7d48530 NC |
1775 | return 0; |
1776 | ||
1777 | return 2; | |
4b7f6baa CM |
1778 | } |
1779 | ||
1780 | static int | |
1781 | decode_COMPI2opP_0 (TIword iw0, disassemble_info *outf) | |
1782 | { | |
b7d48530 NC |
1783 | /* COMPI2opP |
1784 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1785 | | 0 | 1 | 1 | 0 | 1 |.op|.src.......................|.dst.......| | |
1786 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1787 | int op = ((iw0 >> COMPI2opP_op_bits) & COMPI2opP_op_mask); |
1788 | int src = ((iw0 >> COMPI2opP_src_bits) & COMPI2opP_src_mask); | |
1789 | int dst = ((iw0 >> COMPI2opP_dst_bits) & COMPI2opP_dst_mask); | |
1790 | ||
086134ec BS |
1791 | bu32 *pval = get_allreg (1, dst); |
1792 | ||
1793 | if (op == 0) | |
1794 | { | |
1795 | *pval = imm7_val (src); | |
1796 | if (src & 0x40) | |
1797 | *pval |= 0xFFFFFF80; | |
1798 | else | |
1799 | *pval &= 0x7F; | |
1800 | } | |
1801 | ||
4b7f6baa CM |
1802 | if (op == 0) |
1803 | { | |
4b7f6baa | 1804 | OUTS (outf, pregs (dst)); |
086134ec | 1805 | OUTS (outf, " = "); |
4b7f6baa | 1806 | OUTS (outf, imm7 (src)); |
086134ec BS |
1807 | OUTS (outf, " (X);\t\t/*\t\t"); |
1808 | OUTS (outf, pregs (dst)); | |
1809 | OUTS (outf, "="); | |
1810 | OUTS (outf, uimm32 (*pval)); | |
1811 | OUTS (outf, "("); | |
1812 | OUTS (outf, imm32 (*pval)); | |
1813 | OUTS (outf, ") */"); | |
1814 | comment = 1; | |
4b7f6baa CM |
1815 | } |
1816 | else if (op == 1) | |
1817 | { | |
4b7f6baa | 1818 | OUTS (outf, pregs (dst)); |
086134ec | 1819 | OUTS (outf, " += "); |
4b7f6baa | 1820 | OUTS (outf, imm7 (src)); |
086134ec BS |
1821 | OUTS (outf, ";\t\t/* ("); |
1822 | OUTS (outf, imm7d (src)); | |
1823 | OUTS (outf, ") */"); | |
1824 | comment = 1; | |
4b7f6baa CM |
1825 | } |
1826 | else | |
b7d48530 NC |
1827 | return 0; |
1828 | ||
1829 | return 2; | |
4b7f6baa CM |
1830 | } |
1831 | ||
1832 | static int | |
1833 | decode_LDSTpmod_0 (TIword iw0, disassemble_info *outf) | |
1834 | { | |
b7d48530 NC |
1835 | /* LDSTpmod |
1836 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1837 | | 1 | 0 | 0 | 0 |.W.|.aop...|.reg.......|.idx.......|.ptr.......| | |
1838 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1839 | int W = ((iw0 >> LDSTpmod_W_bits) & LDSTpmod_W_mask); |
1840 | int aop = ((iw0 >> LDSTpmod_aop_bits) & LDSTpmod_aop_mask); | |
1841 | int idx = ((iw0 >> LDSTpmod_idx_bits) & LDSTpmod_idx_mask); | |
1842 | int ptr = ((iw0 >> LDSTpmod_ptr_bits) & LDSTpmod_ptr_mask); | |
1843 | int reg = ((iw0 >> LDSTpmod_reg_bits) & LDSTpmod_reg_mask); | |
1844 | ||
1845 | if (aop == 1 && W == 0 && idx == ptr) | |
1846 | { | |
4b7f6baa | 1847 | OUTS (outf, dregs_lo (reg)); |
086134ec | 1848 | OUTS (outf, " = W["); |
4b7f6baa CM |
1849 | OUTS (outf, pregs (ptr)); |
1850 | OUTS (outf, "]"); | |
4b7f6baa CM |
1851 | } |
1852 | else if (aop == 2 && W == 0 && idx == ptr) | |
1853 | { | |
4b7f6baa | 1854 | OUTS (outf, dregs_hi (reg)); |
086134ec | 1855 | OUTS (outf, " = W["); |
4b7f6baa CM |
1856 | OUTS (outf, pregs (ptr)); |
1857 | OUTS (outf, "]"); | |
4b7f6baa CM |
1858 | } |
1859 | else if (aop == 1 && W == 1 && idx == ptr) | |
1860 | { | |
4b7f6baa CM |
1861 | OUTS (outf, "W["); |
1862 | OUTS (outf, pregs (ptr)); | |
086134ec | 1863 | OUTS (outf, "] = "); |
4b7f6baa | 1864 | OUTS (outf, dregs_lo (reg)); |
4b7f6baa CM |
1865 | } |
1866 | else if (aop == 2 && W == 1 && idx == ptr) | |
1867 | { | |
4b7f6baa CM |
1868 | OUTS (outf, "W["); |
1869 | OUTS (outf, pregs (ptr)); | |
086134ec | 1870 | OUTS (outf, "] = "); |
4b7f6baa | 1871 | OUTS (outf, dregs_hi (reg)); |
4b7f6baa CM |
1872 | } |
1873 | else if (aop == 0 && W == 0) | |
1874 | { | |
4b7f6baa | 1875 | OUTS (outf, dregs (reg)); |
086134ec | 1876 | OUTS (outf, " = ["); |
4b7f6baa | 1877 | OUTS (outf, pregs (ptr)); |
086134ec | 1878 | OUTS (outf, " ++ "); |
4b7f6baa CM |
1879 | OUTS (outf, pregs (idx)); |
1880 | OUTS (outf, "]"); | |
4b7f6baa CM |
1881 | } |
1882 | else if (aop == 1 && W == 0) | |
1883 | { | |
4b7f6baa | 1884 | OUTS (outf, dregs_lo (reg)); |
086134ec | 1885 | OUTS (outf, " = W["); |
4b7f6baa | 1886 | OUTS (outf, pregs (ptr)); |
086134ec | 1887 | OUTS (outf, " ++ "); |
4b7f6baa CM |
1888 | OUTS (outf, pregs (idx)); |
1889 | OUTS (outf, "]"); | |
4b7f6baa CM |
1890 | } |
1891 | else if (aop == 2 && W == 0) | |
1892 | { | |
4b7f6baa | 1893 | OUTS (outf, dregs_hi (reg)); |
086134ec | 1894 | OUTS (outf, " = W["); |
4b7f6baa | 1895 | OUTS (outf, pregs (ptr)); |
086134ec | 1896 | OUTS (outf, " ++ "); |
4b7f6baa CM |
1897 | OUTS (outf, pregs (idx)); |
1898 | OUTS (outf, "]"); | |
4b7f6baa CM |
1899 | } |
1900 | else if (aop == 3 && W == 0) | |
1901 | { | |
4b7f6baa | 1902 | OUTS (outf, dregs (reg)); |
086134ec | 1903 | OUTS (outf, " = W["); |
4b7f6baa | 1904 | OUTS (outf, pregs (ptr)); |
086134ec | 1905 | OUTS (outf, " ++ "); |
4b7f6baa CM |
1906 | OUTS (outf, pregs (idx)); |
1907 | OUTS (outf, "] (Z)"); | |
4b7f6baa CM |
1908 | } |
1909 | else if (aop == 3 && W == 1) | |
1910 | { | |
4b7f6baa | 1911 | OUTS (outf, dregs (reg)); |
086134ec | 1912 | OUTS (outf, " = W["); |
4b7f6baa | 1913 | OUTS (outf, pregs (ptr)); |
086134ec | 1914 | OUTS (outf, " ++ "); |
4b7f6baa | 1915 | OUTS (outf, pregs (idx)); |
086134ec | 1916 | OUTS (outf, "] (X)"); |
4b7f6baa CM |
1917 | } |
1918 | else if (aop == 0 && W == 1) | |
1919 | { | |
4b7f6baa CM |
1920 | OUTS (outf, "["); |
1921 | OUTS (outf, pregs (ptr)); | |
086134ec | 1922 | OUTS (outf, " ++ "); |
4b7f6baa | 1923 | OUTS (outf, pregs (idx)); |
086134ec | 1924 | OUTS (outf, "] = "); |
4b7f6baa | 1925 | OUTS (outf, dregs (reg)); |
4b7f6baa CM |
1926 | } |
1927 | else if (aop == 1 && W == 1) | |
1928 | { | |
4b7f6baa CM |
1929 | OUTS (outf, "W["); |
1930 | OUTS (outf, pregs (ptr)); | |
086134ec | 1931 | OUTS (outf, " ++ "); |
4b7f6baa | 1932 | OUTS (outf, pregs (idx)); |
086134ec | 1933 | OUTS (outf, "] = "); |
4b7f6baa | 1934 | OUTS (outf, dregs_lo (reg)); |
4b7f6baa CM |
1935 | } |
1936 | else if (aop == 2 && W == 1) | |
1937 | { | |
4b7f6baa CM |
1938 | OUTS (outf, "W["); |
1939 | OUTS (outf, pregs (ptr)); | |
086134ec | 1940 | OUTS (outf, " ++ "); |
4b7f6baa | 1941 | OUTS (outf, pregs (idx)); |
086134ec | 1942 | OUTS (outf, "] = "); |
4b7f6baa | 1943 | OUTS (outf, dregs_hi (reg)); |
4b7f6baa CM |
1944 | } |
1945 | else | |
b7d48530 NC |
1946 | return 0; |
1947 | ||
1948 | return 2; | |
4b7f6baa CM |
1949 | } |
1950 | ||
1951 | static int | |
1952 | decode_dagMODim_0 (TIword iw0, disassemble_info *outf) | |
1953 | { | |
b7d48530 NC |
1954 | /* dagMODim |
1955 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1956 | | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 |.br| 1 | 1 |.op|.m.....|.i.....| | |
1957 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1958 | int i = ((iw0 >> DagMODim_i_bits) & DagMODim_i_mask); |
1959 | int m = ((iw0 >> DagMODim_m_bits) & DagMODim_m_mask); | |
1960 | int br = ((iw0 >> DagMODim_br_bits) & DagMODim_br_mask); | |
1961 | int op = ((iw0 >> DagMODim_op_bits) & DagMODim_op_mask); | |
1962 | ||
1963 | if (op == 0 && br == 1) | |
1964 | { | |
4b7f6baa | 1965 | OUTS (outf, iregs (i)); |
086134ec | 1966 | OUTS (outf, " += "); |
4b7f6baa | 1967 | OUTS (outf, mregs (m)); |
086134ec | 1968 | OUTS (outf, " (BREV)"); |
4b7f6baa CM |
1969 | } |
1970 | else if (op == 0) | |
1971 | { | |
4b7f6baa | 1972 | OUTS (outf, iregs (i)); |
086134ec | 1973 | OUTS (outf, " += "); |
4b7f6baa | 1974 | OUTS (outf, mregs (m)); |
4b7f6baa CM |
1975 | } |
1976 | else if (op == 1) | |
1977 | { | |
4b7f6baa | 1978 | OUTS (outf, iregs (i)); |
086134ec | 1979 | OUTS (outf, " -= "); |
4b7f6baa | 1980 | OUTS (outf, mregs (m)); |
4b7f6baa CM |
1981 | } |
1982 | else | |
b7d48530 NC |
1983 | return 0; |
1984 | ||
1985 | return 2; | |
4b7f6baa CM |
1986 | } |
1987 | ||
1988 | static int | |
1989 | decode_dagMODik_0 (TIword iw0, disassemble_info *outf) | |
1990 | { | |
b7d48530 NC |
1991 | /* dagMODik |
1992 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1993 | | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 |.op....|.i.....| | |
1994 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1995 | int i = ((iw0 >> DagMODik_i_bits) & DagMODik_i_mask); |
1996 | int op = ((iw0 >> DagMODik_op_bits) & DagMODik_op_mask); | |
1997 | ||
1998 | if (op == 0) | |
1999 | { | |
4b7f6baa | 2000 | OUTS (outf, iregs (i)); |
086134ec | 2001 | OUTS (outf, " += 0x2"); |
4b7f6baa CM |
2002 | } |
2003 | else if (op == 1) | |
2004 | { | |
4b7f6baa | 2005 | OUTS (outf, iregs (i)); |
086134ec | 2006 | OUTS (outf, " -= 0x2"); |
4b7f6baa CM |
2007 | } |
2008 | else if (op == 2) | |
2009 | { | |
4b7f6baa | 2010 | OUTS (outf, iregs (i)); |
086134ec | 2011 | OUTS (outf, " += 0x4"); |
4b7f6baa CM |
2012 | } |
2013 | else if (op == 3) | |
2014 | { | |
4b7f6baa | 2015 | OUTS (outf, iregs (i)); |
086134ec | 2016 | OUTS (outf, " -= 0x4"); |
4b7f6baa CM |
2017 | } |
2018 | else | |
b7d48530 NC |
2019 | return 0; |
2020 | ||
086134ec BS |
2021 | if (! parallel ) |
2022 | { | |
2023 | OUTS (outf, ";\t\t/* ( "); | |
2024 | if (op == 0 || op == 1) | |
2025 | OUTS (outf, "2"); | |
2026 | else if (op == 2 || op == 3) | |
2027 | OUTS (outf, "4"); | |
2028 | OUTS (outf, ") */"); | |
2029 | comment = 1; | |
2030 | } | |
2031 | ||
b7d48530 | 2032 | return 2; |
4b7f6baa CM |
2033 | } |
2034 | ||
2035 | static int | |
2036 | decode_dspLDST_0 (TIword iw0, disassemble_info *outf) | |
2037 | { | |
b7d48530 NC |
2038 | /* dspLDST |
2039 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2040 | | 1 | 0 | 0 | 1 | 1 | 1 |.W.|.aop...|.m.....|.i.....|.reg.......| | |
2041 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
2042 | int i = ((iw0 >> DspLDST_i_bits) & DspLDST_i_mask); |
2043 | int m = ((iw0 >> DspLDST_m_bits) & DspLDST_m_mask); | |
2044 | int W = ((iw0 >> DspLDST_W_bits) & DspLDST_W_mask); | |
2045 | int aop = ((iw0 >> DspLDST_aop_bits) & DspLDST_aop_mask); | |
2046 | int reg = ((iw0 >> DspLDST_reg_bits) & DspLDST_reg_mask); | |
2047 | ||
2048 | if (aop == 0 && W == 0 && m == 0) | |
2049 | { | |
4b7f6baa | 2050 | OUTS (outf, dregs (reg)); |
086134ec | 2051 | OUTS (outf, " = ["); |
4b7f6baa CM |
2052 | OUTS (outf, iregs (i)); |
2053 | OUTS (outf, "++]"); | |
4b7f6baa CM |
2054 | } |
2055 | else if (aop == 0 && W == 0 && m == 1) | |
2056 | { | |
4b7f6baa | 2057 | OUTS (outf, dregs_lo (reg)); |
086134ec | 2058 | OUTS (outf, " = W["); |
4b7f6baa CM |
2059 | OUTS (outf, iregs (i)); |
2060 | OUTS (outf, "++]"); | |
4b7f6baa CM |
2061 | } |
2062 | else if (aop == 0 && W == 0 && m == 2) | |
2063 | { | |
4b7f6baa | 2064 | OUTS (outf, dregs_hi (reg)); |
086134ec | 2065 | OUTS (outf, " = W["); |
4b7f6baa CM |
2066 | OUTS (outf, iregs (i)); |
2067 | OUTS (outf, "++]"); | |
4b7f6baa CM |
2068 | } |
2069 | else if (aop == 1 && W == 0 && m == 0) | |
2070 | { | |
4b7f6baa | 2071 | OUTS (outf, dregs (reg)); |
086134ec | 2072 | OUTS (outf, " = ["); |
4b7f6baa CM |
2073 | OUTS (outf, iregs (i)); |
2074 | OUTS (outf, "--]"); | |
4b7f6baa CM |
2075 | } |
2076 | else if (aop == 1 && W == 0 && m == 1) | |
2077 | { | |
4b7f6baa | 2078 | OUTS (outf, dregs_lo (reg)); |
086134ec | 2079 | OUTS (outf, " = W["); |
4b7f6baa CM |
2080 | OUTS (outf, iregs (i)); |
2081 | OUTS (outf, "--]"); | |
4b7f6baa CM |
2082 | } |
2083 | else if (aop == 1 && W == 0 && m == 2) | |
2084 | { | |
4b7f6baa | 2085 | OUTS (outf, dregs_hi (reg)); |
086134ec | 2086 | OUTS (outf, " = W["); |
4b7f6baa CM |
2087 | OUTS (outf, iregs (i)); |
2088 | OUTS (outf, "--]"); | |
4b7f6baa CM |
2089 | } |
2090 | else if (aop == 2 && W == 0 && m == 0) | |
2091 | { | |
4b7f6baa | 2092 | OUTS (outf, dregs (reg)); |
086134ec | 2093 | OUTS (outf, " = ["); |
4b7f6baa CM |
2094 | OUTS (outf, iregs (i)); |
2095 | OUTS (outf, "]"); | |
4b7f6baa CM |
2096 | } |
2097 | else if (aop == 2 && W == 0 && m == 1) | |
2098 | { | |
4b7f6baa | 2099 | OUTS (outf, dregs_lo (reg)); |
086134ec | 2100 | OUTS (outf, " = W["); |
4b7f6baa CM |
2101 | OUTS (outf, iregs (i)); |
2102 | OUTS (outf, "]"); | |
4b7f6baa CM |
2103 | } |
2104 | else if (aop == 2 && W == 0 && m == 2) | |
2105 | { | |
4b7f6baa | 2106 | OUTS (outf, dregs_hi (reg)); |
086134ec | 2107 | OUTS (outf, " = W["); |
4b7f6baa CM |
2108 | OUTS (outf, iregs (i)); |
2109 | OUTS (outf, "]"); | |
4b7f6baa CM |
2110 | } |
2111 | else if (aop == 0 && W == 1 && m == 0) | |
2112 | { | |
4b7f6baa CM |
2113 | OUTS (outf, "["); |
2114 | OUTS (outf, iregs (i)); | |
086134ec | 2115 | OUTS (outf, "++] = "); |
4b7f6baa | 2116 | OUTS (outf, dregs (reg)); |
4b7f6baa CM |
2117 | } |
2118 | else if (aop == 0 && W == 1 && m == 1) | |
2119 | { | |
4b7f6baa CM |
2120 | OUTS (outf, "W["); |
2121 | OUTS (outf, iregs (i)); | |
086134ec | 2122 | OUTS (outf, "++] = "); |
4b7f6baa | 2123 | OUTS (outf, dregs_lo (reg)); |
4b7f6baa CM |
2124 | } |
2125 | else if (aop == 0 && W == 1 && m == 2) | |
2126 | { | |
4b7f6baa CM |
2127 | OUTS (outf, "W["); |
2128 | OUTS (outf, iregs (i)); | |
086134ec | 2129 | OUTS (outf, "++] = "); |
4b7f6baa | 2130 | OUTS (outf, dregs_hi (reg)); |
4b7f6baa CM |
2131 | } |
2132 | else if (aop == 1 && W == 1 && m == 0) | |
2133 | { | |
4b7f6baa CM |
2134 | OUTS (outf, "["); |
2135 | OUTS (outf, iregs (i)); | |
086134ec | 2136 | OUTS (outf, "--] = "); |
4b7f6baa | 2137 | OUTS (outf, dregs (reg)); |
4b7f6baa CM |
2138 | } |
2139 | else if (aop == 1 && W == 1 && m == 1) | |
2140 | { | |
4b7f6baa CM |
2141 | OUTS (outf, "W["); |
2142 | OUTS (outf, iregs (i)); | |
086134ec | 2143 | OUTS (outf, "--] = "); |
4b7f6baa | 2144 | OUTS (outf, dregs_lo (reg)); |
4b7f6baa CM |
2145 | } |
2146 | else if (aop == 1 && W == 1 && m == 2) | |
2147 | { | |
4b7f6baa CM |
2148 | OUTS (outf, "W["); |
2149 | OUTS (outf, iregs (i)); | |
086134ec | 2150 | OUTS (outf, "--] = "); |
4b7f6baa | 2151 | OUTS (outf, dregs_hi (reg)); |
4b7f6baa CM |
2152 | } |
2153 | else if (aop == 2 && W == 1 && m == 0) | |
2154 | { | |
4b7f6baa CM |
2155 | OUTS (outf, "["); |
2156 | OUTS (outf, iregs (i)); | |
086134ec | 2157 | OUTS (outf, "] = "); |
4b7f6baa | 2158 | OUTS (outf, dregs (reg)); |
4b7f6baa CM |
2159 | } |
2160 | else if (aop == 2 && W == 1 && m == 1) | |
2161 | { | |
4b7f6baa CM |
2162 | OUTS (outf, "W["); |
2163 | OUTS (outf, iregs (i)); | |
086134ec | 2164 | OUTS (outf, "] = "); |
4b7f6baa | 2165 | OUTS (outf, dregs_lo (reg)); |
4b7f6baa CM |
2166 | } |
2167 | else if (aop == 2 && W == 1 && m == 2) | |
2168 | { | |
4b7f6baa CM |
2169 | OUTS (outf, "W["); |
2170 | OUTS (outf, iregs (i)); | |
086134ec | 2171 | OUTS (outf, "] = "); |
4b7f6baa | 2172 | OUTS (outf, dregs_hi (reg)); |
4b7f6baa CM |
2173 | } |
2174 | else if (aop == 3 && W == 0) | |
2175 | { | |
4b7f6baa | 2176 | OUTS (outf, dregs (reg)); |
086134ec | 2177 | OUTS (outf, " = ["); |
4b7f6baa | 2178 | OUTS (outf, iregs (i)); |
086134ec | 2179 | OUTS (outf, " ++ "); |
4b7f6baa CM |
2180 | OUTS (outf, mregs (m)); |
2181 | OUTS (outf, "]"); | |
4b7f6baa CM |
2182 | } |
2183 | else if (aop == 3 && W == 1) | |
2184 | { | |
4b7f6baa CM |
2185 | OUTS (outf, "["); |
2186 | OUTS (outf, iregs (i)); | |
086134ec | 2187 | OUTS (outf, " ++ "); |
4b7f6baa | 2188 | OUTS (outf, mregs (m)); |
086134ec | 2189 | OUTS (outf, "] = "); |
4b7f6baa | 2190 | OUTS (outf, dregs (reg)); |
4b7f6baa CM |
2191 | } |
2192 | else | |
b7d48530 NC |
2193 | return 0; |
2194 | ||
2195 | return 2; | |
4b7f6baa CM |
2196 | } |
2197 | ||
2198 | static int | |
2199 | decode_LDST_0 (TIword iw0, disassemble_info *outf) | |
2200 | { | |
b7d48530 NC |
2201 | /* LDST |
2202 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2203 | | 1 | 0 | 0 | 1 |.sz....|.W.|.aop...|.Z.|.ptr.......|.reg.......| | |
2204 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
2205 | int Z = ((iw0 >> LDST_Z_bits) & LDST_Z_mask); |
2206 | int W = ((iw0 >> LDST_W_bits) & LDST_W_mask); | |
2207 | int sz = ((iw0 >> LDST_sz_bits) & LDST_sz_mask); | |
2208 | int aop = ((iw0 >> LDST_aop_bits) & LDST_aop_mask); | |
2209 | int reg = ((iw0 >> LDST_reg_bits) & LDST_reg_mask); | |
2210 | int ptr = ((iw0 >> LDST_ptr_bits) & LDST_ptr_mask); | |
2211 | ||
2212 | if (aop == 0 && sz == 0 && Z == 0 && W == 0) | |
2213 | { | |
4b7f6baa | 2214 | OUTS (outf, dregs (reg)); |
086134ec | 2215 | OUTS (outf, " = ["); |
4b7f6baa CM |
2216 | OUTS (outf, pregs (ptr)); |
2217 | OUTS (outf, "++]"); | |
4b7f6baa CM |
2218 | } |
2219 | else if (aop == 0 && sz == 0 && Z == 1 && W == 0) | |
2220 | { | |
4b7f6baa | 2221 | OUTS (outf, pregs (reg)); |
086134ec | 2222 | OUTS (outf, " = ["); |
4b7f6baa CM |
2223 | OUTS (outf, pregs (ptr)); |
2224 | OUTS (outf, "++]"); | |
4b7f6baa CM |
2225 | } |
2226 | else if (aop == 0 && sz == 1 && Z == 0 && W == 0) | |
2227 | { | |
4b7f6baa | 2228 | OUTS (outf, dregs (reg)); |
086134ec | 2229 | OUTS (outf, " = W["); |
4b7f6baa CM |
2230 | OUTS (outf, pregs (ptr)); |
2231 | OUTS (outf, "++] (Z)"); | |
4b7f6baa CM |
2232 | } |
2233 | else if (aop == 0 && sz == 1 && Z == 1 && W == 0) | |
2234 | { | |
4b7f6baa | 2235 | OUTS (outf, dregs (reg)); |
086134ec | 2236 | OUTS (outf, " = W["); |
4b7f6baa | 2237 | OUTS (outf, pregs (ptr)); |
086134ec | 2238 | OUTS (outf, "++] (X)"); |
4b7f6baa CM |
2239 | } |
2240 | else if (aop == 0 && sz == 2 && Z == 0 && W == 0) | |
2241 | { | |
4b7f6baa | 2242 | OUTS (outf, dregs (reg)); |
086134ec | 2243 | OUTS (outf, " = B["); |
4b7f6baa CM |
2244 | OUTS (outf, pregs (ptr)); |
2245 | OUTS (outf, "++] (Z)"); | |
4b7f6baa CM |
2246 | } |
2247 | else if (aop == 0 && sz == 2 && Z == 1 && W == 0) | |
2248 | { | |
4b7f6baa | 2249 | OUTS (outf, dregs (reg)); |
086134ec | 2250 | OUTS (outf, " = B["); |
4b7f6baa | 2251 | OUTS (outf, pregs (ptr)); |
086134ec | 2252 | OUTS (outf, "++] (X)"); |
4b7f6baa CM |
2253 | } |
2254 | else if (aop == 1 && sz == 0 && Z == 0 && W == 0) | |
2255 | { | |
4b7f6baa | 2256 | OUTS (outf, dregs (reg)); |
086134ec | 2257 | OUTS (outf, " = ["); |
4b7f6baa CM |
2258 | OUTS (outf, pregs (ptr)); |
2259 | OUTS (outf, "--]"); | |
4b7f6baa CM |
2260 | } |
2261 | else if (aop == 1 && sz == 0 && Z == 1 && W == 0) | |
2262 | { | |
4b7f6baa | 2263 | OUTS (outf, pregs (reg)); |
086134ec | 2264 | OUTS (outf, " = ["); |
4b7f6baa CM |
2265 | OUTS (outf, pregs (ptr)); |
2266 | OUTS (outf, "--]"); | |
4b7f6baa CM |
2267 | } |
2268 | else if (aop == 1 && sz == 1 && Z == 0 && W == 0) | |
2269 | { | |
4b7f6baa | 2270 | OUTS (outf, dregs (reg)); |
086134ec | 2271 | OUTS (outf, " = W["); |
4b7f6baa CM |
2272 | OUTS (outf, pregs (ptr)); |
2273 | OUTS (outf, "--] (Z)"); | |
4b7f6baa CM |
2274 | } |
2275 | else if (aop == 1 && sz == 1 && Z == 1 && W == 0) | |
2276 | { | |
4b7f6baa | 2277 | OUTS (outf, dregs (reg)); |
086134ec | 2278 | OUTS (outf, " = W["); |
4b7f6baa | 2279 | OUTS (outf, pregs (ptr)); |
086134ec | 2280 | OUTS (outf, "--] (X)"); |
4b7f6baa CM |
2281 | } |
2282 | else if (aop == 1 && sz == 2 && Z == 0 && W == 0) | |
2283 | { | |
4b7f6baa | 2284 | OUTS (outf, dregs (reg)); |
086134ec | 2285 | OUTS (outf, " = B["); |
4b7f6baa CM |
2286 | OUTS (outf, pregs (ptr)); |
2287 | OUTS (outf, "--] (Z)"); | |
4b7f6baa CM |
2288 | } |
2289 | else if (aop == 1 && sz == 2 && Z == 1 && W == 0) | |
2290 | { | |
4b7f6baa | 2291 | OUTS (outf, dregs (reg)); |
086134ec | 2292 | OUTS (outf, " = B["); |
4b7f6baa | 2293 | OUTS (outf, pregs (ptr)); |
086134ec | 2294 | OUTS (outf, "--] (X)"); |
4b7f6baa CM |
2295 | } |
2296 | else if (aop == 2 && sz == 0 && Z == 0 && W == 0) | |
2297 | { | |
4b7f6baa | 2298 | OUTS (outf, dregs (reg)); |
086134ec | 2299 | OUTS (outf, " = ["); |
4b7f6baa CM |
2300 | OUTS (outf, pregs (ptr)); |
2301 | OUTS (outf, "]"); | |
4b7f6baa CM |
2302 | } |
2303 | else if (aop == 2 && sz == 0 && Z == 1 && W == 0) | |
2304 | { | |
4b7f6baa | 2305 | OUTS (outf, pregs (reg)); |
086134ec | 2306 | OUTS (outf, " = ["); |
4b7f6baa CM |
2307 | OUTS (outf, pregs (ptr)); |
2308 | OUTS (outf, "]"); | |
4b7f6baa CM |
2309 | } |
2310 | else if (aop == 2 && sz == 1 && Z == 0 && W == 0) | |
2311 | { | |
4b7f6baa | 2312 | OUTS (outf, dregs (reg)); |
086134ec | 2313 | OUTS (outf, " = W["); |
4b7f6baa CM |
2314 | OUTS (outf, pregs (ptr)); |
2315 | OUTS (outf, "] (Z)"); | |
4b7f6baa CM |
2316 | } |
2317 | else if (aop == 2 && sz == 1 && Z == 1 && W == 0) | |
2318 | { | |
4b7f6baa | 2319 | OUTS (outf, dregs (reg)); |
086134ec | 2320 | OUTS (outf, " = W["); |
4b7f6baa | 2321 | OUTS (outf, pregs (ptr)); |
086134ec | 2322 | OUTS (outf, "] (X)"); |
4b7f6baa CM |
2323 | } |
2324 | else if (aop == 2 && sz == 2 && Z == 0 && W == 0) | |
2325 | { | |
4b7f6baa | 2326 | OUTS (outf, dregs (reg)); |
086134ec | 2327 | OUTS (outf, " = B["); |
4b7f6baa CM |
2328 | OUTS (outf, pregs (ptr)); |
2329 | OUTS (outf, "] (Z)"); | |
4b7f6baa CM |
2330 | } |
2331 | else if (aop == 2 && sz == 2 && Z == 1 && W == 0) | |
2332 | { | |
4b7f6baa | 2333 | OUTS (outf, dregs (reg)); |
086134ec | 2334 | OUTS (outf, " = B["); |
4b7f6baa | 2335 | OUTS (outf, pregs (ptr)); |
086134ec | 2336 | OUTS (outf, "] (X)"); |
4b7f6baa CM |
2337 | } |
2338 | else if (aop == 0 && sz == 0 && Z == 0 && W == 1) | |
2339 | { | |
4b7f6baa CM |
2340 | OUTS (outf, "["); |
2341 | OUTS (outf, pregs (ptr)); | |
086134ec | 2342 | OUTS (outf, "++] = "); |
4b7f6baa | 2343 | OUTS (outf, dregs (reg)); |
4b7f6baa CM |
2344 | } |
2345 | else if (aop == 0 && sz == 0 && Z == 1 && W == 1) | |
2346 | { | |
4b7f6baa CM |
2347 | OUTS (outf, "["); |
2348 | OUTS (outf, pregs (ptr)); | |
086134ec | 2349 | OUTS (outf, "++] = "); |
4b7f6baa | 2350 | OUTS (outf, pregs (reg)); |
4b7f6baa CM |
2351 | } |
2352 | else if (aop == 0 && sz == 1 && Z == 0 && W == 1) | |
2353 | { | |
4b7f6baa CM |
2354 | OUTS (outf, "W["); |
2355 | OUTS (outf, pregs (ptr)); | |
086134ec | 2356 | OUTS (outf, "++] = "); |
4b7f6baa | 2357 | OUTS (outf, dregs (reg)); |
4b7f6baa CM |
2358 | } |
2359 | else if (aop == 0 && sz == 2 && Z == 0 && W == 1) | |
2360 | { | |
4b7f6baa CM |
2361 | OUTS (outf, "B["); |
2362 | OUTS (outf, pregs (ptr)); | |
086134ec | 2363 | OUTS (outf, "++] = "); |
4b7f6baa | 2364 | OUTS (outf, dregs (reg)); |
4b7f6baa CM |
2365 | } |
2366 | else if (aop == 1 && sz == 0 && Z == 0 && W == 1) | |
2367 | { | |
4b7f6baa CM |
2368 | OUTS (outf, "["); |
2369 | OUTS (outf, pregs (ptr)); | |
086134ec | 2370 | OUTS (outf, "--] = "); |
4b7f6baa | 2371 | OUTS (outf, dregs (reg)); |
4b7f6baa CM |
2372 | } |
2373 | else if (aop == 1 && sz == 0 && Z == 1 && W == 1) | |
2374 | { | |
4b7f6baa CM |
2375 | OUTS (outf, "["); |
2376 | OUTS (outf, pregs (ptr)); | |
086134ec | 2377 | OUTS (outf, "--] = "); |
4b7f6baa | 2378 | OUTS (outf, pregs (reg)); |
4b7f6baa CM |
2379 | } |
2380 | else if (aop == 1 && sz == 1 && Z == 0 && W == 1) | |
2381 | { | |
4b7f6baa CM |
2382 | OUTS (outf, "W["); |
2383 | OUTS (outf, pregs (ptr)); | |
086134ec | 2384 | OUTS (outf, "--] = "); |
4b7f6baa | 2385 | OUTS (outf, dregs (reg)); |
4b7f6baa CM |
2386 | } |
2387 | else if (aop == 1 && sz == 2 && Z == 0 && W == 1) | |
2388 | { | |
4b7f6baa CM |
2389 | OUTS (outf, "B["); |
2390 | OUTS (outf, pregs (ptr)); | |
086134ec | 2391 | OUTS (outf, "--] = "); |
4b7f6baa | 2392 | OUTS (outf, dregs (reg)); |
4b7f6baa CM |
2393 | } |
2394 | else if (aop == 2 && sz == 0 && Z == 0 && W == 1) | |
2395 | { | |
4b7f6baa CM |
2396 | OUTS (outf, "["); |
2397 | OUTS (outf, pregs (ptr)); | |
086134ec | 2398 | OUTS (outf, "] = "); |
4b7f6baa | 2399 | OUTS (outf, dregs (reg)); |
4b7f6baa CM |
2400 | } |
2401 | else if (aop == 2 && sz == 0 && Z == 1 && W == 1) | |
2402 | { | |
4b7f6baa CM |
2403 | OUTS (outf, "["); |
2404 | OUTS (outf, pregs (ptr)); | |
086134ec | 2405 | OUTS (outf, "] = "); |
4b7f6baa | 2406 | OUTS (outf, pregs (reg)); |
4b7f6baa CM |
2407 | } |
2408 | else if (aop == 2 && sz == 1 && Z == 0 && W == 1) | |
2409 | { | |
4b7f6baa CM |
2410 | OUTS (outf, "W["); |
2411 | OUTS (outf, pregs (ptr)); | |
086134ec | 2412 | OUTS (outf, "] = "); |
4b7f6baa | 2413 | OUTS (outf, dregs (reg)); |
4b7f6baa CM |
2414 | } |
2415 | else if (aop == 2 && sz == 2 && Z == 0 && W == 1) | |
2416 | { | |
4b7f6baa CM |
2417 | OUTS (outf, "B["); |
2418 | OUTS (outf, pregs (ptr)); | |
086134ec | 2419 | OUTS (outf, "] = "); |
4b7f6baa | 2420 | OUTS (outf, dregs (reg)); |
4b7f6baa CM |
2421 | } |
2422 | else | |
b7d48530 NC |
2423 | return 0; |
2424 | ||
2425 | return 2; | |
4b7f6baa CM |
2426 | } |
2427 | ||
2428 | static int | |
2429 | decode_LDSTiiFP_0 (TIword iw0, disassemble_info *outf) | |
2430 | { | |
b7d48530 NC |
2431 | /* LDSTiiFP |
2432 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2433 | | 1 | 0 | 1 | 1 | 1 | 0 |.W.|.offset............|.reg...........| | |
2434 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
2435 | int reg = ((iw0 >> LDSTiiFP_reg_bits) & LDSTiiFP_reg_mask); |
2436 | int offset = ((iw0 >> LDSTiiFP_offset_bits) & LDSTiiFP_offset_mask); | |
2437 | int W = ((iw0 >> LDSTiiFP_W_bits) & LDSTiiFP_W_mask); | |
2438 | ||
2439 | if (W == 0) | |
2440 | { | |
4b7f6baa | 2441 | OUTS (outf, dpregs (reg)); |
086134ec | 2442 | OUTS (outf, " = [FP "); |
4b7f6baa CM |
2443 | OUTS (outf, negimm5s4 (offset)); |
2444 | OUTS (outf, "]"); | |
4b7f6baa CM |
2445 | } |
2446 | else if (W == 1) | |
2447 | { | |
086134ec | 2448 | OUTS (outf, "[FP "); |
4b7f6baa | 2449 | OUTS (outf, negimm5s4 (offset)); |
086134ec | 2450 | OUTS (outf, "] = "); |
4b7f6baa | 2451 | OUTS (outf, dpregs (reg)); |
4b7f6baa CM |
2452 | } |
2453 | else | |
b7d48530 NC |
2454 | return 0; |
2455 | ||
2456 | return 2; | |
4b7f6baa CM |
2457 | } |
2458 | ||
2459 | static int | |
2460 | decode_LDSTii_0 (TIword iw0, disassemble_info *outf) | |
2461 | { | |
b7d48530 NC |
2462 | /* LDSTii |
2463 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2464 | | 1 | 0 | 1 |.W.|.op....|.offset........|.ptr.......|.reg.......| | |
2465 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
2466 | int reg = ((iw0 >> LDSTii_reg_bit) & LDSTii_reg_mask); |
2467 | int ptr = ((iw0 >> LDSTii_ptr_bit) & LDSTii_ptr_mask); | |
2468 | int offset = ((iw0 >> LDSTii_offset_bit) & LDSTii_offset_mask); | |
2469 | int op = ((iw0 >> LDSTii_op_bit) & LDSTii_op_mask); | |
2470 | int W = ((iw0 >> LDSTii_W_bit) & LDSTii_W_mask); | |
2471 | ||
2472 | if (W == 0 && op == 0) | |
2473 | { | |
4b7f6baa | 2474 | OUTS (outf, dregs (reg)); |
086134ec | 2475 | OUTS (outf, " = ["); |
4b7f6baa | 2476 | OUTS (outf, pregs (ptr)); |
086134ec | 2477 | OUTS (outf, " + "); |
4b7f6baa CM |
2478 | OUTS (outf, uimm4s4 (offset)); |
2479 | OUTS (outf, "]"); | |
4b7f6baa CM |
2480 | } |
2481 | else if (W == 0 && op == 1) | |
2482 | { | |
4b7f6baa | 2483 | OUTS (outf, dregs (reg)); |
086134ec | 2484 | OUTS (outf, " = W["); |
4b7f6baa | 2485 | OUTS (outf, pregs (ptr)); |
086134ec | 2486 | OUTS (outf, " + "); |
4b7f6baa CM |
2487 | OUTS (outf, uimm4s2 (offset)); |
2488 | OUTS (outf, "] (Z)"); | |
4b7f6baa CM |
2489 | } |
2490 | else if (W == 0 && op == 2) | |
2491 | { | |
4b7f6baa | 2492 | OUTS (outf, dregs (reg)); |
086134ec | 2493 | OUTS (outf, " = W["); |
4b7f6baa | 2494 | OUTS (outf, pregs (ptr)); |
086134ec | 2495 | OUTS (outf, " + "); |
4b7f6baa | 2496 | OUTS (outf, uimm4s2 (offset)); |
086134ec | 2497 | OUTS (outf, "] (X)"); |
4b7f6baa CM |
2498 | } |
2499 | else if (W == 0 && op == 3) | |
2500 | { | |
4b7f6baa | 2501 | OUTS (outf, pregs (reg)); |
086134ec | 2502 | OUTS (outf, " = ["); |
4b7f6baa | 2503 | OUTS (outf, pregs (ptr)); |
086134ec | 2504 | OUTS (outf, " + "); |
4b7f6baa CM |
2505 | OUTS (outf, uimm4s4 (offset)); |
2506 | OUTS (outf, "]"); | |
4b7f6baa CM |
2507 | } |
2508 | else if (W == 1 && op == 0) | |
2509 | { | |
4b7f6baa CM |
2510 | OUTS (outf, "["); |
2511 | OUTS (outf, pregs (ptr)); | |
086134ec | 2512 | OUTS (outf, " + "); |
4b7f6baa | 2513 | OUTS (outf, uimm4s4 (offset)); |
086134ec | 2514 | OUTS (outf, "] = "); |
4b7f6baa | 2515 | OUTS (outf, dregs (reg)); |
4b7f6baa CM |
2516 | } |
2517 | else if (W == 1 && op == 1) | |
2518 | { | |
086134ec | 2519 | OUTS (outf, "W["); |
4b7f6baa | 2520 | OUTS (outf, pregs (ptr)); |
086134ec | 2521 | OUTS (outf, " + "); |
4b7f6baa | 2522 | OUTS (outf, uimm4s2 (offset)); |
086134ec | 2523 | OUTS (outf, "] = "); |
4b7f6baa | 2524 | OUTS (outf, dregs (reg)); |
4b7f6baa CM |
2525 | } |
2526 | else if (W == 1 && op == 3) | |
2527 | { | |
4b7f6baa CM |
2528 | OUTS (outf, "["); |
2529 | OUTS (outf, pregs (ptr)); | |
086134ec | 2530 | OUTS (outf, " + "); |
4b7f6baa | 2531 | OUTS (outf, uimm4s4 (offset)); |
086134ec | 2532 | OUTS (outf, "] = "); |
4b7f6baa | 2533 | OUTS (outf, pregs (reg)); |
4b7f6baa CM |
2534 | } |
2535 | else | |
b7d48530 NC |
2536 | return 0; |
2537 | ||
2538 | return 2; | |
4b7f6baa CM |
2539 | } |
2540 | ||
2541 | static int | |
2542 | decode_LoopSetup_0 (TIword iw0, TIword iw1, bfd_vma pc, disassemble_info *outf) | |
2543 | { | |
b7d48530 NC |
2544 | /* LoopSetup |
2545 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2546 | | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 |.rop...|.c.|.soffset.......| | |
2547 | |.reg...........| - | - |.eoffset...............................| | |
2548 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
2549 | int c = ((iw0 >> (LoopSetup_c_bits - 16)) & LoopSetup_c_mask); |
2550 | int reg = ((iw1 >> LoopSetup_reg_bits) & LoopSetup_reg_mask); | |
2551 | int rop = ((iw0 >> (LoopSetup_rop_bits - 16)) & LoopSetup_rop_mask); | |
2552 | int soffset = ((iw0 >> (LoopSetup_soffset_bits - 16)) & LoopSetup_soffset_mask); | |
2553 | int eoffset = ((iw1 >> LoopSetup_eoffset_bits) & LoopSetup_eoffset_mask); | |
2554 | ||
2555 | if (rop == 0) | |
2556 | { | |
4b7f6baa | 2557 | OUTS (outf, "LSETUP"); |
086134ec | 2558 | OUTS (outf, "(0x"); |
4b7f6baa | 2559 | OUTS (outf, pcrel4 (soffset)); |
086134ec | 2560 | OUTS (outf, ", 0x"); |
4b7f6baa | 2561 | OUTS (outf, lppcrel10 (eoffset)); |
086134ec | 2562 | OUTS (outf, ") "); |
4b7f6baa | 2563 | OUTS (outf, counters (c)); |
4b7f6baa CM |
2564 | } |
2565 | else if (rop == 1) | |
2566 | { | |
4b7f6baa | 2567 | OUTS (outf, "LSETUP"); |
086134ec | 2568 | OUTS (outf, "(0x"); |
4b7f6baa | 2569 | OUTS (outf, pcrel4 (soffset)); |
086134ec | 2570 | OUTS (outf, ", 0x"); |
4b7f6baa | 2571 | OUTS (outf, lppcrel10 (eoffset)); |
086134ec | 2572 | OUTS (outf, ") "); |
4b7f6baa | 2573 | OUTS (outf, counters (c)); |
086134ec | 2574 | OUTS (outf, " = "); |
4b7f6baa | 2575 | OUTS (outf, pregs (reg)); |
4b7f6baa CM |
2576 | } |
2577 | else if (rop == 3) | |
2578 | { | |
4b7f6baa | 2579 | OUTS (outf, "LSETUP"); |
086134ec | 2580 | OUTS (outf, "(0x"); |
4b7f6baa | 2581 | OUTS (outf, pcrel4 (soffset)); |
086134ec | 2582 | OUTS (outf, ", 0x"); |
4b7f6baa | 2583 | OUTS (outf, lppcrel10 (eoffset)); |
086134ec | 2584 | OUTS (outf, ") "); |
4b7f6baa | 2585 | OUTS (outf, counters (c)); |
086134ec | 2586 | OUTS (outf, " = "); |
4b7f6baa | 2587 | OUTS (outf, pregs (reg)); |
086134ec | 2588 | OUTS (outf, " >> 0x1"); |
4b7f6baa CM |
2589 | } |
2590 | else | |
b7d48530 NC |
2591 | return 0; |
2592 | ||
2593 | return 4; | |
4b7f6baa CM |
2594 | } |
2595 | ||
2596 | static int | |
2597 | decode_LDIMMhalf_0 (TIword iw0, TIword iw1, disassemble_info *outf) | |
2598 | { | |
b7d48530 NC |
2599 | /* LDIMMhalf |
2600 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2601 | | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 |.Z.|.H.|.S.|.grp...|.reg.......| | |
2602 | |.hword.........................................................| | |
2603 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
2604 | int H = ((iw0 >> (LDIMMhalf_H_bits - 16)) & LDIMMhalf_H_mask); |
2605 | int Z = ((iw0 >> (LDIMMhalf_Z_bits - 16)) & LDIMMhalf_Z_mask); | |
2606 | int S = ((iw0 >> (LDIMMhalf_S_bits - 16)) & LDIMMhalf_S_mask); | |
2607 | int reg = ((iw0 >> (LDIMMhalf_reg_bits - 16)) & LDIMMhalf_reg_mask); | |
2608 | int grp = ((iw0 >> (LDIMMhalf_grp_bits - 16)) & LDIMMhalf_grp_mask); | |
2609 | int hword = ((iw1 >> LDIMMhalf_hword_bits) & LDIMMhalf_hword_mask); | |
2610 | ||
b21c9cb4 BS |
2611 | bu32 *pval = get_allreg (grp, reg); |
2612 | ||
2613 | /* Since we don't have 32-bit immediate loads, we allow the disassembler | |
2614 | to combine them, so it prints out the right values. | |
2615 | Here we keep track of the registers. */ | |
2616 | if (H == 0 && S == 1 && Z == 0) | |
2617 | { | |
2618 | /* regs = imm16 (x) */ | |
2619 | *pval = imm16_val (hword); | |
086134ec BS |
2620 | if (hword & 0x8000) |
2621 | *pval |= 0xFFFF0000; | |
2622 | else | |
2623 | *pval &= 0xFFFF; | |
b21c9cb4 BS |
2624 | } |
2625 | else if (H == 0 && S == 0 && Z == 1) | |
2626 | { | |
2627 | /* regs = luimm16 (Z) */ | |
2628 | *pval = luimm16_val (hword); | |
086134ec | 2629 | *pval &= 0xFFFF; |
b21c9cb4 BS |
2630 | } |
2631 | else if (H == 0 && S == 0 && Z == 0) | |
2632 | { | |
2633 | /* regs_lo = luimm16 */ | |
2634 | *pval &= 0xFFFF0000; | |
2635 | *pval |= luimm16_val (hword); | |
2636 | } | |
2637 | else if (H == 1 && S == 0 && Z == 0) | |
2638 | { | |
2639 | /* regs_hi = huimm16 */ | |
2640 | *pval &= 0xFFFF; | |
2641 | *pval |= luimm16_val (hword) << 16; | |
2642 | } | |
2643 | ||
2644 | /* Here we do the disassembly */ | |
4b7f6baa CM |
2645 | if (grp == 0 && H == 0 && S == 0 && Z == 0) |
2646 | { | |
4b7f6baa | 2647 | OUTS (outf, dregs_lo (reg)); |
086134ec BS |
2648 | OUTS (outf, " = "); |
2649 | OUTS (outf, uimm16 (hword)); | |
4b7f6baa CM |
2650 | } |
2651 | else if (grp == 0 && H == 1 && S == 0 && Z == 0) | |
2652 | { | |
4b7f6baa | 2653 | OUTS (outf, dregs_hi (reg)); |
086134ec BS |
2654 | OUTS (outf, " = "); |
2655 | OUTS (outf, uimm16 (hword)); | |
4b7f6baa CM |
2656 | } |
2657 | else if (grp == 0 && H == 0 && S == 1 && Z == 0) | |
2658 | { | |
4b7f6baa | 2659 | OUTS (outf, dregs (reg)); |
086134ec | 2660 | OUTS (outf, " = "); |
4b7f6baa CM |
2661 | OUTS (outf, imm16 (hword)); |
2662 | OUTS (outf, " (X)"); | |
4b7f6baa CM |
2663 | } |
2664 | else if (H == 0 && S == 1 && Z == 0) | |
086134ec | 2665 | { |
4b7f6baa | 2666 | OUTS (outf, regs (reg, grp)); |
086134ec | 2667 | OUTS (outf, " = "); |
4b7f6baa CM |
2668 | OUTS (outf, imm16 (hword)); |
2669 | OUTS (outf, " (X)"); | |
4b7f6baa CM |
2670 | } |
2671 | else if (H == 0 && S == 0 && Z == 1) | |
2672 | { | |
4b7f6baa | 2673 | OUTS (outf, regs (reg, grp)); |
086134ec BS |
2674 | OUTS (outf, " = "); |
2675 | OUTS (outf, uimm16 (hword)); | |
2676 | OUTS (outf, " (Z)"); | |
4b7f6baa CM |
2677 | } |
2678 | else if (H == 0 && S == 0 && Z == 0) | |
2679 | { | |
4b7f6baa | 2680 | OUTS (outf, regs_lo (reg, grp)); |
086134ec | 2681 | OUTS (outf, " = "); |
b21c9cb4 | 2682 | OUTS (outf, uimm16 (hword)); |
4b7f6baa CM |
2683 | } |
2684 | else if (H == 1 && S == 0 && Z == 0) | |
2685 | { | |
4b7f6baa | 2686 | OUTS (outf, regs_hi (reg, grp)); |
086134ec | 2687 | OUTS (outf, " = "); |
b21c9cb4 | 2688 | OUTS (outf, uimm16 (hword)); |
4b7f6baa CM |
2689 | } |
2690 | else | |
b7d48530 NC |
2691 | return 0; |
2692 | ||
b21c9cb4 | 2693 | /* And we print out the 32-bit value if it is a pointer. */ |
086134ec | 2694 | if (S == 0 && Z == 0) |
b21c9cb4 | 2695 | { |
086134ec BS |
2696 | OUTS (outf, ";\t\t/* ("); |
2697 | OUTS (outf, imm16d (hword)); | |
2698 | OUTS (outf, ")\t"); | |
2699 | ||
b21c9cb4 | 2700 | /* If it is an MMR, don't print the symbol. */ |
086134ec BS |
2701 | if (*pval < 0xFFC00000 && grp == 1) |
2702 | { | |
2703 | OUTS (outf, regs (reg, grp)); | |
2704 | OUTS (outf, "=0x"); | |
2705 | OUTS (outf, huimm32e (*pval)); | |
2706 | } | |
b21c9cb4 | 2707 | else |
086134ec BS |
2708 | { |
2709 | OUTS (outf, regs (reg, grp)); | |
2710 | OUTS (outf, "=0x"); | |
2711 | OUTS (outf, huimm32e (*pval)); | |
2712 | OUTS (outf, "("); | |
2713 | OUTS (outf, imm32 (*pval)); | |
2714 | OUTS (outf, ")"); | |
2715 | } | |
b21c9cb4 BS |
2716 | |
2717 | OUTS (outf, " */"); | |
086134ec BS |
2718 | comment = 1; |
2719 | } | |
2720 | if (S == 1 || Z == 1) | |
2721 | { | |
2722 | OUTS (outf, ";\t\t/*\t\t"); | |
2723 | OUTS (outf, regs (reg, grp)); | |
2724 | OUTS (outf, "=0x"); | |
2725 | OUTS (outf, huimm32e (*pval)); | |
2726 | OUTS (outf, "("); | |
2727 | OUTS (outf, imm32 (*pval)); | |
2728 | OUTS (outf, ") */"); | |
2729 | comment = 1; | |
b21c9cb4 | 2730 | } |
b7d48530 | 2731 | return 4; |
4b7f6baa CM |
2732 | } |
2733 | ||
2734 | static int | |
2735 | decode_CALLa_0 (TIword iw0, TIword iw1, bfd_vma pc, disassemble_info *outf) | |
2736 | { | |
b7d48530 NC |
2737 | /* CALLa |
2738 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2739 | | 1 | 1 | 1 | 0 | 0 | 0 | 1 |.S.|.msw...........................| | |
2740 | |.lsw...........................................................| | |
2741 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
2742 | int S = ((iw0 >> (CALLa_S_bits - 16)) & CALLa_S_mask); |
2743 | int lsw = ((iw1 >> 0) & 0xffff); | |
2744 | int msw = ((iw0 >> 0) & 0xff); | |
2745 | ||
2746 | if (S == 1) | |
086134ec | 2747 | OUTS (outf, "CALL 0x"); |
4b7f6baa | 2748 | else if (S == 0) |
086134ec | 2749 | OUTS (outf, "JUMP.L 0x"); |
4b7f6baa | 2750 | else |
b7d48530 NC |
2751 | return 0; |
2752 | ||
2753 | OUTS (outf, pcrel24 (((msw) << 16) | (lsw))); | |
2754 | return 4; | |
4b7f6baa CM |
2755 | } |
2756 | ||
2757 | static int | |
2758 | decode_LDSTidxI_0 (TIword iw0, TIword iw1, disassemble_info *outf) | |
2759 | { | |
b7d48530 NC |
2760 | /* LDSTidxI |
2761 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2762 | | 1 | 1 | 1 | 0 | 0 | 1 |.W.|.Z.|.sz....|.ptr.......|.reg.......| | |
2763 | |.offset........................................................| | |
2764 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
2765 | int Z = ((iw0 >> (LDSTidxI_Z_bits - 16)) & LDSTidxI_Z_mask); |
2766 | int W = ((iw0 >> (LDSTidxI_W_bits - 16)) & LDSTidxI_W_mask); | |
2767 | int sz = ((iw0 >> (LDSTidxI_sz_bits - 16)) & LDSTidxI_sz_mask); | |
2768 | int reg = ((iw0 >> (LDSTidxI_reg_bits - 16)) & LDSTidxI_reg_mask); | |
2769 | int ptr = ((iw0 >> (LDSTidxI_ptr_bits - 16)) & LDSTidxI_ptr_mask); | |
2770 | int offset = ((iw1 >> LDSTidxI_offset_bits) & LDSTidxI_offset_mask); | |
2771 | ||
2772 | if (W == 0 && sz == 0 && Z == 0) | |
2773 | { | |
4b7f6baa | 2774 | OUTS (outf, dregs (reg)); |
086134ec | 2775 | OUTS (outf, " = ["); |
4b7f6baa | 2776 | OUTS (outf, pregs (ptr)); |
086134ec | 2777 | OUTS (outf, " + "); |
4b7f6baa CM |
2778 | OUTS (outf, imm16s4 (offset)); |
2779 | OUTS (outf, "]"); | |
4b7f6baa CM |
2780 | } |
2781 | else if (W == 0 && sz == 0 && Z == 1) | |
2782 | { | |
4b7f6baa | 2783 | OUTS (outf, pregs (reg)); |
086134ec | 2784 | OUTS (outf, " = ["); |
4b7f6baa | 2785 | OUTS (outf, pregs (ptr)); |
086134ec | 2786 | OUTS (outf, " + "); |
4b7f6baa CM |
2787 | OUTS (outf, imm16s4 (offset)); |
2788 | OUTS (outf, "]"); | |
4b7f6baa CM |
2789 | } |
2790 | else if (W == 0 && sz == 1 && Z == 0) | |
2791 | { | |
4b7f6baa | 2792 | OUTS (outf, dregs (reg)); |
086134ec | 2793 | OUTS (outf, " = W["); |
4b7f6baa | 2794 | OUTS (outf, pregs (ptr)); |
086134ec | 2795 | OUTS (outf, " + "); |
4b7f6baa CM |
2796 | OUTS (outf, imm16s2 (offset)); |
2797 | OUTS (outf, "] (Z)"); | |
4b7f6baa CM |
2798 | } |
2799 | else if (W == 0 && sz == 1 && Z == 1) | |
2800 | { | |
4b7f6baa | 2801 | OUTS (outf, dregs (reg)); |
086134ec | 2802 | OUTS (outf, " = W["); |
4b7f6baa | 2803 | OUTS (outf, pregs (ptr)); |
086134ec | 2804 | OUTS (outf, " + "); |
4b7f6baa | 2805 | OUTS (outf, imm16s2 (offset)); |
086134ec | 2806 | OUTS (outf, "] (X)"); |
4b7f6baa CM |
2807 | } |
2808 | else if (W == 0 && sz == 2 && Z == 0) | |
2809 | { | |
4b7f6baa | 2810 | OUTS (outf, dregs (reg)); |
086134ec | 2811 | OUTS (outf, " = B["); |
4b7f6baa | 2812 | OUTS (outf, pregs (ptr)); |
086134ec | 2813 | OUTS (outf, " + "); |
4b7f6baa CM |
2814 | OUTS (outf, imm16 (offset)); |
2815 | OUTS (outf, "] (Z)"); | |
4b7f6baa CM |
2816 | } |
2817 | else if (W == 0 && sz == 2 && Z == 1) | |
2818 | { | |
4b7f6baa | 2819 | OUTS (outf, dregs (reg)); |
086134ec | 2820 | OUTS (outf, " = B["); |
4b7f6baa | 2821 | OUTS (outf, pregs (ptr)); |
086134ec | 2822 | OUTS (outf, " + "); |
4b7f6baa | 2823 | OUTS (outf, imm16 (offset)); |
086134ec | 2824 | OUTS (outf, "] (X)"); |
4b7f6baa CM |
2825 | } |
2826 | else if (W == 1 && sz == 0 && Z == 0) | |
2827 | { | |
4b7f6baa CM |
2828 | OUTS (outf, "["); |
2829 | OUTS (outf, pregs (ptr)); | |
086134ec | 2830 | OUTS (outf, " + "); |
4b7f6baa | 2831 | OUTS (outf, imm16s4 (offset)); |
086134ec | 2832 | OUTS (outf, "] = "); |
4b7f6baa | 2833 | OUTS (outf, dregs (reg)); |
4b7f6baa CM |
2834 | } |
2835 | else if (W == 1 && sz == 0 && Z == 1) | |
2836 | { | |
4b7f6baa CM |
2837 | OUTS (outf, "["); |
2838 | OUTS (outf, pregs (ptr)); | |
086134ec | 2839 | OUTS (outf, " + "); |
4b7f6baa | 2840 | OUTS (outf, imm16s4 (offset)); |
086134ec | 2841 | OUTS (outf, "] = "); |
4b7f6baa | 2842 | OUTS (outf, pregs (reg)); |
4b7f6baa CM |
2843 | } |
2844 | else if (W == 1 && sz == 1 && Z == 0) | |
2845 | { | |
4b7f6baa CM |
2846 | OUTS (outf, "W["); |
2847 | OUTS (outf, pregs (ptr)); | |
086134ec | 2848 | OUTS (outf, " + "); |
4b7f6baa | 2849 | OUTS (outf, imm16s2 (offset)); |
086134ec | 2850 | OUTS (outf, "] = "); |
4b7f6baa | 2851 | OUTS (outf, dregs (reg)); |
4b7f6baa CM |
2852 | } |
2853 | else if (W == 1 && sz == 2 && Z == 0) | |
2854 | { | |
4b7f6baa CM |
2855 | OUTS (outf, "B["); |
2856 | OUTS (outf, pregs (ptr)); | |
086134ec | 2857 | OUTS (outf, " + "); |
4b7f6baa | 2858 | OUTS (outf, imm16 (offset)); |
086134ec | 2859 | OUTS (outf, "] = "); |
4b7f6baa | 2860 | OUTS (outf, dregs (reg)); |
4b7f6baa CM |
2861 | } |
2862 | else | |
b7d48530 NC |
2863 | return 0; |
2864 | ||
2865 | return 4; | |
4b7f6baa CM |
2866 | } |
2867 | ||
2868 | static int | |
2869 | decode_linkage_0 (TIword iw0, TIword iw1, disassemble_info *outf) | |
2870 | { | |
b7d48530 NC |
2871 | /* linkage |
2872 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2873 | | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.R.| | |
2874 | |.framesize.....................................................| | |
2875 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
2876 | int R = ((iw0 >> (Linkage_R_bits - 16)) & Linkage_R_mask); |
2877 | int framesize = ((iw1 >> Linkage_framesize_bits) & Linkage_framesize_mask); | |
2878 | ||
2879 | if (R == 0) | |
2880 | { | |
4b7f6baa CM |
2881 | OUTS (outf, "LINK "); |
2882 | OUTS (outf, uimm16s4 (framesize)); | |
086134ec BS |
2883 | OUTS (outf, ";\t\t/* ("); |
2884 | OUTS (outf, uimm16s4d (framesize)); | |
2885 | OUTS (outf, ") */"); | |
2886 | comment = 1; | |
4b7f6baa CM |
2887 | } |
2888 | else if (R == 1) | |
b7d48530 | 2889 | OUTS (outf, "UNLINK"); |
4b7f6baa | 2890 | else |
b7d48530 NC |
2891 | return 0; |
2892 | ||
2893 | return 4; | |
4b7f6baa CM |
2894 | } |
2895 | ||
2896 | static int | |
2897 | decode_dsp32mac_0 (TIword iw0, TIword iw1, disassemble_info *outf) | |
2898 | { | |
b7d48530 NC |
2899 | /* dsp32mac |
2900 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2901 | | 1 | 1 | 0 | 0 |.M.| 0 | 0 |.mmod..........|.MM|.P.|.w1|.op1...| | |
2902 | |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1..| | |
2903 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
2904 | int op1 = ((iw0 >> (DSP32Mac_op1_bits - 16)) & DSP32Mac_op1_mask); | |
2905 | int w1 = ((iw0 >> (DSP32Mac_w1_bits - 16)) & DSP32Mac_w1_mask); | |
2906 | int P = ((iw0 >> (DSP32Mac_p_bits - 16)) & DSP32Mac_p_mask); | |
2907 | int MM = ((iw0 >> (DSP32Mac_MM_bits - 16)) & DSP32Mac_MM_mask); | |
4b7f6baa | 2908 | int mmod = ((iw0 >> (DSP32Mac_mmod_bits - 16)) & DSP32Mac_mmod_mask); |
b7d48530 | 2909 | int w0 = ((iw1 >> DSP32Mac_w0_bits) & DSP32Mac_w0_mask); |
4b7f6baa CM |
2910 | int src0 = ((iw1 >> DSP32Mac_src0_bits) & DSP32Mac_src0_mask); |
2911 | int src1 = ((iw1 >> DSP32Mac_src1_bits) & DSP32Mac_src1_mask); | |
b7d48530 NC |
2912 | int dst = ((iw1 >> DSP32Mac_dst_bits) & DSP32Mac_dst_mask); |
2913 | int h10 = ((iw1 >> DSP32Mac_h10_bits) & DSP32Mac_h10_mask); | |
2914 | int h00 = ((iw1 >> DSP32Mac_h00_bits) & DSP32Mac_h00_mask); | |
2915 | int op0 = ((iw1 >> DSP32Mac_op0_bits) & DSP32Mac_op0_mask); | |
2916 | int h11 = ((iw1 >> DSP32Mac_h11_bits) & DSP32Mac_h11_mask); | |
2917 | int h01 = ((iw1 >> DSP32Mac_h01_bits) & DSP32Mac_h01_mask); | |
4b7f6baa CM |
2918 | |
2919 | if (w0 == 0 && w1 == 0 && op1 == 3 && op0 == 3) | |
2920 | return 0; | |
2921 | ||
2922 | if (op1 == 3 && MM) | |
2923 | return 0; | |
2924 | ||
2925 | if ((w1 || w0) && mmod == M_W32) | |
2926 | return 0; | |
2927 | ||
ee171c8f | 2928 | if (((1 << mmod) & (P ? 0x131b : 0x1b5f)) == 0) |
4b7f6baa CM |
2929 | return 0; |
2930 | ||
2931 | if (w1 == 1 || op1 != 3) | |
2932 | { | |
2933 | if (w1) | |
2934 | OUTS (outf, P ? dregs (dst + 1) : dregs_hi (dst)); | |
2935 | ||
2936 | if (op1 == 3) | |
2937 | OUTS (outf, " = A1"); | |
2938 | else | |
2939 | { | |
2940 | if (w1) | |
2941 | OUTS (outf, " = ("); | |
2942 | decode_macfunc (1, op1, h01, h11, src0, src1, outf); | |
2943 | if (w1) | |
2944 | OUTS (outf, ")"); | |
2945 | } | |
2946 | ||
2947 | if (w0 == 1 || op0 != 3) | |
2948 | { | |
2949 | if (MM) | |
2950 | OUTS (outf, " (M)"); | |
2951 | MM = 0; | |
2952 | OUTS (outf, ", "); | |
2953 | } | |
2954 | } | |
2955 | ||
2956 | if (w0 == 1 || op0 != 3) | |
2957 | { | |
2958 | if (w0) | |
2959 | OUTS (outf, P ? dregs (dst) : dregs_lo (dst)); | |
2960 | ||
2961 | if (op0 == 3) | |
2962 | OUTS (outf, " = A0"); | |
2963 | else | |
2964 | { | |
2965 | if (w0) | |
2966 | OUTS (outf, " = ("); | |
2967 | decode_macfunc (0, op0, h00, h10, src0, src1, outf); | |
2968 | if (w0) | |
2969 | OUTS (outf, ")"); | |
2970 | } | |
2971 | } | |
2972 | ||
2973 | decode_optmode (mmod, MM, outf); | |
2974 | ||
2975 | return 4; | |
2976 | } | |
2977 | ||
2978 | static int | |
2979 | decode_dsp32mult_0 (TIword iw0, TIword iw1, disassemble_info *outf) | |
2980 | { | |
b7d48530 NC |
2981 | /* dsp32mult |
2982 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2983 | | 1 | 1 | 0 | 0 |.M.| 0 | 1 |.mmod..........|.MM|.P.|.w1|.op1...| | |
2984 | |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1..| | |
2985 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
2986 | int w1 = ((iw0 >> (DSP32Mac_w1_bits - 16)) & DSP32Mac_w1_mask); | |
2987 | int P = ((iw0 >> (DSP32Mac_p_bits - 16)) & DSP32Mac_p_mask); | |
2988 | int MM = ((iw0 >> (DSP32Mac_MM_bits - 16)) & DSP32Mac_MM_mask); | |
4b7f6baa | 2989 | int mmod = ((iw0 >> (DSP32Mac_mmod_bits - 16)) & DSP32Mac_mmod_mask); |
b7d48530 | 2990 | int w0 = ((iw1 >> DSP32Mac_w0_bits) & DSP32Mac_w0_mask); |
4b7f6baa CM |
2991 | int src0 = ((iw1 >> DSP32Mac_src0_bits) & DSP32Mac_src0_mask); |
2992 | int src1 = ((iw1 >> DSP32Mac_src1_bits) & DSP32Mac_src1_mask); | |
b7d48530 NC |
2993 | int dst = ((iw1 >> DSP32Mac_dst_bits) & DSP32Mac_dst_mask); |
2994 | int h10 = ((iw1 >> DSP32Mac_h10_bits) & DSP32Mac_h10_mask); | |
2995 | int h00 = ((iw1 >> DSP32Mac_h00_bits) & DSP32Mac_h00_mask); | |
2996 | int h11 = ((iw1 >> DSP32Mac_h11_bits) & DSP32Mac_h11_mask); | |
2997 | int h01 = ((iw1 >> DSP32Mac_h01_bits) & DSP32Mac_h01_mask); | |
4b7f6baa CM |
2998 | |
2999 | if (w1 == 0 && w0 == 0) | |
3000 | return 0; | |
b7d48530 | 3001 | |
4b7f6baa CM |
3002 | if (((1 << mmod) & (P ? 0x313 : 0x1b57)) == 0) |
3003 | return 0; | |
b7d48530 | 3004 | |
4b7f6baa CM |
3005 | if (w1) |
3006 | { | |
3007 | OUTS (outf, P ? dregs (dst | 1) : dregs_hi (dst)); | |
3008 | OUTS (outf, " = "); | |
3009 | decode_multfunc (h01, h11, src0, src1, outf); | |
3010 | ||
3011 | if (w0) | |
3012 | { | |
3013 | if (MM) | |
3014 | OUTS (outf, " (M)"); | |
3015 | MM = 0; | |
3016 | OUTS (outf, ", "); | |
3017 | } | |
3018 | } | |
3019 | ||
3020 | if (w0) | |
3021 | { | |
3022 | OUTS (outf, dregs (dst)); | |
3023 | OUTS (outf, " = "); | |
3024 | decode_multfunc (h00, h10, src0, src1, outf); | |
3025 | } | |
3026 | ||
3027 | decode_optmode (mmod, MM, outf); | |
3028 | return 4; | |
3029 | } | |
3030 | ||
3031 | static int | |
3032 | decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) | |
3033 | { | |
b7d48530 NC |
3034 | /* dsp32alu |
3035 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
3036 | | 1 | 1 | 0 | 0 |.M.| 1 | 0 | - | - | - |.HL|.aopcde............| | |
3037 | |.aop...|.s.|.x.|.dst0......|.dst1......|.src0......|.src1......| | |
3038 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
3039 | int s = ((iw1 >> DSP32Alu_s_bits) & DSP32Alu_s_mask); |
3040 | int x = ((iw1 >> DSP32Alu_x_bits) & DSP32Alu_x_mask); | |
3041 | int aop = ((iw1 >> DSP32Alu_aop_bits) & DSP32Alu_aop_mask); | |
3042 | int src0 = ((iw1 >> DSP32Alu_src0_bits) & DSP32Alu_src0_mask); | |
3043 | int src1 = ((iw1 >> DSP32Alu_src1_bits) & DSP32Alu_src1_mask); | |
3044 | int dst0 = ((iw1 >> DSP32Alu_dst0_bits) & DSP32Alu_dst0_mask); | |
3045 | int dst1 = ((iw1 >> DSP32Alu_dst1_bits) & DSP32Alu_dst1_mask); | |
3046 | int HL = ((iw0 >> (DSP32Alu_HL_bits - 16)) & DSP32Alu_HL_mask); | |
3047 | int aopcde = ((iw0 >> (DSP32Alu_aopcde_bits - 16)) & DSP32Alu_aopcde_mask); | |
3048 | ||
3049 | if (aop == 0 && aopcde == 9 && HL == 0 && s == 0) | |
3050 | { | |
086134ec | 3051 | OUTS (outf, "A0.L = "); |
4b7f6baa | 3052 | OUTS (outf, dregs_lo (src0)); |
4b7f6baa CM |
3053 | } |
3054 | else if (aop == 2 && aopcde == 9 && HL == 1 && s == 0) | |
3055 | { | |
086134ec | 3056 | OUTS (outf, "A1.H = "); |
4b7f6baa | 3057 | OUTS (outf, dregs_hi (src0)); |
4b7f6baa CM |
3058 | } |
3059 | else if (aop == 2 && aopcde == 9 && HL == 0 && s == 0) | |
3060 | { | |
086134ec | 3061 | OUTS (outf, "A1.L = "); |
4b7f6baa | 3062 | OUTS (outf, dregs_lo (src0)); |
4b7f6baa CM |
3063 | } |
3064 | else if (aop == 0 && aopcde == 9 && HL == 1 && s == 0) | |
3065 | { | |
086134ec | 3066 | OUTS (outf, "A0.H = "); |
4b7f6baa | 3067 | OUTS (outf, dregs_hi (src0)); |
4b7f6baa CM |
3068 | } |
3069 | else if (x == 1 && HL == 1 && aop == 3 && aopcde == 5) | |
3070 | { | |
4b7f6baa | 3071 | OUTS (outf, dregs_hi (dst0)); |
086134ec | 3072 | OUTS (outf, " = "); |
4b7f6baa | 3073 | OUTS (outf, dregs (src0)); |
086134ec | 3074 | OUTS (outf, " - "); |
4b7f6baa | 3075 | OUTS (outf, dregs (src1)); |
086134ec | 3076 | OUTS (outf, " (RND20)"); |
4b7f6baa CM |
3077 | } |
3078 | else if (x == 1 && HL == 1 && aop == 2 && aopcde == 5) | |
3079 | { | |
4b7f6baa | 3080 | OUTS (outf, dregs_hi (dst0)); |
086134ec | 3081 | OUTS (outf, " = "); |
4b7f6baa | 3082 | OUTS (outf, dregs (src0)); |
086134ec | 3083 | OUTS (outf, " + "); |
4b7f6baa | 3084 | OUTS (outf, dregs (src1)); |
086134ec | 3085 | OUTS (outf, " (RND20)"); |
4b7f6baa CM |
3086 | } |
3087 | else if (x == 0 && HL == 0 && aop == 1 && aopcde == 5) | |
3088 | { | |
4b7f6baa | 3089 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3090 | OUTS (outf, " = "); |
4b7f6baa | 3091 | OUTS (outf, dregs (src0)); |
086134ec | 3092 | OUTS (outf, " - "); |
4b7f6baa | 3093 | OUTS (outf, dregs (src1)); |
086134ec | 3094 | OUTS (outf, " (RND12)"); |
4b7f6baa CM |
3095 | } |
3096 | else if (x == 0 && HL == 0 && aop == 0 && aopcde == 5) | |
3097 | { | |
4b7f6baa | 3098 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3099 | OUTS (outf, " = "); |
4b7f6baa | 3100 | OUTS (outf, dregs (src0)); |
086134ec | 3101 | OUTS (outf, " + "); |
4b7f6baa | 3102 | OUTS (outf, dregs (src1)); |
086134ec | 3103 | OUTS (outf, " (RND12)"); |
4b7f6baa CM |
3104 | } |
3105 | else if (x == 1 && HL == 0 && aop == 3 && aopcde == 5) | |
3106 | { | |
4b7f6baa | 3107 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3108 | OUTS (outf, " = "); |
4b7f6baa | 3109 | OUTS (outf, dregs (src0)); |
086134ec | 3110 | OUTS (outf, " - "); |
4b7f6baa | 3111 | OUTS (outf, dregs (src1)); |
086134ec | 3112 | OUTS (outf, " (RND20)"); |
4b7f6baa CM |
3113 | } |
3114 | else if (x == 0 && HL == 1 && aop == 0 && aopcde == 5) | |
3115 | { | |
4b7f6baa | 3116 | OUTS (outf, dregs_hi (dst0)); |
086134ec | 3117 | OUTS (outf, " = "); |
4b7f6baa | 3118 | OUTS (outf, dregs (src0)); |
086134ec | 3119 | OUTS (outf, " + "); |
4b7f6baa | 3120 | OUTS (outf, dregs (src1)); |
086134ec | 3121 | OUTS (outf, " (RND12)"); |
4b7f6baa CM |
3122 | } |
3123 | else if (x == 1 && HL == 0 && aop == 2 && aopcde == 5) | |
3124 | { | |
4b7f6baa | 3125 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3126 | OUTS (outf, " = "); |
4b7f6baa | 3127 | OUTS (outf, dregs (src0)); |
086134ec | 3128 | OUTS (outf, " + "); |
4b7f6baa | 3129 | OUTS (outf, dregs (src1)); |
086134ec | 3130 | OUTS (outf, " (RND20)"); |
4b7f6baa CM |
3131 | } |
3132 | else if (x == 0 && HL == 1 && aop == 1 && aopcde == 5) | |
3133 | { | |
4b7f6baa | 3134 | OUTS (outf, dregs_hi (dst0)); |
086134ec | 3135 | OUTS (outf, " = "); |
4b7f6baa | 3136 | OUTS (outf, dregs (src0)); |
086134ec | 3137 | OUTS (outf, " - "); |
4b7f6baa | 3138 | OUTS (outf, dregs (src1)); |
086134ec | 3139 | OUTS (outf, " (RND12)"); |
4b7f6baa CM |
3140 | } |
3141 | else if (HL == 1 && aop == 0 && aopcde == 2) | |
3142 | { | |
4b7f6baa | 3143 | OUTS (outf, dregs_hi (dst0)); |
086134ec | 3144 | OUTS (outf, " = "); |
4b7f6baa | 3145 | OUTS (outf, dregs_lo (src0)); |
086134ec | 3146 | OUTS (outf, " + "); |
4b7f6baa | 3147 | OUTS (outf, dregs_lo (src1)); |
4b7f6baa | 3148 | amod1 (s, x, outf); |
4b7f6baa CM |
3149 | } |
3150 | else if (HL == 1 && aop == 1 && aopcde == 2) | |
3151 | { | |
4b7f6baa | 3152 | OUTS (outf, dregs_hi (dst0)); |
086134ec | 3153 | OUTS (outf, " = "); |
4b7f6baa | 3154 | OUTS (outf, dregs_lo (src0)); |
086134ec | 3155 | OUTS (outf, " + "); |
4b7f6baa | 3156 | OUTS (outf, dregs_hi (src1)); |
4b7f6baa | 3157 | amod1 (s, x, outf); |
4b7f6baa CM |
3158 | } |
3159 | else if (HL == 1 && aop == 2 && aopcde == 2) | |
3160 | { | |
4b7f6baa | 3161 | OUTS (outf, dregs_hi (dst0)); |
086134ec | 3162 | OUTS (outf, " = "); |
4b7f6baa | 3163 | OUTS (outf, dregs_hi (src0)); |
086134ec | 3164 | OUTS (outf, " + "); |
4b7f6baa | 3165 | OUTS (outf, dregs_lo (src1)); |
4b7f6baa | 3166 | amod1 (s, x, outf); |
4b7f6baa CM |
3167 | } |
3168 | else if (HL == 1 && aop == 3 && aopcde == 2) | |
3169 | { | |
4b7f6baa | 3170 | OUTS (outf, dregs_hi (dst0)); |
086134ec | 3171 | OUTS (outf, " = "); |
4b7f6baa | 3172 | OUTS (outf, dregs_hi (src0)); |
086134ec | 3173 | OUTS (outf, " + "); |
4b7f6baa | 3174 | OUTS (outf, dregs_hi (src1)); |
4b7f6baa | 3175 | amod1 (s, x, outf); |
4b7f6baa CM |
3176 | } |
3177 | else if (HL == 0 && aop == 0 && aopcde == 3) | |
3178 | { | |
4b7f6baa | 3179 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3180 | OUTS (outf, " = "); |
4b7f6baa | 3181 | OUTS (outf, dregs_lo (src0)); |
086134ec | 3182 | OUTS (outf, " - "); |
4b7f6baa | 3183 | OUTS (outf, dregs_lo (src1)); |
4b7f6baa | 3184 | amod1 (s, x, outf); |
4b7f6baa CM |
3185 | } |
3186 | else if (HL == 0 && aop == 1 && aopcde == 3) | |
3187 | { | |
4b7f6baa | 3188 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3189 | OUTS (outf, " = "); |
4b7f6baa | 3190 | OUTS (outf, dregs_lo (src0)); |
086134ec | 3191 | OUTS (outf, " - "); |
4b7f6baa | 3192 | OUTS (outf, dregs_hi (src1)); |
4b7f6baa | 3193 | amod1 (s, x, outf); |
4b7f6baa CM |
3194 | } |
3195 | else if (HL == 0 && aop == 3 && aopcde == 2) | |
3196 | { | |
4b7f6baa | 3197 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3198 | OUTS (outf, " = "); |
4b7f6baa | 3199 | OUTS (outf, dregs_hi (src0)); |
086134ec | 3200 | OUTS (outf, " + "); |
4b7f6baa | 3201 | OUTS (outf, dregs_hi (src1)); |
4b7f6baa | 3202 | amod1 (s, x, outf); |
4b7f6baa CM |
3203 | } |
3204 | else if (HL == 1 && aop == 0 && aopcde == 3) | |
3205 | { | |
4b7f6baa | 3206 | OUTS (outf, dregs_hi (dst0)); |
086134ec | 3207 | OUTS (outf, " = "); |
4b7f6baa | 3208 | OUTS (outf, dregs_lo (src0)); |
086134ec | 3209 | OUTS (outf, " - "); |
4b7f6baa | 3210 | OUTS (outf, dregs_lo (src1)); |
4b7f6baa | 3211 | amod1 (s, x, outf); |
4b7f6baa CM |
3212 | } |
3213 | else if (HL == 1 && aop == 1 && aopcde == 3) | |
3214 | { | |
4b7f6baa | 3215 | OUTS (outf, dregs_hi (dst0)); |
086134ec | 3216 | OUTS (outf, " = "); |
4b7f6baa | 3217 | OUTS (outf, dregs_lo (src0)); |
086134ec | 3218 | OUTS (outf, " - "); |
4b7f6baa | 3219 | OUTS (outf, dregs_hi (src1)); |
4b7f6baa | 3220 | amod1 (s, x, outf); |
4b7f6baa CM |
3221 | } |
3222 | else if (HL == 1 && aop == 2 && aopcde == 3) | |
3223 | { | |
4b7f6baa | 3224 | OUTS (outf, dregs_hi (dst0)); |
086134ec | 3225 | OUTS (outf, " = "); |
4b7f6baa | 3226 | OUTS (outf, dregs_hi (src0)); |
086134ec | 3227 | OUTS (outf, " - "); |
4b7f6baa | 3228 | OUTS (outf, dregs_lo (src1)); |
4b7f6baa | 3229 | amod1 (s, x, outf); |
4b7f6baa CM |
3230 | } |
3231 | else if (HL == 1 && aop == 3 && aopcde == 3) | |
3232 | { | |
4b7f6baa | 3233 | OUTS (outf, dregs_hi (dst0)); |
086134ec | 3234 | OUTS (outf, " = "); |
4b7f6baa | 3235 | OUTS (outf, dregs_hi (src0)); |
086134ec | 3236 | OUTS (outf, " - "); |
4b7f6baa | 3237 | OUTS (outf, dregs_hi (src1)); |
4b7f6baa | 3238 | amod1 (s, x, outf); |
4b7f6baa CM |
3239 | } |
3240 | else if (HL == 0 && aop == 2 && aopcde == 2) | |
3241 | { | |
4b7f6baa | 3242 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3243 | OUTS (outf, " = "); |
4b7f6baa | 3244 | OUTS (outf, dregs_hi (src0)); |
086134ec | 3245 | OUTS (outf, " + "); |
4b7f6baa | 3246 | OUTS (outf, dregs_lo (src1)); |
4b7f6baa | 3247 | amod1 (s, x, outf); |
4b7f6baa CM |
3248 | } |
3249 | else if (HL == 0 && aop == 1 && aopcde == 2) | |
3250 | { | |
4b7f6baa | 3251 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3252 | OUTS (outf, " = "); |
4b7f6baa | 3253 | OUTS (outf, dregs_lo (src0)); |
086134ec | 3254 | OUTS (outf, " + "); |
4b7f6baa | 3255 | OUTS (outf, dregs_hi (src1)); |
4b7f6baa | 3256 | amod1 (s, x, outf); |
4b7f6baa CM |
3257 | } |
3258 | else if (HL == 0 && aop == 2 && aopcde == 3) | |
3259 | { | |
4b7f6baa | 3260 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3261 | OUTS (outf, " = "); |
4b7f6baa | 3262 | OUTS (outf, dregs_hi (src0)); |
086134ec | 3263 | OUTS (outf, " - "); |
4b7f6baa | 3264 | OUTS (outf, dregs_lo (src1)); |
4b7f6baa | 3265 | amod1 (s, x, outf); |
4b7f6baa CM |
3266 | } |
3267 | else if (HL == 0 && aop == 3 && aopcde == 3) | |
3268 | { | |
4b7f6baa | 3269 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3270 | OUTS (outf, " = "); |
4b7f6baa | 3271 | OUTS (outf, dregs_hi (src0)); |
086134ec | 3272 | OUTS (outf, " - "); |
4b7f6baa | 3273 | OUTS (outf, dregs_hi (src1)); |
4b7f6baa | 3274 | amod1 (s, x, outf); |
4b7f6baa CM |
3275 | } |
3276 | else if (HL == 0 && aop == 0 && aopcde == 2) | |
3277 | { | |
4b7f6baa | 3278 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3279 | OUTS (outf, " = "); |
4b7f6baa | 3280 | OUTS (outf, dregs_lo (src0)); |
086134ec | 3281 | OUTS (outf, " + "); |
4b7f6baa | 3282 | OUTS (outf, dregs_lo (src1)); |
4b7f6baa | 3283 | amod1 (s, x, outf); |
4b7f6baa CM |
3284 | } |
3285 | else if (aop == 0 && aopcde == 9 && s == 1) | |
3286 | { | |
086134ec | 3287 | OUTS (outf, "A0 = "); |
4b7f6baa | 3288 | OUTS (outf, dregs (src0)); |
4b7f6baa CM |
3289 | } |
3290 | else if (aop == 3 && aopcde == 11 && s == 0) | |
086134ec | 3291 | OUTS (outf, "A0 -= A1"); |
b7d48530 | 3292 | |
4b7f6baa | 3293 | else if (aop == 3 && aopcde == 11 && s == 1) |
086134ec | 3294 | OUTS (outf, "A0 -= A1 (W32)"); |
b7d48530 | 3295 | |
4b7f6baa CM |
3296 | else if (aop == 3 && aopcde == 22 && HL == 1) |
3297 | { | |
4b7f6baa | 3298 | OUTS (outf, dregs (dst0)); |
086134ec | 3299 | OUTS (outf, " = BYTEOP2M ("); |
4b7f6baa CM |
3300 | OUTS (outf, dregs (src0 + 1)); |
3301 | OUTS (outf, ":"); | |
3302 | OUTS (outf, imm5 (src0)); | |
086134ec | 3303 | OUTS (outf, ", "); |
4b7f6baa CM |
3304 | OUTS (outf, dregs (src1 + 1)); |
3305 | OUTS (outf, ":"); | |
3306 | OUTS (outf, imm5 (src1)); | |
086134ec | 3307 | OUTS (outf, ") (TH"); |
4b7f6baa CM |
3308 | if (s == 1) |
3309 | OUTS (outf, ", R)"); | |
3310 | else | |
3311 | OUTS (outf, ")"); | |
4b7f6baa CM |
3312 | } |
3313 | else if (aop == 3 && aopcde == 22 && HL == 0) | |
3314 | { | |
4b7f6baa | 3315 | OUTS (outf, dregs (dst0)); |
086134ec | 3316 | OUTS (outf, " = BYTEOP2M ("); |
4b7f6baa CM |
3317 | OUTS (outf, dregs (src0 + 1)); |
3318 | OUTS (outf, ":"); | |
3319 | OUTS (outf, imm5 (src0)); | |
086134ec | 3320 | OUTS (outf, ", "); |
4b7f6baa CM |
3321 | OUTS (outf, dregs (src1 + 1)); |
3322 | OUTS (outf, ":"); | |
3323 | OUTS (outf, imm5 (src1)); | |
086134ec | 3324 | OUTS (outf, ") (TL"); |
4b7f6baa CM |
3325 | if (s == 1) |
3326 | OUTS (outf, ", R)"); | |
3327 | else | |
3328 | OUTS (outf, ")"); | |
4b7f6baa CM |
3329 | } |
3330 | else if (aop == 2 && aopcde == 22 && HL == 1) | |
3331 | { | |
4b7f6baa | 3332 | OUTS (outf, dregs (dst0)); |
086134ec | 3333 | OUTS (outf, " = BYTEOP2M ("); |
4b7f6baa CM |
3334 | OUTS (outf, dregs (src0 + 1)); |
3335 | OUTS (outf, ":"); | |
3336 | OUTS (outf, imm5 (src0)); | |
086134ec | 3337 | OUTS (outf, ", "); |
4b7f6baa CM |
3338 | OUTS (outf, dregs (src1 + 1)); |
3339 | OUTS (outf, ":"); | |
3340 | OUTS (outf, imm5 (src1)); | |
086134ec | 3341 | OUTS (outf, ") (RNDH"); |
4b7f6baa CM |
3342 | if (s == 1) |
3343 | OUTS (outf, ", R)"); | |
3344 | else | |
3345 | OUTS (outf, ")"); | |
4b7f6baa CM |
3346 | } |
3347 | else if (aop == 2 && aopcde == 22 && HL == 0) | |
3348 | { | |
4b7f6baa | 3349 | OUTS (outf, dregs (dst0)); |
086134ec | 3350 | OUTS (outf, " = BYTEOP2M ("); |
4b7f6baa CM |
3351 | OUTS (outf, dregs (src0 + 1)); |
3352 | OUTS (outf, ":"); | |
3353 | OUTS (outf, imm5 (src0)); | |
086134ec | 3354 | OUTS (outf, ", "); |
4b7f6baa CM |
3355 | OUTS (outf, dregs (src1 + 1)); |
3356 | OUTS (outf, ":"); | |
3357 | OUTS (outf, imm5 (src1)); | |
086134ec | 3358 | OUTS (outf, ") (RNDL"); |
4b7f6baa CM |
3359 | if (s == 1) |
3360 | OUTS (outf, ", R)"); | |
3361 | else | |
3362 | OUTS (outf, ")"); | |
4b7f6baa CM |
3363 | } |
3364 | else if (aop == 1 && aopcde == 22 && HL == 1) | |
3365 | { | |
4b7f6baa | 3366 | OUTS (outf, dregs (dst0)); |
086134ec | 3367 | OUTS (outf, " = BYTEOP2P ("); |
4b7f6baa CM |
3368 | OUTS (outf, dregs (src0 + 1)); |
3369 | OUTS (outf, ":"); | |
086134ec BS |
3370 | OUTS (outf, imm5d (src0)); |
3371 | OUTS (outf, ", "); | |
4b7f6baa CM |
3372 | OUTS (outf, dregs (src1 + 1)); |
3373 | OUTS (outf, ":"); | |
086134ec BS |
3374 | OUTS (outf, imm5d (src1)); |
3375 | OUTS (outf, ") (TH"); | |
4b7f6baa CM |
3376 | if (s == 1) |
3377 | OUTS (outf, ", R)"); | |
3378 | else | |
3379 | OUTS (outf, ")"); | |
4b7f6baa CM |
3380 | } |
3381 | else if (aop == 1 && aopcde == 22 && HL == 0) | |
3382 | { | |
4b7f6baa | 3383 | OUTS (outf, dregs (dst0)); |
086134ec | 3384 | OUTS (outf, " = BYTEOP2P ("); |
4b7f6baa CM |
3385 | OUTS (outf, dregs (src0 + 1)); |
3386 | OUTS (outf, ":"); | |
086134ec BS |
3387 | OUTS (outf, imm5d (src0)); |
3388 | OUTS (outf, ", "); | |
4b7f6baa CM |
3389 | OUTS (outf, dregs (src1 + 1)); |
3390 | OUTS (outf, ":"); | |
086134ec BS |
3391 | OUTS (outf, imm5d (src1)); |
3392 | OUTS (outf, ") (TL"); | |
4b7f6baa CM |
3393 | if (s == 1) |
3394 | OUTS (outf, ", R)"); | |
3395 | else | |
3396 | OUTS (outf, ")"); | |
4b7f6baa CM |
3397 | } |
3398 | else if (aop == 0 && aopcde == 22 && HL == 1) | |
3399 | { | |
4b7f6baa | 3400 | OUTS (outf, dregs (dst0)); |
086134ec | 3401 | OUTS (outf, " = BYTEOP2P ("); |
4b7f6baa CM |
3402 | OUTS (outf, dregs (src0 + 1)); |
3403 | OUTS (outf, ":"); | |
086134ec BS |
3404 | OUTS (outf, imm5d (src0)); |
3405 | OUTS (outf, ", "); | |
4b7f6baa CM |
3406 | OUTS (outf, dregs (src1 + 1)); |
3407 | OUTS (outf, ":"); | |
086134ec BS |
3408 | OUTS (outf, imm5d (src1)); |
3409 | OUTS (outf, ") (RNDH"); | |
4b7f6baa CM |
3410 | if (s == 1) |
3411 | OUTS (outf, ", R)"); | |
3412 | else | |
3413 | OUTS (outf, ")"); | |
4b7f6baa CM |
3414 | } |
3415 | else if (aop == 0 && aopcde == 22 && HL == 0) | |
3416 | { | |
4b7f6baa | 3417 | OUTS (outf, dregs (dst0)); |
086134ec | 3418 | OUTS (outf, " = BYTEOP2P ("); |
4b7f6baa CM |
3419 | OUTS (outf, dregs (src0 + 1)); |
3420 | OUTS (outf, ":"); | |
086134ec BS |
3421 | OUTS (outf, imm5d (src0)); |
3422 | OUTS (outf, ", "); | |
4b7f6baa CM |
3423 | OUTS (outf, dregs (src1 + 1)); |
3424 | OUTS (outf, ":"); | |
086134ec BS |
3425 | OUTS (outf, imm5d (src1)); |
3426 | OUTS (outf, ") (RNDL"); | |
4b7f6baa CM |
3427 | if (s == 1) |
3428 | OUTS (outf, ", R)"); | |
3429 | else | |
3430 | OUTS (outf, ")"); | |
4b7f6baa CM |
3431 | } |
3432 | else if (aop == 0 && s == 0 && aopcde == 8) | |
086134ec | 3433 | OUTS (outf, "A0 = 0"); |
b7d48530 | 3434 | |
4b7f6baa | 3435 | else if (aop == 0 && s == 1 && aopcde == 8) |
086134ec | 3436 | OUTS (outf, "A0 = A0 (S)"); |
b7d48530 | 3437 | |
4b7f6baa | 3438 | else if (aop == 1 && s == 0 && aopcde == 8) |
086134ec | 3439 | OUTS (outf, "A1 = 0"); |
b7d48530 | 3440 | |
4b7f6baa | 3441 | else if (aop == 1 && s == 1 && aopcde == 8) |
086134ec | 3442 | OUTS (outf, "A1 = A1 (S)"); |
b7d48530 | 3443 | |
4b7f6baa | 3444 | else if (aop == 2 && s == 0 && aopcde == 8) |
086134ec | 3445 | OUTS (outf, "A1 = A0 = 0"); |
b7d48530 | 3446 | |
4b7f6baa | 3447 | else if (aop == 2 && s == 1 && aopcde == 8) |
086134ec | 3448 | OUTS (outf, "A1 = A1 (S), A0 = A0 (S)"); |
b7d48530 | 3449 | |
4b7f6baa | 3450 | else if (aop == 3 && s == 0 && aopcde == 8) |
086134ec | 3451 | OUTS (outf, "A0 = A1"); |
b7d48530 | 3452 | |
4b7f6baa | 3453 | else if (aop == 3 && s == 1 && aopcde == 8) |
086134ec | 3454 | OUTS (outf, "A1 = A0"); |
b7d48530 | 3455 | |
4b7f6baa CM |
3456 | else if (aop == 1 && aopcde == 9 && s == 0) |
3457 | { | |
086134ec | 3458 | OUTS (outf, "A0.X = "); |
4b7f6baa | 3459 | OUTS (outf, dregs_lo (src0)); |
4b7f6baa CM |
3460 | } |
3461 | else if (aop == 1 && HL == 0 && aopcde == 11) | |
3462 | { | |
4b7f6baa | 3463 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3464 | OUTS (outf, " = (A0 += A1)"); |
4b7f6baa CM |
3465 | } |
3466 | else if (aop == 3 && HL == 0 && aopcde == 16) | |
086134ec | 3467 | OUTS (outf, "A1 = ABS A0, A0 = ABS A0"); |
b7d48530 | 3468 | |
4b7f6baa CM |
3469 | else if (aop == 0 && aopcde == 23 && HL == 1) |
3470 | { | |
4b7f6baa | 3471 | OUTS (outf, dregs (dst0)); |
086134ec | 3472 | OUTS (outf, " = BYTEOP3P ("); |
4b7f6baa CM |
3473 | OUTS (outf, dregs (src0 + 1)); |
3474 | OUTS (outf, ":"); | |
086134ec BS |
3475 | OUTS (outf, imm5d (src0)); |
3476 | OUTS (outf, ", "); | |
4b7f6baa CM |
3477 | OUTS (outf, dregs (src1 + 1)); |
3478 | OUTS (outf, ":"); | |
086134ec BS |
3479 | OUTS (outf, imm5d (src1)); |
3480 | OUTS (outf, ") (HI"); | |
4b7f6baa CM |
3481 | if (s == 1) |
3482 | OUTS (outf, ", R)"); | |
3483 | else | |
3484 | OUTS (outf, ")"); | |
4b7f6baa CM |
3485 | } |
3486 | else if (aop == 3 && aopcde == 9 && s == 0) | |
3487 | { | |
086134ec | 3488 | OUTS (outf, "A1.X = "); |
4b7f6baa | 3489 | OUTS (outf, dregs_lo (src0)); |
4b7f6baa CM |
3490 | } |
3491 | else if (aop == 1 && HL == 1 && aopcde == 16) | |
086134ec | 3492 | OUTS (outf, "A1 = ABS A1"); |
b7d48530 | 3493 | |
4b7f6baa | 3494 | else if (aop == 0 && HL == 1 && aopcde == 16) |
086134ec | 3495 | OUTS (outf, "A1 = ABS A0"); |
b7d48530 | 3496 | |
4b7f6baa CM |
3497 | else if (aop == 2 && aopcde == 9 && s == 1) |
3498 | { | |
086134ec | 3499 | OUTS (outf, "A1 = "); |
4b7f6baa | 3500 | OUTS (outf, dregs (src0)); |
4b7f6baa CM |
3501 | } |
3502 | else if (HL == 0 && aop == 3 && aopcde == 12) | |
3503 | { | |
4b7f6baa | 3504 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3505 | OUTS (outf, " = "); |
4b7f6baa | 3506 | OUTS (outf, dregs (src0)); |
086134ec | 3507 | OUTS (outf, " (RND)"); |
4b7f6baa CM |
3508 | } |
3509 | else if (aop == 1 && HL == 0 && aopcde == 16) | |
086134ec | 3510 | OUTS (outf, "A0 = ABS A1"); |
b7d48530 | 3511 | |
4b7f6baa | 3512 | else if (aop == 0 && HL == 0 && aopcde == 16) |
086134ec | 3513 | OUTS (outf, "A0 = ABS A0"); |
b7d48530 | 3514 | |
4b7f6baa CM |
3515 | else if (aop == 3 && HL == 0 && aopcde == 15) |
3516 | { | |
4b7f6baa | 3517 | OUTS (outf, dregs (dst0)); |
086134ec | 3518 | OUTS (outf, " = -"); |
4b7f6baa | 3519 | OUTS (outf, dregs (src0)); |
086134ec | 3520 | OUTS (outf, " (V)"); |
4b7f6baa CM |
3521 | } |
3522 | else if (aop == 3 && s == 1 && HL == 0 && aopcde == 7) | |
3523 | { | |
4b7f6baa | 3524 | OUTS (outf, dregs (dst0)); |
086134ec | 3525 | OUTS (outf, " = -"); |
4b7f6baa | 3526 | OUTS (outf, dregs (src0)); |
086134ec | 3527 | OUTS (outf, " (S)"); |
4b7f6baa CM |
3528 | } |
3529 | else if (aop == 3 && s == 0 && HL == 0 && aopcde == 7) | |
3530 | { | |
4b7f6baa | 3531 | OUTS (outf, dregs (dst0)); |
086134ec | 3532 | OUTS (outf, " = -"); |
4b7f6baa | 3533 | OUTS (outf, dregs (src0)); |
086134ec | 3534 | OUTS (outf, " (NS)"); |
4b7f6baa CM |
3535 | } |
3536 | else if (aop == 1 && HL == 1 && aopcde == 11) | |
3537 | { | |
4b7f6baa | 3538 | OUTS (outf, dregs_hi (dst0)); |
086134ec | 3539 | OUTS (outf, " = (A0 += A1)"); |
4b7f6baa CM |
3540 | } |
3541 | else if (aop == 2 && aopcde == 11 && s == 0) | |
086134ec | 3542 | OUTS (outf, "A0 += A1"); |
b7d48530 | 3543 | |
4b7f6baa | 3544 | else if (aop == 2 && aopcde == 11 && s == 1) |
086134ec | 3545 | OUTS (outf, "A0 += A1 (W32)"); |
b7d48530 | 3546 | |
4b7f6baa | 3547 | else if (aop == 3 && HL == 0 && aopcde == 14) |
086134ec | 3548 | OUTS (outf, "A1 = -A1, A0 = -A0"); |
b7d48530 | 3549 | |
4b7f6baa CM |
3550 | else if (HL == 1 && aop == 3 && aopcde == 12) |
3551 | { | |
4b7f6baa | 3552 | OUTS (outf, dregs_hi (dst0)); |
086134ec | 3553 | OUTS (outf, " = "); |
4b7f6baa | 3554 | OUTS (outf, dregs (src0)); |
086134ec | 3555 | OUTS (outf, " (RND)"); |
4b7f6baa CM |
3556 | } |
3557 | else if (aop == 0 && aopcde == 23 && HL == 0) | |
3558 | { | |
4b7f6baa | 3559 | OUTS (outf, dregs (dst0)); |
086134ec | 3560 | OUTS (outf, " = BYTEOP3P ("); |
4b7f6baa CM |
3561 | OUTS (outf, dregs (src0 + 1)); |
3562 | OUTS (outf, ":"); | |
086134ec BS |
3563 | OUTS (outf, imm5d (src0)); |
3564 | OUTS (outf, ", "); | |
4b7f6baa CM |
3565 | OUTS (outf, dregs (src1 + 1)); |
3566 | OUTS (outf, ":"); | |
086134ec BS |
3567 | OUTS (outf, imm5d (src1)); |
3568 | OUTS (outf, ") (LO"); | |
4b7f6baa CM |
3569 | if (s == 1) |
3570 | OUTS (outf, ", R)"); | |
3571 | else | |
3572 | OUTS (outf, ")"); | |
4b7f6baa CM |
3573 | } |
3574 | else if (aop == 0 && HL == 0 && aopcde == 14) | |
086134ec | 3575 | OUTS (outf, "A0 = -A0"); |
b7d48530 | 3576 | |
4b7f6baa | 3577 | else if (aop == 1 && HL == 0 && aopcde == 14) |
086134ec | 3578 | OUTS (outf, "A0 = -A1"); |
b7d48530 | 3579 | |
4b7f6baa | 3580 | else if (aop == 0 && HL == 1 && aopcde == 14) |
086134ec | 3581 | OUTS (outf, "A1 = -A0"); |
b7d48530 | 3582 | |
4b7f6baa | 3583 | else if (aop == 1 && HL == 1 && aopcde == 14) |
086134ec | 3584 | OUTS (outf, "A1 = -A1"); |
b7d48530 | 3585 | |
4b7f6baa CM |
3586 | else if (aop == 0 && aopcde == 12) |
3587 | { | |
4b7f6baa | 3588 | OUTS (outf, dregs_hi (dst0)); |
086134ec | 3589 | OUTS (outf, " = "); |
4b7f6baa | 3590 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3591 | OUTS (outf, " = SIGN ("); |
4b7f6baa | 3592 | OUTS (outf, dregs_hi (src0)); |
086134ec | 3593 | OUTS (outf, ") * "); |
4b7f6baa | 3594 | OUTS (outf, dregs_hi (src1)); |
086134ec | 3595 | OUTS (outf, " + SIGN ("); |
4b7f6baa | 3596 | OUTS (outf, dregs_lo (src0)); |
086134ec | 3597 | OUTS (outf, ") * "); |
4b7f6baa | 3598 | OUTS (outf, dregs_lo (src1)); |
4b7f6baa CM |
3599 | } |
3600 | else if (aop == 2 && aopcde == 0) | |
3601 | { | |
4b7f6baa | 3602 | OUTS (outf, dregs (dst0)); |
086134ec | 3603 | OUTS (outf, " = "); |
4b7f6baa | 3604 | OUTS (outf, dregs (src0)); |
086134ec | 3605 | OUTS (outf, " -|+ "); |
4b7f6baa | 3606 | OUTS (outf, dregs (src1)); |
4b7f6baa | 3607 | amod0 (s, x, outf); |
4b7f6baa CM |
3608 | } |
3609 | else if (aop == 1 && aopcde == 12) | |
3610 | { | |
4b7f6baa | 3611 | OUTS (outf, dregs (dst1)); |
086134ec | 3612 | OUTS (outf, " = A1.L + A1.H, "); |
4b7f6baa | 3613 | OUTS (outf, dregs (dst0)); |
086134ec | 3614 | OUTS (outf, " = A0.L + A0.H"); |
4b7f6baa CM |
3615 | } |
3616 | else if (aop == 2 && aopcde == 4) | |
3617 | { | |
4b7f6baa | 3618 | OUTS (outf, dregs (dst1)); |
086134ec | 3619 | OUTS (outf, " = "); |
4b7f6baa | 3620 | OUTS (outf, dregs (src0)); |
086134ec | 3621 | OUTS (outf, " + "); |
4b7f6baa | 3622 | OUTS (outf, dregs (src1)); |
086134ec | 3623 | OUTS (outf, ", "); |
4b7f6baa | 3624 | OUTS (outf, dregs (dst0)); |
086134ec | 3625 | OUTS (outf, " = "); |
4b7f6baa | 3626 | OUTS (outf, dregs (src0)); |
086134ec | 3627 | OUTS (outf, " - "); |
4b7f6baa | 3628 | OUTS (outf, dregs (src1)); |
4b7f6baa | 3629 | amod1 (s, x, outf); |
4b7f6baa CM |
3630 | } |
3631 | else if (HL == 0 && aopcde == 1) | |
3632 | { | |
4b7f6baa | 3633 | OUTS (outf, dregs (dst1)); |
086134ec | 3634 | OUTS (outf, " = "); |
4b7f6baa | 3635 | OUTS (outf, dregs (src0)); |
086134ec | 3636 | OUTS (outf, " +|+ "); |
4b7f6baa | 3637 | OUTS (outf, dregs (src1)); |
086134ec | 3638 | OUTS (outf, ", "); |
4b7f6baa | 3639 | OUTS (outf, dregs (dst0)); |
086134ec | 3640 | OUTS (outf, " = "); |
4b7f6baa | 3641 | OUTS (outf, dregs (src0)); |
086134ec | 3642 | OUTS (outf, " -|- "); |
4b7f6baa CM |
3643 | OUTS (outf, dregs (src1)); |
3644 | amod0amod2 (s, x, aop, outf); | |
4b7f6baa CM |
3645 | } |
3646 | else if (aop == 0 && aopcde == 11) | |
3647 | { | |
4b7f6baa | 3648 | OUTS (outf, dregs (dst0)); |
086134ec | 3649 | OUTS (outf, " = (A0 += A1)"); |
4b7f6baa CM |
3650 | } |
3651 | else if (aop == 0 && aopcde == 10) | |
3652 | { | |
4b7f6baa | 3653 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3654 | OUTS (outf, " = A0.X"); |
4b7f6baa CM |
3655 | } |
3656 | else if (aop == 1 && aopcde == 10) | |
3657 | { | |
4b7f6baa | 3658 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3659 | OUTS (outf, " = A1.X"); |
4b7f6baa CM |
3660 | } |
3661 | else if (aop == 1 && aopcde == 0) | |
3662 | { | |
4b7f6baa | 3663 | OUTS (outf, dregs (dst0)); |
086134ec | 3664 | OUTS (outf, " = "); |
4b7f6baa | 3665 | OUTS (outf, dregs (src0)); |
086134ec | 3666 | OUTS (outf, " +|- "); |
4b7f6baa | 3667 | OUTS (outf, dregs (src1)); |
4b7f6baa | 3668 | amod0 (s, x, outf); |
4b7f6baa CM |
3669 | } |
3670 | else if (aop == 3 && aopcde == 0) | |
3671 | { | |
4b7f6baa | 3672 | OUTS (outf, dregs (dst0)); |
086134ec | 3673 | OUTS (outf, " = "); |
4b7f6baa | 3674 | OUTS (outf, dregs (src0)); |
086134ec | 3675 | OUTS (outf, " -|- "); |
4b7f6baa | 3676 | OUTS (outf, dregs (src1)); |
4b7f6baa | 3677 | amod0 (s, x, outf); |
4b7f6baa CM |
3678 | } |
3679 | else if (aop == 1 && aopcde == 4) | |
3680 | { | |
4b7f6baa | 3681 | OUTS (outf, dregs (dst0)); |
086134ec | 3682 | OUTS (outf, " = "); |
4b7f6baa | 3683 | OUTS (outf, dregs (src0)); |
086134ec | 3684 | OUTS (outf, " - "); |
4b7f6baa | 3685 | OUTS (outf, dregs (src1)); |
4b7f6baa | 3686 | amod1 (s, x, outf); |
4b7f6baa CM |
3687 | } |
3688 | else if (aop == 0 && aopcde == 17) | |
3689 | { | |
4b7f6baa | 3690 | OUTS (outf, dregs (dst1)); |
086134ec | 3691 | OUTS (outf, " = A1 + A0, "); |
4b7f6baa | 3692 | OUTS (outf, dregs (dst0)); |
086134ec | 3693 | OUTS (outf, " = A1 - A0"); |
4b7f6baa | 3694 | amod1 (s, x, outf); |
4b7f6baa CM |
3695 | } |
3696 | else if (aop == 1 && aopcde == 17) | |
3697 | { | |
4b7f6baa | 3698 | OUTS (outf, dregs (dst1)); |
086134ec | 3699 | OUTS (outf, " = A0 + A1, "); |
4b7f6baa | 3700 | OUTS (outf, dregs (dst0)); |
086134ec | 3701 | OUTS (outf, " = A0 - A1"); |
4b7f6baa | 3702 | amod1 (s, x, outf); |
4b7f6baa CM |
3703 | } |
3704 | else if (aop == 0 && aopcde == 18) | |
3705 | { | |
086134ec | 3706 | OUTS (outf, "SAA ("); |
4b7f6baa CM |
3707 | OUTS (outf, dregs (src0 + 1)); |
3708 | OUTS (outf, ":"); | |
086134ec BS |
3709 | OUTS (outf, imm5d (src0)); |
3710 | OUTS (outf, ", "); | |
4b7f6baa CM |
3711 | OUTS (outf, dregs (src1 + 1)); |
3712 | OUTS (outf, ":"); | |
086134ec BS |
3713 | OUTS (outf, imm5d (src1)); |
3714 | OUTS (outf, ")"); | |
4b7f6baa | 3715 | aligndir (s, outf); |
4b7f6baa CM |
3716 | } |
3717 | else if (aop == 3 && aopcde == 18) | |
b7d48530 NC |
3718 | OUTS (outf, "DISALGNEXCPT"); |
3719 | ||
4b7f6baa CM |
3720 | else if (aop == 0 && aopcde == 20) |
3721 | { | |
4b7f6baa | 3722 | OUTS (outf, dregs (dst0)); |
086134ec | 3723 | OUTS (outf, " = BYTEOP1P ("); |
4b7f6baa CM |
3724 | OUTS (outf, dregs (src0 + 1)); |
3725 | OUTS (outf, ":"); | |
086134ec BS |
3726 | OUTS (outf, imm5d (src0)); |
3727 | OUTS (outf, ", "); | |
4b7f6baa CM |
3728 | OUTS (outf, dregs (src1 + 1)); |
3729 | OUTS (outf, ":"); | |
086134ec | 3730 | OUTS (outf, imm5d (src1)); |
4b7f6baa CM |
3731 | OUTS (outf, ")"); |
3732 | aligndir (s, outf); | |
4b7f6baa CM |
3733 | } |
3734 | else if (aop == 1 && aopcde == 20) | |
3735 | { | |
4b7f6baa | 3736 | OUTS (outf, dregs (dst0)); |
086134ec | 3737 | OUTS (outf, " = BYTEOP1P ("); |
4b7f6baa CM |
3738 | OUTS (outf, dregs (src0 + 1)); |
3739 | OUTS (outf, ":"); | |
086134ec BS |
3740 | OUTS (outf, imm5d (src0)); |
3741 | OUTS (outf, ", "); | |
4b7f6baa CM |
3742 | OUTS (outf, dregs (src1 + 1)); |
3743 | OUTS (outf, ":"); | |
086134ec BS |
3744 | OUTS (outf, imm5d (src1)); |
3745 | OUTS (outf, ") (T"); | |
4b7f6baa CM |
3746 | if (s == 1) |
3747 | OUTS (outf, ", R)"); | |
3748 | else | |
3749 | OUTS (outf, ")"); | |
4b7f6baa CM |
3750 | } |
3751 | else if (aop == 0 && aopcde == 21) | |
3752 | { | |
4b7f6baa CM |
3753 | OUTS (outf, "("); |
3754 | OUTS (outf, dregs (dst1)); | |
086134ec | 3755 | OUTS (outf, ", "); |
4b7f6baa | 3756 | OUTS (outf, dregs (dst0)); |
086134ec | 3757 | OUTS (outf, ") = BYTEOP16P ("); |
4b7f6baa CM |
3758 | OUTS (outf, dregs (src0 + 1)); |
3759 | OUTS (outf, ":"); | |
086134ec BS |
3760 | OUTS (outf, imm5d (src0)); |
3761 | OUTS (outf, ", "); | |
4b7f6baa CM |
3762 | OUTS (outf, dregs (src1 + 1)); |
3763 | OUTS (outf, ":"); | |
086134ec BS |
3764 | OUTS (outf, imm5d (src1)); |
3765 | OUTS (outf, ")"); | |
4b7f6baa | 3766 | aligndir (s, outf); |
4b7f6baa CM |
3767 | } |
3768 | else if (aop == 1 && aopcde == 21) | |
3769 | { | |
4b7f6baa CM |
3770 | OUTS (outf, "("); |
3771 | OUTS (outf, dregs (dst1)); | |
086134ec | 3772 | OUTS (outf, ", "); |
4b7f6baa | 3773 | OUTS (outf, dregs (dst0)); |
086134ec | 3774 | OUTS (outf, ") = BYTEOP16M ("); |
4b7f6baa CM |
3775 | OUTS (outf, dregs (src0 + 1)); |
3776 | OUTS (outf, ":"); | |
086134ec BS |
3777 | OUTS (outf, imm5d (src0)); |
3778 | OUTS (outf, ", "); | |
4b7f6baa CM |
3779 | OUTS (outf, dregs (src1 + 1)); |
3780 | OUTS (outf, ":"); | |
086134ec BS |
3781 | OUTS (outf, imm5d (src1)); |
3782 | OUTS (outf, ")"); | |
4b7f6baa | 3783 | aligndir (s, outf); |
4b7f6baa CM |
3784 | } |
3785 | else if (aop == 2 && aopcde == 7) | |
3786 | { | |
4b7f6baa | 3787 | OUTS (outf, dregs (dst0)); |
086134ec | 3788 | OUTS (outf, " = ABS "); |
4b7f6baa | 3789 | OUTS (outf, dregs (src0)); |
4b7f6baa CM |
3790 | } |
3791 | else if (aop == 1 && aopcde == 7) | |
3792 | { | |
4b7f6baa | 3793 | OUTS (outf, dregs (dst0)); |
086134ec | 3794 | OUTS (outf, " = MIN ("); |
4b7f6baa | 3795 | OUTS (outf, dregs (src0)); |
086134ec | 3796 | OUTS (outf, ", "); |
4b7f6baa CM |
3797 | OUTS (outf, dregs (src1)); |
3798 | OUTS (outf, ")"); | |
4b7f6baa CM |
3799 | } |
3800 | else if (aop == 0 && aopcde == 7) | |
3801 | { | |
4b7f6baa | 3802 | OUTS (outf, dregs (dst0)); |
086134ec | 3803 | OUTS (outf, " = MAX ("); |
4b7f6baa | 3804 | OUTS (outf, dregs (src0)); |
086134ec | 3805 | OUTS (outf, ", "); |
4b7f6baa CM |
3806 | OUTS (outf, dregs (src1)); |
3807 | OUTS (outf, ")"); | |
4b7f6baa CM |
3808 | } |
3809 | else if (aop == 2 && aopcde == 6) | |
3810 | { | |
4b7f6baa | 3811 | OUTS (outf, dregs (dst0)); |
086134ec | 3812 | OUTS (outf, " = ABS "); |
4b7f6baa | 3813 | OUTS (outf, dregs (src0)); |
086134ec | 3814 | OUTS (outf, " (V)"); |
4b7f6baa CM |
3815 | } |
3816 | else if (aop == 1 && aopcde == 6) | |
3817 | { | |
4b7f6baa | 3818 | OUTS (outf, dregs (dst0)); |
086134ec | 3819 | OUTS (outf, " = MIN ("); |
4b7f6baa | 3820 | OUTS (outf, dregs (src0)); |
086134ec | 3821 | OUTS (outf, ", "); |
4b7f6baa | 3822 | OUTS (outf, dregs (src1)); |
086134ec | 3823 | OUTS (outf, ") (V)"); |
4b7f6baa CM |
3824 | } |
3825 | else if (aop == 0 && aopcde == 6) | |
3826 | { | |
4b7f6baa | 3827 | OUTS (outf, dregs (dst0)); |
086134ec | 3828 | OUTS (outf, " = MAX ("); |
4b7f6baa | 3829 | OUTS (outf, dregs (src0)); |
086134ec | 3830 | OUTS (outf, ", "); |
4b7f6baa | 3831 | OUTS (outf, dregs (src1)); |
086134ec | 3832 | OUTS (outf, ") (V)"); |
4b7f6baa CM |
3833 | } |
3834 | else if (HL == 1 && aopcde == 1) | |
3835 | { | |
4b7f6baa | 3836 | OUTS (outf, dregs (dst1)); |
086134ec | 3837 | OUTS (outf, " = "); |
4b7f6baa | 3838 | OUTS (outf, dregs (src0)); |
086134ec | 3839 | OUTS (outf, " +|- "); |
4b7f6baa | 3840 | OUTS (outf, dregs (src1)); |
086134ec | 3841 | OUTS (outf, ", "); |
4b7f6baa | 3842 | OUTS (outf, dregs (dst0)); |
086134ec | 3843 | OUTS (outf, " = "); |
4b7f6baa | 3844 | OUTS (outf, dregs (src0)); |
086134ec | 3845 | OUTS (outf, " -|+ "); |
4b7f6baa CM |
3846 | OUTS (outf, dregs (src1)); |
3847 | amod0amod2 (s, x, aop, outf); | |
4b7f6baa CM |
3848 | } |
3849 | else if (aop == 0 && aopcde == 4) | |
3850 | { | |
4b7f6baa | 3851 | OUTS (outf, dregs (dst0)); |
086134ec | 3852 | OUTS (outf, " = "); |
4b7f6baa | 3853 | OUTS (outf, dregs (src0)); |
086134ec | 3854 | OUTS (outf, " + "); |
4b7f6baa | 3855 | OUTS (outf, dregs (src1)); |
4b7f6baa | 3856 | amod1 (s, x, outf); |
4b7f6baa CM |
3857 | } |
3858 | else if (aop == 0 && aopcde == 0) | |
3859 | { | |
4b7f6baa | 3860 | OUTS (outf, dregs (dst0)); |
086134ec | 3861 | OUTS (outf, " = "); |
4b7f6baa | 3862 | OUTS (outf, dregs (src0)); |
086134ec | 3863 | OUTS (outf, " +|+ "); |
4b7f6baa | 3864 | OUTS (outf, dregs (src1)); |
4b7f6baa | 3865 | amod0 (s, x, outf); |
4b7f6baa CM |
3866 | } |
3867 | else if (aop == 0 && aopcde == 24) | |
3868 | { | |
4b7f6baa | 3869 | OUTS (outf, dregs (dst0)); |
086134ec | 3870 | OUTS (outf, " = BYTEPACK ("); |
4b7f6baa | 3871 | OUTS (outf, dregs (src0)); |
086134ec | 3872 | OUTS (outf, ", "); |
4b7f6baa CM |
3873 | OUTS (outf, dregs (src1)); |
3874 | OUTS (outf, ")"); | |
4b7f6baa CM |
3875 | } |
3876 | else if (aop == 1 && aopcde == 24) | |
3877 | { | |
4b7f6baa CM |
3878 | OUTS (outf, "("); |
3879 | OUTS (outf, dregs (dst1)); | |
086134ec | 3880 | OUTS (outf, ", "); |
4b7f6baa CM |
3881 | OUTS (outf, dregs (dst0)); |
3882 | OUTS (outf, ") = BYTEUNPACK "); | |
3883 | OUTS (outf, dregs (src0 + 1)); | |
3884 | OUTS (outf, ":"); | |
086134ec | 3885 | OUTS (outf, imm5d (src0)); |
4b7f6baa | 3886 | aligndir (s, outf); |
4b7f6baa CM |
3887 | } |
3888 | else if (aopcde == 13) | |
3889 | { | |
4b7f6baa CM |
3890 | OUTS (outf, "("); |
3891 | OUTS (outf, dregs (dst1)); | |
086134ec | 3892 | OUTS (outf, ", "); |
4b7f6baa CM |
3893 | OUTS (outf, dregs (dst0)); |
3894 | OUTS (outf, ") = SEARCH "); | |
3895 | OUTS (outf, dregs (src0)); | |
086134ec | 3896 | OUTS (outf, " ("); |
4b7f6baa CM |
3897 | searchmod (aop, outf); |
3898 | OUTS (outf, ")"); | |
4b7f6baa CM |
3899 | } |
3900 | else | |
b7d48530 NC |
3901 | return 0; |
3902 | ||
3903 | return 4; | |
4b7f6baa CM |
3904 | } |
3905 | ||
3906 | static int | |
3907 | decode_dsp32shift_0 (TIword iw0, TIword iw1, disassemble_info *outf) | |
3908 | { | |
b7d48530 NC |
3909 | /* dsp32shift |
3910 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
3911 | | 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 0 | - | - |.sopcde............| | |
3912 | |.sop...|.HLs...|.dst0......| - | - | - |.src0......|.src1......| | |
3913 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
3914 | int HLs = ((iw1 >> DSP32Shift_HLs_bits) & DSP32Shift_HLs_mask); |
3915 | int sop = ((iw1 >> DSP32Shift_sop_bits) & DSP32Shift_sop_mask); | |
3916 | int src0 = ((iw1 >> DSP32Shift_src0_bits) & DSP32Shift_src0_mask); | |
3917 | int src1 = ((iw1 >> DSP32Shift_src1_bits) & DSP32Shift_src1_mask); | |
3918 | int dst0 = ((iw1 >> DSP32Shift_dst0_bits) & DSP32Shift_dst0_mask); | |
3919 | int sopcde = ((iw0 >> (DSP32Shift_sopcde_bits - 16)) & DSP32Shift_sopcde_mask); | |
3920 | const char *acc01 = (HLs & 1) == 0 ? "A0" : "A1"; | |
3921 | ||
4b7f6baa CM |
3922 | if (HLs == 0 && sop == 0 && sopcde == 0) |
3923 | { | |
4b7f6baa | 3924 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3925 | OUTS (outf, " = ASHIFT "); |
4b7f6baa CM |
3926 | OUTS (outf, dregs_lo (src1)); |
3927 | OUTS (outf, " BY "); | |
3928 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
3929 | } |
3930 | else if (HLs == 1 && sop == 0 && sopcde == 0) | |
3931 | { | |
4b7f6baa | 3932 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3933 | OUTS (outf, " = ASHIFT "); |
4b7f6baa CM |
3934 | OUTS (outf, dregs_hi (src1)); |
3935 | OUTS (outf, " BY "); | |
3936 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
3937 | } |
3938 | else if (HLs == 2 && sop == 0 && sopcde == 0) | |
3939 | { | |
4b7f6baa | 3940 | OUTS (outf, dregs_hi (dst0)); |
086134ec | 3941 | OUTS (outf, " = ASHIFT "); |
4b7f6baa CM |
3942 | OUTS (outf, dregs_lo (src1)); |
3943 | OUTS (outf, " BY "); | |
3944 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
3945 | } |
3946 | else if (HLs == 3 && sop == 0 && sopcde == 0) | |
3947 | { | |
4b7f6baa | 3948 | OUTS (outf, dregs_hi (dst0)); |
086134ec | 3949 | OUTS (outf, " = ASHIFT "); |
4b7f6baa CM |
3950 | OUTS (outf, dregs_hi (src1)); |
3951 | OUTS (outf, " BY "); | |
3952 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
3953 | } |
3954 | else if (HLs == 0 && sop == 1 && sopcde == 0) | |
3955 | { | |
4b7f6baa | 3956 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3957 | OUTS (outf, " = ASHIFT "); |
4b7f6baa CM |
3958 | OUTS (outf, dregs_lo (src1)); |
3959 | OUTS (outf, " BY "); | |
3960 | OUTS (outf, dregs_lo (src0)); | |
086134ec | 3961 | OUTS (outf, " (S)"); |
4b7f6baa CM |
3962 | } |
3963 | else if (HLs == 1 && sop == 1 && sopcde == 0) | |
3964 | { | |
4b7f6baa | 3965 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 3966 | OUTS (outf, " = ASHIFT "); |
4b7f6baa CM |
3967 | OUTS (outf, dregs_hi (src1)); |
3968 | OUTS (outf, " BY "); | |
3969 | OUTS (outf, dregs_lo (src0)); | |
086134ec | 3970 | OUTS (outf, " (S)"); |
4b7f6baa CM |
3971 | } |
3972 | else if (HLs == 2 && sop == 1 && sopcde == 0) | |
3973 | { | |
4b7f6baa | 3974 | OUTS (outf, dregs_hi (dst0)); |
086134ec | 3975 | OUTS (outf, " = ASHIFT "); |
4b7f6baa CM |
3976 | OUTS (outf, dregs_lo (src1)); |
3977 | OUTS (outf, " BY "); | |
3978 | OUTS (outf, dregs_lo (src0)); | |
086134ec | 3979 | OUTS (outf, " (S)"); |
4b7f6baa CM |
3980 | } |
3981 | else if (HLs == 3 && sop == 1 && sopcde == 0) | |
3982 | { | |
4b7f6baa | 3983 | OUTS (outf, dregs_hi (dst0)); |
086134ec | 3984 | OUTS (outf, " = ASHIFT "); |
4b7f6baa CM |
3985 | OUTS (outf, dregs_hi (src1)); |
3986 | OUTS (outf, " BY "); | |
3987 | OUTS (outf, dregs_lo (src0)); | |
086134ec | 3988 | OUTS (outf, " (S)"); |
4b7f6baa CM |
3989 | } |
3990 | else if (sop == 2 && sopcde == 0) | |
3991 | { | |
4b7f6baa | 3992 | OUTS (outf, (HLs & 2) == 0 ? dregs_lo (dst0) : dregs_hi (dst0)); |
086134ec | 3993 | OUTS (outf, " = LSHIFT "); |
4b7f6baa CM |
3994 | OUTS (outf, (HLs & 1) == 0 ? dregs_lo (src1) : dregs_hi (src1)); |
3995 | OUTS (outf, " BY "); | |
3996 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
3997 | } |
3998 | else if (sop == 0 && sopcde == 3) | |
3999 | { | |
4b7f6baa | 4000 | OUTS (outf, acc01); |
086134ec | 4001 | OUTS (outf, " = ASHIFT "); |
4b7f6baa CM |
4002 | OUTS (outf, acc01); |
4003 | OUTS (outf, " BY "); | |
4004 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
4005 | } |
4006 | else if (sop == 1 && sopcde == 3) | |
4007 | { | |
4b7f6baa | 4008 | OUTS (outf, acc01); |
086134ec | 4009 | OUTS (outf, " = LSHIFT "); |
4b7f6baa CM |
4010 | OUTS (outf, acc01); |
4011 | OUTS (outf, " BY "); | |
4012 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
4013 | } |
4014 | else if (sop == 2 && sopcde == 3) | |
4015 | { | |
4b7f6baa | 4016 | OUTS (outf, acc01); |
086134ec | 4017 | OUTS (outf, " = ROT "); |
4b7f6baa CM |
4018 | OUTS (outf, acc01); |
4019 | OUTS (outf, " BY "); | |
4020 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
4021 | } |
4022 | else if (sop == 3 && sopcde == 3) | |
4023 | { | |
4b7f6baa | 4024 | OUTS (outf, dregs (dst0)); |
086134ec | 4025 | OUTS (outf, " = ROT "); |
4b7f6baa CM |
4026 | OUTS (outf, dregs (src1)); |
4027 | OUTS (outf, " BY "); | |
4028 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
4029 | } |
4030 | else if (sop == 1 && sopcde == 1) | |
4031 | { | |
4b7f6baa | 4032 | OUTS (outf, dregs (dst0)); |
086134ec | 4033 | OUTS (outf, " = ASHIFT "); |
4b7f6baa CM |
4034 | OUTS (outf, dregs (src1)); |
4035 | OUTS (outf, " BY "); | |
4036 | OUTS (outf, dregs_lo (src0)); | |
086134ec | 4037 | OUTS (outf, " (V, S)"); |
4b7f6baa CM |
4038 | } |
4039 | else if (sop == 0 && sopcde == 1) | |
4040 | { | |
4b7f6baa | 4041 | OUTS (outf, dregs (dst0)); |
086134ec | 4042 | OUTS (outf, " = ASHIFT "); |
4b7f6baa CM |
4043 | OUTS (outf, dregs (src1)); |
4044 | OUTS (outf, " BY "); | |
4045 | OUTS (outf, dregs_lo (src0)); | |
086134ec | 4046 | OUTS (outf, " (V)"); |
4b7f6baa CM |
4047 | } |
4048 | else if (sop == 0 && sopcde == 2) | |
4049 | { | |
4b7f6baa | 4050 | OUTS (outf, dregs (dst0)); |
086134ec | 4051 | OUTS (outf, " = ASHIFT "); |
4b7f6baa CM |
4052 | OUTS (outf, dregs (src1)); |
4053 | OUTS (outf, " BY "); | |
4054 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
4055 | } |
4056 | else if (sop == 1 && sopcde == 2) | |
4057 | { | |
4b7f6baa | 4058 | OUTS (outf, dregs (dst0)); |
086134ec | 4059 | OUTS (outf, " = ASHIFT "); |
4b7f6baa CM |
4060 | OUTS (outf, dregs (src1)); |
4061 | OUTS (outf, " BY "); | |
4062 | OUTS (outf, dregs_lo (src0)); | |
086134ec | 4063 | OUTS (outf, " (S)"); |
4b7f6baa CM |
4064 | } |
4065 | else if (sop == 2 && sopcde == 2) | |
4066 | { | |
4b7f6baa | 4067 | OUTS (outf, dregs (dst0)); |
59a82d23 | 4068 | OUTS (outf, " = LSHIFT "); |
4b7f6baa CM |
4069 | OUTS (outf, dregs (src1)); |
4070 | OUTS (outf, " BY "); | |
4071 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
4072 | } |
4073 | else if (sop == 3 && sopcde == 2) | |
4074 | { | |
4b7f6baa | 4075 | OUTS (outf, dregs (dst0)); |
086134ec | 4076 | OUTS (outf, " = ROT "); |
4b7f6baa CM |
4077 | OUTS (outf, dregs (src1)); |
4078 | OUTS (outf, " BY "); | |
4079 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
4080 | } |
4081 | else if (sop == 2 && sopcde == 1) | |
4082 | { | |
4b7f6baa | 4083 | OUTS (outf, dregs (dst0)); |
59a82d23 | 4084 | OUTS (outf, " = LSHIFT "); |
4b7f6baa CM |
4085 | OUTS (outf, dregs (src1)); |
4086 | OUTS (outf, " BY "); | |
4087 | OUTS (outf, dregs_lo (src0)); | |
086134ec | 4088 | OUTS (outf, " (V)"); |
4b7f6baa CM |
4089 | } |
4090 | else if (sop == 0 && sopcde == 4) | |
4091 | { | |
4b7f6baa | 4092 | OUTS (outf, dregs (dst0)); |
086134ec | 4093 | OUTS (outf, " = PACK ("); |
4b7f6baa | 4094 | OUTS (outf, dregs_lo (src1)); |
086134ec | 4095 | OUTS (outf, ", "); |
4b7f6baa CM |
4096 | OUTS (outf, dregs_lo (src0)); |
4097 | OUTS (outf, ")"); | |
4b7f6baa CM |
4098 | } |
4099 | else if (sop == 1 && sopcde == 4) | |
4100 | { | |
4b7f6baa | 4101 | OUTS (outf, dregs (dst0)); |
086134ec | 4102 | OUTS (outf, " = PACK ("); |
4b7f6baa | 4103 | OUTS (outf, dregs_lo (src1)); |
086134ec | 4104 | OUTS (outf, ", "); |
4b7f6baa CM |
4105 | OUTS (outf, dregs_hi (src0)); |
4106 | OUTS (outf, ")"); | |
4b7f6baa CM |
4107 | } |
4108 | else if (sop == 2 && sopcde == 4) | |
4109 | { | |
4b7f6baa | 4110 | OUTS (outf, dregs (dst0)); |
086134ec | 4111 | OUTS (outf, " = PACK ("); |
4b7f6baa | 4112 | OUTS (outf, dregs_hi (src1)); |
086134ec | 4113 | OUTS (outf, ", "); |
4b7f6baa CM |
4114 | OUTS (outf, dregs_lo (src0)); |
4115 | OUTS (outf, ")"); | |
4b7f6baa CM |
4116 | } |
4117 | else if (sop == 3 && sopcde == 4) | |
4118 | { | |
4b7f6baa | 4119 | OUTS (outf, dregs (dst0)); |
086134ec | 4120 | OUTS (outf, " = PACK ("); |
4b7f6baa | 4121 | OUTS (outf, dregs_hi (src1)); |
086134ec | 4122 | OUTS (outf, ", "); |
4b7f6baa CM |
4123 | OUTS (outf, dregs_hi (src0)); |
4124 | OUTS (outf, ")"); | |
4b7f6baa CM |
4125 | } |
4126 | else if (sop == 0 && sopcde == 5) | |
4127 | { | |
4b7f6baa | 4128 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 4129 | OUTS (outf, " = SIGNBITS "); |
4b7f6baa | 4130 | OUTS (outf, dregs (src1)); |
4b7f6baa CM |
4131 | } |
4132 | else if (sop == 1 && sopcde == 5) | |
4133 | { | |
4b7f6baa | 4134 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 4135 | OUTS (outf, " = SIGNBITS "); |
4b7f6baa | 4136 | OUTS (outf, dregs_lo (src1)); |
4b7f6baa CM |
4137 | } |
4138 | else if (sop == 2 && sopcde == 5) | |
4139 | { | |
4b7f6baa | 4140 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 4141 | OUTS (outf, " = SIGNBITS "); |
4b7f6baa | 4142 | OUTS (outf, dregs_hi (src1)); |
4b7f6baa CM |
4143 | } |
4144 | else if (sop == 0 && sopcde == 6) | |
4145 | { | |
4b7f6baa | 4146 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 4147 | OUTS (outf, " = SIGNBITS A0"); |
4b7f6baa CM |
4148 | } |
4149 | else if (sop == 1 && sopcde == 6) | |
4150 | { | |
4b7f6baa | 4151 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 4152 | OUTS (outf, " = SIGNBITS A1"); |
4b7f6baa CM |
4153 | } |
4154 | else if (sop == 3 && sopcde == 6) | |
4155 | { | |
4b7f6baa | 4156 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 4157 | OUTS (outf, " = ONES "); |
4b7f6baa | 4158 | OUTS (outf, dregs (src1)); |
4b7f6baa CM |
4159 | } |
4160 | else if (sop == 0 && sopcde == 7) | |
4161 | { | |
4b7f6baa | 4162 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 4163 | OUTS (outf, " = EXPADJ ("); |
4b7f6baa | 4164 | OUTS (outf, dregs (src1)); |
086134ec | 4165 | OUTS (outf, ", "); |
4b7f6baa CM |
4166 | OUTS (outf, dregs_lo (src0)); |
4167 | OUTS (outf, ")"); | |
4b7f6baa CM |
4168 | } |
4169 | else if (sop == 1 && sopcde == 7) | |
4170 | { | |
4b7f6baa | 4171 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 4172 | OUTS (outf, " = EXPADJ ("); |
4b7f6baa | 4173 | OUTS (outf, dregs (src1)); |
086134ec | 4174 | OUTS (outf, ", "); |
4b7f6baa CM |
4175 | OUTS (outf, dregs_lo (src0)); |
4176 | OUTS (outf, ") (V)"); | |
4b7f6baa CM |
4177 | } |
4178 | else if (sop == 2 && sopcde == 7) | |
4179 | { | |
4b7f6baa | 4180 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 4181 | OUTS (outf, " = EXPADJ ("); |
4b7f6baa | 4182 | OUTS (outf, dregs_lo (src1)); |
086134ec | 4183 | OUTS (outf, ", "); |
4b7f6baa CM |
4184 | OUTS (outf, dregs_lo (src0)); |
4185 | OUTS (outf, ")"); | |
4b7f6baa CM |
4186 | } |
4187 | else if (sop == 3 && sopcde == 7) | |
4188 | { | |
4b7f6baa | 4189 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 4190 | OUTS (outf, " = EXPADJ ("); |
4b7f6baa | 4191 | OUTS (outf, dregs_hi (src1)); |
086134ec | 4192 | OUTS (outf, ", "); |
4b7f6baa CM |
4193 | OUTS (outf, dregs_lo (src0)); |
4194 | OUTS (outf, ")"); | |
4b7f6baa CM |
4195 | } |
4196 | else if (sop == 0 && sopcde == 8) | |
4197 | { | |
4b7f6baa CM |
4198 | OUTS (outf, "BITMUX ("); |
4199 | OUTS (outf, dregs (src0)); | |
086134ec | 4200 | OUTS (outf, ", "); |
4b7f6baa | 4201 | OUTS (outf, dregs (src1)); |
086134ec | 4202 | OUTS (outf, ", A0) (ASR)"); |
4b7f6baa CM |
4203 | } |
4204 | else if (sop == 1 && sopcde == 8) | |
4205 | { | |
4b7f6baa CM |
4206 | OUTS (outf, "BITMUX ("); |
4207 | OUTS (outf, dregs (src0)); | |
086134ec | 4208 | OUTS (outf, ", "); |
4b7f6baa | 4209 | OUTS (outf, dregs (src1)); |
086134ec | 4210 | OUTS (outf, ", A0) (ASL)"); |
4b7f6baa CM |
4211 | } |
4212 | else if (sop == 0 && sopcde == 9) | |
4213 | { | |
4b7f6baa | 4214 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 4215 | OUTS (outf, " = VIT_MAX ("); |
4b7f6baa CM |
4216 | OUTS (outf, dregs (src1)); |
4217 | OUTS (outf, ") (ASL)"); | |
4b7f6baa CM |
4218 | } |
4219 | else if (sop == 1 && sopcde == 9) | |
4220 | { | |
4b7f6baa | 4221 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 4222 | OUTS (outf, " = VIT_MAX ("); |
4b7f6baa CM |
4223 | OUTS (outf, dregs (src1)); |
4224 | OUTS (outf, ") (ASR)"); | |
4b7f6baa CM |
4225 | } |
4226 | else if (sop == 2 && sopcde == 9) | |
4227 | { | |
4b7f6baa | 4228 | OUTS (outf, dregs (dst0)); |
086134ec | 4229 | OUTS (outf, " = VIT_MAX ("); |
4b7f6baa | 4230 | OUTS (outf, dregs (src1)); |
086134ec | 4231 | OUTS (outf, ", "); |
4b7f6baa | 4232 | OUTS (outf, dregs (src0)); |
086134ec | 4233 | OUTS (outf, ") (ASL)"); |
4b7f6baa CM |
4234 | } |
4235 | else if (sop == 3 && sopcde == 9) | |
4236 | { | |
4b7f6baa | 4237 | OUTS (outf, dregs (dst0)); |
086134ec | 4238 | OUTS (outf, " = VIT_MAX ("); |
4b7f6baa | 4239 | OUTS (outf, dregs (src1)); |
086134ec | 4240 | OUTS (outf, ", "); |
4b7f6baa | 4241 | OUTS (outf, dregs (src0)); |
086134ec | 4242 | OUTS (outf, ") (ASR)"); |
4b7f6baa CM |
4243 | } |
4244 | else if (sop == 0 && sopcde == 10) | |
4245 | { | |
4b7f6baa | 4246 | OUTS (outf, dregs (dst0)); |
086134ec | 4247 | OUTS (outf, " = EXTRACT ("); |
4b7f6baa | 4248 | OUTS (outf, dregs (src1)); |
086134ec | 4249 | OUTS (outf, ", "); |
4b7f6baa CM |
4250 | OUTS (outf, dregs_lo (src0)); |
4251 | OUTS (outf, ") (Z)"); | |
4b7f6baa CM |
4252 | } |
4253 | else if (sop == 1 && sopcde == 10) | |
4254 | { | |
4b7f6baa | 4255 | OUTS (outf, dregs (dst0)); |
086134ec | 4256 | OUTS (outf, " = EXTRACT ("); |
4b7f6baa | 4257 | OUTS (outf, dregs (src1)); |
086134ec | 4258 | OUTS (outf, ", "); |
4b7f6baa | 4259 | OUTS (outf, dregs_lo (src0)); |
086134ec | 4260 | OUTS (outf, ") (X)"); |
4b7f6baa CM |
4261 | } |
4262 | else if (sop == 2 && sopcde == 10) | |
4263 | { | |
4b7f6baa | 4264 | OUTS (outf, dregs (dst0)); |
086134ec | 4265 | OUTS (outf, " = DEPOSIT ("); |
4b7f6baa | 4266 | OUTS (outf, dregs (src1)); |
086134ec | 4267 | OUTS (outf, ", "); |
4b7f6baa CM |
4268 | OUTS (outf, dregs (src0)); |
4269 | OUTS (outf, ")"); | |
4b7f6baa CM |
4270 | } |
4271 | else if (sop == 3 && sopcde == 10) | |
4272 | { | |
4b7f6baa | 4273 | OUTS (outf, dregs (dst0)); |
086134ec | 4274 | OUTS (outf, " = DEPOSIT ("); |
4b7f6baa | 4275 | OUTS (outf, dregs (src1)); |
086134ec | 4276 | OUTS (outf, ", "); |
4b7f6baa | 4277 | OUTS (outf, dregs (src0)); |
086134ec | 4278 | OUTS (outf, ") (X)"); |
4b7f6baa CM |
4279 | } |
4280 | else if (sop == 0 && sopcde == 11) | |
4281 | { | |
4b7f6baa | 4282 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 4283 | OUTS (outf, " = CC = BXORSHIFT (A0, "); |
4b7f6baa CM |
4284 | OUTS (outf, dregs (src0)); |
4285 | OUTS (outf, ")"); | |
4b7f6baa CM |
4286 | } |
4287 | else if (sop == 1 && sopcde == 11) | |
4288 | { | |
4b7f6baa | 4289 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 4290 | OUTS (outf, " = CC = BXOR (A0, "); |
4b7f6baa CM |
4291 | OUTS (outf, dregs (src0)); |
4292 | OUTS (outf, ")"); | |
4b7f6baa CM |
4293 | } |
4294 | else if (sop == 0 && sopcde == 12) | |
086134ec | 4295 | OUTS (outf, "A0 = BXORSHIFT (A0, A1, CC)"); |
b7d48530 | 4296 | |
4b7f6baa CM |
4297 | else if (sop == 1 && sopcde == 12) |
4298 | { | |
4b7f6baa | 4299 | OUTS (outf, dregs_lo (dst0)); |
086134ec | 4300 | OUTS (outf, " = CC = BXOR (A0, A1, CC)"); |
4b7f6baa CM |
4301 | } |
4302 | else if (sop == 0 && sopcde == 13) | |
4303 | { | |
4b7f6baa | 4304 | OUTS (outf, dregs (dst0)); |
086134ec | 4305 | OUTS (outf, " = ALIGN8 ("); |
4b7f6baa | 4306 | OUTS (outf, dregs (src1)); |
086134ec | 4307 | OUTS (outf, ", "); |
4b7f6baa CM |
4308 | OUTS (outf, dregs (src0)); |
4309 | OUTS (outf, ")"); | |
4b7f6baa CM |
4310 | } |
4311 | else if (sop == 1 && sopcde == 13) | |
4312 | { | |
4b7f6baa | 4313 | OUTS (outf, dregs (dst0)); |
086134ec | 4314 | OUTS (outf, " = ALIGN16 ("); |
4b7f6baa | 4315 | OUTS (outf, dregs (src1)); |
086134ec | 4316 | OUTS (outf, ", "); |
4b7f6baa CM |
4317 | OUTS (outf, dregs (src0)); |
4318 | OUTS (outf, ")"); | |
4b7f6baa CM |
4319 | } |
4320 | else if (sop == 2 && sopcde == 13) | |
4321 | { | |
4b7f6baa | 4322 | OUTS (outf, dregs (dst0)); |
086134ec | 4323 | OUTS (outf, " = ALIGN24 ("); |
4b7f6baa | 4324 | OUTS (outf, dregs (src1)); |
086134ec | 4325 | OUTS (outf, ", "); |
4b7f6baa CM |
4326 | OUTS (outf, dregs (src0)); |
4327 | OUTS (outf, ")"); | |
4b7f6baa CM |
4328 | } |
4329 | else | |
b7d48530 NC |
4330 | return 0; |
4331 | ||
4332 | return 4; | |
4b7f6baa CM |
4333 | } |
4334 | ||
4335 | static int | |
4336 | decode_dsp32shiftimm_0 (TIword iw0, TIword iw1, disassemble_info *outf) | |
4337 | { | |
b7d48530 NC |
4338 | /* dsp32shiftimm |
4339 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
4340 | | 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 1 | - | - |.sopcde............| | |
4341 | |.sop...|.HLs...|.dst0......|.immag.................|.src1......| | |
4342 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4343 | int src1 = ((iw1 >> DSP32ShiftImm_src1_bits) & DSP32ShiftImm_src1_mask); | |
4344 | int sop = ((iw1 >> DSP32ShiftImm_sop_bits) & DSP32ShiftImm_sop_mask); | |
4345 | int bit8 = ((iw1 >> 8) & 0x1); | |
4346 | int immag = ((iw1 >> DSP32ShiftImm_immag_bits) & DSP32ShiftImm_immag_mask); | |
4b7f6baa | 4347 | int newimmag = (-(iw1 >> DSP32ShiftImm_immag_bits) & DSP32ShiftImm_immag_mask); |
b7d48530 NC |
4348 | int dst0 = ((iw1 >> DSP32ShiftImm_dst0_bits) & DSP32ShiftImm_dst0_mask); |
4349 | int sopcde = ((iw0 >> (DSP32ShiftImm_sopcde_bits - 16)) & DSP32ShiftImm_sopcde_mask); | |
4350 | int HLs = ((iw1 >> DSP32ShiftImm_HLs_bits) & DSP32ShiftImm_HLs_mask); | |
4b7f6baa CM |
4351 | |
4352 | ||
331f1cbe | 4353 | if (sop == 0 && sopcde == 0) |
4b7f6baa | 4354 | { |
331f1cbe BS |
4355 | OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); |
4356 | OUTS (outf, " = "); | |
4357 | OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); | |
4358 | OUTS (outf, " >>> "); | |
4b7f6baa | 4359 | OUTS (outf, uimm4 (newimmag)); |
4b7f6baa | 4360 | } |
331f1cbe | 4361 | else if (sop == 1 && sopcde == 0 && bit8 == 0) |
4b7f6baa | 4362 | { |
331f1cbe BS |
4363 | OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); |
4364 | OUTS (outf, " = "); | |
4365 | OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); | |
4366 | OUTS (outf, " << "); | |
4b7f6baa | 4367 | OUTS (outf, uimm4 (immag)); |
331f1cbe | 4368 | OUTS (outf, " (S)"); |
4b7f6baa | 4369 | } |
331f1cbe | 4370 | else if (sop == 1 && sopcde == 0 && bit8 == 1) |
4b7f6baa | 4371 | { |
331f1cbe BS |
4372 | OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); |
4373 | OUTS (outf, " = "); | |
4374 | OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); | |
4375 | OUTS (outf, " >>> "); | |
4b7f6baa | 4376 | OUTS (outf, uimm4 (newimmag)); |
331f1cbe | 4377 | OUTS (outf, " (S)"); |
4b7f6baa | 4378 | } |
331f1cbe | 4379 | else if (sop == 2 && sopcde == 0 && bit8 == 0) |
4b7f6baa | 4380 | { |
331f1cbe BS |
4381 | OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); |
4382 | OUTS (outf, " = "); | |
4383 | OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); | |
4384 | OUTS (outf, " << "); | |
4b7f6baa | 4385 | OUTS (outf, uimm4 (immag)); |
4b7f6baa | 4386 | } |
331f1cbe | 4387 | else if (sop == 2 && sopcde == 0 && bit8 == 1) |
4b7f6baa | 4388 | { |
331f1cbe BS |
4389 | OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); |
4390 | OUTS (outf, " = "); | |
4391 | OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); | |
4392 | OUTS (outf, " >> "); | |
4b7f6baa | 4393 | OUTS (outf, uimm4 (newimmag)); |
4b7f6baa | 4394 | } |
4b7f6baa CM |
4395 | else if (sop == 2 && sopcde == 3 && HLs == 1) |
4396 | { | |
086134ec | 4397 | OUTS (outf, "A1 = ROT A1 BY "); |
4b7f6baa | 4398 | OUTS (outf, imm6 (immag)); |
4b7f6baa CM |
4399 | } |
4400 | else if (sop == 0 && sopcde == 3 && HLs == 0 && bit8 == 0) | |
4401 | { | |
086134ec | 4402 | OUTS (outf, "A0 = A0 << "); |
4b7f6baa | 4403 | OUTS (outf, uimm5 (immag)); |
4b7f6baa CM |
4404 | } |
4405 | else if (sop == 0 && sopcde == 3 && HLs == 0 && bit8 == 1) | |
4406 | { | |
086134ec | 4407 | OUTS (outf, "A0 = A0 >>> "); |
4b7f6baa | 4408 | OUTS (outf, uimm5 (newimmag)); |
4b7f6baa CM |
4409 | } |
4410 | else if (sop == 0 && sopcde == 3 && HLs == 1 && bit8 == 0) | |
4411 | { | |
086134ec | 4412 | OUTS (outf, "A1 = A1 << "); |
4b7f6baa | 4413 | OUTS (outf, uimm5 (immag)); |
4b7f6baa CM |
4414 | } |
4415 | else if (sop == 0 && sopcde == 3 && HLs == 1 && bit8 == 1) | |
4416 | { | |
086134ec | 4417 | OUTS (outf, "A1 = A1 >>> "); |
4b7f6baa | 4418 | OUTS (outf, uimm5 (newimmag)); |
4b7f6baa CM |
4419 | } |
4420 | else if (sop == 1 && sopcde == 3 && HLs == 0) | |
4421 | { | |
086134ec | 4422 | OUTS (outf, "A0 = A0 >> "); |
4b7f6baa | 4423 | OUTS (outf, uimm5 (newimmag)); |
4b7f6baa CM |
4424 | } |
4425 | else if (sop == 1 && sopcde == 3 && HLs == 1) | |
4426 | { | |
086134ec | 4427 | OUTS (outf, "A1 = A1 >> "); |
4b7f6baa | 4428 | OUTS (outf, uimm5 (newimmag)); |
4b7f6baa CM |
4429 | } |
4430 | else if (sop == 2 && sopcde == 3 && HLs == 0) | |
4431 | { | |
086134ec | 4432 | OUTS (outf, "A0 = ROT A0 BY "); |
4b7f6baa | 4433 | OUTS (outf, imm6 (immag)); |
4b7f6baa CM |
4434 | } |
4435 | else if (sop == 1 && sopcde == 1 && bit8 == 0) | |
4436 | { | |
4b7f6baa | 4437 | OUTS (outf, dregs (dst0)); |
086134ec | 4438 | OUTS (outf, " = "); |
4b7f6baa | 4439 | OUTS (outf, dregs (src1)); |
086134ec | 4440 | OUTS (outf, " << "); |
4b7f6baa CM |
4441 | OUTS (outf, uimm5 (immag)); |
4442 | OUTS (outf, " (V, S)"); | |
4b7f6baa CM |
4443 | } |
4444 | else if (sop == 1 && sopcde == 1 && bit8 == 1) | |
4445 | { | |
4b7f6baa | 4446 | OUTS (outf, dregs (dst0)); |
086134ec | 4447 | OUTS (outf, " = "); |
4b7f6baa | 4448 | OUTS (outf, dregs (src1)); |
086134ec | 4449 | OUTS (outf, " >>> "); |
4b7f6baa CM |
4450 | OUTS (outf, imm5 (-immag)); |
4451 | OUTS (outf, " (V)"); | |
4b7f6baa CM |
4452 | } |
4453 | else if (sop == 2 && sopcde == 1 && bit8 == 1) | |
4454 | { | |
4b7f6baa | 4455 | OUTS (outf, dregs (dst0)); |
086134ec | 4456 | OUTS (outf, " = "); |
4b7f6baa CM |
4457 | OUTS (outf, dregs (src1)); |
4458 | OUTS (outf, " >> "); | |
4459 | OUTS (outf, uimm5 (newimmag)); | |
4460 | OUTS (outf, " (V)"); | |
4b7f6baa CM |
4461 | } |
4462 | else if (sop == 2 && sopcde == 1 && bit8 == 0) | |
4463 | { | |
4b7f6baa | 4464 | OUTS (outf, dregs (dst0)); |
086134ec | 4465 | OUTS (outf, " = "); |
4b7f6baa | 4466 | OUTS (outf, dregs (src1)); |
086134ec | 4467 | OUTS (outf, " << "); |
4b7f6baa CM |
4468 | OUTS (outf, imm5 (immag)); |
4469 | OUTS (outf, " (V)"); | |
4b7f6baa CM |
4470 | } |
4471 | else if (sop == 0 && sopcde == 1) | |
4472 | { | |
4b7f6baa | 4473 | OUTS (outf, dregs (dst0)); |
086134ec | 4474 | OUTS (outf, " = "); |
4b7f6baa | 4475 | OUTS (outf, dregs (src1)); |
086134ec | 4476 | OUTS (outf, " >>> "); |
4b7f6baa CM |
4477 | OUTS (outf, uimm5 (newimmag)); |
4478 | OUTS (outf, " (V)"); | |
4b7f6baa CM |
4479 | } |
4480 | else if (sop == 1 && sopcde == 2) | |
4481 | { | |
4b7f6baa | 4482 | OUTS (outf, dregs (dst0)); |
086134ec | 4483 | OUTS (outf, " = "); |
4b7f6baa | 4484 | OUTS (outf, dregs (src1)); |
086134ec | 4485 | OUTS (outf, " << "); |
4b7f6baa | 4486 | OUTS (outf, uimm5 (immag)); |
086134ec | 4487 | OUTS (outf, " (S)"); |
4b7f6baa CM |
4488 | } |
4489 | else if (sop == 2 && sopcde == 2 && bit8 == 1) | |
4490 | { | |
4b7f6baa | 4491 | OUTS (outf, dregs (dst0)); |
086134ec | 4492 | OUTS (outf, " = "); |
4b7f6baa | 4493 | OUTS (outf, dregs (src1)); |
086134ec | 4494 | OUTS (outf, " >> "); |
4b7f6baa | 4495 | OUTS (outf, uimm5 (newimmag)); |
4b7f6baa CM |
4496 | } |
4497 | else if (sop == 2 && sopcde == 2 && bit8 == 0) | |
4498 | { | |
4b7f6baa | 4499 | OUTS (outf, dregs (dst0)); |
086134ec | 4500 | OUTS (outf, " = "); |
4b7f6baa | 4501 | OUTS (outf, dregs (src1)); |
086134ec | 4502 | OUTS (outf, " << "); |
4b7f6baa | 4503 | OUTS (outf, uimm5 (immag)); |
4b7f6baa CM |
4504 | } |
4505 | else if (sop == 3 && sopcde == 2) | |
4506 | { | |
4b7f6baa | 4507 | OUTS (outf, dregs (dst0)); |
086134ec | 4508 | OUTS (outf, " = ROT "); |
4b7f6baa CM |
4509 | OUTS (outf, dregs (src1)); |
4510 | OUTS (outf, " BY "); | |
4511 | OUTS (outf, imm6 (immag)); | |
4b7f6baa CM |
4512 | } |
4513 | else if (sop == 0 && sopcde == 2) | |
4514 | { | |
4b7f6baa | 4515 | OUTS (outf, dregs (dst0)); |
086134ec | 4516 | OUTS (outf, " = "); |
4b7f6baa | 4517 | OUTS (outf, dregs (src1)); |
086134ec | 4518 | OUTS (outf, " >>> "); |
4b7f6baa | 4519 | OUTS (outf, uimm5 (newimmag)); |
4b7f6baa CM |
4520 | } |
4521 | else | |
b7d48530 NC |
4522 | return 0; |
4523 | ||
4524 | return 4; | |
4b7f6baa CM |
4525 | } |
4526 | ||
4527 | static int | |
4528 | decode_pseudoDEBUG_0 (TIword iw0, disassemble_info *outf) | |
4529 | { | |
b7d48530 NC |
4530 | /* pseudoDEBUG |
4531 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
4532 | | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 |.fn....|.grp.......|.reg.......| | |
4533 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
4534 | int fn = ((iw0 >> PseudoDbg_fn_bits) & PseudoDbg_fn_mask); |
4535 | int grp = ((iw0 >> PseudoDbg_grp_bits) & PseudoDbg_grp_mask); | |
4536 | int reg = ((iw0 >> PseudoDbg_reg_bits) & PseudoDbg_reg_mask); | |
4537 | ||
4538 | if (reg == 0 && fn == 3) | |
b7d48530 NC |
4539 | OUTS (outf, "DBG A0"); |
4540 | ||
4b7f6baa | 4541 | else if (reg == 1 && fn == 3) |
b7d48530 NC |
4542 | OUTS (outf, "DBG A1"); |
4543 | ||
4b7f6baa | 4544 | else if (reg == 3 && fn == 3) |
b7d48530 NC |
4545 | OUTS (outf, "ABORT"); |
4546 | ||
4b7f6baa | 4547 | else if (reg == 4 && fn == 3) |
b7d48530 NC |
4548 | OUTS (outf, "HLT"); |
4549 | ||
4b7f6baa | 4550 | else if (reg == 5 && fn == 3) |
b7d48530 NC |
4551 | OUTS (outf, "DBGHALT"); |
4552 | ||
4b7f6baa CM |
4553 | else if (reg == 6 && fn == 3) |
4554 | { | |
086134ec | 4555 | OUTS (outf, "DBGCMPLX ("); |
4b7f6baa CM |
4556 | OUTS (outf, dregs (grp)); |
4557 | OUTS (outf, ")"); | |
4b7f6baa CM |
4558 | } |
4559 | else if (reg == 7 && fn == 3) | |
b7d48530 NC |
4560 | OUTS (outf, "DBG"); |
4561 | ||
4b7f6baa CM |
4562 | else if (grp == 0 && fn == 2) |
4563 | { | |
73a63ccf | 4564 | OUTS (outf, "OUTC "); |
4b7f6baa | 4565 | OUTS (outf, dregs (reg)); |
4b7f6baa CM |
4566 | } |
4567 | else if (fn == 0) | |
4568 | { | |
a01eda85 | 4569 | OUTS (outf, "DBG "); |
4b7f6baa | 4570 | OUTS (outf, allregs (reg, grp)); |
4b7f6baa CM |
4571 | } |
4572 | else if (fn == 1) | |
4573 | { | |
4b7f6baa CM |
4574 | OUTS (outf, "PRNT"); |
4575 | OUTS (outf, allregs (reg, grp)); | |
4b7f6baa CM |
4576 | } |
4577 | else | |
b7d48530 NC |
4578 | return 0; |
4579 | ||
4580 | return 2; | |
4b7f6baa CM |
4581 | } |
4582 | ||
73a63ccf MF |
4583 | static int |
4584 | decode_pseudoOChar_0 (TIword iw0, disassemble_info *outf) | |
4585 | { | |
4586 | /* psedoOChar | |
4587 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
4588 | | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 |.ch............................| | |
4589 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4590 | int ch = ((iw0 >> PseudoChr_ch_bits) & PseudoChr_ch_mask); | |
4591 | ||
4592 | OUTS (outf, "OUTC "); | |
4593 | OUTS (outf, uimm8 (ch)); | |
4594 | ||
4595 | return 2; | |
4596 | } | |
4597 | ||
4b7f6baa CM |
4598 | static int |
4599 | decode_pseudodbg_assert_0 (TIword iw0, TIword iw1, disassemble_info *outf) | |
4600 | { | |
b7d48530 NC |
4601 | /* pseudodbg_assert |
4602 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
66a6900a | 4603 | | 1 | 1 | 1 | 1 | 0 | - | - | - | dbgop |.grp.......|.regtest...| |
b7d48530 NC |
4604 | |.expected......................................................| |
4605 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa | 4606 | int expected = ((iw1 >> PseudoDbg_Assert_expected_bits) & PseudoDbg_Assert_expected_mask); |
b7d48530 | 4607 | int dbgop = ((iw0 >> (PseudoDbg_Assert_dbgop_bits - 16)) & PseudoDbg_Assert_dbgop_mask); |
66a6900a | 4608 | int grp = ((iw0 >> (PseudoDbg_Assert_grp_bits - 16)) & PseudoDbg_Assert_grp_mask); |
b7d48530 | 4609 | int regtest = ((iw0 >> (PseudoDbg_Assert_regtest_bits - 16)) & PseudoDbg_Assert_regtest_mask); |
4b7f6baa CM |
4610 | |
4611 | if (dbgop == 0) | |
4612 | { | |
086134ec | 4613 | OUTS (outf, "DBGA ("); |
66a6900a | 4614 | OUTS (outf, regs_lo (regtest, grp)); |
086134ec | 4615 | OUTS (outf, ", "); |
4b7f6baa CM |
4616 | OUTS (outf, uimm16 (expected)); |
4617 | OUTS (outf, ")"); | |
4b7f6baa CM |
4618 | } |
4619 | else if (dbgop == 1) | |
4620 | { | |
086134ec | 4621 | OUTS (outf, "DBGA ("); |
66a6900a | 4622 | OUTS (outf, regs_hi (regtest, grp)); |
086134ec | 4623 | OUTS (outf, ", "); |
4b7f6baa CM |
4624 | OUTS (outf, uimm16 (expected)); |
4625 | OUTS (outf, ")"); | |
4b7f6baa CM |
4626 | } |
4627 | else if (dbgop == 2) | |
4628 | { | |
086134ec | 4629 | OUTS (outf, "DBGAL ("); |
66a6900a | 4630 | OUTS (outf, allregs (regtest, grp)); |
086134ec | 4631 | OUTS (outf, ", "); |
4b7f6baa CM |
4632 | OUTS (outf, uimm16 (expected)); |
4633 | OUTS (outf, ")"); | |
4b7f6baa CM |
4634 | } |
4635 | else if (dbgop == 3) | |
4636 | { | |
086134ec | 4637 | OUTS (outf, "DBGAH ("); |
66a6900a | 4638 | OUTS (outf, allregs (regtest, grp)); |
086134ec | 4639 | OUTS (outf, ", "); |
4b7f6baa CM |
4640 | OUTS (outf, uimm16 (expected)); |
4641 | OUTS (outf, ")"); | |
4b7f6baa CM |
4642 | } |
4643 | else | |
b7d48530 NC |
4644 | return 0; |
4645 | return 4; | |
4b7f6baa CM |
4646 | } |
4647 | ||
ad15c38e | 4648 | static int |
4b7f6baa CM |
4649 | _print_insn_bfin (bfd_vma pc, disassemble_info *outf) |
4650 | { | |
4b7f6baa CM |
4651 | bfd_byte buf[4]; |
4652 | TIword iw0; | |
4653 | TIword iw1; | |
4654 | int status; | |
b7d48530 NC |
4655 | int rv = 0; |
4656 | ||
4b7f6baa | 4657 | status = (*outf->read_memory_func) (pc & ~0x1, buf, 2, outf); |
c7e2358a AM |
4658 | /* FIXME */ |
4659 | (void) status; | |
4b7f6baa | 4660 | status = (*outf->read_memory_func) ((pc + 2) & ~0x1, buf + 2, 2, outf); |
c7e2358a AM |
4661 | /* FIXME */ |
4662 | (void) status; | |
4b7f6baa CM |
4663 | |
4664 | iw0 = bfd_getl16 (buf); | |
4665 | iw1 = bfd_getl16 (buf + 2); | |
4666 | ||
4667 | if ((iw0 & 0xf7ff) == 0xc003 && iw1 == 0x1800) | |
4668 | { | |
086134ec | 4669 | OUTS (outf, "MNOP"); |
4b7f6baa CM |
4670 | return 4; |
4671 | } | |
4672 | else if ((iw0 & 0xff00) == 0x0000) | |
b7d48530 | 4673 | rv = decode_ProgCtrl_0 (iw0, outf); |
4b7f6baa | 4674 | else if ((iw0 & 0xffc0) == 0x0240) |
b7d48530 | 4675 | rv = decode_CaCTRL_0 (iw0, outf); |
4b7f6baa | 4676 | else if ((iw0 & 0xff80) == 0x0100) |
b7d48530 | 4677 | rv = decode_PushPopReg_0 (iw0, outf); |
4b7f6baa | 4678 | else if ((iw0 & 0xfe00) == 0x0400) |
b7d48530 | 4679 | rv = decode_PushPopMultiple_0 (iw0, outf); |
4b7f6baa | 4680 | else if ((iw0 & 0xfe00) == 0x0600) |
b7d48530 | 4681 | rv = decode_ccMV_0 (iw0, outf); |
4b7f6baa | 4682 | else if ((iw0 & 0xf800) == 0x0800) |
b7d48530 | 4683 | rv = decode_CCflag_0 (iw0, outf); |
4b7f6baa | 4684 | else if ((iw0 & 0xffe0) == 0x0200) |
b7d48530 | 4685 | rv = decode_CC2dreg_0 (iw0, outf); |
4b7f6baa | 4686 | else if ((iw0 & 0xff00) == 0x0300) |
b7d48530 | 4687 | rv = decode_CC2stat_0 (iw0, outf); |
4b7f6baa | 4688 | else if ((iw0 & 0xf000) == 0x1000) |
b7d48530 | 4689 | rv = decode_BRCC_0 (iw0, pc, outf); |
4b7f6baa | 4690 | else if ((iw0 & 0xf000) == 0x2000) |
b7d48530 | 4691 | rv = decode_UJUMP_0 (iw0, pc, outf); |
4b7f6baa | 4692 | else if ((iw0 & 0xf000) == 0x3000) |
b7d48530 | 4693 | rv = decode_REGMV_0 (iw0, outf); |
4b7f6baa | 4694 | else if ((iw0 & 0xfc00) == 0x4000) |
b7d48530 | 4695 | rv = decode_ALU2op_0 (iw0, outf); |
4b7f6baa | 4696 | else if ((iw0 & 0xfe00) == 0x4400) |
b7d48530 | 4697 | rv = decode_PTR2op_0 (iw0, outf); |
4b7f6baa | 4698 | else if ((iw0 & 0xf800) == 0x4800) |
b7d48530 | 4699 | rv = decode_LOGI2op_0 (iw0, outf); |
4b7f6baa | 4700 | else if ((iw0 & 0xf000) == 0x5000) |
b7d48530 | 4701 | rv = decode_COMP3op_0 (iw0, outf); |
4b7f6baa | 4702 | else if ((iw0 & 0xf800) == 0x6000) |
b7d48530 | 4703 | rv = decode_COMPI2opD_0 (iw0, outf); |
4b7f6baa | 4704 | else if ((iw0 & 0xf800) == 0x6800) |
b7d48530 | 4705 | rv = decode_COMPI2opP_0 (iw0, outf); |
4b7f6baa | 4706 | else if ((iw0 & 0xf000) == 0x8000) |
b7d48530 | 4707 | rv = decode_LDSTpmod_0 (iw0, outf); |
4b7f6baa | 4708 | else if ((iw0 & 0xff60) == 0x9e60) |
b7d48530 | 4709 | rv = decode_dagMODim_0 (iw0, outf); |
4b7f6baa | 4710 | else if ((iw0 & 0xfff0) == 0x9f60) |
b7d48530 | 4711 | rv = decode_dagMODik_0 (iw0, outf); |
4b7f6baa | 4712 | else if ((iw0 & 0xfc00) == 0x9c00) |
b7d48530 | 4713 | rv = decode_dspLDST_0 (iw0, outf); |
4b7f6baa | 4714 | else if ((iw0 & 0xf000) == 0x9000) |
b7d48530 | 4715 | rv = decode_LDST_0 (iw0, outf); |
4b7f6baa | 4716 | else if ((iw0 & 0xfc00) == 0xb800) |
b7d48530 | 4717 | rv = decode_LDSTiiFP_0 (iw0, outf); |
4b7f6baa | 4718 | else if ((iw0 & 0xe000) == 0xA000) |
b7d48530 | 4719 | rv = decode_LDSTii_0 (iw0, outf); |
4b7f6baa | 4720 | else if ((iw0 & 0xff80) == 0xe080 && (iw1 & 0x0C00) == 0x0000) |
b7d48530 | 4721 | rv = decode_LoopSetup_0 (iw0, iw1, pc, outf); |
4b7f6baa | 4722 | else if ((iw0 & 0xff00) == 0xe100 && (iw1 & 0x0000) == 0x0000) |
b7d48530 | 4723 | rv = decode_LDIMMhalf_0 (iw0, iw1, outf); |
4b7f6baa | 4724 | else if ((iw0 & 0xfe00) == 0xe200 && (iw1 & 0x0000) == 0x0000) |
b7d48530 | 4725 | rv = decode_CALLa_0 (iw0, iw1, pc, outf); |
4b7f6baa | 4726 | else if ((iw0 & 0xfc00) == 0xe400 && (iw1 & 0x0000) == 0x0000) |
b7d48530 | 4727 | rv = decode_LDSTidxI_0 (iw0, iw1, outf); |
4b7f6baa | 4728 | else if ((iw0 & 0xfffe) == 0xe800 && (iw1 & 0x0000) == 0x0000) |
b7d48530 | 4729 | rv = decode_linkage_0 (iw0, iw1, outf); |
4b7f6baa | 4730 | else if ((iw0 & 0xf600) == 0xc000 && (iw1 & 0x0000) == 0x0000) |
b7d48530 | 4731 | rv = decode_dsp32mac_0 (iw0, iw1, outf); |
4b7f6baa | 4732 | else if ((iw0 & 0xf600) == 0xc200 && (iw1 & 0x0000) == 0x0000) |
b7d48530 | 4733 | rv = decode_dsp32mult_0 (iw0, iw1, outf); |
4b7f6baa | 4734 | else if ((iw0 & 0xf7c0) == 0xc400 && (iw1 & 0x0000) == 0x0000) |
b7d48530 | 4735 | rv = decode_dsp32alu_0 (iw0, iw1, outf); |
4b7f6baa | 4736 | else if ((iw0 & 0xf780) == 0xc600 && (iw1 & 0x01c0) == 0x0000) |
b7d48530 | 4737 | rv = decode_dsp32shift_0 (iw0, iw1, outf); |
4b7f6baa | 4738 | else if ((iw0 & 0xf780) == 0xc680 && (iw1 & 0x0000) == 0x0000) |
b7d48530 | 4739 | rv = decode_dsp32shiftimm_0 (iw0, iw1, outf); |
4b7f6baa | 4740 | else if ((iw0 & 0xff00) == 0xf800) |
b7d48530 | 4741 | rv = decode_pseudoDEBUG_0 (iw0, outf); |
4b7f6baa | 4742 | else if ((iw0 & 0xFF00) == 0xF900) |
73a63ccf | 4743 | rv = decode_pseudoOChar_0 (iw0, outf); |
66a6900a | 4744 | else if ((iw0 & 0xFF00) == 0xf000 && (iw1 & 0x0000) == 0x0000) |
b7d48530 | 4745 | rv = decode_pseudodbg_assert_0 (iw0, iw1, outf); |
4b7f6baa | 4746 | |
b7d48530 | 4747 | return rv; |
4b7f6baa CM |
4748 | } |
4749 | ||
4750 | ||
4751 | int | |
4752 | print_insn_bfin (bfd_vma pc, disassemble_info *outf) | |
4753 | { | |
471e4e36 JZ |
4754 | bfd_byte buf[2]; |
4755 | unsigned short iw0; | |
4756 | int status; | |
4b7f6baa | 4757 | int count = 0; |
471e4e36 JZ |
4758 | |
4759 | status = (*outf->read_memory_func) (pc & ~0x01, buf, 2, outf); | |
c7e2358a AM |
4760 | /* FIXME */ |
4761 | (void) status; | |
471e4e36 | 4762 | iw0 = bfd_getl16 (buf); |
4b7f6baa CM |
4763 | |
4764 | count += _print_insn_bfin (pc, outf); | |
471e4e36 | 4765 | |
4b7f6baa | 4766 | /* Proper display of multiple issue instructions. */ |
471e4e36 | 4767 | |
4b7f6baa | 4768 | if ((iw0 & 0xc000) == 0xc000 && (iw0 & BIT_MULTI_INS) |
b7d48530 | 4769 | && ((iw0 & 0xe800) != 0xe800 /* Not Linkage. */ )) |
4b7f6baa | 4770 | { |
086134ec | 4771 | parallel = 1; |
4b7f6baa CM |
4772 | outf->fprintf_func (outf->stream, " || "); |
4773 | count += _print_insn_bfin (pc + 4, outf); | |
4774 | outf->fprintf_func (outf->stream, " || "); | |
4775 | count += _print_insn_bfin (pc + 6, outf); | |
086134ec | 4776 | parallel = 0; |
4b7f6baa CM |
4777 | } |
4778 | if (count == 0) | |
4779 | { | |
4780 | outf->fprintf_func (outf->stream, "ILLEGAL"); | |
4781 | return 2; | |
4782 | } | |
086134ec BS |
4783 | if (!comment) |
4784 | outf->fprintf_func (outf->stream, ";"); | |
4785 | ||
4786 | comment = 0; | |
4787 | ||
4b7f6baa CM |
4788 | return count; |
4789 | } |