x86: correct operand type checks
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
CommitLineData
252b5132 1/* Select disassembly routine for specified architecture.
2571583a 2 Copyright (C) 1994-2017 Free Software Foundation, Inc.
252b5132 3
9b201bb5
NC
4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7499d566 7 it under the terms of the GNU General Public License as published by
9b201bb5 8 the Free Software Foundation; either version 3 of the License, or
7499d566 9 (at your option) any later version.
252b5132 10
7499d566
NC
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
252b5132 15
7499d566
NC
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
9b201bb5
NC
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
0d8dfecf 21#include "sysdep.h"
88c1242d 22#include "disassemble.h"
65b48a81 23#include "safe-ctype.h"
003ca0fd 24#include <assert.h>
252b5132
RH
25
26#ifdef ARCH_all
a06ea964 27#define ARCH_aarch64
252b5132
RH
28#define ARCH_alpha
29#define ARCH_arc
30#define ARCH_arm
adde6300 31#define ARCH_avr
4b7f6baa 32#define ARCH_bfin
3d3d428f 33#define ARCH_cr16
6c95a37f 34#define ARCH_cris
1fe1f39c 35#define ARCH_crx
252b5132
RH
36#define ARCH_d10v
37#define ARCH_d30v
d172d4ba 38#define ARCH_dlx
56b13185 39#define ARCH_epiphany
e729279b
NC
40#define ARCH_fr30
41#define ARCH_frv
3f8107ab 42#define ARCH_ft32
252b5132
RH
43#define ARCH_h8300
44#define ARCH_h8500
45#define ARCH_hppa
5b93d8bb 46#define ARCH_i370
252b5132 47#define ARCH_i386
9d751335 48#define ARCH_i860
252b5132 49#define ARCH_i960
800eeca4 50#define ARCH_ia64
e729279b
NC
51#define ARCH_ip2k
52#define ARCH_iq2000
84e94c90 53#define ARCH_lm32
e729279b 54#define ARCH_m32c
252b5132 55#define ARCH_m32r
60bcf0fa
NC
56#define ARCH_m68hc11
57#define ARCH_m68hc12
e729279b 58#define ARCH_m68k
252b5132
RH
59#define ARCH_m88k
60#define ARCH_mcore
bd2f2e55 61#define ARCH_mep
a3c62988 62#define ARCH_metag
7ba29e2a 63#define ARCH_microblaze
252b5132 64#define ARCH_mips
3c3bdf30 65#define ARCH_mmix
252b5132
RH
66#define ARCH_mn10200
67#define ARCH_mn10300
59b1530d 68#define ARCH_moxie
d031aafb 69#define ARCH_mt
2469cfa2 70#define ARCH_msp430
35c08157 71#define ARCH_nds32
36591ba1 72#define ARCH_nios2
252b5132 73#define ARCH_ns32k
73589c9d 74#define ARCH_or1k
e135f41b 75#define ARCH_pdp11
1e608f98 76#define ARCH_pj
252b5132 77#define ARCH_powerpc
11146849 78#define ARCH_pru
252b5132 79#define ARCH_rs6000
99c513f6 80#define ARCH_rl78
c7927a3c 81#define ARCH_rx
a85d7ed0 82#define ARCH_s390
1c0d3aa6 83#define ARCH_score
252b5132
RH
84#define ARCH_sh
85#define ARCH_sparc
e9f53129 86#define ARCH_spu
252b5132 87#define ARCH_tic30
026df7c5 88#define ARCH_tic4x
5c84d377 89#define ARCH_tic54x
40b36596 90#define ARCH_tic6x
252b5132 91#define ARCH_tic80
aa137e4d
NC
92#define ARCH_tilegx
93#define ARCH_tilepro
252b5132
RH
94#define ARCH_v850
95#define ARCH_vax
1945cfa5 96#define ARCH_visium
252b5132 97#define ARCH_w65
62ecb94c 98#define ARCH_wasm32
93fbbb04 99#define ARCH_xstormy16
d70c5fc7 100#define ARCH_xc16x
f6c1a2d5 101#define ARCH_xgate
e0001a05 102#define ARCH_xtensa
3c9b82ba 103#define ARCH_z80
252b5132 104#define ARCH_z8k
d28847ce 105#define INCLUDE_SHMEDIA
252b5132
RH
106#endif
107
49f58d10
JB
108#ifdef ARCH_m32c
109#include "m32c-desc.h"
110#endif
252b5132
RH
111
112disassembler_ftype
b28b8b5e
L
113disassembler (enum bfd_architecture a,
114 bfd_boolean big ATTRIBUTE_UNUSED,
115 unsigned long mach ATTRIBUTE_UNUSED,
e347efc3 116 bfd *abfd ATTRIBUTE_UNUSED)
252b5132 117{
252b5132
RH
118 disassembler_ftype disassemble;
119
120 switch (a)
121 {
122 /* If you add a case to this table, also add it to the
123 ARCH_all definition right above this function. */
a06ea964
NC
124#ifdef ARCH_aarch64
125 case bfd_arch_aarch64:
126 disassemble = print_insn_aarch64;
127 break;
128#endif
252b5132
RH
129#ifdef ARCH_alpha
130 case bfd_arch_alpha:
131 disassemble = print_insn_alpha;
132 break;
133#endif
134#ifdef ARCH_arc
135 case bfd_arch_arc:
6ca4eb77
AM
136 disassemble = arc_get_disassembler (abfd);
137 break;
252b5132
RH
138#endif
139#ifdef ARCH_arm
140 case bfd_arch_arm:
003ca0fd 141 if (big)
252b5132
RH
142 disassemble = print_insn_big_arm;
143 else
144 disassemble = print_insn_little_arm;
145 break;
146#endif
adde6300
AM
147#ifdef ARCH_avr
148 case bfd_arch_avr:
149 disassemble = print_insn_avr;
150 break;
151#endif
4b7f6baa
CM
152#ifdef ARCH_bfin
153 case bfd_arch_bfin:
154 disassemble = print_insn_bfin;
155 break;
156#endif
3d3d428f
NC
157#ifdef ARCH_cr16
158 case bfd_arch_cr16:
159 disassemble = print_insn_cr16;
160 break;
161#endif
6c95a37f
HPN
162#ifdef ARCH_cris
163 case bfd_arch_cris:
78966507 164 disassemble = cris_get_disassembler (abfd);
6c95a37f 165 break;
1fe1f39c
NC
166#endif
167#ifdef ARCH_crx
168 case bfd_arch_crx:
169 disassemble = print_insn_crx;
170 break;
6c95a37f 171#endif
252b5132
RH
172#ifdef ARCH_d10v
173 case bfd_arch_d10v:
174 disassemble = print_insn_d10v;
175 break;
176#endif
177#ifdef ARCH_d30v
178 case bfd_arch_d30v:
179 disassemble = print_insn_d30v;
180 break;
181#endif
d172d4ba
NC
182#ifdef ARCH_dlx
183 case bfd_arch_dlx:
184 /* As far as I know we only handle big-endian DLX objects. */
185 disassemble = print_insn_dlx;
186 break;
187#endif
252b5132
RH
188#ifdef ARCH_h8300
189 case bfd_arch_h8300:
003ca0fd 190 if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn)
252b5132 191 disassemble = print_insn_h8300h;
003ca0fd
YQ
192 else if (mach == bfd_mach_h8300s
193 || mach == bfd_mach_h8300sn
194 || mach == bfd_mach_h8300sx
195 || mach == bfd_mach_h8300sxn)
252b5132 196 disassemble = print_insn_h8300s;
b7ed8fad 197 else
252b5132
RH
198 disassemble = print_insn_h8300;
199 break;
200#endif
201#ifdef ARCH_h8500
202 case bfd_arch_h8500:
203 disassemble = print_insn_h8500;
204 break;
205#endif
206#ifdef ARCH_hppa
207 case bfd_arch_hppa:
208 disassemble = print_insn_hppa;
209 break;
210#endif
5b93d8bb
AM
211#ifdef ARCH_i370
212 case bfd_arch_i370:
213 disassemble = print_insn_i370;
214 break;
215#endif
252b5132
RH
216#ifdef ARCH_i386
217 case bfd_arch_i386:
7b6d09fb 218 case bfd_arch_iamcu:
8a9036a4 219 case bfd_arch_l1om:
7a9068fe 220 case bfd_arch_k1om:
e396998b 221 disassemble = print_insn_i386;
252b5132
RH
222 break;
223#endif
9d751335
JE
224#ifdef ARCH_i860
225 case bfd_arch_i860:
226 disassemble = print_insn_i860;
227 break;
228#endif
252b5132
RH
229#ifdef ARCH_i960
230 case bfd_arch_i960:
231 disassemble = print_insn_i960;
232 break;
233#endif
800eeca4
JW
234#ifdef ARCH_ia64
235 case bfd_arch_ia64:
236 disassemble = print_insn_ia64;
237 break;
238#endif
a40cbfa3
NC
239#ifdef ARCH_ip2k
240 case bfd_arch_ip2k:
241 disassemble = print_insn_ip2k;
242 break;
243#endif
cfb8c092
NC
244#ifdef ARCH_epiphany
245 case bfd_arch_epiphany:
246 disassemble = print_insn_epiphany;
247 break;
248#endif
252b5132
RH
249#ifdef ARCH_fr30
250 case bfd_arch_fr30:
251 disassemble = print_insn_fr30;
252 break;
253#endif
84e94c90
NC
254#ifdef ARCH_lm32
255 case bfd_arch_lm32:
256 disassemble = print_insn_lm32;
257 break;
258#endif
252b5132
RH
259#ifdef ARCH_m32r
260 case bfd_arch_m32r:
261 disassemble = print_insn_m32r;
262 break;
263#endif
6927f982
NC
264#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
265 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
60bcf0fa
NC
266 case bfd_arch_m68hc11:
267 disassemble = print_insn_m68hc11;
268 break;
269 case bfd_arch_m68hc12:
270 disassemble = print_insn_m68hc12;
271 break;
6927f982
NC
272 case bfd_arch_m9s12x:
273 disassemble = print_insn_m9s12x;
274 break;
275 case bfd_arch_m9s12xg:
276 disassemble = print_insn_m9s12xg;
277 break;
60bcf0fa 278#endif
252b5132
RH
279#ifdef ARCH_m68k
280 case bfd_arch_m68k:
281 disassemble = print_insn_m68k;
282 break;
283#endif
284#ifdef ARCH_m88k
285 case bfd_arch_m88k:
286 disassemble = print_insn_m88k;
287 break;
288#endif
d031aafb
NS
289#ifdef ARCH_mt
290 case bfd_arch_mt:
291 disassemble = print_insn_mt;
ac188222
DB
292 break;
293#endif
7ba29e2a
NC
294#ifdef ARCH_microblaze
295 case bfd_arch_microblaze:
296 disassemble = print_insn_microblaze;
297 break;
298#endif
2469cfa2
NC
299#ifdef ARCH_msp430
300 case bfd_arch_msp430:
301 disassemble = print_insn_msp430;
302 break;
303#endif
35c08157
KLC
304#ifdef ARCH_nds32
305 case bfd_arch_nds32:
306 disassemble = print_insn_nds32;
307 break;
308#endif
252b5132
RH
309#ifdef ARCH_ns32k
310 case bfd_arch_ns32k:
311 disassemble = print_insn_ns32k;
312 break;
313#endif
314#ifdef ARCH_mcore
315 case bfd_arch_mcore:
316 disassemble = print_insn_mcore;
317 break;
318#endif
bd2f2e55
DB
319#ifdef ARCH_mep
320 case bfd_arch_mep:
321 disassemble = print_insn_mep;
322 break;
323#endif
a3c62988
NC
324#ifdef ARCH_metag
325 case bfd_arch_metag:
326 disassemble = print_insn_metag;
327 break;
328#endif
252b5132
RH
329#ifdef ARCH_mips
330 case bfd_arch_mips:
003ca0fd 331 if (big)
252b5132
RH
332 disassemble = print_insn_big_mips;
333 else
334 disassemble = print_insn_little_mips;
335 break;
336#endif
3c3bdf30
NC
337#ifdef ARCH_mmix
338 case bfd_arch_mmix:
339 disassemble = print_insn_mmix;
340 break;
341#endif
252b5132
RH
342#ifdef ARCH_mn10200
343 case bfd_arch_mn10200:
344 disassemble = print_insn_mn10200;
345 break;
346#endif
347#ifdef ARCH_mn10300
348 case bfd_arch_mn10300:
349 disassemble = print_insn_mn10300;
350 break;
351#endif
36591ba1
SL
352#ifdef ARCH_nios2
353 case bfd_arch_nios2:
003ca0fd 354 if (big)
36591ba1
SL
355 disassemble = print_insn_big_nios2;
356 else
357 disassemble = print_insn_little_nios2;
358 break;
359#endif
73589c9d
CS
360#ifdef ARCH_or1k
361 case bfd_arch_or1k:
362 disassemble = print_insn_or1k;
3b16e843
NC
363 break;
364#endif
e135f41b
NC
365#ifdef ARCH_pdp11
366 case bfd_arch_pdp11:
367 disassemble = print_insn_pdp11;
368 break;
369#endif
1e608f98
ILT
370#ifdef ARCH_pj
371 case bfd_arch_pj:
372 disassemble = print_insn_pj;
373 break;
374#endif
252b5132
RH
375#ifdef ARCH_powerpc
376 case bfd_arch_powerpc:
003ca0fd 377 if (big)
252b5132
RH
378 disassemble = print_insn_big_powerpc;
379 else
380 disassemble = print_insn_little_powerpc;
381 break;
382#endif
11146849
DD
383#ifdef ARCH_pru
384 case bfd_arch_pru:
385 disassemble = print_insn_pru;
386 break;
387#endif
e23eba97
NC
388#ifdef ARCH_riscv
389 case bfd_arch_riscv:
390 disassemble = print_insn_riscv;
ae4c0df4 391 break;
e23eba97 392#endif
252b5132
RH
393#ifdef ARCH_rs6000
394 case bfd_arch_rs6000:
003ca0fd 395 if (mach == bfd_mach_ppc_620)
7f6d05e8
CP
396 disassemble = print_insn_big_powerpc;
397 else
398 disassemble = print_insn_rs6000;
252b5132
RH
399 break;
400#endif
99c513f6
DD
401#ifdef ARCH_rl78
402 case bfd_arch_rl78:
0952813b 403 disassemble = rl78_get_disassembler (abfd);
99c513f6
DD
404 break;
405#endif
c7927a3c
NC
406#ifdef ARCH_rx
407 case bfd_arch_rx:
408 disassemble = print_insn_rx;
409 break;
410#endif
a85d7ed0
NC
411#ifdef ARCH_s390
412 case bfd_arch_s390:
413 disassemble = print_insn_s390;
414 break;
415#endif
1c0d3aa6
NC
416#ifdef ARCH_score
417 case bfd_arch_score:
003ca0fd 418 if (big)
6ca4eb77 419 disassemble = print_insn_big_score;
1c0d3aa6 420 else
6ca4eb77 421 disassemble = print_insn_little_score;
1c0d3aa6
NC
422 break;
423#endif
252b5132
RH
424#ifdef ARCH_sh
425 case bfd_arch_sh:
1c509ca8 426 disassemble = print_insn_sh;
252b5132
RH
427 break;
428#endif
429#ifdef ARCH_sparc
430 case bfd_arch_sparc:
431 disassemble = print_insn_sparc;
432 break;
433#endif
e9f53129
AM
434#ifdef ARCH_spu
435 case bfd_arch_spu:
436 disassemble = print_insn_spu;
437 break;
438#endif
252b5132
RH
439#ifdef ARCH_tic30
440 case bfd_arch_tic30:
441 disassemble = print_insn_tic30;
442 break;
443#endif
026df7c5
NC
444#ifdef ARCH_tic4x
445 case bfd_arch_tic4x:
446 disassemble = print_insn_tic4x;
447 break;
448#endif
5c84d377
TW
449#ifdef ARCH_tic54x
450 case bfd_arch_tic54x:
451 disassemble = print_insn_tic54x;
452 break;
453#endif
40b36596
JM
454#ifdef ARCH_tic6x
455 case bfd_arch_tic6x:
456 disassemble = print_insn_tic6x;
457 break;
458#endif
252b5132
RH
459#ifdef ARCH_tic80
460 case bfd_arch_tic80:
461 disassemble = print_insn_tic80;
462 break;
463#endif
3f8107ab
AM
464#ifdef ARCH_ft32
465 case bfd_arch_ft32:
466 disassemble = print_insn_ft32;
467 break;
468#endif
252b5132
RH
469#ifdef ARCH_v850
470 case bfd_arch_v850:
de863c74 471 case bfd_arch_v850_rh850:
252b5132
RH
472 disassemble = print_insn_v850;
473 break;
474#endif
475#ifdef ARCH_w65
476 case bfd_arch_w65:
477 disassemble = print_insn_w65;
478 break;
479#endif
62ecb94c
PC
480#ifdef ARCH_wasm32
481 case bfd_arch_wasm32:
482 disassemble = print_insn_wasm32;
483 break;
484#endif
f6c1a2d5
NC
485#ifdef ARCH_xgate
486 case bfd_arch_xgate:
487 disassemble = print_insn_xgate;
488 break;
489#endif
93fbbb04
GK
490#ifdef ARCH_xstormy16
491 case bfd_arch_xstormy16:
492 disassemble = print_insn_xstormy16;
493 break;
494#endif
d70c5fc7
NC
495#ifdef ARCH_xc16x
496 case bfd_arch_xc16x:
497 disassemble = print_insn_xc16x;
498 break;
499#endif
e0001a05
NC
500#ifdef ARCH_xtensa
501 case bfd_arch_xtensa:
502 disassemble = print_insn_xtensa;
503 break;
504#endif
3c9b82ba
NC
505#ifdef ARCH_z80
506 case bfd_arch_z80:
507 disassemble = print_insn_z80;
508 break;
509#endif
252b5132
RH
510#ifdef ARCH_z8k
511 case bfd_arch_z8k:
003ca0fd 512 if (mach == bfd_mach_z8001)
252b5132 513 disassemble = print_insn_z8001;
b7ed8fad 514 else
252b5132
RH
515 disassemble = print_insn_z8002;
516 break;
517#endif
518#ifdef ARCH_vax
519 case bfd_arch_vax:
520 disassemble = print_insn_vax;
521 break;
fd3c93d5 522#endif
1945cfa5
EB
523#ifdef ARCH_visium
524 case bfd_arch_visium:
525 disassemble = print_insn_visium;
526 break;
527#endif
fd3c93d5
DB
528#ifdef ARCH_frv
529 case bfd_arch_frv:
530 disassemble = print_insn_frv;
531 break;
47b1a55a 532#endif
59b1530d
AG
533#ifdef ARCH_moxie
534 case bfd_arch_moxie:
535 disassemble = print_insn_moxie;
536 break;
537#endif
47b1a55a
SC
538#ifdef ARCH_iq2000
539 case bfd_arch_iq2000:
540 disassemble = print_insn_iq2000;
541 break;
49f58d10
JB
542#endif
543#ifdef ARCH_m32c
544 case bfd_arch_m32c:
545 disassemble = print_insn_m32c;
546 break;
aa137e4d
NC
547#endif
548#ifdef ARCH_tilegx
549 case bfd_arch_tilegx:
550 disassemble = print_insn_tilegx;
551 break;
552#endif
553#ifdef ARCH_tilepro
554 case bfd_arch_tilepro:
555 disassemble = print_insn_tilepro;
556 break;
252b5132
RH
557#endif
558 default:
559 return 0;
560 }
561 return disassemble;
562}
94470b23
NC
563
564void
e6c7cdec 565disassembler_usage (FILE *stream ATTRIBUTE_UNUSED)
94470b23 566{
a06ea964
NC
567#ifdef ARCH_aarch64
568 print_aarch64_disassembler_options (stream);
569#endif
37fd5ef3
CZ
570#ifdef ARCH_arc
571 print_arc_disassembler_options (stream);
572#endif
58efb6c0
NC
573#ifdef ARCH_arm
574 print_arm_disassembler_options (stream);
575#endif
640c0ccd
CD
576#ifdef ARCH_mips
577 print_mips_disassembler_options (stream);
578#endif
07dd56a9
NC
579#ifdef ARCH_powerpc
580 print_ppc_disassembler_options (stream);
581#endif
e23eba97
NC
582#ifdef ARCH_riscv
583 print_riscv_disassembler_options (stream);
584#endif
f59a29b9
L
585#ifdef ARCH_i386
586 print_i386_disassembler_options (stream);
587#endif
112b7c50
AK
588#ifdef ARCH_s390
589 print_s390_disassembler_options (stream);
590#endif
62ecb94c
PC
591#ifdef ARCH_wasm32
592 print_wasm32_disassembler_options (stream);
593#endif
b7ed8fad 594
94470b23
NC
595 return;
596}
22a398e1
NC
597
598void
599disassemble_init_for_target (struct disassemble_info * info)
600{
601 if (info == NULL)
602 return;
603
604 switch (info->arch)
605 {
a06ea964
NC
606#ifdef ARCH_aarch64
607 case bfd_arch_aarch64:
608 info->symbol_is_valid = aarch64_symbol_is_valid;
609 info->disassembler_needs_relocs = TRUE;
610 break;
611#endif
22a398e1
NC
612#ifdef ARCH_arm
613 case bfd_arch_arm:
614 info->symbol_is_valid = arm_symbol_is_valid;
d99b6465 615 info->disassembler_needs_relocs = TRUE;
22a398e1 616 break;
0bcb06d2
AS
617#endif
618#ifdef ARCH_ia64
619 case bfd_arch_ia64:
620 info->skip_zeroes = 16;
621 break;
622#endif
623#ifdef ARCH_tic4x
624 case bfd_arch_tic4x:
625 info->skip_zeroes = 32;
fb53f5a8 626 break;
49f58d10 627#endif
bd2f2e55
DB
628#ifdef ARCH_mep
629 case bfd_arch_mep:
630 info->skip_zeroes = 256;
631 info->skip_zeroes_at_end = 0;
632 break;
633#endif
a3c62988
NC
634#ifdef ARCH_metag
635 case bfd_arch_metag:
636 info->disassembler_needs_relocs = TRUE;
637 break;
638#endif
49f58d10
JB
639#ifdef ARCH_m32c
640 case bfd_arch_m32c:
6ca4eb77
AM
641 /* This processor in fact is little endian. The value set here
642 reflects the way opcodes are written in the cgen description. */
49f58d10 643 info->endian = BFD_ENDIAN_BIG;
fb53f5a8
DB
644 if (! info->insn_sets)
645 {
646 info->insn_sets = cgen_bitset_create (ISA_MAX);
647 if (info->mach == bfd_mach_m16c)
648 cgen_bitset_set (info->insn_sets, ISA_M16C);
649 else
650 cgen_bitset_set (info->insn_sets, ISA_M32C);
651 }
49f58d10 652 break;
b240011a
AM
653#endif
654#ifdef ARCH_powerpc
655 case bfd_arch_powerpc:
656#endif
024d185c
DD
657#ifdef ARCH_pru
658 case bfd_arch_pru:
659 info->disassembler_needs_relocs = TRUE;
660 break;
661#endif
b240011a
AM
662#ifdef ARCH_rs6000
663 case bfd_arch_rs6000:
664#endif
665#if defined (ARCH_powerpc) || defined (ARCH_rs6000)
666 disassemble_init_powerpc (info);
667 break;
65b48a81 668#endif
62ecb94c
PC
669#ifdef ARCH_wasm32
670 case bfd_arch_wasm32:
671 disassemble_init_wasm32 (info);
672 break;
673#endif
65b48a81
PB
674#ifdef ARCH_s390
675 case bfd_arch_s390:
676 disassemble_init_s390 (info);
677 break;
22a398e1
NC
678#endif
679 default:
680 break;
681 }
682}
65b48a81
PB
683
684/* Remove whitespace and consecutive commas from OPTIONS. */
685
686char *
687remove_whitespace_and_extra_commas (char *options)
688{
689 char *str;
690 size_t i, len;
691
692 if (options == NULL)
693 return NULL;
694
695 /* Strip off all trailing whitespace and commas. */
696 for (len = strlen (options); len > 0; len--)
697 {
698 if (!ISSPACE (options[len - 1]) && options[len - 1] != ',')
699 break;
700 options[len - 1] = '\0';
701 }
702
703 /* Convert all remaining whitespace to commas. */
704 for (i = 0; options[i] != '\0'; i++)
705 if (ISSPACE (options[i]))
706 options[i] = ',';
707
708 /* Remove consecutive commas. */
709 for (str = options; *str != '\0'; str++)
710 if (*str == ',' && (*(str + 1) == ',' || str == options))
711 {
712 char *next = str + 1;
713 while (*next == ',')
714 next++;
715 len = strlen (next);
716 if (str != options)
717 str++;
718 memmove (str, next, len);
719 next[len - (size_t)(next - str)] = '\0';
720 }
721 return (strlen (options) != 0) ? options : NULL;
722}
723
724/* Like STRCMP, but treat ',' the same as '\0' so that we match
725 strings like "foobar" against "foobar,xxyyzz,...". */
726
727int
728disassembler_options_cmp (const char *s1, const char *s2)
729{
730 unsigned char c1, c2;
731
732 do
733 {
734 c1 = (unsigned char) *s1++;
735 if (c1 == ',')
736 c1 = '\0';
737 c2 = (unsigned char) *s2++;
738 if (c2 == ',')
739 c2 = '\0';
740 if (c1 == '\0')
741 return c1 - c2;
742 }
743 while (c1 == c2);
744
745 return c1 - c2;
746}
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