gdb: add target_ops::supports_displaced_step
[deliverable/binutils-gdb.git] / opcodes / i386-dis-evex-len.h
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1static const struct dis386 evex_len_table[][3] = {
2 /* EVEX_LEN_0F6E_P_2 */
3 {
4 { "vmovK", { XMScalar, Edq }, 0 },
5 },
6
7 /* EVEX_LEN_0F7E_P_1 */
8 {
9 { VEX_W_TABLE (EVEX_W_0F7E_P_1) },
10 },
11
12 /* EVEX_LEN_0F7E_P_2 */
13 {
14 { "vmovK", { Edq, XMScalar }, 0 },
15 },
16
17 /* EVEX_LEN_0FD6_P_2 */
18 {
19 { VEX_W_TABLE (EVEX_W_0FD6_P_2) },
20 },
21
22 /* EVEX_LEN_0F3819_P_2_W_0 */
23 {
24 { Bad_Opcode },
25 { "vbroadcastf32x2", { XM, EXxmm_mq }, 0 },
26 { "vbroadcastf32x2", { XM, EXxmm_mq }, 0 },
27 },
28
29 /* EVEX_LEN_0F3819_P_2_W_1 */
30 {
31 { Bad_Opcode },
32 { "vbroadcastsd", { XM, EXxmm_mq }, 0 },
33 { "vbroadcastsd", { XM, EXxmm_mq }, 0 },
34 },
35
36 /* EVEX_LEN_0F381A_P_2_W_0 */
37 {
38 { Bad_Opcode },
39 { "vbroadcastf32x4", { XM, EXxmm }, 0 },
40 { "vbroadcastf32x4", { XM, EXxmm }, 0 },
41 },
42
43 /* EVEX_LEN_0F381A_P_2_W_1 */
44 {
45 { Bad_Opcode },
46 { "vbroadcastf64x2", { XM, EXxmm }, 0 },
47 { "vbroadcastf64x2", { XM, EXxmm }, 0 },
48 },
49
50 /* EVEX_LEN_0F381B_P_2_W_0 */
51 {
52 { Bad_Opcode },
53 { Bad_Opcode },
54 { "vbroadcastf32x8", { XM, EXxmmq }, 0 },
55 },
56
57 /* EVEX_LEN_0F381B_P_2_W_1 */
58 {
59 { Bad_Opcode },
60 { Bad_Opcode },
61 { "vbroadcastf64x4", { XM, EXymm }, 0 },
62 },
63
64 /* EVEX_LEN_0F385A_P_2_W_0 */
65 {
66 { Bad_Opcode },
67 { "vbroadcasti32x4", { XM, EXxmm }, 0 },
68 { "vbroadcasti32x4", { XM, EXxmm }, 0 },
69 },
70
71 /* EVEX_LEN_0F385A_P_2_W_1 */
72 {
73 { Bad_Opcode },
74 { "vbroadcasti64x2", { XM, EXxmm }, 0 },
75 { "vbroadcasti64x2", { XM, EXxmm }, 0 },
76 },
77
78 /* EVEX_LEN_0F385B_P_2_W_0 */
79 {
80 { Bad_Opcode },
81 { Bad_Opcode },
82 { "vbroadcasti32x8", { XM, EXxmmq }, 0 },
83 },
84
85 /* EVEX_LEN_0F385B_P_2_W_1 */
86 {
87 { Bad_Opcode },
88 { Bad_Opcode },
89 { "vbroadcasti64x4", { XM, EXymm }, 0 },
90 },
91
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92 /* EVEX_LEN_0F38C6_REG_1_PREFIX_2 */
93 {
94 { Bad_Opcode },
95 { Bad_Opcode },
96 { "vgatherpf0dp%XW", { MVexVSIBDWpX }, 0 },
97 },
98
99 /* EVEX_LEN_0F38C6_REG_2_PREFIX_2 */
100 {
101 { Bad_Opcode },
102 { Bad_Opcode },
103 { "vgatherpf1dp%XW", { MVexVSIBDWpX }, 0 },
104 },
105
106 /* EVEX_LEN_0F38C6_REG_5_PREFIX_2 */
107 {
108 { Bad_Opcode },
109 { Bad_Opcode },
110 { "vscatterpf0dp%XW", { MVexVSIBDWpX }, 0 },
111 },
112
113 /* EVEX_LEN_0F38C6_REG_6_PREFIX_2 */
114 {
115 { Bad_Opcode },
116 { Bad_Opcode },
117 { "vscatterpf1dp%XW", { MVexVSIBDWpX }, 0 },
118 },
119
120 /* EVEX_LEN_0F38C7_R_1_P_2_W_0 */
121 {
122 { Bad_Opcode },
123 { Bad_Opcode },
124 { "vgatherpf0qps", { MVexVSIBDQWpX }, 0 },
125 },
126
127 /* EVEX_LEN_0F38C7_R_1_P_2_W_1 */
128 {
129 { Bad_Opcode },
130 { Bad_Opcode },
131 { "vgatherpf0qpd", { MVexVSIBQWpX }, 0 },
132 },
133
134 /* EVEX_LEN_0F38C7_R_2_P_2_W_0 */
135 {
136 { Bad_Opcode },
137 { Bad_Opcode },
138 { "vgatherpf1qps", { MVexVSIBDQWpX }, 0 },
139 },
140
141 /* EVEX_LEN_0F38C7_R_2_P_2_W_1 */
142 {
143 { Bad_Opcode },
144 { Bad_Opcode },
145 { "vgatherpf1qpd", { MVexVSIBQWpX }, 0 },
146 },
147
148 /* EVEX_LEN_0F38C7_R_5_P_2_W_0 */
149 {
150 { Bad_Opcode },
151 { Bad_Opcode },
152 { "vscatterpf0qps", { MVexVSIBDQWpX }, 0 },
153 },
154
155 /* EVEX_LEN_0F38C7_R_5_P_2_W_1 */
156 {
157 { Bad_Opcode },
158 { Bad_Opcode },
159 { "vscatterpf0qpd", { MVexVSIBQWpX }, 0 },
160 },
161
162 /* EVEX_LEN_0F38C7_R_6_P_2_W_0 */
163 {
164 { Bad_Opcode },
165 { Bad_Opcode },
166 { "vscatterpf1qps", { MVexVSIBDQWpX }, 0 },
167 },
168
169 /* EVEX_LEN_0F38C7_R_6_P_2_W_1 */
170 {
171 { Bad_Opcode },
172 { Bad_Opcode },
173 { "vscatterpf1qpd", { MVexVSIBQWpX }, 0 },
174 },
175
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176 /* EVEX_LEN_0F3A18_P_2_W_0 */
177 {
178 { Bad_Opcode },
179 { "vinsertf32x4", { XM, Vex, EXxmm, Ib }, 0 },
180 { "vinsertf32x4", { XM, Vex, EXxmm, Ib }, 0 },
181 },
182
183 /* EVEX_LEN_0F3A18_P_2_W_1 */
184 {
185 { Bad_Opcode },
186 { "vinsertf64x2", { XM, Vex, EXxmm, Ib }, 0 },
187 { "vinsertf64x2", { XM, Vex, EXxmm, Ib }, 0 },
188 },
189
190 /* EVEX_LEN_0F3A19_P_2_W_0 */
191 {
192 { Bad_Opcode },
193 { "vextractf32x4", { EXxmm, XM, Ib }, 0 },
194 { "vextractf32x4", { EXxmm, XM, Ib }, 0 },
195 },
196
197 /* EVEX_LEN_0F3A19_P_2_W_1 */
198 {
199 { Bad_Opcode },
200 { "vextractf64x2", { EXxmm, XM, Ib }, 0 },
201 { "vextractf64x2", { EXxmm, XM, Ib }, 0 },
202 },
203
204 /* EVEX_LEN_0F3A1A_P_2_W_0 */
205 {
206 { Bad_Opcode },
207 { Bad_Opcode },
208 { "vinsertf32x8", { XM, Vex, EXxmmq, Ib }, 0 },
209 },
210
211 /* EVEX_LEN_0F3A1A_P_2_W_1 */
212 {
213 { Bad_Opcode },
214 { Bad_Opcode },
215 { "vinsertf64x4", { XM, Vex, EXxmmq, Ib }, 0 },
216 },
217
218 /* EVEX_LEN_0F3A1B_P_2_W_0 */
219 {
220 { Bad_Opcode },
221 { Bad_Opcode },
222 { "vextractf32x8", { EXxmmq, XM, Ib }, 0 },
223 },
224
225 /* EVEX_LEN_0F3A1B_P_2_W_1 */
226 {
227 { Bad_Opcode },
228 { Bad_Opcode },
229 { "vextractf64x4", { EXxmmq, XM, Ib }, 0 },
230 },
231
232 /* EVEX_LEN_0F3A23_P_2_W_0 */
233 {
234 { Bad_Opcode },
235 { "vshuff32x4", { XM, Vex, EXx, Ib }, 0 },
236 { "vshuff32x4", { XM, Vex, EXx, Ib }, 0 },
237 },
238
239 /* EVEX_LEN_0F3A23_P_2_W_1 */
240 {
241 { Bad_Opcode },
242 { "vshuff64x2", { XM, Vex, EXx, Ib }, 0 },
243 { "vshuff64x2", { XM, Vex, EXx, Ib }, 0 },
244 },
245
246 /* EVEX_LEN_0F3A38_P_2_W_0 */
247 {
248 { Bad_Opcode },
249 { "vinserti32x4", { XM, Vex, EXxmm, Ib }, 0 },
250 { "vinserti32x4", { XM, Vex, EXxmm, Ib }, 0 },
251 },
252
253 /* EVEX_LEN_0F3A38_P_2_W_1 */
254 {
255 { Bad_Opcode },
256 { "vinserti64x2", { XM, Vex, EXxmm, Ib }, 0 },
257 { "vinserti64x2", { XM, Vex, EXxmm, Ib }, 0 },
258 },
259
260 /* EVEX_LEN_0F3A39_P_2_W_0 */
261 {
262 { Bad_Opcode },
263 { "vextracti32x4", { EXxmm, XM, Ib }, 0 },
264 { "vextracti32x4", { EXxmm, XM, Ib }, 0 },
265 },
266
267 /* EVEX_LEN_0F3A39_P_2_W_1 */
268 {
269 { Bad_Opcode },
270 { "vextracti64x2", { EXxmm, XM, Ib }, 0 },
271 { "vextracti64x2", { EXxmm, XM, Ib }, 0 },
272 },
273
274 /* EVEX_LEN_0F3A3A_P_2_W_0 */
275 {
276 { Bad_Opcode },
277 { "vinserti32x8", { XM, Vex, EXxmmq, Ib }, 0 },
278 { "vinserti32x8", { XM, Vex, EXxmmq, Ib }, 0 },
279 },
280
281 /* EVEX_LEN_0F3A3A_P_2_W_1 */
282 {
283 { Bad_Opcode },
284 { "vinserti64x4", { XM, Vex, EXxmmq, Ib }, 0 },
285 { "vinserti64x4", { XM, Vex, EXxmmq, Ib }, 0 },
286 },
287
288 /* EVEX_LEN_0F3A3B_P_2_W_0 */
289 {
290 { Bad_Opcode },
291 { "vextracti32x8", { EXxmmq, XM, Ib }, 0 },
292 { "vextracti32x8", { EXxmmq, XM, Ib }, 0 },
293 },
294
295 /* EVEX_LEN_0F3A3B_P_2_W_1 */
296 {
297 { Bad_Opcode },
298 { "vextracti64x4", { EXxmmq, XM, Ib }, 0 },
299 { "vextracti64x4", { EXxmmq, XM, Ib }, 0 },
300 },
301
302 /* EVEX_LEN_0F3A43_P_2_W_0 */
303 {
304 { Bad_Opcode },
305 { "vshufi32x4", { XM, Vex, EXx, Ib }, 0 },
306 { "vshufi32x4", { XM, Vex, EXx, Ib }, 0 },
307 },
308
309 /* EVEX_LEN_0F3A43_P_2_W_1 */
310 {
311 { Bad_Opcode },
312 { "vshufi64x2", { XM, Vex, EXx, Ib }, 0 },
313 { "vshufi64x2", { XM, Vex, EXx, Ib }, 0 },
314 },
315};
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