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[deliverable/binutils-gdb.git] / opcodes / openrisc-opc.c
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1/* Instruction opcode table for openrisc.
2
3THIS FILE IS MACHINE GENERATED WITH CGEN.
4
4b95cf5c 5Copyright (C) 1996-2014 Free Software Foundation, Inc.
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6
7This file is part of the GNU Binutils and/or GDB, the GNU debugger.
8
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9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
87e6d782 13
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14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
87e6d782 18
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19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
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22
23*/
24
25#include "sysdep.h"
26#include "ansidecl.h"
27#include "bfd.h"
28#include "symcat.h"
29#include "openrisc-desc.h"
30#include "openrisc-opc.h"
31#include "libiberty.h"
32
33/* -- opc.c */
34/* -- */
35/* The hash functions are recorded here to help keep assembler code out of
36 the disassembler and vice versa. */
37
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38static int asm_hash_insn_p (const CGEN_INSN *);
39static unsigned int asm_hash_insn (const char *);
40static int dis_hash_insn_p (const CGEN_INSN *);
41static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
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42
43/* Instruction formats. */
44
87e6d782 45#define F(f) & openrisc_cgen_ifld_table[OPENRISC_##f]
bf143b25 46static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
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47 0, 0, 0x0, { { 0 } }
48};
49
bf143b25 50static const CGEN_IFMT ifmt_l_j ATTRIBUTE_UNUSED = {
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51 32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_ABS26) }, { 0 } }
52};
53
bf143b25 54static const CGEN_IFMT ifmt_l_jr ATTRIBUTE_UNUSED = {
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55 32, 32, 0xffe00000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_OP3) }, { F (F_OP4) }, { F (F_R2) }, { F (F_UIMM16) }, { 0 } }
56};
57
bf143b25 58static const CGEN_IFMT ifmt_l_bal ATTRIBUTE_UNUSED = {
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59 32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_DISP26) }, { 0 } }
60};
61
bf143b25 62static const CGEN_IFMT ifmt_l_movhi ATTRIBUTE_UNUSED = {
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63 32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
64};
65
bf143b25 66static const CGEN_IFMT ifmt_l_mfsr ATTRIBUTE_UNUSED = {
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67 32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_UIMM16) }, { 0 } }
68};
69
bf143b25 70static const CGEN_IFMT ifmt_l_mtsr ATTRIBUTE_UNUSED = {
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71 32, 32, 0xfc0007ff, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_I16_1) }, { 0 } }
72};
73
bf143b25 74static const CGEN_IFMT ifmt_l_lw ATTRIBUTE_UNUSED = {
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75 32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
76};
77
bf143b25 78static const CGEN_IFMT ifmt_l_sw ATTRIBUTE_UNUSED = {
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79 32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R3) }, { F (F_I16NC) }, { 0 } }
80};
81
bf143b25 82static const CGEN_IFMT ifmt_l_sll ATTRIBUTE_UNUSED = {
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83 32, 32, 0xfc0007ff, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_F_10_3) }, { F (F_OP6) }, { F (F_F_4_1) }, { F (F_OP7) }, { 0 } }
84};
85
bf143b25 86static const CGEN_IFMT ifmt_l_slli ATTRIBUTE_UNUSED = {
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87 32, 32, 0xfc00ffe0, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_F_15_8) }, { F (F_OP6) }, { F (F_UIMM5) }, { 0 } }
88};
89
bf143b25 90static const CGEN_IFMT ifmt_l_add ATTRIBUTE_UNUSED = {
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91 32, 32, 0xfc0007ff, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_F_10_7) }, { F (F_OP7) }, { 0 } }
92};
93
bf143b25 94static const CGEN_IFMT ifmt_l_addi ATTRIBUTE_UNUSED = {
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95 32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_LO16) }, { 0 } }
96};
97
bf143b25 98static const CGEN_IFMT ifmt_l_sfgts ATTRIBUTE_UNUSED = {
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99 32, 32, 0xffe007ff, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_OP5) }, { F (F_R2) }, { F (F_R3) }, { F (F_F_10_11) }, { 0 } }
100};
101
bf143b25 102static const CGEN_IFMT ifmt_l_sfgtsi ATTRIBUTE_UNUSED = {
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103 32, 32, 0xffe00000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_OP5) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
104};
105
bf143b25 106static const CGEN_IFMT ifmt_l_sfgtui ATTRIBUTE_UNUSED = {
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107 32, 32, 0xffe00000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_OP5) }, { F (F_R2) }, { F (F_UIMM16) }, { 0 } }
108};
109
110#undef F
111
87e6d782 112#define A(a) (1 << CGEN_INSN_##a)
87e6d782 113#define OPERAND(op) OPENRISC_OPERAND_##op
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114#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
115#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
116
117/* The instruction table. */
118
119static const CGEN_OPCODE openrisc_cgen_insn_opcode_table[MAX_INSNS] =
120{
121 /* Special null first entry.
122 A `num' value of zero is thus invalid.
123 Also, the special `invalid' insn resides here. */
124 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
125/* l.j ${abs-26} */
126 {
127 { 0, 0, 0, 0 },
128 { { MNEM, ' ', OP (ABS_26), 0 } },
129 & ifmt_l_j, { 0x0 }
130 },
131/* l.jal ${abs-26} */
132 {
133 { 0, 0, 0, 0 },
134 { { MNEM, ' ', OP (ABS_26), 0 } },
135 & ifmt_l_j, { 0x4000000 }
136 },
137/* l.jr $rA */
138 {
139 { 0, 0, 0, 0 },
140 { { MNEM, ' ', OP (RA), 0 } },
141 & ifmt_l_jr, { 0x14000000 }
142 },
143/* l.jalr $rA */
144 {
145 { 0, 0, 0, 0 },
146 { { MNEM, ' ', OP (RA), 0 } },
147 & ifmt_l_jr, { 0x14200000 }
148 },
149/* l.bal ${disp-26} */
150 {
151 { 0, 0, 0, 0 },
152 { { MNEM, ' ', OP (DISP_26), 0 } },
153 & ifmt_l_bal, { 0x8000000 }
154 },
155/* l.bnf ${disp-26} */
156 {
157 { 0, 0, 0, 0 },
158 { { MNEM, ' ', OP (DISP_26), 0 } },
159 & ifmt_l_bal, { 0xc000000 }
160 },
161/* l.bf ${disp-26} */
162 {
163 { 0, 0, 0, 0 },
164 { { MNEM, ' ', OP (DISP_26), 0 } },
165 & ifmt_l_bal, { 0x10000000 }
166 },
167/* l.brk ${uimm-16} */
168 {
169 { 0, 0, 0, 0 },
170 { { MNEM, ' ', OP (UIMM_16), 0 } },
171 & ifmt_l_jr, { 0x17000000 }
172 },
173/* l.rfe $rA */
174 {
175 { 0, 0, 0, 0 },
176 { { MNEM, ' ', OP (RA), 0 } },
177 & ifmt_l_jr, { 0x14400000 }
178 },
179/* l.sys ${uimm-16} */
180 {
181 { 0, 0, 0, 0 },
182 { { MNEM, ' ', OP (UIMM_16), 0 } },
183 & ifmt_l_jr, { 0x16000000 }
184 },
185/* l.nop */
186 {
187 { 0, 0, 0, 0 },
188 { { MNEM, 0 } },
189 & ifmt_l_jr, { 0x15000000 }
190 },
191/* l.movhi $rD,$hi16 */
192 {
193 { 0, 0, 0, 0 },
194 { { MNEM, ' ', OP (RD), ',', OP (HI16), 0 } },
195 & ifmt_l_movhi, { 0x18000000 }
196 },
197/* l.mfsr $rD,$rA */
198 {
199 { 0, 0, 0, 0 },
200 { { MNEM, ' ', OP (RD), ',', OP (RA), 0 } },
201 & ifmt_l_mfsr, { 0x1c000000 }
202 },
203/* l.mtsr $rA,$rB */
204 {
205 { 0, 0, 0, 0 },
206 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
207 & ifmt_l_mtsr, { 0x40000000 }
208 },
209/* l.lw $rD,${simm-16}($rA) */
210 {
211 { 0, 0, 0, 0 },
212 { { MNEM, ' ', OP (RD), ',', OP (SIMM_16), '(', OP (RA), ')', 0 } },
213 & ifmt_l_lw, { 0x80000000 }
214 },
215/* l.lbz $rD,${simm-16}($rA) */
216 {
217 { 0, 0, 0, 0 },
218 { { MNEM, ' ', OP (RD), ',', OP (SIMM_16), '(', OP (RA), ')', 0 } },
219 & ifmt_l_lw, { 0x84000000 }
220 },
221/* l.lbs $rD,${simm-16}($rA) */
222 {
223 { 0, 0, 0, 0 },
224 { { MNEM, ' ', OP (RD), ',', OP (SIMM_16), '(', OP (RA), ')', 0 } },
225 & ifmt_l_lw, { 0x88000000 }
226 },
227/* l.lhz $rD,${simm-16}($rA) */
228 {
229 { 0, 0, 0, 0 },
230 { { MNEM, ' ', OP (RD), ',', OP (SIMM_16), '(', OP (RA), ')', 0 } },
231 & ifmt_l_lw, { 0x8c000000 }
232 },
233/* l.lhs $rD,${simm-16}($rA) */
234 {
235 { 0, 0, 0, 0 },
236 { { MNEM, ' ', OP (RD), ',', OP (SIMM_16), '(', OP (RA), ')', 0 } },
237 & ifmt_l_lw, { 0x90000000 }
238 },
239/* l.sw ${ui16nc}($rA),$rB */
240 {
241 { 0, 0, 0, 0 },
242 { { MNEM, ' ', OP (UI16NC), '(', OP (RA), ')', ',', OP (RB), 0 } },
243 & ifmt_l_sw, { 0xd4000000 }
244 },
245/* l.sb ${ui16nc}($rA),$rB */
246 {
247 { 0, 0, 0, 0 },
248 { { MNEM, ' ', OP (UI16NC), '(', OP (RA), ')', ',', OP (RB), 0 } },
249 & ifmt_l_sw, { 0xd8000000 }
250 },
251/* l.sh ${ui16nc}($rA),$rB */
252 {
253 { 0, 0, 0, 0 },
254 { { MNEM, ' ', OP (UI16NC), '(', OP (RA), ')', ',', OP (RB), 0 } },
255 & ifmt_l_sw, { 0xdc000000 }
256 },
257/* l.sll $rD,$rA,$rB */
258 {
259 { 0, 0, 0, 0 },
260 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
261 & ifmt_l_sll, { 0xe0000008 }
262 },
263/* l.slli $rD,$rA,${uimm-5} */
264 {
265 { 0, 0, 0, 0 },
266 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM_5), 0 } },
267 & ifmt_l_slli, { 0xb4000000 }
268 },
269/* l.srl $rD,$rA,$rB */
270 {
271 { 0, 0, 0, 0 },
272 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
273 & ifmt_l_sll, { 0xe0000028 }
274 },
275/* l.srli $rD,$rA,${uimm-5} */
276 {
277 { 0, 0, 0, 0 },
278 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM_5), 0 } },
279 & ifmt_l_slli, { 0xb4000020 }
280 },
281/* l.sra $rD,$rA,$rB */
282 {
283 { 0, 0, 0, 0 },
284 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
285 & ifmt_l_sll, { 0xe0000048 }
286 },
287/* l.srai $rD,$rA,${uimm-5} */
288 {
289 { 0, 0, 0, 0 },
290 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM_5), 0 } },
291 & ifmt_l_slli, { 0xb4000040 }
292 },
293/* l.ror $rD,$rA,$rB */
294 {
295 { 0, 0, 0, 0 },
296 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
297 & ifmt_l_sll, { 0xe0000088 }
298 },
299/* l.rori $rD,$rA,${uimm-5} */
300 {
301 { 0, 0, 0, 0 },
302 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM_5), 0 } },
303 & ifmt_l_slli, { 0xb4000080 }
304 },
305/* l.add $rD,$rA,$rB */
306 {
307 { 0, 0, 0, 0 },
308 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
309 & ifmt_l_add, { 0xe0000000 }
310 },
311/* l.addi $rD,$rA,$lo16 */
312 {
313 { 0, 0, 0, 0 },
314 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (LO16), 0 } },
315 & ifmt_l_addi, { 0x94000000 }
316 },
317/* l.sub $rD,$rA,$rB */
318 {
319 { 0, 0, 0, 0 },
320 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
321 & ifmt_l_add, { 0xe0000002 }
322 },
323/* l.subi $rD,$rA,$lo16 */
324 {
325 { 0, 0, 0, 0 },
326 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (LO16), 0 } },
327 & ifmt_l_addi, { 0x9c000000 }
328 },
329/* l.and $rD,$rA,$rB */
330 {
331 { 0, 0, 0, 0 },
332 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
333 & ifmt_l_add, { 0xe0000003 }
334 },
335/* l.andi $rD,$rA,$lo16 */
336 {
337 { 0, 0, 0, 0 },
338 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (LO16), 0 } },
339 & ifmt_l_addi, { 0xa0000000 }
340 },
341/* l.or $rD,$rA,$rB */
342 {
343 { 0, 0, 0, 0 },
344 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
345 & ifmt_l_add, { 0xe0000004 }
346 },
347/* l.ori $rD,$rA,$lo16 */
348 {
349 { 0, 0, 0, 0 },
350 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (LO16), 0 } },
351 & ifmt_l_addi, { 0xa4000000 }
352 },
353/* l.xor $rD,$rA,$rB */
354 {
355 { 0, 0, 0, 0 },
356 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
357 & ifmt_l_add, { 0xe0000005 }
358 },
359/* l.xori $rD,$rA,$lo16 */
360 {
361 { 0, 0, 0, 0 },
362 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (LO16), 0 } },
363 & ifmt_l_addi, { 0xa8000000 }
364 },
365/* l.mul $rD,$rA,$rB */
366 {
367 { 0, 0, 0, 0 },
368 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
369 & ifmt_l_add, { 0xe0000006 }
370 },
371/* l.muli $rD,$rA,$lo16 */
372 {
373 { 0, 0, 0, 0 },
374 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (LO16), 0 } },
375 & ifmt_l_addi, { 0xac000000 }
376 },
377/* l.div $rD,$rA,$rB */
378 {
379 { 0, 0, 0, 0 },
380 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
381 & ifmt_l_add, { 0xe0000009 }
382 },
383/* l.divu $rD,$rA,$rB */
384 {
385 { 0, 0, 0, 0 },
386 { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
387 & ifmt_l_add, { 0xe000000a }
388 },
389/* l.sfgts $rA,$rB */
390 {
391 { 0, 0, 0, 0 },
392 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
393 & ifmt_l_sfgts, { 0xe4c00000 }
394 },
395/* l.sfgtu $rA,$rB */
396 {
397 { 0, 0, 0, 0 },
398 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
399 & ifmt_l_sfgts, { 0xe4400000 }
400 },
401/* l.sfges $rA,$rB */
402 {
403 { 0, 0, 0, 0 },
404 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
405 & ifmt_l_sfgts, { 0xe4e00000 }
406 },
407/* l.sfgeu $rA,$rB */
408 {
409 { 0, 0, 0, 0 },
410 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
411 & ifmt_l_sfgts, { 0xe4600000 }
412 },
413/* l.sflts $rA,$rB */
414 {
415 { 0, 0, 0, 0 },
416 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
417 & ifmt_l_sfgts, { 0xe5000000 }
418 },
419/* l.sfltu $rA,$rB */
420 {
421 { 0, 0, 0, 0 },
422 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
423 & ifmt_l_sfgts, { 0xe4800000 }
424 },
425/* l.sfles $rA,$rB */
426 {
427 { 0, 0, 0, 0 },
428 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
429 & ifmt_l_sfgts, { 0xe5200000 }
430 },
431/* l.sfleu $rA,$rB */
432 {
433 { 0, 0, 0, 0 },
434 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
435 & ifmt_l_sfgts, { 0xe4a00000 }
436 },
437/* l.sfgtsi $rA,${simm-16} */
438 {
439 { 0, 0, 0, 0 },
440 { { MNEM, ' ', OP (RA), ',', OP (SIMM_16), 0 } },
441 & ifmt_l_sfgtsi, { 0xb8c00000 }
442 },
443/* l.sfgtui $rA,${uimm-16} */
444 {
445 { 0, 0, 0, 0 },
446 { { MNEM, ' ', OP (RA), ',', OP (UIMM_16), 0 } },
447 & ifmt_l_sfgtui, { 0xb8400000 }
448 },
449/* l.sfgesi $rA,${simm-16} */
450 {
451 { 0, 0, 0, 0 },
452 { { MNEM, ' ', OP (RA), ',', OP (SIMM_16), 0 } },
453 & ifmt_l_sfgtsi, { 0xb8e00000 }
454 },
455/* l.sfgeui $rA,${uimm-16} */
456 {
457 { 0, 0, 0, 0 },
458 { { MNEM, ' ', OP (RA), ',', OP (UIMM_16), 0 } },
459 & ifmt_l_sfgtui, { 0xb8600000 }
460 },
461/* l.sfltsi $rA,${simm-16} */
462 {
463 { 0, 0, 0, 0 },
464 { { MNEM, ' ', OP (RA), ',', OP (SIMM_16), 0 } },
465 & ifmt_l_sfgtsi, { 0xb9000000 }
466 },
467/* l.sfltui $rA,${uimm-16} */
468 {
469 { 0, 0, 0, 0 },
470 { { MNEM, ' ', OP (RA), ',', OP (UIMM_16), 0 } },
471 & ifmt_l_sfgtui, { 0xb8800000 }
472 },
473/* l.sflesi $rA,${simm-16} */
474 {
475 { 0, 0, 0, 0 },
476 { { MNEM, ' ', OP (RA), ',', OP (SIMM_16), 0 } },
477 & ifmt_l_sfgtsi, { 0xb9200000 }
478 },
479/* l.sfleui $rA,${uimm-16} */
480 {
481 { 0, 0, 0, 0 },
482 { { MNEM, ' ', OP (RA), ',', OP (UIMM_16), 0 } },
483 & ifmt_l_sfgtui, { 0xb8a00000 }
484 },
485/* l.sfeq $rA,$rB */
486 {
487 { 0, 0, 0, 0 },
488 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
489 & ifmt_l_sfgts, { 0xe4000000 }
490 },
491/* l.sfeqi $rA,${simm-16} */
492 {
493 { 0, 0, 0, 0 },
494 { { MNEM, ' ', OP (RA), ',', OP (SIMM_16), 0 } },
495 & ifmt_l_sfgtsi, { 0xb8000000 }
496 },
497/* l.sfne $rA,$rB */
498 {
499 { 0, 0, 0, 0 },
500 { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
501 & ifmt_l_sfgts, { 0xe4200000 }
502 },
503/* l.sfnei $rA,${simm-16} */
504 {
505 { 0, 0, 0, 0 },
506 { { MNEM, ' ', OP (RA), ',', OP (SIMM_16), 0 } },
507 & ifmt_l_sfgtsi, { 0xb8200000 }
508 },
509};
510
511#undef A
512#undef OPERAND
513#undef MNEM
514#undef OP
515
516/* Formats for ALIAS macro-insns. */
517
87e6d782 518#define F(f) & openrisc_cgen_ifld_table[OPENRISC_##f]
bf143b25 519static const CGEN_IFMT ifmt_l_ret ATTRIBUTE_UNUSED = {
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520 32, 32, 0xffffffff, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_OP3) }, { F (F_OP4) }, { F (F_R2) }, { F (F_UIMM16) }, { 0 } }
521};
522
523#undef F
524
525/* Each non-simple macro entry points to an array of expansion possibilities. */
526
87e6d782 527#define A(a) (1 << CGEN_INSN_##a)
87e6d782 528#define OPERAND(op) OPENRISC_OPERAND_##op
87e6d782
NC
529#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
530#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
531
532/* The macro instruction table. */
533
534static const CGEN_IBASE openrisc_cgen_macro_insn_table[] =
535{
536/* l.ret */
537 {
538 -1, "l-ret", "l.ret", 32,
fb53f5a8 539 { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } }
87e6d782
NC
540 },
541};
542
543/* The macro instruction opcode table. */
544
545static const CGEN_OPCODE openrisc_cgen_macro_insn_opcode_table[] =
546{
547/* l.ret */
548 {
549 { 0, 0, 0, 0 },
550 { { MNEM, 0 } },
551 & ifmt_l_ret, { 0x140b0000 }
552 },
553};
554
555#undef A
556#undef OPERAND
557#undef MNEM
558#undef OP
559
560#ifndef CGEN_ASM_HASH_P
561#define CGEN_ASM_HASH_P(insn) 1
562#endif
563
564#ifndef CGEN_DIS_HASH_P
565#define CGEN_DIS_HASH_P(insn) 1
566#endif
567
568/* Return non-zero if INSN is to be added to the hash table.
569 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
570
571static int
572asm_hash_insn_p (insn)
fc05c67f 573 const CGEN_INSN *insn ATTRIBUTE_UNUSED;
87e6d782
NC
574{
575 return CGEN_ASM_HASH_P (insn);
576}
577
578static int
579dis_hash_insn_p (insn)
580 const CGEN_INSN *insn;
581{
582 /* If building the hash table and the NO-DIS attribute is present,
583 ignore. */
584 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
585 return 0;
586 return CGEN_DIS_HASH_P (insn);
587}
588
589#ifndef CGEN_ASM_HASH
590#define CGEN_ASM_HASH_SIZE 127
591#ifdef CGEN_MNEMONIC_OPERANDS
592#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
593#else
594#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
595#endif
596#endif
597
598/* It doesn't make much sense to provide a default here,
599 but while this is under development we do.
600 BUFFER is a pointer to the bytes of the insn, target order.
601 VALUE is the first base_insn_bitsize bits as an int in host order. */
602
603#ifndef CGEN_DIS_HASH
604#define CGEN_DIS_HASH_SIZE 256
605#define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
606#endif
607
608/* The result is the hash value of the insn.
609 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
610
611static unsigned int
612asm_hash_insn (mnem)
613 const char * mnem;
614{
615 return CGEN_ASM_HASH (mnem);
616}
617
618/* BUF is a pointer to the bytes of the insn, target order.
619 VALUE is the first base_insn_bitsize bits as an int in host order. */
620
621static unsigned int
622dis_hash_insn (buf, value)
0e2ee3ca 623 const char * buf ATTRIBUTE_UNUSED;
fc05c67f 624 CGEN_INSN_INT value ATTRIBUTE_UNUSED;
87e6d782
NC
625{
626 return CGEN_DIS_HASH (buf, value);
627}
628
629/* Set the recorded length of the insn in the CGEN_FIELDS struct. */
630
631static void
47b0e7ad 632set_fields_bitsize (CGEN_FIELDS *fields, int size)
87e6d782
NC
633{
634 CGEN_FIELDS_BITSIZE (fields) = size;
635}
636
637/* Function to call before using the operand instance table.
638 This plugs the opcode entries and macro instructions into the cpu table. */
639
640void
47b0e7ad 641openrisc_cgen_init_opcode_table (CGEN_CPU_DESC cd)
87e6d782
NC
642{
643 int i;
644 int num_macros = (sizeof (openrisc_cgen_macro_insn_table) /
645 sizeof (openrisc_cgen_macro_insn_table[0]));
646 const CGEN_IBASE *ib = & openrisc_cgen_macro_insn_table[0];
647 const CGEN_OPCODE *oc = & openrisc_cgen_macro_insn_opcode_table[0];
47b0e7ad
NC
648 CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
649
8d25cc3d
AM
650 /* This test has been added to avoid a warning generated
651 if memset is called with a third argument of value zero. */
652 if (num_macros >= 1)
653 memset (insns, 0, num_macros * sizeof (CGEN_INSN));
87e6d782
NC
654 for (i = 0; i < num_macros; ++i)
655 {
656 insns[i].base = &ib[i];
657 insns[i].opcode = &oc[i];
fc7bc883 658 openrisc_cgen_build_insn_regex (& insns[i]);
87e6d782
NC
659 }
660 cd->macro_insn_table.init_entries = insns;
661 cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
662 cd->macro_insn_table.num_init_entries = num_macros;
663
664 oc = & openrisc_cgen_insn_opcode_table[0];
665 insns = (CGEN_INSN *) cd->insn_table.init_entries;
666 for (i = 0; i < MAX_INSNS; ++i)
fc7bc883
RH
667 {
668 insns[i].opcode = &oc[i];
669 openrisc_cgen_build_insn_regex (& insns[i]);
670 }
87e6d782
NC
671
672 cd->sizeof_fields = sizeof (CGEN_FIELDS);
673 cd->set_fields_bitsize = set_fields_bitsize;
674
675 cd->asm_hash_p = asm_hash_insn_p;
676 cd->asm_hash = asm_hash_insn;
677 cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
678
679 cd->dis_hash_p = dis_hash_insn_p;
680 cd->dis_hash = dis_hash_insn;
681 cd->dis_hash_size = CGEN_DIS_HASH_SIZE;
682}
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