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gdb: add target_ops::supports_displaced_step
[deliverable/binutils-gdb.git] / opcodes / or1k-desc.c
CommitLineData
4162bb66 1/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
73589c9d
CS		 2/* CPU data for or1k.
3
4THIS FILE IS MACHINE GENERATED WITH CGEN.
5
b3adc24a 6Copyright (C) 1996-2020 Free Software Foundation, Inc.
73589c9d
CS		 7
8This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9
10 This file is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
13 any later version.
14
15 It is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
18 License for more details.
19
20 You should have received a copy of the GNU General Public License along
21 with this program; if not, write to the Free Software Foundation, Inc.,
22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
23
24*/
25
26#include "sysdep.h"
27#include <stdio.h>
28#include <stdarg.h>
29#include "ansidecl.h"
30#include "bfd.h"
31#include "symcat.h"
32#include "or1k-desc.h"
33#include "or1k-opc.h"
34#include "opintl.h"
35#include "libiberty.h"
36#include "xregex.h"
37
38/* Attributes. */
39
40static const CGEN_ATTR_ENTRY bool_attr[] =
41{
42 { "#f", 0 },
43 { "#t", 1 },
44 { 0, 0 }
45};
46
47static const CGEN_ATTR_ENTRY MACH_attr[] ATTRIBUTE_UNUSED =
48{
49 { "base", MACH_BASE },
50 { "or32", MACH_OR32 },
51 { "or32nd", MACH_OR32ND },
73589c9d
CS		 52 { "max", MACH_MAX },
53 { 0, 0 }
54};
55
56static const CGEN_ATTR_ENTRY ISA_attr[] ATTRIBUTE_UNUSED =
57{
58 { "openrisc", ISA_OPENRISC },
59 { "max", ISA_MAX },
60 { 0, 0 }
61};
62
63const CGEN_ATTR_TABLE or1k_cgen_ifield_attr_table[] =
64{
65 { "MACH", & MACH_attr[0], & MACH_attr[0] },
66 { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
67 { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
68 { "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
69 { "RESERVED", &bool_attr[0], &bool_attr[0] },
70 { "SIGN-OPT", &bool_attr[0], &bool_attr[0] },
71 { "SIGNED", &bool_attr[0], &bool_attr[0] },
72 { 0, 0, 0 }
73};
74
75const CGEN_ATTR_TABLE or1k_cgen_hardware_attr_table[] =
76{
77 { "MACH", & MACH_attr[0], & MACH_attr[0] },
78 { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
79 { "CACHE-ADDR", &bool_attr[0], &bool_attr[0] },
80 { "PC", &bool_attr[0], &bool_attr[0] },
81 { "PROFILE", &bool_attr[0], &bool_attr[0] },
82 { 0, 0, 0 }
83};
84
85const CGEN_ATTR_TABLE or1k_cgen_operand_attr_table[] =
86{
87 { "MACH", & MACH_attr[0], & MACH_attr[0] },
88 { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
89 { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
90 { "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
91 { "SIGN-OPT", &bool_attr[0], &bool_attr[0] },
92 { "SIGNED", &bool_attr[0], &bool_attr[0] },
93 { "NEGATIVE", &bool_attr[0], &bool_attr[0] },
94 { "RELAX", &bool_attr[0], &bool_attr[0] },
95 { "SEM-ONLY", &bool_attr[0], &bool_attr[0] },
96 { 0, 0, 0 }
97};
98
99const CGEN_ATTR_TABLE or1k_cgen_insn_attr_table[] =
100{
101 { "MACH", & MACH_attr[0], & MACH_attr[0] },
102 { "ALIAS", &bool_attr[0], &bool_attr[0] },
103 { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
104 { "UNCOND-CTI", &bool_attr[0], &bool_attr[0] },
105 { "COND-CTI", &bool_attr[0], &bool_attr[0] },
106 { "SKIP-CTI", &bool_attr[0], &bool_attr[0] },
107 { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] },
108 { "RELAXABLE", &bool_attr[0], &bool_attr[0] },
109 { "RELAXED", &bool_attr[0], &bool_attr[0] },
110 { "NO-DIS", &bool_attr[0], &bool_attr[0] },
111 { "PBB", &bool_attr[0], &bool_attr[0] },
112 { "DELAYED-CTI", &bool_attr[0], &bool_attr[0] },
113 { "NOT-IN-DELAY-SLOT", &bool_attr[0], &bool_attr[0] },
114 { "FORCED-CTI", &bool_attr[0], &bool_attr[0] },
115 { 0, 0, 0 }
116};
117
118/* Instruction set variants. */
119
120static const CGEN_ISA or1k_cgen_isa_table[] = {
121 { "openrisc", 32, 32, 32, 32 },
122 { 0, 0, 0, 0, 0 }
123};
124
125/* Machine variants. */
126
127static const CGEN_MACH or1k_cgen_mach_table[] = {
128 { "or32", "or1k", MACH_OR32, 0 },
129 { "or32nd", "or1knd", MACH_OR32ND, 0 },
73589c9d
CS		 130 { 0, 0, 0, 0 }
131};
132
e4c4ac46 133static CGEN_KEYWORD_ENTRY or1k_cgen_opval_h_gpr_entries[] =
73589c9d
CS		 134{
135 { "r0", 0, {0, {{{0, 0}}}}, 0, 0 },
136 { "r1", 1, {0, {{{0, 0}}}}, 0, 0 },
137 { "r2", 2, {0, {{{0, 0}}}}, 0, 0 },
138 { "r3", 3, {0, {{{0, 0}}}}, 0, 0 },
139 { "r4", 4, {0, {{{0, 0}}}}, 0, 0 },
140 { "r5", 5, {0, {{{0, 0}}}}, 0, 0 },
141 { "r6", 6, {0, {{{0, 0}}}}, 0, 0 },
142 { "r7", 7, {0, {{{0, 0}}}}, 0, 0 },
143 { "r8", 8, {0, {{{0, 0}}}}, 0, 0 },
144 { "r9", 9, {0, {{{0, 0}}}}, 0, 0 },
145 { "r10", 10, {0, {{{0, 0}}}}, 0, 0 },
146 { "r11", 11, {0, {{{0, 0}}}}, 0, 0 },
147 { "r12", 12, {0, {{{0, 0}}}}, 0, 0 },
148 { "r13", 13, {0, {{{0, 0}}}}, 0, 0 },
149 { "r14", 14, {0, {{{0, 0}}}}, 0, 0 },
150 { "r15", 15, {0, {{{0, 0}}}}, 0, 0 },
151 { "r16", 16, {0, {{{0, 0}}}}, 0, 0 },
152 { "r17", 17, {0, {{{0, 0}}}}, 0, 0 },
153 { "r18", 18, {0, {{{0, 0}}}}, 0, 0 },
154 { "r19", 19, {0, {{{0, 0}}}}, 0, 0 },
155 { "r20", 20, {0, {{{0, 0}}}}, 0, 0 },
156 { "r21", 21, {0, {{{0, 0}}}}, 0, 0 },
157 { "r22", 22, {0, {{{0, 0}}}}, 0, 0 },
158 { "r23", 23, {0, {{{0, 0}}}}, 0, 0 },
159 { "r24", 24, {0, {{{0, 0}}}}, 0, 0 },
160 { "r25", 25, {0, {{{0, 0}}}}, 0, 0 },
161 { "r26", 26, {0, {{{0, 0}}}}, 0, 0 },
162 { "r27", 27, {0, {{{0, 0}}}}, 0, 0 },
163 { "r28", 28, {0, {{{0, 0}}}}, 0, 0 },
164 { "r29", 29, {0, {{{0, 0}}}}, 0, 0 },
165 { "r30", 30, {0, {{{0, 0}}}}, 0, 0 },
166 { "r31", 31, {0, {{{0, 0}}}}, 0, 0 },
167 { "lr", 9, {0, {{{0, 0}}}}, 0, 0 },
168 { "sp", 1, {0, {{{0, 0}}}}, 0, 0 },
169 { "fp", 2, {0, {{{0, 0}}}}, 0, 0 }
170};
171
e4c4ac46 172CGEN_KEYWORD or1k_cgen_opval_h_gpr =
73589c9d 173{
e4c4ac46 174 & or1k_cgen_opval_h_gpr_entries[0],
73589c9d
CS		 175 35,
176 0, 0, 0, 0, ""
177};
178
e4c4ac46 179static CGEN_KEYWORD_ENTRY or1k_cgen_opval_h_fsr_entries[] =
73589c9d
CS		 180{
181 { "r0", 0, {0, {{{0, 0}}}}, 0, 0 },
182 { "r1", 1, {0, {{{0, 0}}}}, 0, 0 },
183 { "r2", 2, {0, {{{0, 0}}}}, 0, 0 },
184 { "r3", 3, {0, {{{0, 0}}}}, 0, 0 },
185 { "r4", 4, {0, {{{0, 0}}}}, 0, 0 },
186 { "r5", 5, {0, {{{0, 0}}}}, 0, 0 },
187 { "r6", 6, {0, {{{0, 0}}}}, 0, 0 },
188 { "r7", 7, {0, {{{0, 0}}}}, 0, 0 },
189 { "r8", 8, {0, {{{0, 0}}}}, 0, 0 },
190 { "r9", 9, {0, {{{0, 0}}}}, 0, 0 },
191 { "r10", 10, {0, {{{0, 0}}}}, 0, 0 },
192 { "r11", 11, {0, {{{0, 0}}}}, 0, 0 },
193 { "r12", 12, {0, {{{0, 0}}}}, 0, 0 },
194 { "r13", 13, {0, {{{0, 0}}}}, 0, 0 },
195 { "r14", 14, {0, {{{0, 0}}}}, 0, 0 },
196 { "r15", 15, {0, {{{0, 0}}}}, 0, 0 },
197 { "r16", 16, {0, {{{0, 0}}}}, 0, 0 },
198 { "r17", 17, {0, {{{0, 0}}}}, 0, 0 },
199 { "r18", 18, {0, {{{0, 0}}}}, 0, 0 },
200 { "r19", 19, {0, {{{0, 0}}}}, 0, 0 },
201 { "r20", 20, {0, {{{0, 0}}}}, 0, 0 },
202 { "r21", 21, {0, {{{0, 0}}}}, 0, 0 },
203 { "r22", 22, {0, {{{0, 0}}}}, 0, 0 },
204 { "r23", 23, {0, {{{0, 0}}}}, 0, 0 },
205 { "r24", 24, {0, {{{0, 0}}}}, 0, 0 },
206 { "r25", 25, {0, {{{0, 0}}}}, 0, 0 },
207 { "r26", 26, {0, {{{0, 0}}}}, 0, 0 },
208 { "r27", 27, {0, {{{0, 0}}}}, 0, 0 },
209 { "r28", 28, {0, {{{0, 0}}}}, 0, 0 },
210 { "r29", 29, {0, {{{0, 0}}}}, 0, 0 },
211 { "r30", 30, {0, {{{0, 0}}}}, 0, 0 },
212 { "r31", 31, {0, {{{0, 0}}}}, 0, 0 },
213 { "lr", 9, {0, {{{0, 0}}}}, 0, 0 },
214 { "sp", 1, {0, {{{0, 0}}}}, 0, 0 },
215 { "fp", 2, {0, {{{0, 0}}}}, 0, 0 }
216};
217
e4c4ac46 218CGEN_KEYWORD or1k_cgen_opval_h_fsr =
73589c9d 219{
e4c4ac46 220 & or1k_cgen_opval_h_fsr_entries[0],
73589c9d
CS		 221 35,
222 0, 0, 0, 0, ""
223};
224
73589c9d
CS		 225
226/* The hardware table. */
227
228#define A(a) (1 << CGEN_HW_##a)
229
230const CGEN_HW_ENTRY or1k_cgen_hw_table[] =
231{
232 { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
233 { "h-sint", HW_H_SINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
234 { "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
235 { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
236 { "h-iaddr", HW_H_IADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
a501eb44
SH		 237 { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PC), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
238 { "h-spr", HW_H_SPR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
239 { "h-gpr", HW_H_GPR, CGEN_ASM_KEYWORD, (PTR) & or1k_cgen_opval_h_gpr, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
240 { "h-fsr", HW_H_FSR, CGEN_ASM_KEYWORD, (PTR) & or1k_cgen_opval_h_fsr, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
e4c4ac46
SH		 241 { "h-fd32r", HW_H_FD32R, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
242 { "h-i64r", HW_H_I64R, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
a501eb44
SH		 243 { "h-sys-vr", HW_H_SYS_VR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
244 { "h-sys-upr", HW_H_SYS_UPR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
245 { "h-sys-cpucfgr", HW_H_SYS_CPUCFGR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
246 { "h-sys-dmmucfgr", HW_H_SYS_DMMUCFGR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
247 { "h-sys-immucfgr", HW_H_SYS_IMMUCFGR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
248 { "h-sys-dccfgr", HW_H_SYS_DCCFGR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
249 { "h-sys-iccfgr", HW_H_SYS_ICCFGR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
250 { "h-sys-dcfgr", HW_H_SYS_DCFGR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
251 { "h-sys-pccfgr", HW_H_SYS_PCCFGR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
252 { "h-sys-npc", HW_H_SYS_NPC, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
253 { "h-sys-sr", HW_H_SYS_SR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
254 { "h-sys-ppc", HW_H_SYS_PPC, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
255 { "h-sys-fpcsr", HW_H_SYS_FPCSR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
256 { "h-sys-epcr0", HW_H_SYS_EPCR0, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
257 { "h-sys-epcr1", HW_H_SYS_EPCR1, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
258 { "h-sys-epcr2", HW_H_SYS_EPCR2, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
259 { "h-sys-epcr3", HW_H_SYS_EPCR3, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
260 { "h-sys-epcr4", HW_H_SYS_EPCR4, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
261 { "h-sys-epcr5", HW_H_SYS_EPCR5, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
262 { "h-sys-epcr6", HW_H_SYS_EPCR6, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
263 { "h-sys-epcr7", HW_H_SYS_EPCR7, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
264 { "h-sys-epcr8", HW_H_SYS_EPCR8, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
265 { "h-sys-epcr9", HW_H_SYS_EPCR9, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
266 { "h-sys-epcr10", HW_H_SYS_EPCR10, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
267 { "h-sys-epcr11", HW_H_SYS_EPCR11, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
268 { "h-sys-epcr12", HW_H_SYS_EPCR12, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
269 { "h-sys-epcr13", HW_H_SYS_EPCR13, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
270 { "h-sys-epcr14", HW_H_SYS_EPCR14, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
271 { "h-sys-epcr15", HW_H_SYS_EPCR15, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
272 { "h-sys-eear0", HW_H_SYS_EEAR0, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
273 { "h-sys-eear1", HW_H_SYS_EEAR1, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
274 { "h-sys-eear2", HW_H_SYS_EEAR2, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
275 { "h-sys-eear3", HW_H_SYS_EEAR3, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
276 { "h-sys-eear4", HW_H_SYS_EEAR4, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
277 { "h-sys-eear5", HW_H_SYS_EEAR5, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
278 { "h-sys-eear6", HW_H_SYS_EEAR6, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
279 { "h-sys-eear7", HW_H_SYS_EEAR7, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
280 { "h-sys-eear8", HW_H_SYS_EEAR8, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
281 { "h-sys-eear9", HW_H_SYS_EEAR9, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
282 { "h-sys-eear10", HW_H_SYS_EEAR10, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
283 { "h-sys-eear11", HW_H_SYS_EEAR11, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
284 { "h-sys-eear12", HW_H_SYS_EEAR12, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
285 { "h-sys-eear13", HW_H_SYS_EEAR13, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
286 { "h-sys-eear14", HW_H_SYS_EEAR14, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
287 { "h-sys-eear15", HW_H_SYS_EEAR15, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
288 { "h-sys-esr0", HW_H_SYS_ESR0, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
289 { "h-sys-esr1", HW_H_SYS_ESR1, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
290 { "h-sys-esr2", HW_H_SYS_ESR2, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
291 { "h-sys-esr3", HW_H_SYS_ESR3, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
292 { "h-sys-esr4", HW_H_SYS_ESR4, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
293 { "h-sys-esr5", HW_H_SYS_ESR5, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
294 { "h-sys-esr6", HW_H_SYS_ESR6, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
295 { "h-sys-esr7", HW_H_SYS_ESR7, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
296 { "h-sys-esr8", HW_H_SYS_ESR8, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
297 { "h-sys-esr9", HW_H_SYS_ESR9, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
298 { "h-sys-esr10", HW_H_SYS_ESR10, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
299 { "h-sys-esr11", HW_H_SYS_ESR11, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
300 { "h-sys-esr12", HW_H_SYS_ESR12, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
301 { "h-sys-esr13", HW_H_SYS_ESR13, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
302 { "h-sys-esr14", HW_H_SYS_ESR14, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
303 { "h-sys-esr15", HW_H_SYS_ESR15, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
304 { "h-sys-gpr0", HW_H_SYS_GPR0, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
305 { "h-sys-gpr1", HW_H_SYS_GPR1, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
306 { "h-sys-gpr2", HW_H_SYS_GPR2, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
307 { "h-sys-gpr3", HW_H_SYS_GPR3, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
308 { "h-sys-gpr4", HW_H_SYS_GPR4, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
309 { "h-sys-gpr5", HW_H_SYS_GPR5, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
310 { "h-sys-gpr6", HW_H_SYS_GPR6, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
311 { "h-sys-gpr7", HW_H_SYS_GPR7, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
312 { "h-sys-gpr8", HW_H_SYS_GPR8, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
313 { "h-sys-gpr9", HW_H_SYS_GPR9, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
314 { "h-sys-gpr10", HW_H_SYS_GPR10, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
315 { "h-sys-gpr11", HW_H_SYS_GPR11, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
316 { "h-sys-gpr12", HW_H_SYS_GPR12, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
317 { "h-sys-gpr13", HW_H_SYS_GPR13, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
318 { "h-sys-gpr14", HW_H_SYS_GPR14, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
319 { "h-sys-gpr15", HW_H_SYS_GPR15, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
320 { "h-sys-gpr16", HW_H_SYS_GPR16, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
321 { "h-sys-gpr17", HW_H_SYS_GPR17, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
322 { "h-sys-gpr18", HW_H_SYS_GPR18, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
323 { "h-sys-gpr19", HW_H_SYS_GPR19, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
324 { "h-sys-gpr20", HW_H_SYS_GPR20, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
325 { "h-sys-gpr21", HW_H_SYS_GPR21, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
326 { "h-sys-gpr22", HW_H_SYS_GPR22, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
327 { "h-sys-gpr23", HW_H_SYS_GPR23, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
328 { "h-sys-gpr24", HW_H_SYS_GPR24, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
329 { "h-sys-gpr25", HW_H_SYS_GPR25, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
330 { "h-sys-gpr26", HW_H_SYS_GPR26, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
331 { "h-sys-gpr27", HW_H_SYS_GPR27, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
332 { "h-sys-gpr28", HW_H_SYS_GPR28, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
333 { "h-sys-gpr29", HW_H_SYS_GPR29, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
334 { "h-sys-gpr30", HW_H_SYS_GPR30, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
335 { "h-sys-gpr31", HW_H_SYS_GPR31, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
336 { "h-sys-gpr32", HW_H_SYS_GPR32, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
337 { "h-sys-gpr33", HW_H_SYS_GPR33, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
338 { "h-sys-gpr34", HW_H_SYS_GPR34, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
339 { "h-sys-gpr35", HW_H_SYS_GPR35, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
340 { "h-sys-gpr36", HW_H_SYS_GPR36, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
341 { "h-sys-gpr37", HW_H_SYS_GPR37, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
342 { "h-sys-gpr38", HW_H_SYS_GPR38, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
343 { "h-sys-gpr39", HW_H_SYS_GPR39, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
344 { "h-sys-gpr40", HW_H_SYS_GPR40, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
345 { "h-sys-gpr41", HW_H_SYS_GPR41, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
346 { "h-sys-gpr42", HW_H_SYS_GPR42, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
347 { "h-sys-gpr43", HW_H_SYS_GPR43, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
348 { "h-sys-gpr44", HW_H_SYS_GPR44, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
349 { "h-sys-gpr45", HW_H_SYS_GPR45, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
350 { "h-sys-gpr46", HW_H_SYS_GPR46, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
351 { "h-sys-gpr47", HW_H_SYS_GPR47, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
352 { "h-sys-gpr48", HW_H_SYS_GPR48, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
353 { "h-sys-gpr49", HW_H_SYS_GPR49, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
354 { "h-sys-gpr50", HW_H_SYS_GPR50, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
355 { "h-sys-gpr51", HW_H_SYS_GPR51, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
356 { "h-sys-gpr52", HW_H_SYS_GPR52, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
357 { "h-sys-gpr53", HW_H_SYS_GPR53, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
358 { "h-sys-gpr54", HW_H_SYS_GPR54, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
359 { "h-sys-gpr55", HW_H_SYS_GPR55, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
360 { "h-sys-gpr56", HW_H_SYS_GPR56, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
361 { "h-sys-gpr57", HW_H_SYS_GPR57, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
362 { "h-sys-gpr58", HW_H_SYS_GPR58, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
363 { "h-sys-gpr59", HW_H_SYS_GPR59, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
364 { "h-sys-gpr60", HW_H_SYS_GPR60, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
365 { "h-sys-gpr61", HW_H_SYS_GPR61, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
366 { "h-sys-gpr62", HW_H_SYS_GPR62, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
367 { "h-sys-gpr63", HW_H_SYS_GPR63, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
368 { "h-sys-gpr64", HW_H_SYS_GPR64, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
369 { "h-sys-gpr65", HW_H_SYS_GPR65, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
370 { "h-sys-gpr66", HW_H_SYS_GPR66, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
371 { "h-sys-gpr67", HW_H_SYS_GPR67, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
372 { "h-sys-gpr68", HW_H_SYS_GPR68, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
373 { "h-sys-gpr69", HW_H_SYS_GPR69, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
374 { "h-sys-gpr70", HW_H_SYS_GPR70, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
375 { "h-sys-gpr71", HW_H_SYS_GPR71, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
376 { "h-sys-gpr72", HW_H_SYS_GPR72, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
377 { "h-sys-gpr73", HW_H_SYS_GPR73, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
378 { "h-sys-gpr74", HW_H_SYS_GPR74, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
379 { "h-sys-gpr75", HW_H_SYS_GPR75, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
380 { "h-sys-gpr76", HW_H_SYS_GPR76, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
381 { "h-sys-gpr77", HW_H_SYS_GPR77, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
382 { "h-sys-gpr78", HW_H_SYS_GPR78, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
383 { "h-sys-gpr79", HW_H_SYS_GPR79, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
384 { "h-sys-gpr80", HW_H_SYS_GPR80, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
385 { "h-sys-gpr81", HW_H_SYS_GPR81, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
386 { "h-sys-gpr82", HW_H_SYS_GPR82, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
387 { "h-sys-gpr83", HW_H_SYS_GPR83, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
388 { "h-sys-gpr84", HW_H_SYS_GPR84, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
389 { "h-sys-gpr85", HW_H_SYS_GPR85, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
390 { "h-sys-gpr86", HW_H_SYS_GPR86, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
391 { "h-sys-gpr87", HW_H_SYS_GPR87, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
392 { "h-sys-gpr88", HW_H_SYS_GPR88, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
393 { "h-sys-gpr89", HW_H_SYS_GPR89, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
394 { "h-sys-gpr90", HW_H_SYS_GPR90, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
395 { "h-sys-gpr91", HW_H_SYS_GPR91, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
396 { "h-sys-gpr92", HW_H_SYS_GPR92, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
397 { "h-sys-gpr93", HW_H_SYS_GPR93, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
398 { "h-sys-gpr94", HW_H_SYS_GPR94, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
399 { "h-sys-gpr95", HW_H_SYS_GPR95, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
400 { "h-sys-gpr96", HW_H_SYS_GPR96, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
401 { "h-sys-gpr97", HW_H_SYS_GPR97, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
402 { "h-sys-gpr98", HW_H_SYS_GPR98, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
403 { "h-sys-gpr99", HW_H_SYS_GPR99, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
404 { "h-sys-gpr100", HW_H_SYS_GPR100, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
405 { "h-sys-gpr101", HW_H_SYS_GPR101, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
406 { "h-sys-gpr102", HW_H_SYS_GPR102, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
407 { "h-sys-gpr103", HW_H_SYS_GPR103, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
408 { "h-sys-gpr104", HW_H_SYS_GPR104, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
409 { "h-sys-gpr105", HW_H_SYS_GPR105, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
410 { "h-sys-gpr106", HW_H_SYS_GPR106, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
411 { "h-sys-gpr107", HW_H_SYS_GPR107, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
412 { "h-sys-gpr108", HW_H_SYS_GPR108, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
413 { "h-sys-gpr109", HW_H_SYS_GPR109, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
414 { "h-sys-gpr110", HW_H_SYS_GPR110, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
415 { "h-sys-gpr111", HW_H_SYS_GPR111, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
416 { "h-sys-gpr112", HW_H_SYS_GPR112, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
417 { "h-sys-gpr113", HW_H_SYS_GPR113, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
418 { "h-sys-gpr114", HW_H_SYS_GPR114, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
419 { "h-sys-gpr115", HW_H_SYS_GPR115, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
420 { "h-sys-gpr116", HW_H_SYS_GPR116, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
421 { "h-sys-gpr117", HW_H_SYS_GPR117, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
422 { "h-sys-gpr118", HW_H_SYS_GPR118, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
423 { "h-sys-gpr119", HW_H_SYS_GPR119, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
424 { "h-sys-gpr120", HW_H_SYS_GPR120, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
425 { "h-sys-gpr121", HW_H_SYS_GPR121, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
426 { "h-sys-gpr122", HW_H_SYS_GPR122, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
427 { "h-sys-gpr123", HW_H_SYS_GPR123, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
428 { "h-sys-gpr124", HW_H_SYS_GPR124, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
429 { "h-sys-gpr125", HW_H_SYS_GPR125, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
430 { "h-sys-gpr126", HW_H_SYS_GPR126, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
431 { "h-sys-gpr127", HW_H_SYS_GPR127, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
432 { "h-sys-gpr128", HW_H_SYS_GPR128, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
433 { "h-sys-gpr129", HW_H_SYS_GPR129, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
434 { "h-sys-gpr130", HW_H_SYS_GPR130, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
435 { "h-sys-gpr131", HW_H_SYS_GPR131, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
436 { "h-sys-gpr132", HW_H_SYS_GPR132, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
437 { "h-sys-gpr133", HW_H_SYS_GPR133, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
438 { "h-sys-gpr134", HW_H_SYS_GPR134, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
439 { "h-sys-gpr135", HW_H_SYS_GPR135, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
440 { "h-sys-gpr136", HW_H_SYS_GPR136, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
441 { "h-sys-gpr137", HW_H_SYS_GPR137, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
442 { "h-sys-gpr138", HW_H_SYS_GPR138, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
443 { "h-sys-gpr139", HW_H_SYS_GPR139, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
444 { "h-sys-gpr140", HW_H_SYS_GPR140, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
445 { "h-sys-gpr141", HW_H_SYS_GPR141, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
446 { "h-sys-gpr142", HW_H_SYS_GPR142, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
447 { "h-sys-gpr143", HW_H_SYS_GPR143, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
448 { "h-sys-gpr144", HW_H_SYS_GPR144, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
449 { "h-sys-gpr145", HW_H_SYS_GPR145, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
450 { "h-sys-gpr146", HW_H_SYS_GPR146, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
451 { "h-sys-gpr147", HW_H_SYS_GPR147, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
452 { "h-sys-gpr148", HW_H_SYS_GPR148, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
453 { "h-sys-gpr149", HW_H_SYS_GPR149, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
454 { "h-sys-gpr150", HW_H_SYS_GPR150, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
455 { "h-sys-gpr151", HW_H_SYS_GPR151, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
456 { "h-sys-gpr152", HW_H_SYS_GPR152, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
457 { "h-sys-gpr153", HW_H_SYS_GPR153, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
458 { "h-sys-gpr154", HW_H_SYS_GPR154, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
459 { "h-sys-gpr155", HW_H_SYS_GPR155, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
460 { "h-sys-gpr156", HW_H_SYS_GPR156, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
461 { "h-sys-gpr157", HW_H_SYS_GPR157, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
462 { "h-sys-gpr158", HW_H_SYS_GPR158, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
463 { "h-sys-gpr159", HW_H_SYS_GPR159, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
464 { "h-sys-gpr160", HW_H_SYS_GPR160, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
465 { "h-sys-gpr161", HW_H_SYS_GPR161, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
466 { "h-sys-gpr162", HW_H_SYS_GPR162, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
467 { "h-sys-gpr163", HW_H_SYS_GPR163, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
468 { "h-sys-gpr164", HW_H_SYS_GPR164, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
469 { "h-sys-gpr165", HW_H_SYS_GPR165, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
470 { "h-sys-gpr166", HW_H_SYS_GPR166, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
471 { "h-sys-gpr167", HW_H_SYS_GPR167, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
472 { "h-sys-gpr168", HW_H_SYS_GPR168, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
473 { "h-sys-gpr169", HW_H_SYS_GPR169, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
474 { "h-sys-gpr170", HW_H_SYS_GPR170, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
475 { "h-sys-gpr171", HW_H_SYS_GPR171, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
476 { "h-sys-gpr172", HW_H_SYS_GPR172, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
477 { "h-sys-gpr173", HW_H_SYS_GPR173, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
478 { "h-sys-gpr174", HW_H_SYS_GPR174, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
479 { "h-sys-gpr175", HW_H_SYS_GPR175, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
480 { "h-sys-gpr176", HW_H_SYS_GPR176, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
481 { "h-sys-gpr177", HW_H_SYS_GPR177, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
482 { "h-sys-gpr178", HW_H_SYS_GPR178, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
483 { "h-sys-gpr179", HW_H_SYS_GPR179, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
484 { "h-sys-gpr180", HW_H_SYS_GPR180, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
485 { "h-sys-gpr181", HW_H_SYS_GPR181, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
486 { "h-sys-gpr182", HW_H_SYS_GPR182, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
487 { "h-sys-gpr183", HW_H_SYS_GPR183, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
488 { "h-sys-gpr184", HW_H_SYS_GPR184, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
489 { "h-sys-gpr185", HW_H_SYS_GPR185, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
490 { "h-sys-gpr186", HW_H_SYS_GPR186, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
491 { "h-sys-gpr187", HW_H_SYS_GPR187, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
492 { "h-sys-gpr188", HW_H_SYS_GPR188, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
493 { "h-sys-gpr189", HW_H_SYS_GPR189, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
494 { "h-sys-gpr190", HW_H_SYS_GPR190, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
495 { "h-sys-gpr191", HW_H_SYS_GPR191, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
496 { "h-sys-gpr192", HW_H_SYS_GPR192, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
497 { "h-sys-gpr193", HW_H_SYS_GPR193, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
498 { "h-sys-gpr194", HW_H_SYS_GPR194, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
499 { "h-sys-gpr195", HW_H_SYS_GPR195, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
500 { "h-sys-gpr196", HW_H_SYS_GPR196, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
501 { "h-sys-gpr197", HW_H_SYS_GPR197, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
502 { "h-sys-gpr198", HW_H_SYS_GPR198, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
503 { "h-sys-gpr199", HW_H_SYS_GPR199, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
504 { "h-sys-gpr200", HW_H_SYS_GPR200, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
505 { "h-sys-gpr201", HW_H_SYS_GPR201, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
506 { "h-sys-gpr202", HW_H_SYS_GPR202, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
507 { "h-sys-gpr203", HW_H_SYS_GPR203, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
508 { "h-sys-gpr204", HW_H_SYS_GPR204, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
509 { "h-sys-gpr205", HW_H_SYS_GPR205, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
510 { "h-sys-gpr206", HW_H_SYS_GPR206, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
511 { "h-sys-gpr207", HW_H_SYS_GPR207, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
512 { "h-sys-gpr208", HW_H_SYS_GPR208, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
513 { "h-sys-gpr209", HW_H_SYS_GPR209, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
514 { "h-sys-gpr210", HW_H_SYS_GPR210, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
515 { "h-sys-gpr211", HW_H_SYS_GPR211, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
516 { "h-sys-gpr212", HW_H_SYS_GPR212, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
517 { "h-sys-gpr213", HW_H_SYS_GPR213, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
518 { "h-sys-gpr214", HW_H_SYS_GPR214, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
519 { "h-sys-gpr215", HW_H_SYS_GPR215, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
520 { "h-sys-gpr216", HW_H_SYS_GPR216, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
521 { "h-sys-gpr217", HW_H_SYS_GPR217, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
522 { "h-sys-gpr218", HW_H_SYS_GPR218, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
523 { "h-sys-gpr219", HW_H_SYS_GPR219, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
524 { "h-sys-gpr220", HW_H_SYS_GPR220, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
525 { "h-sys-gpr221", HW_H_SYS_GPR221, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
526 { "h-sys-gpr222", HW_H_SYS_GPR222, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
527 { "h-sys-gpr223", HW_H_SYS_GPR223, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
528 { "h-sys-gpr224", HW_H_SYS_GPR224, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
529 { "h-sys-gpr225", HW_H_SYS_GPR225, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
530 { "h-sys-gpr226", HW_H_SYS_GPR226, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
531 { "h-sys-gpr227", HW_H_SYS_GPR227, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
532 { "h-sys-gpr228", HW_H_SYS_GPR228, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
533 { "h-sys-gpr229", HW_H_SYS_GPR229, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
534 { "h-sys-gpr230", HW_H_SYS_GPR230, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
535 { "h-sys-gpr231", HW_H_SYS_GPR231, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
536 { "h-sys-gpr232", HW_H_SYS_GPR232, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
537 { "h-sys-gpr233", HW_H_SYS_GPR233, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
538 { "h-sys-gpr234", HW_H_SYS_GPR234, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
539 { "h-sys-gpr235", HW_H_SYS_GPR235, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
540 { "h-sys-gpr236", HW_H_SYS_GPR236, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
541 { "h-sys-gpr237", HW_H_SYS_GPR237, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
542 { "h-sys-gpr238", HW_H_SYS_GPR238, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
543 { "h-sys-gpr239", HW_H_SYS_GPR239, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
544 { "h-sys-gpr240", HW_H_SYS_GPR240, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
545 { "h-sys-gpr241", HW_H_SYS_GPR241, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
546 { "h-sys-gpr242", HW_H_SYS_GPR242, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
547 { "h-sys-gpr243", HW_H_SYS_GPR243, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
548 { "h-sys-gpr244", HW_H_SYS_GPR244, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
549 { "h-sys-gpr245", HW_H_SYS_GPR245, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
550 { "h-sys-gpr246", HW_H_SYS_GPR246, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
551 { "h-sys-gpr247", HW_H_SYS_GPR247, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
552 { "h-sys-gpr248", HW_H_SYS_GPR248, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
553 { "h-sys-gpr249", HW_H_SYS_GPR249, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
554 { "h-sys-gpr250", HW_H_SYS_GPR250, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
555 { "h-sys-gpr251", HW_H_SYS_GPR251, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
556 { "h-sys-gpr252", HW_H_SYS_GPR252, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
557 { "h-sys-gpr253", HW_H_SYS_GPR253, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
558 { "h-sys-gpr254", HW_H_SYS_GPR254, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
559 { "h-sys-gpr255", HW_H_SYS_GPR255, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
560 { "h-sys-gpr256", HW_H_SYS_GPR256, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
561 { "h-sys-gpr257", HW_H_SYS_GPR257, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
562 { "h-sys-gpr258", HW_H_SYS_GPR258, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
563 { "h-sys-gpr259", HW_H_SYS_GPR259, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
564 { "h-sys-gpr260", HW_H_SYS_GPR260, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
565 { "h-sys-gpr261", HW_H_SYS_GPR261, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
566 { "h-sys-gpr262", HW_H_SYS_GPR262, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
567 { "h-sys-gpr263", HW_H_SYS_GPR263, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
568 { "h-sys-gpr264", HW_H_SYS_GPR264, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
569 { "h-sys-gpr265", HW_H_SYS_GPR265, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
570 { "h-sys-gpr266", HW_H_SYS_GPR266, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
571 { "h-sys-gpr267", HW_H_SYS_GPR267, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
572 { "h-sys-gpr268", HW_H_SYS_GPR268, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
573 { "h-sys-gpr269", HW_H_SYS_GPR269, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
574 { "h-sys-gpr270", HW_H_SYS_GPR270, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
575 { "h-sys-gpr271", HW_H_SYS_GPR271, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
576 { "h-sys-gpr272", HW_H_SYS_GPR272, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
577 { "h-sys-gpr273", HW_H_SYS_GPR273, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
578 { "h-sys-gpr274", HW_H_SYS_GPR274, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
579 { "h-sys-gpr275", HW_H_SYS_GPR275, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
580 { "h-sys-gpr276", HW_H_SYS_GPR276, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
581 { "h-sys-gpr277", HW_H_SYS_GPR277, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
582 { "h-sys-gpr278", HW_H_SYS_GPR278, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
583 { "h-sys-gpr279", HW_H_SYS_GPR279, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
584 { "h-sys-gpr280", HW_H_SYS_GPR280, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
585 { "h-sys-gpr281", HW_H_SYS_GPR281, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
586 { "h-sys-gpr282", HW_H_SYS_GPR282, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
587 { "h-sys-gpr283", HW_H_SYS_GPR283, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
588 { "h-sys-gpr284", HW_H_SYS_GPR284, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
589 { "h-sys-gpr285", HW_H_SYS_GPR285, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
590 { "h-sys-gpr286", HW_H_SYS_GPR286, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
591 { "h-sys-gpr287", HW_H_SYS_GPR287, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
592 { "h-sys-gpr288", HW_H_SYS_GPR288, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
593 { "h-sys-gpr289", HW_H_SYS_GPR289, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
594 { "h-sys-gpr290", HW_H_SYS_GPR290, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
595 { "h-sys-gpr291", HW_H_SYS_GPR291, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
596 { "h-sys-gpr292", HW_H_SYS_GPR292, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
597 { "h-sys-gpr293", HW_H_SYS_GPR293, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
598 { "h-sys-gpr294", HW_H_SYS_GPR294, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
599 { "h-sys-gpr295", HW_H_SYS_GPR295, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
600 { "h-sys-gpr296", HW_H_SYS_GPR296, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
601 { "h-sys-gpr297", HW_H_SYS_GPR297, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
602 { "h-sys-gpr298", HW_H_SYS_GPR298, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
603 { "h-sys-gpr299", HW_H_SYS_GPR299, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
604 { "h-sys-gpr300", HW_H_SYS_GPR300, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
605 { "h-sys-gpr301", HW_H_SYS_GPR301, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
606 { "h-sys-gpr302", HW_H_SYS_GPR302, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
607 { "h-sys-gpr303", HW_H_SYS_GPR303, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
608 { "h-sys-gpr304", HW_H_SYS_GPR304, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
609 { "h-sys-gpr305", HW_H_SYS_GPR305, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
610 { "h-sys-gpr306", HW_H_SYS_GPR306, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
611 { "h-sys-gpr307", HW_H_SYS_GPR307, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
612 { "h-sys-gpr308", HW_H_SYS_GPR308, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
613 { "h-sys-gpr309", HW_H_SYS_GPR309, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
614 { "h-sys-gpr310", HW_H_SYS_GPR310, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
615 { "h-sys-gpr311", HW_H_SYS_GPR311, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
616 { "h-sys-gpr312", HW_H_SYS_GPR312, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
617 { "h-sys-gpr313", HW_H_SYS_GPR313, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
618 { "h-sys-gpr314", HW_H_SYS_GPR314, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
619 { "h-sys-gpr315", HW_H_SYS_GPR315, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
620 { "h-sys-gpr316", HW_H_SYS_GPR316, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
621 { "h-sys-gpr317", HW_H_SYS_GPR317, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
622 { "h-sys-gpr318", HW_H_SYS_GPR318, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
623 { "h-sys-gpr319", HW_H_SYS_GPR319, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
624 { "h-sys-gpr320", HW_H_SYS_GPR320, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
625 { "h-sys-gpr321", HW_H_SYS_GPR321, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
626 { "h-sys-gpr322", HW_H_SYS_GPR322, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
627 { "h-sys-gpr323", HW_H_SYS_GPR323, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
628 { "h-sys-gpr324", HW_H_SYS_GPR324, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
629 { "h-sys-gpr325", HW_H_SYS_GPR325, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
630 { "h-sys-gpr326", HW_H_SYS_GPR326, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
631 { "h-sys-gpr327", HW_H_SYS_GPR327, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
632 { "h-sys-gpr328", HW_H_SYS_GPR328, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
633 { "h-sys-gpr329", HW_H_SYS_GPR329, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
634 { "h-sys-gpr330", HW_H_SYS_GPR330, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
635 { "h-sys-gpr331", HW_H_SYS_GPR331, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
636 { "h-sys-gpr332", HW_H_SYS_GPR332, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
637 { "h-sys-gpr333", HW_H_SYS_GPR333, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
638 { "h-sys-gpr334", HW_H_SYS_GPR334, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
639 { "h-sys-gpr335", HW_H_SYS_GPR335, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
640 { "h-sys-gpr336", HW_H_SYS_GPR336, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
641 { "h-sys-gpr337", HW_H_SYS_GPR337, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
642 { "h-sys-gpr338", HW_H_SYS_GPR338, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
643 { "h-sys-gpr339", HW_H_SYS_GPR339, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
644 { "h-sys-gpr340", HW_H_SYS_GPR340, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
645 { "h-sys-gpr341", HW_H_SYS_GPR341, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
646 { "h-sys-gpr342", HW_H_SYS_GPR342, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
647 { "h-sys-gpr343", HW_H_SYS_GPR343, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
648 { "h-sys-gpr344", HW_H_SYS_GPR344, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
649 { "h-sys-gpr345", HW_H_SYS_GPR345, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
650 { "h-sys-gpr346", HW_H_SYS_GPR346, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
651 { "h-sys-gpr347", HW_H_SYS_GPR347, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
652 { "h-sys-gpr348", HW_H_SYS_GPR348, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
653 { "h-sys-gpr349", HW_H_SYS_GPR349, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
654 { "h-sys-gpr350", HW_H_SYS_GPR350, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
655 { "h-sys-gpr351", HW_H_SYS_GPR351, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
656 { "h-sys-gpr352", HW_H_SYS_GPR352, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
657 { "h-sys-gpr353", HW_H_SYS_GPR353, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
658 { "h-sys-gpr354", HW_H_SYS_GPR354, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
659 { "h-sys-gpr355", HW_H_SYS_GPR355, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
660 { "h-sys-gpr356", HW_H_SYS_GPR356, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
661 { "h-sys-gpr357", HW_H_SYS_GPR357, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
662 { "h-sys-gpr358", HW_H_SYS_GPR358, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
663 { "h-sys-gpr359", HW_H_SYS_GPR359, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
664 { "h-sys-gpr360", HW_H_SYS_GPR360, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
665 { "h-sys-gpr361", HW_H_SYS_GPR361, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
666 { "h-sys-gpr362", HW_H_SYS_GPR362, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
667 { "h-sys-gpr363", HW_H_SYS_GPR363, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
668 { "h-sys-gpr364", HW_H_SYS_GPR364, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
669 { "h-sys-gpr365", HW_H_SYS_GPR365, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
670 { "h-sys-gpr366", HW_H_SYS_GPR366, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
671 { "h-sys-gpr367", HW_H_SYS_GPR367, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
672 { "h-sys-gpr368", HW_H_SYS_GPR368, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
673 { "h-sys-gpr369", HW_H_SYS_GPR369, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
674 { "h-sys-gpr370", HW_H_SYS_GPR370, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
675 { "h-sys-gpr371", HW_H_SYS_GPR371, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
676 { "h-sys-gpr372", HW_H_SYS_GPR372, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
677 { "h-sys-gpr373", HW_H_SYS_GPR373, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
678 { "h-sys-gpr374", HW_H_SYS_GPR374, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
679 { "h-sys-gpr375", HW_H_SYS_GPR375, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
680 { "h-sys-gpr376", HW_H_SYS_GPR376, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
681 { "h-sys-gpr377", HW_H_SYS_GPR377, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
682 { "h-sys-gpr378", HW_H_SYS_GPR378, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
683 { "h-sys-gpr379", HW_H_SYS_GPR379, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
684 { "h-sys-gpr380", HW_H_SYS_GPR380, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
685 { "h-sys-gpr381", HW_H_SYS_GPR381, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
686 { "h-sys-gpr382", HW_H_SYS_GPR382, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
687 { "h-sys-gpr383", HW_H_SYS_GPR383, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
688 { "h-sys-gpr384", HW_H_SYS_GPR384, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
689 { "h-sys-gpr385", HW_H_SYS_GPR385, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
690 { "h-sys-gpr386", HW_H_SYS_GPR386, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
691 { "h-sys-gpr387", HW_H_SYS_GPR387, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
692 { "h-sys-gpr388", HW_H_SYS_GPR388, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
693 { "h-sys-gpr389", HW_H_SYS_GPR389, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
694 { "h-sys-gpr390", HW_H_SYS_GPR390, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
695 { "h-sys-gpr391", HW_H_SYS_GPR391, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
696 { "h-sys-gpr392", HW_H_SYS_GPR392, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
697 { "h-sys-gpr393", HW_H_SYS_GPR393, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
698 { "h-sys-gpr394", HW_H_SYS_GPR394, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
699 { "h-sys-gpr395", HW_H_SYS_GPR395, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
700 { "h-sys-gpr396", HW_H_SYS_GPR396, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
701 { "h-sys-gpr397", HW_H_SYS_GPR397, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
702 { "h-sys-gpr398", HW_H_SYS_GPR398, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
703 { "h-sys-gpr399", HW_H_SYS_GPR399, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
704 { "h-sys-gpr400", HW_H_SYS_GPR400, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
705 { "h-sys-gpr401", HW_H_SYS_GPR401, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
706 { "h-sys-gpr402", HW_H_SYS_GPR402, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
707 { "h-sys-gpr403", HW_H_SYS_GPR403, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
708 { "h-sys-gpr404", HW_H_SYS_GPR404, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
709 { "h-sys-gpr405", HW_H_SYS_GPR405, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
710 { "h-sys-gpr406", HW_H_SYS_GPR406, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
711 { "h-sys-gpr407", HW_H_SYS_GPR407, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
712 { "h-sys-gpr408", HW_H_SYS_GPR408, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
713 { "h-sys-gpr409", HW_H_SYS_GPR409, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
714 { "h-sys-gpr410", HW_H_SYS_GPR410, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
715 { "h-sys-gpr411", HW_H_SYS_GPR411, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
716 { "h-sys-gpr412", HW_H_SYS_GPR412, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
717 { "h-sys-gpr413", HW_H_SYS_GPR413, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
718 { "h-sys-gpr414", HW_H_SYS_GPR414, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
719 { "h-sys-gpr415", HW_H_SYS_GPR415, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
720 { "h-sys-gpr416", HW_H_SYS_GPR416, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
721 { "h-sys-gpr417", HW_H_SYS_GPR417, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
722 { "h-sys-gpr418", HW_H_SYS_GPR418, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
723 { "h-sys-gpr419", HW_H_SYS_GPR419, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
724 { "h-sys-gpr420", HW_H_SYS_GPR420, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
725 { "h-sys-gpr421", HW_H_SYS_GPR421, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
726 { "h-sys-gpr422", HW_H_SYS_GPR422, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
727 { "h-sys-gpr423", HW_H_SYS_GPR423, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
728 { "h-sys-gpr424", HW_H_SYS_GPR424, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
729 { "h-sys-gpr425", HW_H_SYS_GPR425, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
730 { "h-sys-gpr426", HW_H_SYS_GPR426, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
731 { "h-sys-gpr427", HW_H_SYS_GPR427, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
732 { "h-sys-gpr428", HW_H_SYS_GPR428, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
733 { "h-sys-gpr429", HW_H_SYS_GPR429, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
734 { "h-sys-gpr430", HW_H_SYS_GPR430, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
735 { "h-sys-gpr431", HW_H_SYS_GPR431, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
736 { "h-sys-gpr432", HW_H_SYS_GPR432, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
737 { "h-sys-gpr433", HW_H_SYS_GPR433, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
738 { "h-sys-gpr434", HW_H_SYS_GPR434, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
739 { "h-sys-gpr435", HW_H_SYS_GPR435, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
740 { "h-sys-gpr436", HW_H_SYS_GPR436, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
741 { "h-sys-gpr437", HW_H_SYS_GPR437, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
742 { "h-sys-gpr438", HW_H_SYS_GPR438, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
743 { "h-sys-gpr439", HW_H_SYS_GPR439, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
744 { "h-sys-gpr440", HW_H_SYS_GPR440, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
745 { "h-sys-gpr441", HW_H_SYS_GPR441, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
746 { "h-sys-gpr442", HW_H_SYS_GPR442, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
747 { "h-sys-gpr443", HW_H_SYS_GPR443, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
748 { "h-sys-gpr444", HW_H_SYS_GPR444, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
749 { "h-sys-gpr445", HW_H_SYS_GPR445, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
750 { "h-sys-gpr446", HW_H_SYS_GPR446, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
751 { "h-sys-gpr447", HW_H_SYS_GPR447, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
752 { "h-sys-gpr448", HW_H_SYS_GPR448, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
753 { "h-sys-gpr449", HW_H_SYS_GPR449, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
754 { "h-sys-gpr450", HW_H_SYS_GPR450, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
755 { "h-sys-gpr451", HW_H_SYS_GPR451, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
756 { "h-sys-gpr452", HW_H_SYS_GPR452, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
757 { "h-sys-gpr453", HW_H_SYS_GPR453, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
758 { "h-sys-gpr454", HW_H_SYS_GPR454, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
759 { "h-sys-gpr455", HW_H_SYS_GPR455, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
760 { "h-sys-gpr456", HW_H_SYS_GPR456, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
761 { "h-sys-gpr457", HW_H_SYS_GPR457, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
762 { "h-sys-gpr458", HW_H_SYS_GPR458, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
763 { "h-sys-gpr459", HW_H_SYS_GPR459, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
764 { "h-sys-gpr460", HW_H_SYS_GPR460, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
765 { "h-sys-gpr461", HW_H_SYS_GPR461, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
766 { "h-sys-gpr462", HW_H_SYS_GPR462, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
767 { "h-sys-gpr463", HW_H_SYS_GPR463, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
768 { "h-sys-gpr464", HW_H_SYS_GPR464, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
769 { "h-sys-gpr465", HW_H_SYS_GPR465, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
770 { "h-sys-gpr466", HW_H_SYS_GPR466, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
771 { "h-sys-gpr467", HW_H_SYS_GPR467, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
772 { "h-sys-gpr468", HW_H_SYS_GPR468, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
773 { "h-sys-gpr469", HW_H_SYS_GPR469, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
774 { "h-sys-gpr470", HW_H_SYS_GPR470, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
775 { "h-sys-gpr471", HW_H_SYS_GPR471, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
776 { "h-sys-gpr472", HW_H_SYS_GPR472, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
777 { "h-sys-gpr473", HW_H_SYS_GPR473, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
778 { "h-sys-gpr474", HW_H_SYS_GPR474, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
779 { "h-sys-gpr475", HW_H_SYS_GPR475, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
780 { "h-sys-gpr476", HW_H_SYS_GPR476, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
781 { "h-sys-gpr477", HW_H_SYS_GPR477, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
782 { "h-sys-gpr478", HW_H_SYS_GPR478, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
783 { "h-sys-gpr479", HW_H_SYS_GPR479, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
784 { "h-sys-gpr480", HW_H_SYS_GPR480, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
785 { "h-sys-gpr481", HW_H_SYS_GPR481, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
786 { "h-sys-gpr482", HW_H_SYS_GPR482, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
787 { "h-sys-gpr483", HW_H_SYS_GPR483, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
788 { "h-sys-gpr484", HW_H_SYS_GPR484, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
789 { "h-sys-gpr485", HW_H_SYS_GPR485, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
790 { "h-sys-gpr486", HW_H_SYS_GPR486, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
791 { "h-sys-gpr487", HW_H_SYS_GPR487, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
792 { "h-sys-gpr488", HW_H_SYS_GPR488, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
793 { "h-sys-gpr489", HW_H_SYS_GPR489, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
794 { "h-sys-gpr490", HW_H_SYS_GPR490, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
795 { "h-sys-gpr491", HW_H_SYS_GPR491, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
796 { "h-sys-gpr492", HW_H_SYS_GPR492, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
797 { "h-sys-gpr493", HW_H_SYS_GPR493, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
798 { "h-sys-gpr494", HW_H_SYS_GPR494, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
799 { "h-sys-gpr495", HW_H_SYS_GPR495, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
800 { "h-sys-gpr496", HW_H_SYS_GPR496, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
801 { "h-sys-gpr497", HW_H_SYS_GPR497, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
802 { "h-sys-gpr498", HW_H_SYS_GPR498, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
803 { "h-sys-gpr499", HW_H_SYS_GPR499, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
804 { "h-sys-gpr500", HW_H_SYS_GPR500, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
805 { "h-sys-gpr501", HW_H_SYS_GPR501, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
806 { "h-sys-gpr502", HW_H_SYS_GPR502, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
807 { "h-sys-gpr503", HW_H_SYS_GPR503, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
808 { "h-sys-gpr504", HW_H_SYS_GPR504, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
809 { "h-sys-gpr505", HW_H_SYS_GPR505, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
810 { "h-sys-gpr506", HW_H_SYS_GPR506, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
811 { "h-sys-gpr507", HW_H_SYS_GPR507, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
812 { "h-sys-gpr508", HW_H_SYS_GPR508, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
813 { "h-sys-gpr509", HW_H_SYS_GPR509, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
814 { "h-sys-gpr510", HW_H_SYS_GPR510, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
815 { "h-sys-gpr511", HW_H_SYS_GPR511, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
816 { "h-mac-maclo", HW_H_MAC_MACLO, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
817 { "h-mac-machi", HW_H_MAC_MACHI, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
818 { "h-tick-ttmr", HW_H_TICK_TTMR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
819 { "h-sys-vr-rev", HW_H_SYS_VR_REV, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
820 { "h-sys-vr-cfg", HW_H_SYS_VR_CFG, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
821 { "h-sys-vr-ver", HW_H_SYS_VR_VER, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
822 { "h-sys-upr-up", HW_H_SYS_UPR_UP, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
823 { "h-sys-upr-dcp", HW_H_SYS_UPR_DCP, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
824 { "h-sys-upr-icp", HW_H_SYS_UPR_ICP, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
825 { "h-sys-upr-dmp", HW_H_SYS_UPR_DMP, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
826 { "h-sys-upr-mp", HW_H_SYS_UPR_MP, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
827 { "h-sys-upr-imp", HW_H_SYS_UPR_IMP, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
828 { "h-sys-upr-dup", HW_H_SYS_UPR_DUP, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
829 { "h-sys-upr-pcup", HW_H_SYS_UPR_PCUP, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
830 { "h-sys-upr-picp", HW_H_SYS_UPR_PICP, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
831 { "h-sys-upr-pmp", HW_H_SYS_UPR_PMP, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
832 { "h-sys-upr-ttp", HW_H_SYS_UPR_TTP, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
833 { "h-sys-upr-cup", HW_H_SYS_UPR_CUP, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
834 { "h-sys-cpucfgr-nsgr", HW_H_SYS_CPUCFGR_NSGR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
835 { "h-sys-cpucfgr-cgf", HW_H_SYS_CPUCFGR_CGF, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
836 { "h-sys-cpucfgr-ob32s", HW_H_SYS_CPUCFGR_OB32S, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
837 { "h-sys-cpucfgr-ob64s", HW_H_SYS_CPUCFGR_OB64S, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
838 { "h-sys-cpucfgr-of32s", HW_H_SYS_CPUCFGR_OF32S, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
839 { "h-sys-cpucfgr-of64s", HW_H_SYS_CPUCFGR_OF64S, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
840 { "h-sys-cpucfgr-ov64s", HW_H_SYS_CPUCFGR_OV64S, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
841 { "h-sys-cpucfgr-nd", HW_H_SYS_CPUCFGR_ND, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
842 { "h-sys-sr-sm", HW_H_SYS_SR_SM, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
843 { "h-sys-sr-tee", HW_H_SYS_SR_TEE, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
844 { "h-sys-sr-iee", HW_H_SYS_SR_IEE, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
845 { "h-sys-sr-dce", HW_H_SYS_SR_DCE, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
846 { "h-sys-sr-ice", HW_H_SYS_SR_ICE, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
847 { "h-sys-sr-dme", HW_H_SYS_SR_DME, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
848 { "h-sys-sr-ime", HW_H_SYS_SR_IME, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
849 { "h-sys-sr-lee", HW_H_SYS_SR_LEE, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
850 { "h-sys-sr-ce", HW_H_SYS_SR_CE, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
851 { "h-sys-sr-f", HW_H_SYS_SR_F, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
852 { "h-sys-sr-cy", HW_H_SYS_SR_CY, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
853 { "h-sys-sr-ov", HW_H_SYS_SR_OV, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
854 { "h-sys-sr-ove", HW_H_SYS_SR_OVE, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
855 { "h-sys-sr-dsx", HW_H_SYS_SR_DSX, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
856 { "h-sys-sr-eph", HW_H_SYS_SR_EPH, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
857 { "h-sys-sr-fo", HW_H_SYS_SR_FO, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
858 { "h-sys-sr-sumra", HW_H_SYS_SR_SUMRA, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
859 { "h-sys-sr-cid", HW_H_SYS_SR_CID, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
860 { "h-sys-fpcsr-fpee", HW_H_SYS_FPCSR_FPEE, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
861 { "h-sys-fpcsr-rm", HW_H_SYS_FPCSR_RM, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
862 { "h-sys-fpcsr-ovf", HW_H_SYS_FPCSR_OVF, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
863 { "h-sys-fpcsr-unf", HW_H_SYS_FPCSR_UNF, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
864 { "h-sys-fpcsr-snf", HW_H_SYS_FPCSR_SNF, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
865 { "h-sys-fpcsr-qnf", HW_H_SYS_FPCSR_QNF, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
866 { "h-sys-fpcsr-zf", HW_H_SYS_FPCSR_ZF, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
867 { "h-sys-fpcsr-ixf", HW_H_SYS_FPCSR_IXF, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
868 { "h-sys-fpcsr-ivf", HW_H_SYS_FPCSR_IVF, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
869 { "h-sys-fpcsr-inf", HW_H_SYS_FPCSR_INF, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
870 { "h-sys-fpcsr-dzf", HW_H_SYS_FPCSR_DZF, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
871 { "h-simm16", HW_H_SIMM16, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 872 { "h-uimm16", HW_H_UIMM16, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
873 { "h-uimm6", HW_H_UIMM6, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
999b995d
SK		 874 { "h-atomic-reserve", HW_H_ATOMIC_RESERVE, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
875 { "h-atomic-address", HW_H_ATOMIC_ADDRESS, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
e4c4ac46 876 { "h-roff1", HW_H_ROFF1, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
73589c9d
CS		 877 { 0, 0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } }
878};
879
880#undef A
881
882
883/* The instruction field table. */
884
885#define A(a) (1 << CGEN_IFLD_##a)
886
887const CGEN_IFLD or1k_cgen_ifld_table[] =
888{
889 { OR1K_F_NIL, "f-nil", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
890 { OR1K_F_ANYOF, "f-anyof", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
a501eb44
SH		 891 { OR1K_F_OPCODE, "f-opcode", 0, 32, 31, 6, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
892 { OR1K_F_R1, "f-r1", 0, 32, 25, 5, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
893 { OR1K_F_R2, "f-r2", 0, 32, 20, 5, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
894 { OR1K_F_R3, "f-r3", 0, 32, 15, 5, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
895 { OR1K_F_OP_25_2, "f-op-25-2", 0, 32, 25, 2, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
896 { OR1K_F_OP_25_5, "f-op-25-5", 0, 32, 25, 5, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
897 { OR1K_F_OP_16_1, "f-op-16-1", 0, 32, 16, 1, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
898 { OR1K_F_OP_7_4, "f-op-7-4", 0, 32, 7, 4, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
899 { OR1K_F_OP_3_4, "f-op-3-4", 0, 32, 3, 4, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
900 { OR1K_F_OP_9_2, "f-op-9-2", 0, 32, 9, 2, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
901 { OR1K_F_OP_9_4, "f-op-9-4", 0, 32, 9, 4, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
902 { OR1K_F_OP_7_8, "f-op-7-8", 0, 32, 7, 8, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
903 { OR1K_F_OP_7_2, "f-op-7-2", 0, 32, 7, 2, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
904 { OR1K_F_RESV_25_26, "f-resv-25-26", 0, 32, 25, 26, { 0|A(RESERVED), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
905 { OR1K_F_RESV_25_10, "f-resv-25-10", 0, 32, 25, 10, { 0|A(RESERVED), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
906 { OR1K_F_RESV_25_5, "f-resv-25-5", 0, 32, 25, 5, { 0|A(RESERVED), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
907 { OR1K_F_RESV_23_8, "f-resv-23-8", 0, 32, 23, 8, { 0|A(RESERVED), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
908 { OR1K_F_RESV_20_21, "f-resv-20-21", 0, 32, 20, 21, { 0|A(RESERVED), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
909 { OR1K_F_RESV_20_5, "f-resv-20-5", 0, 32, 20, 5, { 0|A(RESERVED), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
910 { OR1K_F_RESV_20_4, "f-resv-20-4", 0, 32, 20, 4, { 0|A(RESERVED), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
911 { OR1K_F_RESV_15_8, "f-resv-15-8", 0, 32, 15, 8, { 0|A(RESERVED), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
912 { OR1K_F_RESV_15_6, "f-resv-15-6", 0, 32, 15, 6, { 0|A(RESERVED), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
913 { OR1K_F_RESV_10_11, "f-resv-10-11", 0, 32, 10, 11, { 0|A(RESERVED), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
914 { OR1K_F_RESV_10_7, "f-resv-10-7", 0, 32, 10, 7, { 0|A(RESERVED), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
915 { OR1K_F_RESV_10_3, "f-resv-10-3", 0, 32, 10, 3, { 0|A(RESERVED), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
916 { OR1K_F_RESV_10_1, "f-resv-10-1", 0, 32, 10, 1, { 0|A(RESERVED), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
917 { OR1K_F_RESV_8_1, "f-resv-8-1", 0, 32, 8, 1, { 0|A(RESERVED), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
918 { OR1K_F_RESV_7_4, "f-resv-7-4", 0, 32, 7, 4, { 0|A(RESERVED), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
919 { OR1K_F_RESV_5_2, "f-resv-5-2", 0, 32, 5, 2, { 0|A(RESERVED), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
920 { OR1K_F_IMM16_25_5, "f-imm16-25-5", 0, 32, 25, 5, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
921 { OR1K_F_IMM16_10_11, "f-imm16-10-11", 0, 32, 10, 11, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
922 { OR1K_F_DISP26, "f-disp26", 0, 32, 25, 26, { 0|A(PCREL_ADDR), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
923 { OR1K_F_DISP21, "f-disp21", 0, 32, 20, 21, { 0|A(ABS_ADDR), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
924 { OR1K_F_UIMM16, "f-uimm16", 0, 32, 15, 16, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
925 { OR1K_F_SIMM16, "f-simm16", 0, 32, 15, 16, { 0|A(SIGN_OPT), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
926 { OR1K_F_UIMM6, "f-uimm6", 0, 32, 5, 6, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
927 { OR1K_F_UIMM16_SPLIT, "f-uimm16-split", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
928 { OR1K_F_SIMM16_SPLIT, "f-simm16-split", 0, 0, 0, 0,{ 0|A(SIGN_OPT)|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
e4c4ac46
SH		 929 { OR1K_F_RDOFF_10_1, "f-rdoff-10-1", 0, 32, 10, 1, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
930 { OR1K_F_RAOFF_9_1, "f-raoff-9-1", 0, 32, 9, 1, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
931 { OR1K_F_RBOFF_8_1, "f-rboff-8-1", 0, 32, 8, 1, { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
932 { OR1K_F_RDD32, "f-rdd32", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
933 { OR1K_F_RAD32, "f-rad32", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
934 { OR1K_F_RBD32, "f-rbd32", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 935 { 0, 0, 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } }
936};
937
938#undef A
939
940
941
942/* multi ifield declarations */
943
944const CGEN_MAYBE_MULTI_IFLD OR1K_F_UIMM16_SPLIT_MULTI_IFIELD [];
945const CGEN_MAYBE_MULTI_IFLD OR1K_F_SIMM16_SPLIT_MULTI_IFIELD [];
e4c4ac46
SH		 946const CGEN_MAYBE_MULTI_IFLD OR1K_F_RDD32_MULTI_IFIELD [];
947const CGEN_MAYBE_MULTI_IFLD OR1K_F_RAD32_MULTI_IFIELD [];
948const CGEN_MAYBE_MULTI_IFLD OR1K_F_RBD32_MULTI_IFIELD [];
73589c9d
CS		 949
950
951/* multi ifield definitions */
952
953const CGEN_MAYBE_MULTI_IFLD OR1K_F_UIMM16_SPLIT_MULTI_IFIELD [] =
954{
955 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_IMM16_25_5] } },
956 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_IMM16_10_11] } },
957 { 0, { (const PTR) 0 } }
958};
959const CGEN_MAYBE_MULTI_IFLD OR1K_F_SIMM16_SPLIT_MULTI_IFIELD [] =
960{
961 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_IMM16_25_5] } },
962 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_IMM16_10_11] } },
963 { 0, { (const PTR) 0 } }
964};
e4c4ac46
SH		 965const CGEN_MAYBE_MULTI_IFLD OR1K_F_RDD32_MULTI_IFIELD [] =
966{
967 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_R1] } },
968 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_RDOFF_10_1] } },
969 { 0, { (const PTR) 0 } }
970};
971const CGEN_MAYBE_MULTI_IFLD OR1K_F_RAD32_MULTI_IFIELD [] =
972{
973 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_R2] } },
974 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_RAOFF_9_1] } },
975 { 0, { (const PTR) 0 } }
976};
977const CGEN_MAYBE_MULTI_IFLD OR1K_F_RBD32_MULTI_IFIELD [] =
978{
979 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_R3] } },
980 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_RBOFF_8_1] } },
981 { 0, { (const PTR) 0 } }
982};
73589c9d
CS		 983
984/* The operand table. */
985
986#define A(a) (1 << CGEN_OPERAND_##a)
987#define OPERAND(op) OR1K_OPERAND_##op
988
989const CGEN_OPERAND or1k_cgen_operand_table[] =
990{
991/* pc: program counter */
992 { "pc", OR1K_OPERAND_PC, HW_H_PC, 0, 0,
43e65147 993 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_NIL] } },
73589c9d
CS		 994 { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
995/* sys-sr: supervision register */
996 { "sys-sr", OR1K_OPERAND_SYS_SR, HW_H_SYS_SR, 0, 0,
43e65147 997 { 0, { (const PTR) 0 } },
a501eb44 998 { 0|A(SEM_ONLY), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 999/* sys-esr0: exception supervision register 0 */
1000 { "sys-esr0", OR1K_OPERAND_SYS_ESR0, HW_H_SYS_ESR0, 0, 0,
43e65147 1001 { 0, { (const PTR) 0 } },
a501eb44 1002 { 0|A(SEM_ONLY), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1003/* sys-epcr0: exception PC register 0 */
1004 { "sys-epcr0", OR1K_OPERAND_SYS_EPCR0, HW_H_SYS_EPCR0, 0, 0,
43e65147 1005 { 0, { (const PTR) 0 } },
a501eb44 1006 { 0|A(SEM_ONLY), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1007/* sys-sr-lee: SR little endian enable bit */
1008 { "sys-sr-lee", OR1K_OPERAND_SYS_SR_LEE, HW_H_SYS_SR_LEE, 0, 0,
43e65147 1009 { 0, { (const PTR) 0 } },
a501eb44 1010 { 0|A(SEM_ONLY), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1011/* sys-sr-f: SR flag bit */
1012 { "sys-sr-f", OR1K_OPERAND_SYS_SR_F, HW_H_SYS_SR_F, 0, 0,
43e65147 1013 { 0, { (const PTR) 0 } },
a501eb44 1014 { 0|A(SEM_ONLY), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1015/* sys-sr-cy: SR carry bit */
1016 { "sys-sr-cy", OR1K_OPERAND_SYS_SR_CY, HW_H_SYS_SR_CY, 0, 0,
43e65147 1017 { 0, { (const PTR) 0 } },
a501eb44 1018 { 0|A(SEM_ONLY), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1019/* sys-sr-ov: SR overflow bit */
1020 { "sys-sr-ov", OR1K_OPERAND_SYS_SR_OV, HW_H_SYS_SR_OV, 0, 0,
43e65147 1021 { 0, { (const PTR) 0 } },
a501eb44 1022 { 0|A(SEM_ONLY), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1023/* sys-sr-ove: SR overflow exception enable bit */
1024 { "sys-sr-ove", OR1K_OPERAND_SYS_SR_OVE, HW_H_SYS_SR_OVE, 0, 0,
43e65147 1025 { 0, { (const PTR) 0 } },
a501eb44 1026 { 0|A(SEM_ONLY), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1027/* sys-cpucfgr-ob64s: CPUCFGR ORBIS64 supported bit */
1028 { "sys-cpucfgr-ob64s", OR1K_OPERAND_SYS_CPUCFGR_OB64S, HW_H_SYS_CPUCFGR_OB64S, 0, 0,
43e65147 1029 { 0, { (const PTR) 0 } },
a501eb44 1030 { 0|A(SEM_ONLY), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1031/* sys-cpucfgr-nd: CPUCFGR no delay bit */
1032 { "sys-cpucfgr-nd", OR1K_OPERAND_SYS_CPUCFGR_ND, HW_H_SYS_CPUCFGR_ND, 0, 0,
43e65147 1033 { 0, { (const PTR) 0 } },
a501eb44 1034 { 0|A(SEM_ONLY), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1035/* sys-fpcsr-rm: floating point round mode */
1036 { "sys-fpcsr-rm", OR1K_OPERAND_SYS_FPCSR_RM, HW_H_SYS_FPCSR_RM, 0, 0,
43e65147 1037 { 0, { (const PTR) 0 } },
a501eb44 1038 { 0|A(SEM_ONLY), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1039/* mac-machi: MAC HI result register */
1040 { "mac-machi", OR1K_OPERAND_MAC_MACHI, HW_H_MAC_MACHI, 0, 0,
43e65147 1041 { 0, { (const PTR) 0 } },
a501eb44 1042 { 0|A(SEM_ONLY), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1043/* mac-maclo: MAC LO result register */
1044 { "mac-maclo", OR1K_OPERAND_MAC_MACLO, HW_H_MAC_MACLO, 0, 0,
43e65147 1045 { 0, { (const PTR) 0 } },
a501eb44 1046 { 0|A(SEM_ONLY), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
999b995d
SK		 1047/* atomic-reserve: atomic reserve flag */
1048 { "atomic-reserve", OR1K_OPERAND_ATOMIC_RESERVE, HW_H_ATOMIC_RESERVE, 0, 0,
43e65147 1049 { 0, { (const PTR) 0 } },
a501eb44 1050 { 0|A(SEM_ONLY), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
999b995d
SK		 1051/* atomic-address: atomic address */
1052 { "atomic-address", OR1K_OPERAND_ATOMIC_ADDRESS, HW_H_ATOMIC_ADDRESS, 0, 0,
43e65147 1053 { 0, { (const PTR) 0 } },
a501eb44 1054 { 0|A(SEM_ONLY), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1055/* uimm6: uimm6 */
1056 { "uimm6", OR1K_OPERAND_UIMM6, HW_H_UIMM6, 5, 6,
43e65147 1057 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_UIMM6] } },
a501eb44 1058 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1059/* rD: destination register */
1060 { "rD", OR1K_OPERAND_RD, HW_H_GPR, 25, 5,
43e65147 1061 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_R1] } },
a501eb44 1062 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1063/* rA: source register A */
1064 { "rA", OR1K_OPERAND_RA, HW_H_GPR, 20, 5,
43e65147 1065 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_R2] } },
a501eb44 1066 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1067/* rB: source register B */
1068 { "rB", OR1K_OPERAND_RB, HW_H_GPR, 15, 5,
43e65147 1069 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_R3] } },
a501eb44 1070 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1071/* disp26: pc-rel 26 bit */
1072 { "disp26", OR1K_OPERAND_DISP26, HW_H_IADDR, 25, 26,
43e65147 1073 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_DISP26] } },
a501eb44 1074 { 0|A(PCREL_ADDR), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
c8e98e36
SH		 1075/* disp21: pc-rel 21 bit */
1076 { "disp21", OR1K_OPERAND_DISP21, HW_H_IADDR, 20, 21,
1077 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_DISP21] } },
a501eb44 1078 { 0|A(ABS_ADDR), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1079/* simm16: 16-bit signed immediate */
1080 { "simm16", OR1K_OPERAND_SIMM16, HW_H_SIMM16, 15, 16,
43e65147 1081 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_SIMM16] } },
a501eb44 1082 { 0|A(SIGN_OPT), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1083/* uimm16: 16-bit unsigned immediate */
1084 { "uimm16", OR1K_OPERAND_UIMM16, HW_H_UIMM16, 15, 16,
43e65147 1085 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_UIMM16] } },
a501eb44 1086 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1087/* simm16-split: split 16-bit signed immediate */
1088 { "simm16-split", OR1K_OPERAND_SIMM16_SPLIT, HW_H_SIMM16, 10, 16,
43e65147 1089 { 2, { (const PTR) &OR1K_F_SIMM16_SPLIT_MULTI_IFIELD[0] } },
a501eb44 1090 { 0|A(SIGN_OPT)|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1091/* uimm16-split: split 16-bit unsigned immediate */
1092 { "uimm16-split", OR1K_OPERAND_UIMM16_SPLIT, HW_H_UIMM16, 10, 16,
43e65147 1093 { 2, { (const PTR) &OR1K_F_UIMM16_SPLIT_MULTI_IFIELD[0] } },
a501eb44 1094 { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1095/* rDSF: destination register (single floating point mode) */
1096 { "rDSF", OR1K_OPERAND_RDSF, HW_H_FSR, 25, 5,
43e65147 1097 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_R1] } },
a501eb44 1098 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1099/* rASF: source register A (single floating point mode) */
1100 { "rASF", OR1K_OPERAND_RASF, HW_H_FSR, 20, 5,
43e65147 1101 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_R2] } },
a501eb44 1102 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1103/* rBSF: source register B (single floating point mode) */
1104 { "rBSF", OR1K_OPERAND_RBSF, HW_H_FSR, 15, 5,
43e65147 1105 { 0, { (const PTR) &or1k_cgen_ifld_table[OR1K_F_R3] } },
a501eb44 1106 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
e4c4ac46
SH		 1107/* rDD32F: destination register (double floating point pair) */
1108 { "rDD32F", OR1K_OPERAND_RDD32F, HW_H_FD32R, 10, 6,
1109 { 2, { (const PTR) &OR1K_F_RDD32_MULTI_IFIELD[0] } },
1110 { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
1111/* rDDI: destination register (double integer pair) */
1112 { "rDDI", OR1K_OPERAND_RDDI, HW_H_I64R, 10, 6,
1113 { 2, { (const PTR) &OR1K_F_RDD32_MULTI_IFIELD[0] } },
1114 { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
1115/* rAD32F: source register A (double floating point pair) */
1116 { "rAD32F", OR1K_OPERAND_RAD32F, HW_H_FD32R, 9, 6,
1117 { 2, { (const PTR) &OR1K_F_RAD32_MULTI_IFIELD[0] } },
1118 { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
1119/* rADI: source register A (double integer pair) */
1120 { "rADI", OR1K_OPERAND_RADI, HW_H_I64R, 9, 6,
1121 { 2, { (const PTR) &OR1K_F_RAD32_MULTI_IFIELD[0] } },
1122 { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
1123/* rBD32F: source register B (double floating point pair) */
1124 { "rBD32F", OR1K_OPERAND_RBD32F, HW_H_FD32R, 8, 6,
1125 { 2, { (const PTR) &OR1K_F_RBD32_MULTI_IFIELD[0] } },
1126 { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
1127/* rBDI: source register B (double integer pair) */
1128 { "rBDI", OR1K_OPERAND_RBDI, HW_H_I64R, 8, 6,
1129 { 2, { (const PTR) &OR1K_F_RBD32_MULTI_IFIELD[0] } },
1130 { 0|A(VIRTUAL), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } } },
73589c9d
CS		 1131/* sentinel */
1132 { 0, 0, 0, 0, 0,
1133 { 0, { (const PTR) 0 } },
1134 { 0, { { { (1<<MACH_BASE), 0 } } } } }
1135};
1136
1137#undef A
1138
1139
1140/* The instruction table. */
1141
1142#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
1143#define A(a) (1 << CGEN_INSN_##a)
1144
1145static const CGEN_IBASE or1k_cgen_insn_table[MAX_INSNS] =
1146{
1147 /* Special null first entry.
1148 A `num' value of zero is thus invalid.
1149 Also, the special `invalid' insn resides here. */
1150 { 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
1151/* l.j ${disp26} */
1152 {
1153 OR1K_INSN_L_J, "l-j", "l.j", 32,
a501eb44 1154 { 0|A(UNCOND_CTI)|A(NOT_IN_DELAY_SLOT)|A(DELAYED_CTI)|A(SKIP_CTI)|A(DELAY_SLOT), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1155 },
c8e98e36
SH		 1156/* l.adrp $rD,${disp21} */
1157 {
1158 OR1K_INSN_L_ADRP, "l-adrp", "l.adrp", 32,
a501eb44 1159 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
c8e98e36 1160 },
73589c9d
CS		 1161/* l.jal ${disp26} */
1162 {
1163 OR1K_INSN_L_JAL, "l-jal", "l.jal", 32,
a501eb44 1164 { 0|A(UNCOND_CTI)|A(NOT_IN_DELAY_SLOT)|A(DELAYED_CTI)|A(SKIP_CTI)|A(DELAY_SLOT), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1165 },
1166/* l.jr $rB */
1167 {
1168 OR1K_INSN_L_JR, "l-jr", "l.jr", 32,
a501eb44 1169 { 0|A(UNCOND_CTI)|A(NOT_IN_DELAY_SLOT)|A(DELAYED_CTI)|A(SKIP_CTI)|A(DELAY_SLOT), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1170 },
1171/* l.jalr $rB */
1172 {
1173 OR1K_INSN_L_JALR, "l-jalr", "l.jalr", 32,
a501eb44 1174 { 0|A(UNCOND_CTI)|A(NOT_IN_DELAY_SLOT)|A(DELAYED_CTI)|A(SKIP_CTI)|A(DELAY_SLOT), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1175 },
1176/* l.bnf ${disp26} */
1177 {
1178 OR1K_INSN_L_BNF, "l-bnf", "l.bnf", 32,
a501eb44 1179 { 0|A(COND_CTI)|A(NOT_IN_DELAY_SLOT)|A(DELAYED_CTI)|A(SKIP_CTI)|A(DELAY_SLOT), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1180 },
1181/* l.bf ${disp26} */
1182 {
1183 OR1K_INSN_L_BF, "l-bf", "l.bf", 32,
a501eb44 1184 { 0|A(COND_CTI)|A(NOT_IN_DELAY_SLOT)|A(DELAYED_CTI)|A(SKIP_CTI)|A(DELAY_SLOT), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1185 },
1186/* l.trap ${uimm16} */
1187 {
1188 OR1K_INSN_L_TRAP, "l-trap", "l.trap", 32,
a501eb44 1189 { 0|A(NOT_IN_DELAY_SLOT), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1190 },
1191/* l.sys ${uimm16} */
1192 {
1193 OR1K_INSN_L_SYS, "l-sys", "l.sys", 32,
a501eb44 1194 { 0|A(NOT_IN_DELAY_SLOT), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1195 },
018dc9be
SK		 1196/* l.msync */
1197 {
1198 OR1K_INSN_L_MSYNC, "l-msync", "l.msync", 32,
a501eb44 1199 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
018dc9be
SK		 1200 },
1201/* l.psync */
1202 {
1203 OR1K_INSN_L_PSYNC, "l-psync", "l.psync", 32,
a501eb44 1204 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
018dc9be
SK		 1205 },
1206/* l.csync */
1207 {
1208 OR1K_INSN_L_CSYNC, "l-csync", "l.csync", 32,
a501eb44 1209 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
018dc9be 1210 },
73589c9d
CS		 1211/* l.rfe */
1212 {
1213 OR1K_INSN_L_RFE, "l-rfe", "l.rfe", 32,
a501eb44 1214 { 0|A(FORCED_CTI)|A(NOT_IN_DELAY_SLOT), { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1215 },
1216/* l.nop ${uimm16} */
1217 {
1218 OR1K_INSN_L_NOP_IMM, "l-nop-imm", "l.nop", 32,
a501eb44 1219 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1220 },
1221/* l.nop */
1222 {
1223 OR1K_INSN_L_NOP, "l-nop", "l.nop", 32,
a501eb44 1224 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1225 },
1226/* l.movhi $rD,$uimm16 */
1227 {
1228 OR1K_INSN_L_MOVHI, "l-movhi", "l.movhi", 32,
a501eb44 1229 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1230 },
1231/* l.macrc $rD */
1232 {
1233 OR1K_INSN_L_MACRC, "l-macrc", "l.macrc", 32,
a501eb44 1234 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1235 },
1236/* l.mfspr $rD,$rA,${uimm16} */
1237 {
1238 OR1K_INSN_L_MFSPR, "l-mfspr", "l.mfspr", 32,
a501eb44 1239 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1240 },
1241/* l.mtspr $rA,$rB,${uimm16-split} */
1242 {
1243 OR1K_INSN_L_MTSPR, "l-mtspr", "l.mtspr", 32,
a501eb44 1244 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1245 },
1246/* l.lwz $rD,${simm16}($rA) */
1247 {
1248 OR1K_INSN_L_LWZ, "l-lwz", "l.lwz", 32,
a501eb44 1249 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1250 },
1251/* l.lws $rD,${simm16}($rA) */
1252 {
1253 OR1K_INSN_L_LWS, "l-lws", "l.lws", 32,
a501eb44 1254 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1255 },
999b995d
SK		 1256/* l.lwa $rD,${simm16}($rA) */
1257 {
1258 OR1K_INSN_L_LWA, "l-lwa", "l.lwa", 32,
a501eb44 1259 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
999b995d 1260 },
73589c9d
CS		 1261/* l.lbz $rD,${simm16}($rA) */
1262 {
1263 OR1K_INSN_L_LBZ, "l-lbz", "l.lbz", 32,
a501eb44 1264 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1265 },
1266/* l.lbs $rD,${simm16}($rA) */
1267 {
1268 OR1K_INSN_L_LBS, "l-lbs", "l.lbs", 32,
a501eb44 1269 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1270 },
1271/* l.lhz $rD,${simm16}($rA) */
1272 {
1273 OR1K_INSN_L_LHZ, "l-lhz", "l.lhz", 32,
a501eb44 1274 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1275 },
1276/* l.lhs $rD,${simm16}($rA) */
1277 {
1278 OR1K_INSN_L_LHS, "l-lhs", "l.lhs", 32,
a501eb44 1279 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1280 },
1281/* l.sw ${simm16-split}($rA),$rB */
1282 {
1283 OR1K_INSN_L_SW, "l-sw", "l.sw", 32,
a501eb44 1284 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1285 },
1286/* l.sb ${simm16-split}($rA),$rB */
1287 {
1288 OR1K_INSN_L_SB, "l-sb", "l.sb", 32,
a501eb44 1289 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1290 },
1291/* l.sh ${simm16-split}($rA),$rB */
1292 {
1293 OR1K_INSN_L_SH, "l-sh", "l.sh", 32,
a501eb44 1294 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1295 },
999b995d
SK		 1296/* l.swa ${simm16-split}($rA),$rB */
1297 {
1298 OR1K_INSN_L_SWA, "l-swa", "l.swa", 32,
a501eb44 1299 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
999b995d 1300 },
73589c9d
CS		 1301/* l.sll $rD,$rA,$rB */
1302 {
1303 OR1K_INSN_L_SLL, "l-sll", "l.sll", 32,
a501eb44 1304 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1305 },
1306/* l.slli $rD,$rA,${uimm6} */
1307 {
1308 OR1K_INSN_L_SLLI, "l-slli", "l.slli", 32,
a501eb44 1309 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1310 },
1311/* l.srl $rD,$rA,$rB */
1312 {
1313 OR1K_INSN_L_SRL, "l-srl", "l.srl", 32,
a501eb44 1314 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1315 },
1316/* l.srli $rD,$rA,${uimm6} */
1317 {
1318 OR1K_INSN_L_SRLI, "l-srli", "l.srli", 32,
a501eb44 1319 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1320 },
1321/* l.sra $rD,$rA,$rB */
1322 {
1323 OR1K_INSN_L_SRA, "l-sra", "l.sra", 32,
a501eb44 1324 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1325 },
1326/* l.srai $rD,$rA,${uimm6} */
1327 {
1328 OR1K_INSN_L_SRAI, "l-srai", "l.srai", 32,
a501eb44 1329 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1330 },
1331/* l.ror $rD,$rA,$rB */
1332 {
1333 OR1K_INSN_L_ROR, "l-ror", "l.ror", 32,
a501eb44 1334 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1335 },
1336/* l.rori $rD,$rA,${uimm6} */
1337 {
1338 OR1K_INSN_L_RORI, "l-rori", "l.rori", 32,
a501eb44 1339 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1340 },
1341/* l.and $rD,$rA,$rB */
1342 {
1343 OR1K_INSN_L_AND, "l-and", "l.and", 32,
a501eb44 1344 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1345 },
1346/* l.or $rD,$rA,$rB */
1347 {
1348 OR1K_INSN_L_OR, "l-or", "l.or", 32,
a501eb44 1349 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1350 },
1351/* l.xor $rD,$rA,$rB */
1352 {
1353 OR1K_INSN_L_XOR, "l-xor", "l.xor", 32,
a501eb44 1354 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1355 },
1356/* l.add $rD,$rA,$rB */
1357 {
1358 OR1K_INSN_L_ADD, "l-add", "l.add", 32,
a501eb44 1359 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1360 },
1361/* l.sub $rD,$rA,$rB */
1362 {
1363 OR1K_INSN_L_SUB, "l-sub", "l.sub", 32,
a501eb44 1364 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1365 },
1366/* l.addc $rD,$rA,$rB */
1367 {
1368 OR1K_INSN_L_ADDC, "l-addc", "l.addc", 32,
a501eb44 1369 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1370 },
1371/* l.mul $rD,$rA,$rB */
1372 {
1373 OR1K_INSN_L_MUL, "l-mul", "l.mul", 32,
a501eb44 1374 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1375 },
07f5f4c6
RH		 1376/* l.muld $rA,$rB */
1377 {
1378 OR1K_INSN_L_MULD, "l-muld", "l.muld", 32,
a501eb44 1379 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
07f5f4c6 1380 },
73589c9d
CS		 1381/* l.mulu $rD,$rA,$rB */
1382 {
1383 OR1K_INSN_L_MULU, "l-mulu", "l.mulu", 32,
a501eb44 1384 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1385 },
07f5f4c6
RH		 1386/* l.muldu $rA,$rB */
1387 {
1388 OR1K_INSN_L_MULDU, "l-muldu", "l.muldu", 32,
a501eb44 1389 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
07f5f4c6 1390 },
73589c9d
CS		 1391/* l.div $rD,$rA,$rB */
1392 {
1393 OR1K_INSN_L_DIV, "l-div", "l.div", 32,
a501eb44 1394 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1395 },
1396/* l.divu $rD,$rA,$rB */
1397 {
1398 OR1K_INSN_L_DIVU, "l-divu", "l.divu", 32,
a501eb44 1399 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1400 },
1401/* l.ff1 $rD,$rA */
1402 {
1403 OR1K_INSN_L_FF1, "l-ff1", "l.ff1", 32,
a501eb44 1404 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1405 },
1406/* l.fl1 $rD,$rA */
1407 {
1408 OR1K_INSN_L_FL1, "l-fl1", "l.fl1", 32,
a501eb44 1409 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1410 },
1411/* l.andi $rD,$rA,$uimm16 */
1412 {
1413 OR1K_INSN_L_ANDI, "l-andi", "l.andi", 32,
a501eb44 1414 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1415 },
1416/* l.ori $rD,$rA,$uimm16 */
1417 {
1418 OR1K_INSN_L_ORI, "l-ori", "l.ori", 32,
a501eb44 1419 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1420 },
1421/* l.xori $rD,$rA,$simm16 */
1422 {
1423 OR1K_INSN_L_XORI, "l-xori", "l.xori", 32,
a501eb44 1424 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1425 },
1426/* l.addi $rD,$rA,$simm16 */
1427 {
1428 OR1K_INSN_L_ADDI, "l-addi", "l.addi", 32,
a501eb44 1429 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1430 },
1431/* l.addic $rD,$rA,$simm16 */
1432 {
1433 OR1K_INSN_L_ADDIC, "l-addic", "l.addic", 32,
a501eb44 1434 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1435 },
1436/* l.muli $rD,$rA,$simm16 */
1437 {
1438 OR1K_INSN_L_MULI, "l-muli", "l.muli", 32,
a501eb44 1439 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1440 },
1441/* l.exths $rD,$rA */
1442 {
1443 OR1K_INSN_L_EXTHS, "l-exths", "l.exths", 32,
a501eb44 1444 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1445 },
1446/* l.extbs $rD,$rA */
1447 {
1448 OR1K_INSN_L_EXTBS, "l-extbs", "l.extbs", 32,
a501eb44 1449 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1450 },
1451/* l.exthz $rD,$rA */
1452 {
1453 OR1K_INSN_L_EXTHZ, "l-exthz", "l.exthz", 32,
a501eb44 1454 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1455 },
1456/* l.extbz $rD,$rA */
1457 {
1458 OR1K_INSN_L_EXTBZ, "l-extbz", "l.extbz", 32,
a501eb44 1459 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1460 },
1461/* l.extws $rD,$rA */
1462 {
1463 OR1K_INSN_L_EXTWS, "l-extws", "l.extws", 32,
a501eb44 1464 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1465 },
1466/* l.extwz $rD,$rA */
1467 {
1468 OR1K_INSN_L_EXTWZ, "l-extwz", "l.extwz", 32,
a501eb44 1469 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1470 },
1471/* l.cmov $rD,$rA,$rB */
1472 {
1473 OR1K_INSN_L_CMOV, "l-cmov", "l.cmov", 32,
a501eb44 1474 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1475 },
1476/* l.sfgts $rA,$rB */
1477 {
1478 OR1K_INSN_L_SFGTS, "l-sfgts", "l.sfgts", 32,
a501eb44 1479 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1480 },
1481/* l.sfgtsi $rA,$simm16 */
1482 {
1483 OR1K_INSN_L_SFGTSI, "l-sfgtsi", "l.sfgtsi", 32,
a501eb44 1484 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1485 },
1486/* l.sfgtu $rA,$rB */
1487 {
1488 OR1K_INSN_L_SFGTU, "l-sfgtu", "l.sfgtu", 32,
a501eb44 1489 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1490 },
1491/* l.sfgtui $rA,$simm16 */
1492 {
1493 OR1K_INSN_L_SFGTUI, "l-sfgtui", "l.sfgtui", 32,
a501eb44 1494 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1495 },
1496/* l.sfges $rA,$rB */
1497 {
1498 OR1K_INSN_L_SFGES, "l-sfges", "l.sfges", 32,
a501eb44 1499 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1500 },
1501/* l.sfgesi $rA,$simm16 */
1502 {
1503 OR1K_INSN_L_SFGESI, "l-sfgesi", "l.sfgesi", 32,
a501eb44 1504 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1505 },
1506/* l.sfgeu $rA,$rB */
1507 {
1508 OR1K_INSN_L_SFGEU, "l-sfgeu", "l.sfgeu", 32,
a501eb44 1509 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1510 },
1511/* l.sfgeui $rA,$simm16 */
1512 {
1513 OR1K_INSN_L_SFGEUI, "l-sfgeui", "l.sfgeui", 32,
a501eb44 1514 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1515 },
1516/* l.sflts $rA,$rB */
1517 {
1518 OR1K_INSN_L_SFLTS, "l-sflts", "l.sflts", 32,
a501eb44 1519 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1520 },
1521/* l.sfltsi $rA,$simm16 */
1522 {
1523 OR1K_INSN_L_SFLTSI, "l-sfltsi", "l.sfltsi", 32,
a501eb44 1524 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1525 },
1526/* l.sfltu $rA,$rB */
1527 {
1528 OR1K_INSN_L_SFLTU, "l-sfltu", "l.sfltu", 32,
a501eb44 1529 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1530 },
1531/* l.sfltui $rA,$simm16 */
1532 {
1533 OR1K_INSN_L_SFLTUI, "l-sfltui", "l.sfltui", 32,
a501eb44 1534 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1535 },
1536/* l.sfles $rA,$rB */
1537 {
1538 OR1K_INSN_L_SFLES, "l-sfles", "l.sfles", 32,
a501eb44 1539 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1540 },
1541/* l.sflesi $rA,$simm16 */
1542 {
1543 OR1K_INSN_L_SFLESI, "l-sflesi", "l.sflesi", 32,
a501eb44 1544 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1545 },
1546/* l.sfleu $rA,$rB */
1547 {
1548 OR1K_INSN_L_SFLEU, "l-sfleu", "l.sfleu", 32,
a501eb44 1549 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1550 },
1551/* l.sfleui $rA,$simm16 */
1552 {
1553 OR1K_INSN_L_SFLEUI, "l-sfleui", "l.sfleui", 32,
a501eb44 1554 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1555 },
1556/* l.sfeq $rA,$rB */
1557 {
1558 OR1K_INSN_L_SFEQ, "l-sfeq", "l.sfeq", 32,
a501eb44 1559 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1560 },
1561/* l.sfeqi $rA,$simm16 */
1562 {
1563 OR1K_INSN_L_SFEQI, "l-sfeqi", "l.sfeqi", 32,
a501eb44 1564 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1565 },
1566/* l.sfne $rA,$rB */
1567 {
1568 OR1K_INSN_L_SFNE, "l-sfne", "l.sfne", 32,
a501eb44 1569 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1570 },
1571/* l.sfnei $rA,$simm16 */
1572 {
1573 OR1K_INSN_L_SFNEI, "l-sfnei", "l.sfnei", 32,
a501eb44 1574 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1575 },
1576/* l.mac $rA,$rB */
1577 {
1578 OR1K_INSN_L_MAC, "l-mac", "l.mac", 32,
a501eb44 1579 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1580 },
07f5f4c6
RH		 1581/* l.maci $rA,${simm16} */
1582 {
1583 OR1K_INSN_L_MACI, "l-maci", "l.maci", 32,
a501eb44 1584 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
07f5f4c6
RH		 1585 },
1586/* l.macu $rA,$rB */
1587 {
1588 OR1K_INSN_L_MACU, "l-macu", "l.macu", 32,
a501eb44 1589 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
07f5f4c6 1590 },
73589c9d
CS		 1591/* l.msb $rA,$rB */
1592 {
1593 OR1K_INSN_L_MSB, "l-msb", "l.msb", 32,
a501eb44 1594 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1595 },
07f5f4c6 1596/* l.msbu $rA,$rB */
73589c9d 1597 {
07f5f4c6 1598 OR1K_INSN_L_MSBU, "l-msbu", "l.msbu", 32,
a501eb44 1599 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1600 },
1601/* l.cust1 */
1602 {
1603 OR1K_INSN_L_CUST1, "l-cust1", "l.cust1", 32,
a501eb44 1604 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1605 },
1606/* l.cust2 */
1607 {
1608 OR1K_INSN_L_CUST2, "l-cust2", "l.cust2", 32,
a501eb44 1609 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1610 },
1611/* l.cust3 */
1612 {
1613 OR1K_INSN_L_CUST3, "l-cust3", "l.cust3", 32,
a501eb44 1614 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1615 },
1616/* l.cust4 */
1617 {
1618 OR1K_INSN_L_CUST4, "l-cust4", "l.cust4", 32,
a501eb44 1619 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1620 },
1621/* l.cust5 */
1622 {
1623 OR1K_INSN_L_CUST5, "l-cust5", "l.cust5", 32,
a501eb44 1624 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1625 },
1626/* l.cust6 */
1627 {
1628 OR1K_INSN_L_CUST6, "l-cust6", "l.cust6", 32,
a501eb44 1629 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1630 },
1631/* l.cust7 */
1632 {
1633 OR1K_INSN_L_CUST7, "l-cust7", "l.cust7", 32,
a501eb44 1634 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1635 },
1636/* l.cust8 */
1637 {
1638 OR1K_INSN_L_CUST8, "l-cust8", "l.cust8", 32,
a501eb44 1639 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d
CS		 1640 },
1641/* lf.add.s $rDSF,$rASF,$rBSF */
1642 {
1643 OR1K_INSN_LF_ADD_S, "lf-add-s", "lf.add.s", 32,
a501eb44 1644 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1645 },
e4c4ac46
SH		 1646/* lf.add.d $rDD32F,$rAD32F,$rBD32F */
1647 {
1648 OR1K_INSN_LF_ADD_D32, "lf-add-d32", "lf.add.d", 32,
1649 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1650 },
73589c9d
CS		 1651/* lf.sub.s $rDSF,$rASF,$rBSF */
1652 {
1653 OR1K_INSN_LF_SUB_S, "lf-sub-s", "lf.sub.s", 32,
a501eb44 1654 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1655 },
e4c4ac46
SH		 1656/* lf.sub.d $rDD32F,$rAD32F,$rBD32F */
1657 {
1658 OR1K_INSN_LF_SUB_D32, "lf-sub-d32", "lf.sub.d", 32,
1659 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1660 },
73589c9d
CS		 1661/* lf.mul.s $rDSF,$rASF,$rBSF */
1662 {
1663 OR1K_INSN_LF_MUL_S, "lf-mul-s", "lf.mul.s", 32,
a501eb44 1664 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1665 },
e4c4ac46
SH		 1666/* lf.mul.d $rDD32F,$rAD32F,$rBD32F */
1667 {
1668 OR1K_INSN_LF_MUL_D32, "lf-mul-d32", "lf.mul.d", 32,
1669 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1670 },
73589c9d
CS		 1671/* lf.div.s $rDSF,$rASF,$rBSF */
1672 {
1673 OR1K_INSN_LF_DIV_S, "lf-div-s", "lf.div.s", 32,
a501eb44 1674 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1675 },
e4c4ac46
SH		 1676/* lf.div.d $rDD32F,$rAD32F,$rBD32F */
1677 {
1678 OR1K_INSN_LF_DIV_D32, "lf-div-d32", "lf.div.d", 32,
1679 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1680 },
73589c9d
CS		 1681/* lf.rem.s $rDSF,$rASF,$rBSF */
1682 {
1683 OR1K_INSN_LF_REM_S, "lf-rem-s", "lf.rem.s", 32,
a501eb44 1684 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1685 },
e4c4ac46
SH		 1686/* lf.rem.d $rDD32F,$rAD32F,$rBD32F */
1687 {
1688 OR1K_INSN_LF_REM_D32, "lf-rem-d32", "lf.rem.d", 32,
1689 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1690 },
73589c9d
CS		 1691/* lf.itof.s $rDSF,$rA */
1692 {
1693 OR1K_INSN_LF_ITOF_S, "lf-itof-s", "lf.itof.s", 32,
a501eb44 1694 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1695 },
e4c4ac46
SH		 1696/* lf.itof.d $rDD32F,$rADI */
1697 {
1698 OR1K_INSN_LF_ITOF_D32, "lf-itof-d32", "lf.itof.d", 32,
1699 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1700 },
73589c9d
CS		 1701/* lf.ftoi.s $rD,$rASF */
1702 {
1703 OR1K_INSN_LF_FTOI_S, "lf-ftoi-s", "lf.ftoi.s", 32,
a501eb44 1704 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1705 },
e4c4ac46
SH		 1706/* lf.ftoi.d $rDDI,$rAD32F */
1707 {
1708 OR1K_INSN_LF_FTOI_D32, "lf-ftoi-d32", "lf.ftoi.d", 32,
1709 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1710 },
73589c9d
CS		 1711/* lf.sfeq.s $rASF,$rBSF */
1712 {
e4c4ac46 1713 OR1K_INSN_LF_SFEQ_S, "lf-sfeq-s", "lf.sfeq.s", 32,
a501eb44 1714 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1715 },
e4c4ac46
SH		 1716/* lf.sfeq.d $rAD32F,$rBD32F */
1717 {
1718 OR1K_INSN_LF_SFEQ_D32, "lf-sfeq-d32", "lf.sfeq.d", 32,
1719 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1720 },
73589c9d
CS		 1721/* lf.sfne.s $rASF,$rBSF */
1722 {
e4c4ac46 1723 OR1K_INSN_LF_SFNE_S, "lf-sfne-s", "lf.sfne.s", 32,
a501eb44 1724 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1725 },
e4c4ac46
SH		 1726/* lf.sfne.d $rAD32F,$rBD32F */
1727 {
1728 OR1K_INSN_LF_SFNE_D32, "lf-sfne-d32", "lf.sfne.d", 32,
1729 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1730 },
73589c9d
CS		 1731/* lf.sfge.s $rASF,$rBSF */
1732 {
e4c4ac46 1733 OR1K_INSN_LF_SFGE_S, "lf-sfge-s", "lf.sfge.s", 32,
a501eb44 1734 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1735 },
e4c4ac46
SH		 1736/* lf.sfge.d $rAD32F,$rBD32F */
1737 {
1738 OR1K_INSN_LF_SFGE_D32, "lf-sfge-d32", "lf.sfge.d", 32,
1739 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1740 },
73589c9d
CS		 1741/* lf.sfgt.s $rASF,$rBSF */
1742 {
e4c4ac46 1743 OR1K_INSN_LF_SFGT_S, "lf-sfgt-s", "lf.sfgt.s", 32,
a501eb44 1744 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1745 },
e4c4ac46
SH		 1746/* lf.sfgt.d $rAD32F,$rBD32F */
1747 {
1748 OR1K_INSN_LF_SFGT_D32, "lf-sfgt-d32", "lf.sfgt.d", 32,
1749 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1750 },
73589c9d
CS		 1751/* lf.sflt.s $rASF,$rBSF */
1752 {
e4c4ac46 1753 OR1K_INSN_LF_SFLT_S, "lf-sflt-s", "lf.sflt.s", 32,
a501eb44 1754 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1755 },
e4c4ac46
SH		 1756/* lf.sflt.d $rAD32F,$rBD32F */
1757 {
1758 OR1K_INSN_LF_SFLT_D32, "lf-sflt-d32", "lf.sflt.d", 32,
1759 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1760 },
73589c9d
CS		 1761/* lf.sfle.s $rASF,$rBSF */
1762 {
e4c4ac46 1763 OR1K_INSN_LF_SFLE_S, "lf-sfle-s", "lf.sfle.s", 32,
a501eb44 1764 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1765 },
e4c4ac46
SH		 1766/* lf.sfle.d $rAD32F,$rBD32F */
1767 {
1768 OR1K_INSN_LF_SFLE_D32, "lf-sfle-d32", "lf.sfle.d", 32,
1769 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1770 },
1771/* lf.sfueq.s $rASF,$rBSF */
1772 {
1773 OR1K_INSN_LF_SFUEQ_S, "lf-sfueq-s", "lf.sfueq.s", 32,
a501eb44 1774 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
e4c4ac46
SH		 1775 },
1776/* lf.sfueq.d $rAD32F,$rBD32F */
1777 {
1778 OR1K_INSN_LF_SFUEQ_D32, "lf-sfueq-d32", "lf.sfueq.d", 32,
1779 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1780 },
1781/* lf.sfune.s $rASF,$rBSF */
1782 {
1783 OR1K_INSN_LF_SFUNE_S, "lf-sfune-s", "lf.sfune.s", 32,
a501eb44 1784 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
e4c4ac46
SH		 1785 },
1786/* lf.sfune.d $rAD32F,$rBD32F */
1787 {
1788 OR1K_INSN_LF_SFUNE_D32, "lf-sfune-d32", "lf.sfune.d", 32,
1789 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1790 },
1791/* lf.sfugt.s $rASF,$rBSF */
1792 {
1793 OR1K_INSN_LF_SFUGT_S, "lf-sfugt-s", "lf.sfugt.s", 32,
a501eb44 1794 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
e4c4ac46
SH		 1795 },
1796/* lf.sfugt.d $rAD32F,$rBD32F */
1797 {
1798 OR1K_INSN_LF_SFUGT_D32, "lf-sfugt-d32", "lf.sfugt.d", 32,
1799 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1800 },
1801/* lf.sfuge.s $rASF,$rBSF */
1802 {
1803 OR1K_INSN_LF_SFUGE_S, "lf-sfuge-s", "lf.sfuge.s", 32,
a501eb44 1804 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
e4c4ac46
SH		 1805 },
1806/* lf.sfuge.d $rAD32F,$rBD32F */
1807 {
1808 OR1K_INSN_LF_SFUGE_D32, "lf-sfuge-d32", "lf.sfuge.d", 32,
1809 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1810 },
1811/* lf.sfult.s $rASF,$rBSF */
1812 {
1813 OR1K_INSN_LF_SFULT_S, "lf-sfult-s", "lf.sfult.s", 32,
a501eb44 1814 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
e4c4ac46
SH		 1815 },
1816/* lf.sfult.d $rAD32F,$rBD32F */
1817 {
1818 OR1K_INSN_LF_SFULT_D32, "lf-sfult-d32", "lf.sfult.d", 32,
1819 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1820 },
1821/* lf.sfule.s $rASF,$rBSF */
1822 {
1823 OR1K_INSN_LF_SFULE_S, "lf-sfule-s", "lf.sfule.s", 32,
a501eb44 1824 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
e4c4ac46
SH		 1825 },
1826/* lf.sfule.d $rAD32F,$rBD32F */
1827 {
1828 OR1K_INSN_LF_SFULE_D32, "lf-sfule-d32", "lf.sfule.d", 32,
1829 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1830 },
1831/* lf.sfun.s $rASF,$rBSF */
1832 {
1833 OR1K_INSN_LF_SFUN_S, "lf-sfun-s", "lf.sfun.s", 32,
a501eb44 1834 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
e4c4ac46
SH		 1835 },
1836/* lf.sfun.d $rAD32F,$rBD32F */
1837 {
1838 OR1K_INSN_LF_SFUN_D32, "lf-sfun-d32", "lf.sfun.d", 32,
1839 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1840 },
73589c9d
CS		 1841/* lf.madd.s $rDSF,$rASF,$rBSF */
1842 {
1843 OR1K_INSN_LF_MADD_S, "lf-madd-s", "lf.madd.s", 32,
a501eb44 1844 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1845 },
e4c4ac46
SH		 1846/* lf.madd.d $rDD32F,$rAD32F,$rBD32F */
1847 {
1848 OR1K_INSN_LF_MADD_D32, "lf-madd-d32", "lf.madd.d", 32,
1849 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1850 },
73589c9d
CS		 1851/* lf.cust1.s $rASF,$rBSF */
1852 {
1853 OR1K_INSN_LF_CUST1_S, "lf-cust1-s", "lf.cust1.s", 32,
a501eb44 1854 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
73589c9d 1855 },
e4c4ac46
SH		 1856/* lf.cust1.d */
1857 {
1858 OR1K_INSN_LF_CUST1_D32, "lf-cust1-d32", "lf.cust1.d", 32,
1859 { 0, { { { (1<<MACH_OR32)|(1<<MACH_OR32ND), 0 } } } }
1860 },
73589c9d
CS		 1861};
1862
1863#undef OP
1864#undef A
1865
1866/* Initialize anything needed to be done once, before any cpu_open call. */
1867
1868static void
1869init_tables (void)
1870{
1871}
1872
a6743a54
AM		 1873#ifndef opcodes_error_handler
1874#define opcodes_error_handler(...) \
1875 fprintf (stderr, __VA_ARGS__); fputc ('\n', stderr)
1876#endif
1877
73589c9d
CS		 1878static const CGEN_MACH * lookup_mach_via_bfd_name (const CGEN_MACH *, const char *);
1879static void build_hw_table (CGEN_CPU_TABLE *);
1880static void build_ifield_table (CGEN_CPU_TABLE *);
1881static void build_operand_table (CGEN_CPU_TABLE *);
1882static void build_insn_table (CGEN_CPU_TABLE *);
1883static void or1k_cgen_rebuild_tables (CGEN_CPU_TABLE *);
1884
1885/* Subroutine of or1k_cgen_cpu_open to look up a mach via its bfd name. */
1886
1887static const CGEN_MACH *
1888lookup_mach_via_bfd_name (const CGEN_MACH *table, const char *name)
1889{
1890 while (table->name)
1891 {
1892 if (strcmp (name, table->bfd_name) == 0)
1893 return table;
1894 ++table;
1895 }
42742084 1896 return NULL;
73589c9d
CS		 1897}
1898
1899/* Subroutine of or1k_cgen_cpu_open to build the hardware table. */
1900
1901static void
1902build_hw_table (CGEN_CPU_TABLE *cd)
1903{
1904 int i;
1905 int machs = cd->machs;
1906 const CGEN_HW_ENTRY *init = & or1k_cgen_hw_table[0];
1907 /* MAX_HW is only an upper bound on the number of selected entries.
1908 However each entry is indexed by it's enum so there can be holes in
1909 the table. */
1910 const CGEN_HW_ENTRY **selected =
1911 (const CGEN_HW_ENTRY **) xmalloc (MAX_HW * sizeof (CGEN_HW_ENTRY *));
1912
1913 cd->hw_table.init_entries = init;
1914 cd->hw_table.entry_size = sizeof (CGEN_HW_ENTRY);
1915 memset (selected, 0, MAX_HW * sizeof (CGEN_HW_ENTRY *));
1916 /* ??? For now we just use machs to determine which ones we want. */
1917 for (i = 0; init[i].name != NULL; ++i)
1918 if (CGEN_HW_ATTR_VALUE (&init[i], CGEN_HW_MACH)
1919 & machs)
1920 selected[init[i].type] = &init[i];
1921 cd->hw_table.entries = selected;
1922 cd->hw_table.num_entries = MAX_HW;
1923}
1924
1925/* Subroutine of or1k_cgen_cpu_open to build the hardware table. */
1926
1927static void
1928build_ifield_table (CGEN_CPU_TABLE *cd)
1929{
1930 cd->ifld_table = & or1k_cgen_ifld_table[0];
1931}
1932
1933/* Subroutine of or1k_cgen_cpu_open to build the hardware table. */
1934
1935static void
1936build_operand_table (CGEN_CPU_TABLE *cd)
1937{
1938 int i;
1939 int machs = cd->machs;
1940 const CGEN_OPERAND *init = & or1k_cgen_operand_table[0];
1941 /* MAX_OPERANDS is only an upper bound on the number of selected entries.
1942 However each entry is indexed by it's enum so there can be holes in
1943 the table. */
1944 const CGEN_OPERAND **selected = xmalloc (MAX_OPERANDS * sizeof (* selected));
1945
1946 cd->operand_table.init_entries = init;
1947 cd->operand_table.entry_size = sizeof (CGEN_OPERAND);
1948 memset (selected, 0, MAX_OPERANDS * sizeof (CGEN_OPERAND *));
1949 /* ??? For now we just use mach to determine which ones we want. */
1950 for (i = 0; init[i].name != NULL; ++i)
1951 if (CGEN_OPERAND_ATTR_VALUE (&init[i], CGEN_OPERAND_MACH)
1952 & machs)
1953 selected[init[i].type] = &init[i];
1954 cd->operand_table.entries = selected;
1955 cd->operand_table.num_entries = MAX_OPERANDS;
1956}
1957
1958/* Subroutine of or1k_cgen_cpu_open to build the hardware table.
1959 ??? This could leave out insns not supported by the specified mach/isa,
1960 but that would cause errors like "foo only supported by bar" to become
1961 "unknown insn", so for now we include all insns and require the app to
1962 do the checking later.
1963 ??? On the other hand, parsing of such insns may require their hardware or
1964 operand elements to be in the table [which they mightn't be]. */
1965
1966static void
1967build_insn_table (CGEN_CPU_TABLE *cd)
1968{
1969 int i;
1970 const CGEN_IBASE *ib = & or1k_cgen_insn_table[0];
1971 CGEN_INSN *insns = xmalloc (MAX_INSNS * sizeof (CGEN_INSN));
1972
1973 memset (insns, 0, MAX_INSNS * sizeof (CGEN_INSN));
1974 for (i = 0; i < MAX_INSNS; ++i)
1975 insns[i].base = &ib[i];
1976 cd->insn_table.init_entries = insns;
1977 cd->insn_table.entry_size = sizeof (CGEN_IBASE);
1978 cd->insn_table.num_init_entries = MAX_INSNS;
1979}
1980
1981/* Subroutine of or1k_cgen_cpu_open to rebuild the tables. */
1982
1983static void
1984or1k_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
1985{
1986 int i;
1987 CGEN_BITSET *isas = cd->isas;
1988 unsigned int machs = cd->machs;
1989
1990 cd->int_insn_p = CGEN_INT_INSN_P;
1991
1992 /* Data derived from the isa spec. */
1993#define UNSET (CGEN_SIZE_UNKNOWN + 1)
1994 cd->default_insn_bitsize = UNSET;
1995 cd->base_insn_bitsize = UNSET;
1996 cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */
1997 cd->max_insn_bitsize = 0;
1998 for (i = 0; i < MAX_ISAS; ++i)
1999 if (cgen_bitset_contains (isas, i))
2000 {
2001 const CGEN_ISA *isa = & or1k_cgen_isa_table[i];
2002
2003 /* Default insn sizes of all selected isas must be
2004 equal or we set the result to 0, meaning "unknown". */
2005 if (cd->default_insn_bitsize == UNSET)
2006 cd->default_insn_bitsize = isa->default_insn_bitsize;
2007 else if (isa->default_insn_bitsize == cd->default_insn_bitsize)
2008 ; /* This is ok. */
2009 else
2010 cd->default_insn_bitsize = CGEN_SIZE_UNKNOWN;
2011
2012 /* Base insn sizes of all selected isas must be equal
2013 or we set the result to 0, meaning "unknown". */
2014 if (cd->base_insn_bitsize == UNSET)
2015 cd->base_insn_bitsize = isa->base_insn_bitsize;
2016 else if (isa->base_insn_bitsize == cd->base_insn_bitsize)
2017 ; /* This is ok. */
2018 else
2019 cd->base_insn_bitsize = CGEN_SIZE_UNKNOWN;
2020
2021 /* Set min,max insn sizes. */
2022 if (isa->min_insn_bitsize < cd->min_insn_bitsize)
2023 cd->min_insn_bitsize = isa->min_insn_bitsize;
2024 if (isa->max_insn_bitsize > cd->max_insn_bitsize)
2025 cd->max_insn_bitsize = isa->max_insn_bitsize;
2026 }
2027
2028 /* Data derived from the mach spec. */
2029 for (i = 0; i < MAX_MACHS; ++i)
2030 if (((1 << i) & machs) != 0)
2031 {
2032 const CGEN_MACH *mach = & or1k_cgen_mach_table[i];
2033
2034 if (mach->insn_chunk_bitsize != 0)
2035 {
2036 if (cd->insn_chunk_bitsize != 0 && cd->insn_chunk_bitsize != mach->insn_chunk_bitsize)
2037 {
a6743a54
AM		 2038 opcodes_error_handler
2039 (/* xgettext:c-format */
2040 _("internal error: or1k_cgen_rebuild_tables: "
2041 "conflicting insn-chunk-bitsize values: `%d' vs. `%d'"),
2042 cd->insn_chunk_bitsize, mach->insn_chunk_bitsize);
73589c9d
CS		 2043 abort ();
2044 }
2045
2046 cd->insn_chunk_bitsize = mach->insn_chunk_bitsize;
2047 }
2048 }
2049
2050 /* Determine which hw elements are used by MACH. */
2051 build_hw_table (cd);
2052
2053 /* Build the ifield table. */
2054 build_ifield_table (cd);
2055
2056 /* Determine which operands are used by MACH/ISA. */
2057 build_operand_table (cd);
2058
2059 /* Build the instruction table. */
2060 build_insn_table (cd);
2061}
2062
2063/* Initialize a cpu table and return a descriptor.
2064 It's much like opening a file, and must be the first function called.
2065 The arguments are a set of (type/value) pairs, terminated with
2066 CGEN_CPU_OPEN_END.
2067
2068 Currently supported values:
2069 CGEN_CPU_OPEN_ISAS: bitmap of values in enum isa_attr
2070 CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
2071 CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
2072 CGEN_CPU_OPEN_ENDIAN: specify endian choice
2073 CGEN_CPU_OPEN_END: terminates arguments
2074
2075 ??? Simultaneous multiple isas might not make sense, but it's not (yet)
2076 precluded. */
2077
2078CGEN_CPU_DESC
2079or1k_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
2080{
2081 CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE));
2082 static int init_p;
2083 CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
2084 unsigned int machs = 0; /* 0 = "unspecified" */
2085 enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
2086 va_list ap;
2087
2088 if (! init_p)
2089 {
2090 init_tables ();
2091 init_p = 1;
2092 }
2093
2094 memset (cd, 0, sizeof (*cd));
2095
2096 va_start (ap, arg_type);
2097 while (arg_type != CGEN_CPU_OPEN_END)
2098 {
2099 switch (arg_type)
2100 {
2101 case CGEN_CPU_OPEN_ISAS :
2102 isas = va_arg (ap, CGEN_BITSET *);
2103 break;
2104 case CGEN_CPU_OPEN_MACHS :
2105 machs = va_arg (ap, unsigned int);
2106 break;
2107 case CGEN_CPU_OPEN_BFDMACH :
2108 {
2109 const char *name = va_arg (ap, const char *);
2110 const CGEN_MACH *mach =
2111 lookup_mach_via_bfd_name (or1k_cgen_mach_table, name);
2112
42742084
AM		 2113 if (mach != NULL)
2114 machs |= 1 << mach->num;
73589c9d
CS		 2115 break;
2116 }
2117 case CGEN_CPU_OPEN_ENDIAN :
2118 endian = va_arg (ap, enum cgen_endian);
2119 break;
2120 default :
a6743a54
AM		 2121 opcodes_error_handler
2122 (/* xgettext:c-format */
2123 _("internal error: or1k_cgen_cpu_open: "
2124 "unsupported argument `%d'"),
2125 arg_type);
73589c9d
CS		 2126 abort (); /* ??? return NULL? */
2127 }
2128 arg_type = va_arg (ap, enum cgen_cpu_open_arg);
2129 }
2130 va_end (ap);
2131
2132 /* Mach unspecified means "all". */
2133 if (machs == 0)
2134 machs = (1 << MAX_MACHS) - 1;
2135 /* Base mach is always selected. */
2136 machs |= 1;
2137 if (endian == CGEN_ENDIAN_UNKNOWN)
2138 {
2139 /* ??? If target has only one, could have a default. */
a6743a54
AM		 2140 opcodes_error_handler
2141 (/* xgettext:c-format */
2142 _("internal error: or1k_cgen_cpu_open: no endianness specified"));
73589c9d
CS		 2143 abort ();
2144 }
2145
2146 cd->isas = cgen_bitset_copy (isas);
2147 cd->machs = machs;
2148 cd->endian = endian;
2149 /* FIXME: for the sparc case we can determine insn-endianness statically.
2150 The worry here is where both data and insn endian can be independently
2151 chosen, in which case this function will need another argument.
2152 Actually, will want to allow for more arguments in the future anyway. */
2153 cd->insn_endian = endian;
2154
2155 /* Table (re)builder. */
2156 cd->rebuild_tables = or1k_cgen_rebuild_tables;
2157 or1k_cgen_rebuild_tables (cd);
2158
2159 /* Default to not allowing signed overflow. */
2160 cd->signed_overflow_ok_p = 0;
43e65147 2161
73589c9d
CS		 2162 return (CGEN_CPU_DESC) cd;
2163}
2164
2165/* Cover fn to or1k_cgen_cpu_open to handle the simple case of 1 isa, 1 mach.
2166 MACH_NAME is the bfd name of the mach. */
2167
2168CGEN_CPU_DESC
2169or1k_cgen_cpu_open_1 (const char *mach_name, enum cgen_endian endian)
2170{
2171 return or1k_cgen_cpu_open (CGEN_CPU_OPEN_BFDMACH, mach_name,
2172 CGEN_CPU_OPEN_ENDIAN, endian,
2173 CGEN_CPU_OPEN_END);
2174}
2175
2176/* Close a cpu table.
2177 ??? This can live in a machine independent file, but there's currently
2178 no place to put this file (there's no libcgen). libopcodes is the wrong
2179 place as some simulator ports use this but they don't use libopcodes. */
2180
2181void
2182or1k_cgen_cpu_close (CGEN_CPU_DESC cd)
2183{
2184 unsigned int i;
2185 const CGEN_INSN *insns;
2186
2187 if (cd->macro_insn_table.init_entries)
2188 {
2189 insns = cd->macro_insn_table.init_entries;
2190 for (i = 0; i < cd->macro_insn_table.num_init_entries; ++i, ++insns)
2191 if (CGEN_INSN_RX ((insns)))
2192 regfree (CGEN_INSN_RX (insns));
2193 }
2194
2195 if (cd->insn_table.init_entries)
2196 {
2197 insns = cd->insn_table.init_entries;
2198 for (i = 0; i < cd->insn_table.num_init_entries; ++i, ++insns)
2199 if (CGEN_INSN_RX (insns))
2200 regfree (CGEN_INSN_RX (insns));
43e65147 2201 }
73589c9d 2202
d96bf37b
AM		 2203 free ((CGEN_INSN *) cd->macro_insn_table.init_entries);
2204 free ((CGEN_INSN *) cd->insn_table.init_entries);
2205 free ((CGEN_HW_ENTRY *) cd->hw_table.entries);
2206 free ((CGEN_HW_ENTRY *) cd->operand_table.entries);
73589c9d
CS		 2207 free (cd);
2208}
2209
GDB Binutils - Deliverables
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