gdb: add target_ops::supports_displaced_step
[deliverable/binutils-gdb.git] / opcodes / xstormy16-ibld.c
CommitLineData
4162bb66 1/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
93fbbb04
GK
2/* Instruction building/extraction support for xstormy16. -*- C -*-
3
47b0e7ad
NC
4 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
5 - the resultant file is machine generated, cgen-ibld.in isn't
93fbbb04 6
b3adc24a 7 Copyright (C) 1996-2020 Free Software Foundation, Inc.
93fbbb04 8
9b201bb5 9 This file is part of libopcodes.
93fbbb04 10
9b201bb5 11 This library is free software; you can redistribute it and/or modify
47b0e7ad 12 it under the terms of the GNU General Public License as published by
9b201bb5 13 the Free Software Foundation; either version 3, or (at your option)
47b0e7ad 14 any later version.
93fbbb04 15
9b201bb5
NC
16 It is distributed in the hope that it will be useful, but WITHOUT
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 License for more details.
93fbbb04 20
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NC
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
93fbbb04
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24
25/* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28#include "sysdep.h"
29#include <stdio.h>
30#include "ansidecl.h"
31#include "dis-asm.h"
32#include "bfd.h"
33#include "symcat.h"
34#include "xstormy16-desc.h"
35#include "xstormy16-opc.h"
fe8afbc4 36#include "cgen/basic-modes.h"
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37#include "opintl.h"
38#include "safe-ctype.h"
39
47b0e7ad 40#undef min
93fbbb04 41#define min(a,b) ((a) < (b) ? (a) : (b))
47b0e7ad 42#undef max
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43#define max(a,b) ((a) > (b) ? (a) : (b))
44
45/* Used by the ifield rtx function. */
46#define FLD(f) (fields->f)
47
48static const char * insert_normal
ffead7ae
MM
49 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
50 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
93fbbb04 51static const char * insert_insn_normal
ffead7ae
MM
52 (CGEN_CPU_DESC, const CGEN_INSN *,
53 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
93fbbb04 54static int extract_normal
ffead7ae
MM
55 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
56 unsigned int, unsigned int, unsigned int, unsigned int,
57 unsigned int, unsigned int, bfd_vma, long *);
93fbbb04 58static int extract_insn_normal
ffead7ae
MM
59 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
60 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
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GK
61#if CGEN_INT_INSN_P
62static void put_insn_int_value
ffead7ae 63 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
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GK
64#endif
65#if ! CGEN_INT_INSN_P
66static CGEN_INLINE void insert_1
ffead7ae 67 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
93fbbb04 68static CGEN_INLINE int fill_cache
ffead7ae 69 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
93fbbb04 70static CGEN_INLINE long extract_1
ffead7ae 71 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
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72#endif
73\f
74/* Operand insertion. */
75
76#if ! CGEN_INT_INSN_P
77
78/* Subroutine of insert_normal. */
79
80static CGEN_INLINE void
ffead7ae
MM
81insert_1 (CGEN_CPU_DESC cd,
82 unsigned long value,
83 int start,
84 int length,
85 int word_length,
86 unsigned char *bufp)
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87{
88 unsigned long x,mask;
89 int shift;
90
91 x = cgen_get_insn_value (cd, bufp, word_length);
92
93 /* Written this way to avoid undefined behaviour. */
94 mask = (((1L << (length - 1)) - 1) << 1) | 1;
95 if (CGEN_INSN_LSB0_P)
96 shift = (start + 1) - length;
97 else
98 shift = (word_length - (start + length));
99 x = (x & ~(mask << shift)) | ((value & mask) << shift);
100
101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
102}
103
104#endif /* ! CGEN_INT_INSN_P */
105
106/* Default insertion routine.
107
108 ATTRS is a mask of the boolean attributes.
109 WORD_OFFSET is the offset in bits from the start of the insn of the value.
110 WORD_LENGTH is the length of the word in bits in which the value resides.
111 START is the starting bit number in the word, architecture origin.
112 LENGTH is the length of VALUE in bits.
113 TOTAL_LENGTH is the total length of the insn in bits.
114
115 The result is an error message or NULL if success. */
116
117/* ??? This duplicates functionality with bfd's howto table and
118 bfd_install_relocation. */
119/* ??? This doesn't handle bfd_vma's. Create another function when
120 necessary. */
121
122static const char *
ffead7ae
MM
123insert_normal (CGEN_CPU_DESC cd,
124 long value,
125 unsigned int attrs,
126 unsigned int word_offset,
127 unsigned int start,
128 unsigned int length,
129 unsigned int word_length,
130 unsigned int total_length,
131 CGEN_INSN_BYTES_PTR buffer)
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132{
133 static char errbuf[100];
134 /* Written this way to avoid undefined behaviour. */
135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
136
137 /* If LENGTH is zero, this operand doesn't contribute to the value. */
138 if (length == 0)
139 return NULL;
140
b7cd1872 141 if (word_length > 8 * sizeof (CGEN_INSN_INT))
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142 abort ();
143
144 /* For architectures with insns smaller than the base-insn-bitsize,
145 word_length may be too big. */
146 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
147 {
148 if (word_offset == 0
149 && word_length > total_length)
150 word_length = total_length;
151 }
152
153 /* Ensure VALUE will fit. */
154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
155 {
156 long minval = - (1L << (length - 1));
157 unsigned long maxval = mask;
43e65147 158
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GK
159 if ((value > 0 && (unsigned long) value > maxval)
160 || value < minval)
161 {
162 /* xgettext:c-format */
163 sprintf (errbuf,
164 _("operand out of range (%ld not between %ld and %lu)"),
165 value, minval, maxval);
166 return errbuf;
167 }
168 }
169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
170 {
171 unsigned long maxval = mask;
ed963e2d
NC
172 unsigned long val = (unsigned long) value;
173
174 /* For hosts with a word size > 32 check to see if value has been sign
175 extended beyond 32 bits. If so then ignore these higher sign bits
176 as the user is attempting to store a 32-bit signed value into an
177 unsigned 32-bit field which is allowed. */
178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
179 val &= 0xFFFFFFFF;
180
181 if (val > maxval)
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182 {
183 /* xgettext:c-format */
184 sprintf (errbuf,
ed963e2d
NC
185 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
186 val, maxval);
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187 return errbuf;
188 }
189 }
190 else
191 {
192 if (! cgen_signed_overflow_ok_p (cd))
193 {
194 long minval = - (1L << (length - 1));
195 long maxval = (1L << (length - 1)) - 1;
43e65147 196
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197 if (value < minval || value > maxval)
198 {
199 sprintf
200 /* xgettext:c-format */
201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
202 value, minval, maxval);
203 return errbuf;
204 }
205 }
206 }
207
208#if CGEN_INT_INSN_P
209
210 {
a143b004 211 int shift_within_word, shift_to_word, shift;
93fbbb04 212
a143b004
AB
213 /* How to shift the value to BIT0 of the word. */
214 shift_to_word = total_length - (word_offset + word_length);
215
216 /* How to shift the value to the field within the word. */
93fbbb04 217 if (CGEN_INSN_LSB0_P)
a143b004 218 shift_within_word = start + 1 - length;
93fbbb04 219 else
a143b004
AB
220 shift_within_word = word_length - start - length;
221
222 /* The total SHIFT, then mask in the value. */
223 shift = shift_to_word + shift_within_word;
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GK
224 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
225 }
226
227#else /* ! CGEN_INT_INSN_P */
228
229 {
230 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
231
232 insert_1 (cd, value, start, length, word_length, bufp);
233 }
234
235#endif /* ! CGEN_INT_INSN_P */
236
237 return NULL;
238}
239
240/* Default insn builder (insert handler).
241 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
242 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
243 recorded in host byte order, otherwise BUFFER is an array of bytes
244 and the value is recorded in target byte order).
245 The result is an error message or NULL if success. */
246
247static const char *
ffead7ae
MM
248insert_insn_normal (CGEN_CPU_DESC cd,
249 const CGEN_INSN * insn,
250 CGEN_FIELDS * fields,
251 CGEN_INSN_BYTES_PTR buffer,
252 bfd_vma pc)
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GK
253{
254 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
255 unsigned long value;
256 const CGEN_SYNTAX_CHAR_TYPE * syn;
257
258 CGEN_INIT_INSERT (cd);
259 value = CGEN_INSN_BASE_VALUE (insn);
260
261 /* If we're recording insns as numbers (rather than a string of bytes),
262 target byte order handling is deferred until later. */
263
264#if CGEN_INT_INSN_P
265
266 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
267 CGEN_FIELDS_BITSIZE (fields), value);
268
269#else
270
271 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
272 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
273 value);
274
275#endif /* ! CGEN_INT_INSN_P */
276
277 /* ??? It would be better to scan the format's fields.
278 Still need to be able to insert a value based on the operand though;
279 e.g. storing a branch displacement that got resolved later.
280 Needs more thought first. */
281
282 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
283 {
284 const char *errmsg;
285
286 if (CGEN_SYNTAX_CHAR_P (* syn))
287 continue;
288
289 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
290 fields, buffer, pc);
291 if (errmsg)
292 return errmsg;
293 }
294
295 return NULL;
296}
297
298#if CGEN_INT_INSN_P
299/* Cover function to store an insn value into an integral insn. Must go here
47b0e7ad 300 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
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GK
301
302static void
ffead7ae
MM
303put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
304 CGEN_INSN_BYTES_PTR buf,
305 int length,
306 int insn_length,
307 CGEN_INSN_INT value)
93fbbb04
GK
308{
309 /* For architectures with insns smaller than the base-insn-bitsize,
310 length may be too big. */
311 if (length > insn_length)
312 *buf = value;
313 else
314 {
315 int shift = insn_length - length;
316 /* Written this way to avoid undefined behaviour. */
317 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
47b0e7ad 318
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GK
319 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
320 }
321}
322#endif
323\f
324/* Operand extraction. */
325
326#if ! CGEN_INT_INSN_P
327
328/* Subroutine of extract_normal.
329 Ensure sufficient bytes are cached in EX_INFO.
330 OFFSET is the offset in bytes from the start of the insn of the value.
331 BYTES is the length of the needed value.
332 Returns 1 for success, 0 for failure. */
333
334static CGEN_INLINE int
ffead7ae
MM
335fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
336 CGEN_EXTRACT_INFO *ex_info,
337 int offset,
338 int bytes,
339 bfd_vma pc)
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GK
340{
341 /* It's doubtful that the middle part has already been fetched so
342 we don't optimize that case. kiss. */
343 unsigned int mask;
344 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
345
346 /* First do a quick check. */
347 mask = (1 << bytes) - 1;
348 if (((ex_info->valid >> offset) & mask) == mask)
349 return 1;
350
351 /* Search for the first byte we need to read. */
352 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
353 if (! (mask & ex_info->valid))
354 break;
355
356 if (bytes)
357 {
358 int status;
359
360 pc += offset;
361 status = (*info->read_memory_func)
362 (pc, ex_info->insn_bytes + offset, bytes, info);
363
364 if (status != 0)
365 {
366 (*info->memory_error_func) (status, pc, info);
367 return 0;
368 }
369
370 ex_info->valid |= ((1 << bytes) - 1) << offset;
371 }
372
373 return 1;
374}
375
376/* Subroutine of extract_normal. */
377
378static CGEN_INLINE long
ffead7ae
MM
379extract_1 (CGEN_CPU_DESC cd,
380 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
381 int start,
382 int length,
383 int word_length,
384 unsigned char *bufp,
385 bfd_vma pc ATTRIBUTE_UNUSED)
93fbbb04
GK
386{
387 unsigned long x;
388 int shift;
47b0e7ad 389
93fbbb04
GK
390 x = cgen_get_insn_value (cd, bufp, word_length);
391
392 if (CGEN_INSN_LSB0_P)
393 shift = (start + 1) - length;
394 else
395 shift = (word_length - (start + length));
396 return x >> shift;
397}
398
399#endif /* ! CGEN_INT_INSN_P */
400
401/* Default extraction routine.
402
403 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
404 or sometimes less for cases like the m32r where the base insn size is 32
405 but some insns are 16 bits.
406 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
407 but for generality we take a bitmask of all of them.
408 WORD_OFFSET is the offset in bits from the start of the insn of the value.
409 WORD_LENGTH is the length of the word in bits in which the value resides.
410 START is the starting bit number in the word, architecture origin.
411 LENGTH is the length of VALUE in bits.
412 TOTAL_LENGTH is the total length of the insn in bits.
413
414 Returns 1 for success, 0 for failure. */
415
416/* ??? The return code isn't properly used. wip. */
417
418/* ??? This doesn't handle bfd_vma's. Create another function when
419 necessary. */
420
421static int
ffead7ae 422extract_normal (CGEN_CPU_DESC cd,
93fbbb04 423#if ! CGEN_INT_INSN_P
ffead7ae 424 CGEN_EXTRACT_INFO *ex_info,
93fbbb04 425#else
ffead7ae 426 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
93fbbb04 427#endif
ffead7ae
MM
428 CGEN_INSN_INT insn_value,
429 unsigned int attrs,
430 unsigned int word_offset,
431 unsigned int start,
432 unsigned int length,
433 unsigned int word_length,
434 unsigned int total_length,
93fbbb04 435#if ! CGEN_INT_INSN_P
ffead7ae 436 bfd_vma pc,
93fbbb04 437#else
ffead7ae 438 bfd_vma pc ATTRIBUTE_UNUSED,
93fbbb04 439#endif
ffead7ae 440 long *valuep)
93fbbb04
GK
441{
442 long value, mask;
443
444 /* If LENGTH is zero, this operand doesn't contribute to the value
445 so give it a standard value of zero. */
446 if (length == 0)
447 {
448 *valuep = 0;
449 return 1;
450 }
451
b7cd1872 452 if (word_length > 8 * sizeof (CGEN_INSN_INT))
93fbbb04
GK
453 abort ();
454
455 /* For architectures with insns smaller than the insn-base-bitsize,
456 word_length may be too big. */
457 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
458 {
ed963e2d
NC
459 if (word_offset + word_length > total_length)
460 word_length = total_length - word_offset;
93fbbb04
GK
461 }
462
463 /* Does the value reside in INSN_VALUE, and at the right alignment? */
464
465 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
466 {
467 if (CGEN_INSN_LSB0_P)
468 value = insn_value >> ((word_offset + start + 1) - length);
469 else
470 value = insn_value >> (total_length - ( word_offset + start + length));
471 }
472
473#if ! CGEN_INT_INSN_P
474
475 else
476 {
477 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
478
b7cd1872 479 if (word_length > 8 * sizeof (CGEN_INSN_INT))
93fbbb04
GK
480 abort ();
481
482 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
2f5dd314
AM
483 {
484 *valuep = 0;
485 return 0;
486 }
93fbbb04
GK
487
488 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
489 }
490
491#endif /* ! CGEN_INT_INSN_P */
492
493 /* Written this way to avoid undefined behaviour. */
494 mask = (((1L << (length - 1)) - 1) << 1) | 1;
495
496 value &= mask;
497 /* sign extend? */
498 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
499 && (value & (1L << (length - 1))))
500 value |= ~mask;
501
502 *valuep = value;
503
504 return 1;
505}
506
507/* Default insn extractor.
508
509 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
510 The extracted fields are stored in FIELDS.
511 EX_INFO is used to handle reading variable length insns.
512 Return the length of the insn in bits, or 0 if no match,
513 or -1 if an error occurs fetching data (memory_error_func will have
514 been called). */
515
516static int
ffead7ae
MM
517extract_insn_normal (CGEN_CPU_DESC cd,
518 const CGEN_INSN *insn,
519 CGEN_EXTRACT_INFO *ex_info,
520 CGEN_INSN_INT insn_value,
521 CGEN_FIELDS *fields,
522 bfd_vma pc)
93fbbb04
GK
523{
524 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
525 const CGEN_SYNTAX_CHAR_TYPE *syn;
526
527 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
528
529 CGEN_INIT_EXTRACT (cd);
530
531 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
532 {
533 int length;
534
535 if (CGEN_SYNTAX_CHAR_P (*syn))
536 continue;
537
538 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
539 ex_info, insn_value, fields, pc);
540 if (length <= 0)
541 return length;
542 }
543
544 /* We recognized and successfully extracted this insn. */
545 return CGEN_INSN_BITSIZE (insn);
546}
547\f
47b0e7ad 548/* Machine generated code added here. */
93fbbb04
GK
549
550const char * xstormy16_cgen_insert_operand
47b0e7ad 551 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
93fbbb04
GK
552
553/* Main entry point for operand insertion.
554
555 This function is basically just a big switch statement. Earlier versions
556 used tables to look up the function to use, but
557 - if the table contains both assembler and disassembler functions then
558 the disassembler contains much of the assembler and vice-versa,
559 - there's a lot of inlining possibilities as things grow,
560 - using a switch statement avoids the function call overhead.
561
562 This function could be moved into `parse_insn_normal', but keeping it
563 separate makes clear the interface between `parse_insn_normal' and each of
564 the handlers. It's also needed by GAS to insert operands that couldn't be
565 resolved during parsing. */
566
567const char *
47b0e7ad
NC
568xstormy16_cgen_insert_operand (CGEN_CPU_DESC cd,
569 int opindex,
570 CGEN_FIELDS * fields,
571 CGEN_INSN_BYTES_PTR buffer,
572 bfd_vma pc ATTRIBUTE_UNUSED)
93fbbb04
GK
573{
574 const char * errmsg = NULL;
575 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
576
577 switch (opindex)
578 {
579 case XSTORMY16_OPERAND_RB :
580 errmsg = insert_normal (cd, fields->f_Rb, 0, 0, 17, 3, 32, total_length, buffer);
581 break;
582 case XSTORMY16_OPERAND_RBJ :
583 errmsg = insert_normal (cd, fields->f_Rbj, 0, 0, 11, 1, 32, total_length, buffer);
584 break;
585 case XSTORMY16_OPERAND_RD :
586 errmsg = insert_normal (cd, fields->f_Rd, 0, 0, 12, 4, 32, total_length, buffer);
587 break;
588 case XSTORMY16_OPERAND_RDM :
589 errmsg = insert_normal (cd, fields->f_Rdm, 0, 0, 13, 3, 32, total_length, buffer);
590 break;
591 case XSTORMY16_OPERAND_RM :
592 errmsg = insert_normal (cd, fields->f_Rm, 0, 0, 4, 3, 32, total_length, buffer);
593 break;
594 case XSTORMY16_OPERAND_RS :
595 errmsg = insert_normal (cd, fields->f_Rs, 0, 0, 8, 4, 32, total_length, buffer);
596 break;
597 case XSTORMY16_OPERAND_ABS24 :
598 {
599{
600 FLD (f_abs24_1) = ((FLD (f_abs24)) & (255));
fe8afbc4 601 FLD (f_abs24_2) = ((UINT) (FLD (f_abs24)) >> (8));
93fbbb04
GK
602}
603 errmsg = insert_normal (cd, fields->f_abs24_1, 0, 0, 8, 8, 32, total_length, buffer);
604 if (errmsg)
605 break;
606 errmsg = insert_normal (cd, fields->f_abs24_2, 0, 0, 16, 16, 32, total_length, buffer);
607 if (errmsg)
608 break;
609 }
610 break;
611 case XSTORMY16_OPERAND_BCOND2 :
612 errmsg = insert_normal (cd, fields->f_op2, 0, 0, 4, 4, 32, total_length, buffer);
613 break;
614 case XSTORMY16_OPERAND_BCOND5 :
615 errmsg = insert_normal (cd, fields->f_op5, 0, 0, 16, 4, 32, total_length, buffer);
616 break;
617 case XSTORMY16_OPERAND_HMEM8 :
618 {
619 long value = fields->f_hmem8;
620 value = ((value) - (32512));
621 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 8, 32, total_length, buffer);
622 }
623 break;
624 case XSTORMY16_OPERAND_IMM12 :
625 errmsg = insert_normal (cd, fields->f_imm12, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 12, 32, total_length, buffer);
626 break;
627 case XSTORMY16_OPERAND_IMM16 :
628 errmsg = insert_normal (cd, fields->f_imm16, 0|(1<<CGEN_IFLD_SIGN_OPT), 0, 16, 16, 32, total_length, buffer);
629 break;
630 case XSTORMY16_OPERAND_IMM2 :
631 errmsg = insert_normal (cd, fields->f_imm2, 0, 0, 10, 2, 32, total_length, buffer);
632 break;
633 case XSTORMY16_OPERAND_IMM3 :
634 errmsg = insert_normal (cd, fields->f_imm3, 0, 0, 4, 3, 32, total_length, buffer);
635 break;
636 case XSTORMY16_OPERAND_IMM3B :
637 errmsg = insert_normal (cd, fields->f_imm3b, 0, 0, 17, 3, 32, total_length, buffer);
638 break;
639 case XSTORMY16_OPERAND_IMM4 :
640 errmsg = insert_normal (cd, fields->f_imm4, 0, 0, 8, 4, 32, total_length, buffer);
641 break;
642 case XSTORMY16_OPERAND_IMM8 :
643 errmsg = insert_normal (cd, fields->f_imm8, 0, 0, 8, 8, 32, total_length, buffer);
644 break;
645 case XSTORMY16_OPERAND_IMM8SMALL :
646 errmsg = insert_normal (cd, fields->f_imm8, 0, 0, 8, 8, 32, total_length, buffer);
647 break;
648 case XSTORMY16_OPERAND_LMEM8 :
649 errmsg = insert_normal (cd, fields->f_lmem8, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 8, 32, total_length, buffer);
650 break;
651 case XSTORMY16_OPERAND_REL12 :
652 {
653 long value = fields->f_rel12;
654 value = ((value) - (((pc) + (4))));
655 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 20, 12, 32, total_length, buffer);
656 }
657 break;
658 case XSTORMY16_OPERAND_REL12A :
659 {
660 long value = fields->f_rel12a;
fe8afbc4 661 value = ((SI) (((value) - (((pc) + (2))))) >> (1));
93fbbb04
GK
662 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 4, 11, 32, total_length, buffer);
663 }
664 break;
665 case XSTORMY16_OPERAND_REL8_2 :
666 {
667 long value = fields->f_rel8_2;
668 value = ((value) - (((pc) + (2))));
669 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer);
670 }
671 break;
672 case XSTORMY16_OPERAND_REL8_4 :
673 {
674 long value = fields->f_rel8_4;
675 value = ((value) - (((pc) + (4))));
676 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer);
677 }
678 break;
679 case XSTORMY16_OPERAND_WS2 :
680 errmsg = insert_normal (cd, fields->f_op2m, 0, 0, 7, 1, 32, total_length, buffer);
681 break;
682
683 default :
684 /* xgettext:c-format */
a6743a54
AM
685 opcodes_error_handler
686 (_("internal error: unrecognized field %d while building insn"),
687 opindex);
93fbbb04
GK
688 abort ();
689 }
690
691 return errmsg;
692}
693
694int xstormy16_cgen_extract_operand
47b0e7ad 695 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
93fbbb04
GK
696
697/* Main entry point for operand extraction.
698 The result is <= 0 for error, >0 for success.
699 ??? Actual values aren't well defined right now.
700
701 This function is basically just a big switch statement. Earlier versions
702 used tables to look up the function to use, but
703 - if the table contains both assembler and disassembler functions then
704 the disassembler contains much of the assembler and vice-versa,
705 - there's a lot of inlining possibilities as things grow,
706 - using a switch statement avoids the function call overhead.
707
708 This function could be moved into `print_insn_normal', but keeping it
709 separate makes clear the interface between `print_insn_normal' and each of
710 the handlers. */
711
712int
47b0e7ad
NC
713xstormy16_cgen_extract_operand (CGEN_CPU_DESC cd,
714 int opindex,
715 CGEN_EXTRACT_INFO *ex_info,
716 CGEN_INSN_INT insn_value,
717 CGEN_FIELDS * fields,
718 bfd_vma pc)
93fbbb04
GK
719{
720 /* Assume success (for those operands that are nops). */
721 int length = 1;
722 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
723
724 switch (opindex)
725 {
726 case XSTORMY16_OPERAND_RB :
727 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 3, 32, total_length, pc, & fields->f_Rb);
728 break;
729 case XSTORMY16_OPERAND_RBJ :
730 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_Rbj);
731 break;
732 case XSTORMY16_OPERAND_RD :
733 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_Rd);
734 break;
735 case XSTORMY16_OPERAND_RDM :
736 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_Rdm);
737 break;
738 case XSTORMY16_OPERAND_RM :
739 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 3, 32, total_length, pc, & fields->f_Rm);
740 break;
741 case XSTORMY16_OPERAND_RS :
742 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 32, total_length, pc, & fields->f_Rs);
743 break;
744 case XSTORMY16_OPERAND_ABS24 :
745 {
746 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_abs24_1);
747 if (length <= 0) break;
748 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & fields->f_abs24_2);
749 if (length <= 0) break;
750 FLD (f_abs24) = ((((FLD (f_abs24_2)) << (8))) | (FLD (f_abs24_1)));
751 }
752 break;
753 case XSTORMY16_OPERAND_BCOND2 :
754 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_op2);
755 break;
756 case XSTORMY16_OPERAND_BCOND5 :
757 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 4, 32, total_length, pc, & fields->f_op5);
758 break;
759 case XSTORMY16_OPERAND_HMEM8 :
760 {
761 long value;
762 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 8, 32, total_length, pc, & value);
763 value = ((value) + (32512));
764 fields->f_hmem8 = value;
765 }
766 break;
767 case XSTORMY16_OPERAND_IMM12 :
768 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 12, 32, total_length, pc, & fields->f_imm12);
769 break;
770 case XSTORMY16_OPERAND_IMM16 :
771 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT), 0, 16, 16, 32, total_length, pc, & fields->f_imm16);
772 break;
773 case XSTORMY16_OPERAND_IMM2 :
774 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_imm2);
775 break;
776 case XSTORMY16_OPERAND_IMM3 :
777 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 3, 32, total_length, pc, & fields->f_imm3);
778 break;
779 case XSTORMY16_OPERAND_IMM3B :
780 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 3, 32, total_length, pc, & fields->f_imm3b);
781 break;
782 case XSTORMY16_OPERAND_IMM4 :
783 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 32, total_length, pc, & fields->f_imm4);
784 break;
785 case XSTORMY16_OPERAND_IMM8 :
786 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_imm8);
787 break;
788 case XSTORMY16_OPERAND_IMM8SMALL :
789 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_imm8);
790 break;
791 case XSTORMY16_OPERAND_LMEM8 :
792 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 8, 32, total_length, pc, & fields->f_lmem8);
793 break;
794 case XSTORMY16_OPERAND_REL12 :
795 {
796 long value;
797 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 20, 12, 32, total_length, pc, & value);
798 value = ((value) + (((pc) + (4))));
799 fields->f_rel12 = value;
800 }
801 break;
802 case XSTORMY16_OPERAND_REL12A :
803 {
804 long value;
805 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 4, 11, 32, total_length, pc, & value);
e6ced26a 806 value = ((((value) * (2))) + (((pc) + (2))));
93fbbb04
GK
807 fields->f_rel12a = value;
808 }
809 break;
810 case XSTORMY16_OPERAND_REL8_2 :
811 {
812 long value;
813 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value);
814 value = ((value) + (((pc) + (2))));
815 fields->f_rel8_2 = value;
816 }
817 break;
818 case XSTORMY16_OPERAND_REL8_4 :
819 {
820 long value;
821 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value);
822 value = ((value) + (((pc) + (4))));
823 fields->f_rel8_4 = value;
824 }
825 break;
826 case XSTORMY16_OPERAND_WS2 :
827 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_op2m);
828 break;
829
830 default :
831 /* xgettext:c-format */
a6743a54
AM
832 opcodes_error_handler
833 (_("internal error: unrecognized field %d while decoding insn"),
834 opindex);
93fbbb04
GK
835 abort ();
836 }
837
838 return length;
839}
840
43e65147 841cgen_insert_fn * const xstormy16_cgen_insert_handlers[] =
93fbbb04
GK
842{
843 insert_insn_normal,
844};
845
43e65147 846cgen_extract_fn * const xstormy16_cgen_extract_handlers[] =
93fbbb04
GK
847{
848 extract_insn_normal,
849};
850
47b0e7ad
NC
851int xstormy16_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
852bfd_vma xstormy16_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
93fbbb04
GK
853
854/* Getting values from cgen_fields is handled by a collection of functions.
855 They are distinguished by the type of the VALUE argument they return.
856 TODO: floating point, inlining support, remove cases where result type
857 not appropriate. */
858
859int
47b0e7ad
NC
860xstormy16_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
861 int opindex,
862 const CGEN_FIELDS * fields)
93fbbb04
GK
863{
864 int value;
865
866 switch (opindex)
867 {
868 case XSTORMY16_OPERAND_RB :
869 value = fields->f_Rb;
870 break;
871 case XSTORMY16_OPERAND_RBJ :
872 value = fields->f_Rbj;
873 break;
874 case XSTORMY16_OPERAND_RD :
875 value = fields->f_Rd;
876 break;
877 case XSTORMY16_OPERAND_RDM :
878 value = fields->f_Rdm;
879 break;
880 case XSTORMY16_OPERAND_RM :
881 value = fields->f_Rm;
882 break;
883 case XSTORMY16_OPERAND_RS :
884 value = fields->f_Rs;
885 break;
886 case XSTORMY16_OPERAND_ABS24 :
887 value = fields->f_abs24;
888 break;
889 case XSTORMY16_OPERAND_BCOND2 :
890 value = fields->f_op2;
891 break;
892 case XSTORMY16_OPERAND_BCOND5 :
893 value = fields->f_op5;
894 break;
895 case XSTORMY16_OPERAND_HMEM8 :
896 value = fields->f_hmem8;
897 break;
898 case XSTORMY16_OPERAND_IMM12 :
899 value = fields->f_imm12;
900 break;
901 case XSTORMY16_OPERAND_IMM16 :
902 value = fields->f_imm16;
903 break;
904 case XSTORMY16_OPERAND_IMM2 :
905 value = fields->f_imm2;
906 break;
907 case XSTORMY16_OPERAND_IMM3 :
908 value = fields->f_imm3;
909 break;
910 case XSTORMY16_OPERAND_IMM3B :
911 value = fields->f_imm3b;
912 break;
913 case XSTORMY16_OPERAND_IMM4 :
914 value = fields->f_imm4;
915 break;
916 case XSTORMY16_OPERAND_IMM8 :
917 value = fields->f_imm8;
918 break;
919 case XSTORMY16_OPERAND_IMM8SMALL :
920 value = fields->f_imm8;
921 break;
922 case XSTORMY16_OPERAND_LMEM8 :
923 value = fields->f_lmem8;
924 break;
925 case XSTORMY16_OPERAND_REL12 :
926 value = fields->f_rel12;
927 break;
928 case XSTORMY16_OPERAND_REL12A :
929 value = fields->f_rel12a;
930 break;
931 case XSTORMY16_OPERAND_REL8_2 :
932 value = fields->f_rel8_2;
933 break;
934 case XSTORMY16_OPERAND_REL8_4 :
935 value = fields->f_rel8_4;
936 break;
937 case XSTORMY16_OPERAND_WS2 :
938 value = fields->f_op2m;
939 break;
940
941 default :
942 /* xgettext:c-format */
a6743a54
AM
943 opcodes_error_handler
944 (_("internal error: unrecognized field %d while getting int operand"),
945 opindex);
93fbbb04
GK
946 abort ();
947 }
948
949 return value;
950}
951
952bfd_vma
47b0e7ad
NC
953xstormy16_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
954 int opindex,
955 const CGEN_FIELDS * fields)
93fbbb04
GK
956{
957 bfd_vma value;
958
959 switch (opindex)
960 {
961 case XSTORMY16_OPERAND_RB :
962 value = fields->f_Rb;
963 break;
964 case XSTORMY16_OPERAND_RBJ :
965 value = fields->f_Rbj;
966 break;
967 case XSTORMY16_OPERAND_RD :
968 value = fields->f_Rd;
969 break;
970 case XSTORMY16_OPERAND_RDM :
971 value = fields->f_Rdm;
972 break;
973 case XSTORMY16_OPERAND_RM :
974 value = fields->f_Rm;
975 break;
976 case XSTORMY16_OPERAND_RS :
977 value = fields->f_Rs;
978 break;
979 case XSTORMY16_OPERAND_ABS24 :
980 value = fields->f_abs24;
981 break;
982 case XSTORMY16_OPERAND_BCOND2 :
983 value = fields->f_op2;
984 break;
985 case XSTORMY16_OPERAND_BCOND5 :
986 value = fields->f_op5;
987 break;
988 case XSTORMY16_OPERAND_HMEM8 :
989 value = fields->f_hmem8;
990 break;
991 case XSTORMY16_OPERAND_IMM12 :
992 value = fields->f_imm12;
993 break;
994 case XSTORMY16_OPERAND_IMM16 :
995 value = fields->f_imm16;
996 break;
997 case XSTORMY16_OPERAND_IMM2 :
998 value = fields->f_imm2;
999 break;
1000 case XSTORMY16_OPERAND_IMM3 :
1001 value = fields->f_imm3;
1002 break;
1003 case XSTORMY16_OPERAND_IMM3B :
1004 value = fields->f_imm3b;
1005 break;
1006 case XSTORMY16_OPERAND_IMM4 :
1007 value = fields->f_imm4;
1008 break;
1009 case XSTORMY16_OPERAND_IMM8 :
1010 value = fields->f_imm8;
1011 break;
1012 case XSTORMY16_OPERAND_IMM8SMALL :
1013 value = fields->f_imm8;
1014 break;
1015 case XSTORMY16_OPERAND_LMEM8 :
1016 value = fields->f_lmem8;
1017 break;
1018 case XSTORMY16_OPERAND_REL12 :
1019 value = fields->f_rel12;
1020 break;
1021 case XSTORMY16_OPERAND_REL12A :
1022 value = fields->f_rel12a;
1023 break;
1024 case XSTORMY16_OPERAND_REL8_2 :
1025 value = fields->f_rel8_2;
1026 break;
1027 case XSTORMY16_OPERAND_REL8_4 :
1028 value = fields->f_rel8_4;
1029 break;
1030 case XSTORMY16_OPERAND_WS2 :
1031 value = fields->f_op2m;
1032 break;
1033
1034 default :
1035 /* xgettext:c-format */
a6743a54
AM
1036 opcodes_error_handler
1037 (_("internal error: unrecognized field %d while getting vma operand"),
1038 opindex);
93fbbb04
GK
1039 abort ();
1040 }
1041
1042 return value;
1043}
1044
47b0e7ad
NC
1045void xstormy16_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
1046void xstormy16_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
93fbbb04
GK
1047
1048/* Stuffing values in cgen_fields is handled by a collection of functions.
1049 They are distinguished by the type of the VALUE argument they accept.
1050 TODO: floating point, inlining support, remove cases where argument type
1051 not appropriate. */
1052
1053void
47b0e7ad
NC
1054xstormy16_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1055 int opindex,
1056 CGEN_FIELDS * fields,
1057 int value)
93fbbb04
GK
1058{
1059 switch (opindex)
1060 {
1061 case XSTORMY16_OPERAND_RB :
1062 fields->f_Rb = value;
1063 break;
1064 case XSTORMY16_OPERAND_RBJ :
1065 fields->f_Rbj = value;
1066 break;
1067 case XSTORMY16_OPERAND_RD :
1068 fields->f_Rd = value;
1069 break;
1070 case XSTORMY16_OPERAND_RDM :
1071 fields->f_Rdm = value;
1072 break;
1073 case XSTORMY16_OPERAND_RM :
1074 fields->f_Rm = value;
1075 break;
1076 case XSTORMY16_OPERAND_RS :
1077 fields->f_Rs = value;
1078 break;
1079 case XSTORMY16_OPERAND_ABS24 :
1080 fields->f_abs24 = value;
1081 break;
1082 case XSTORMY16_OPERAND_BCOND2 :
1083 fields->f_op2 = value;
1084 break;
1085 case XSTORMY16_OPERAND_BCOND5 :
1086 fields->f_op5 = value;
1087 break;
1088 case XSTORMY16_OPERAND_HMEM8 :
1089 fields->f_hmem8 = value;
1090 break;
1091 case XSTORMY16_OPERAND_IMM12 :
1092 fields->f_imm12 = value;
1093 break;
1094 case XSTORMY16_OPERAND_IMM16 :
1095 fields->f_imm16 = value;
1096 break;
1097 case XSTORMY16_OPERAND_IMM2 :
1098 fields->f_imm2 = value;
1099 break;
1100 case XSTORMY16_OPERAND_IMM3 :
1101 fields->f_imm3 = value;
1102 break;
1103 case XSTORMY16_OPERAND_IMM3B :
1104 fields->f_imm3b = value;
1105 break;
1106 case XSTORMY16_OPERAND_IMM4 :
1107 fields->f_imm4 = value;
1108 break;
1109 case XSTORMY16_OPERAND_IMM8 :
1110 fields->f_imm8 = value;
1111 break;
1112 case XSTORMY16_OPERAND_IMM8SMALL :
1113 fields->f_imm8 = value;
1114 break;
1115 case XSTORMY16_OPERAND_LMEM8 :
1116 fields->f_lmem8 = value;
1117 break;
1118 case XSTORMY16_OPERAND_REL12 :
1119 fields->f_rel12 = value;
1120 break;
1121 case XSTORMY16_OPERAND_REL12A :
1122 fields->f_rel12a = value;
1123 break;
1124 case XSTORMY16_OPERAND_REL8_2 :
1125 fields->f_rel8_2 = value;
1126 break;
1127 case XSTORMY16_OPERAND_REL8_4 :
1128 fields->f_rel8_4 = value;
1129 break;
1130 case XSTORMY16_OPERAND_WS2 :
1131 fields->f_op2m = value;
1132 break;
1133
1134 default :
1135 /* xgettext:c-format */
a6743a54
AM
1136 opcodes_error_handler
1137 (_("internal error: unrecognized field %d while setting int operand"),
1138 opindex);
93fbbb04
GK
1139 abort ();
1140 }
1141}
1142
1143void
47b0e7ad
NC
1144xstormy16_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1145 int opindex,
1146 CGEN_FIELDS * fields,
1147 bfd_vma value)
93fbbb04
GK
1148{
1149 switch (opindex)
1150 {
1151 case XSTORMY16_OPERAND_RB :
1152 fields->f_Rb = value;
1153 break;
1154 case XSTORMY16_OPERAND_RBJ :
1155 fields->f_Rbj = value;
1156 break;
1157 case XSTORMY16_OPERAND_RD :
1158 fields->f_Rd = value;
1159 break;
1160 case XSTORMY16_OPERAND_RDM :
1161 fields->f_Rdm = value;
1162 break;
1163 case XSTORMY16_OPERAND_RM :
1164 fields->f_Rm = value;
1165 break;
1166 case XSTORMY16_OPERAND_RS :
1167 fields->f_Rs = value;
1168 break;
1169 case XSTORMY16_OPERAND_ABS24 :
1170 fields->f_abs24 = value;
1171 break;
1172 case XSTORMY16_OPERAND_BCOND2 :
1173 fields->f_op2 = value;
1174 break;
1175 case XSTORMY16_OPERAND_BCOND5 :
1176 fields->f_op5 = value;
1177 break;
1178 case XSTORMY16_OPERAND_HMEM8 :
1179 fields->f_hmem8 = value;
1180 break;
1181 case XSTORMY16_OPERAND_IMM12 :
1182 fields->f_imm12 = value;
1183 break;
1184 case XSTORMY16_OPERAND_IMM16 :
1185 fields->f_imm16 = value;
1186 break;
1187 case XSTORMY16_OPERAND_IMM2 :
1188 fields->f_imm2 = value;
1189 break;
1190 case XSTORMY16_OPERAND_IMM3 :
1191 fields->f_imm3 = value;
1192 break;
1193 case XSTORMY16_OPERAND_IMM3B :
1194 fields->f_imm3b = value;
1195 break;
1196 case XSTORMY16_OPERAND_IMM4 :
1197 fields->f_imm4 = value;
1198 break;
1199 case XSTORMY16_OPERAND_IMM8 :
1200 fields->f_imm8 = value;
1201 break;
1202 case XSTORMY16_OPERAND_IMM8SMALL :
1203 fields->f_imm8 = value;
1204 break;
1205 case XSTORMY16_OPERAND_LMEM8 :
1206 fields->f_lmem8 = value;
1207 break;
1208 case XSTORMY16_OPERAND_REL12 :
1209 fields->f_rel12 = value;
1210 break;
1211 case XSTORMY16_OPERAND_REL12A :
1212 fields->f_rel12a = value;
1213 break;
1214 case XSTORMY16_OPERAND_REL8_2 :
1215 fields->f_rel8_2 = value;
1216 break;
1217 case XSTORMY16_OPERAND_REL8_4 :
1218 fields->f_rel8_4 = value;
1219 break;
1220 case XSTORMY16_OPERAND_WS2 :
1221 fields->f_op2m = value;
1222 break;
1223
1224 default :
1225 /* xgettext:c-format */
a6743a54
AM
1226 opcodes_error_handler
1227 (_("internal error: unrecognized field %d while setting vma operand"),
1228 opindex);
93fbbb04
GK
1229 abort ();
1230 }
1231}
1232
1233/* Function to call before using the instruction builder tables. */
1234
1235void
47b0e7ad 1236xstormy16_cgen_init_ibld_table (CGEN_CPU_DESC cd)
93fbbb04
GK
1237{
1238 cd->insert_handlers = & xstormy16_cgen_insert_handlers[0];
1239 cd->extract_handlers = & xstormy16_cgen_extract_handlers[0];
1240
1241 cd->insert_operand = xstormy16_cgen_insert_operand;
1242 cd->extract_operand = xstormy16_cgen_extract_operand;
1243
1244 cd->get_int_operand = xstormy16_cgen_get_int_operand;
1245 cd->set_int_operand = xstormy16_cgen_set_int_operand;
1246 cd->get_vma_operand = xstormy16_cgen_get_vma_operand;
1247 cd->set_vma_operand = xstormy16_cgen_set_vma_operand;
1248}
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