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[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2020 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "libiberty.h"
26 #include "libbfd.h"
27 #include "elf-bfd.h"
28 #include "elf-nacl.h"
29 #include "elf-vxworks.h"
30 #include "elf/arm.h"
31 #include "elf32-arm.h"
32 #include "cpu-arm.h"
33
34 /* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36 #define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38
39 /* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41 #define RELOC_SIZE(HTAB) \
42 ((HTAB)->use_rel \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
45
46 /* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48 #define SWAP_RELOC_IN(HTAB) \
49 ((HTAB)->use_rel \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
52
53 /* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55 #define SWAP_RELOC_OUT(HTAB) \
56 ((HTAB)->use_rel \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
59
60 #define elf_info_to_howto NULL
61 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62
63 #define ARM_ELF_ABI_VERSION 0
64 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65
66 /* The Adjusted Place, as defined by AAELF. */
67 #define Pa(X) ((X) & 0xfffffffc)
68
69 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
70 struct bfd_link_info *link_info,
71 asection *sec,
72 bfd_byte *contents);
73
74 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
75 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
76 in that slot. */
77
78 static reloc_howto_type elf32_arm_howto_table_1[] =
79 {
80 /* No relocation. */
81 HOWTO (R_ARM_NONE, /* type */
82 0, /* rightshift */
83 3, /* size (0 = byte, 1 = short, 2 = long) */
84 0, /* bitsize */
85 FALSE, /* pc_relative */
86 0, /* bitpos */
87 complain_overflow_dont,/* complain_on_overflow */
88 bfd_elf_generic_reloc, /* special_function */
89 "R_ARM_NONE", /* name */
90 FALSE, /* partial_inplace */
91 0, /* src_mask */
92 0, /* dst_mask */
93 FALSE), /* pcrel_offset */
94
95 HOWTO (R_ARM_PC24, /* type */
96 2, /* rightshift */
97 2, /* size (0 = byte, 1 = short, 2 = long) */
98 24, /* bitsize */
99 TRUE, /* pc_relative */
100 0, /* bitpos */
101 complain_overflow_signed,/* complain_on_overflow */
102 bfd_elf_generic_reloc, /* special_function */
103 "R_ARM_PC24", /* name */
104 FALSE, /* partial_inplace */
105 0x00ffffff, /* src_mask */
106 0x00ffffff, /* dst_mask */
107 TRUE), /* pcrel_offset */
108
109 /* 32 bit absolute */
110 HOWTO (R_ARM_ABS32, /* type */
111 0, /* rightshift */
112 2, /* size (0 = byte, 1 = short, 2 = long) */
113 32, /* bitsize */
114 FALSE, /* pc_relative */
115 0, /* bitpos */
116 complain_overflow_bitfield,/* complain_on_overflow */
117 bfd_elf_generic_reloc, /* special_function */
118 "R_ARM_ABS32", /* name */
119 FALSE, /* partial_inplace */
120 0xffffffff, /* src_mask */
121 0xffffffff, /* dst_mask */
122 FALSE), /* pcrel_offset */
123
124 /* standard 32bit pc-relative reloc */
125 HOWTO (R_ARM_REL32, /* type */
126 0, /* rightshift */
127 2, /* size (0 = byte, 1 = short, 2 = long) */
128 32, /* bitsize */
129 TRUE, /* pc_relative */
130 0, /* bitpos */
131 complain_overflow_bitfield,/* complain_on_overflow */
132 bfd_elf_generic_reloc, /* special_function */
133 "R_ARM_REL32", /* name */
134 FALSE, /* partial_inplace */
135 0xffffffff, /* src_mask */
136 0xffffffff, /* dst_mask */
137 TRUE), /* pcrel_offset */
138
139 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
140 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* rightshift */
142 0, /* size (0 = byte, 1 = short, 2 = long) */
143 32, /* bitsize */
144 TRUE, /* pc_relative */
145 0, /* bitpos */
146 complain_overflow_dont,/* complain_on_overflow */
147 bfd_elf_generic_reloc, /* special_function */
148 "R_ARM_LDR_PC_G0", /* name */
149 FALSE, /* partial_inplace */
150 0xffffffff, /* src_mask */
151 0xffffffff, /* dst_mask */
152 TRUE), /* pcrel_offset */
153
154 /* 16 bit absolute */
155 HOWTO (R_ARM_ABS16, /* type */
156 0, /* rightshift */
157 1, /* size (0 = byte, 1 = short, 2 = long) */
158 16, /* bitsize */
159 FALSE, /* pc_relative */
160 0, /* bitpos */
161 complain_overflow_bitfield,/* complain_on_overflow */
162 bfd_elf_generic_reloc, /* special_function */
163 "R_ARM_ABS16", /* name */
164 FALSE, /* partial_inplace */
165 0x0000ffff, /* src_mask */
166 0x0000ffff, /* dst_mask */
167 FALSE), /* pcrel_offset */
168
169 /* 12 bit absolute */
170 HOWTO (R_ARM_ABS12, /* type */
171 0, /* rightshift */
172 2, /* size (0 = byte, 1 = short, 2 = long) */
173 12, /* bitsize */
174 FALSE, /* pc_relative */
175 0, /* bitpos */
176 complain_overflow_bitfield,/* complain_on_overflow */
177 bfd_elf_generic_reloc, /* special_function */
178 "R_ARM_ABS12", /* name */
179 FALSE, /* partial_inplace */
180 0x00000fff, /* src_mask */
181 0x00000fff, /* dst_mask */
182 FALSE), /* pcrel_offset */
183
184 HOWTO (R_ARM_THM_ABS5, /* type */
185 6, /* rightshift */
186 1, /* size (0 = byte, 1 = short, 2 = long) */
187 5, /* bitsize */
188 FALSE, /* pc_relative */
189 0, /* bitpos */
190 complain_overflow_bitfield,/* complain_on_overflow */
191 bfd_elf_generic_reloc, /* special_function */
192 "R_ARM_THM_ABS5", /* name */
193 FALSE, /* partial_inplace */
194 0x000007e0, /* src_mask */
195 0x000007e0, /* dst_mask */
196 FALSE), /* pcrel_offset */
197
198 /* 8 bit absolute */
199 HOWTO (R_ARM_ABS8, /* type */
200 0, /* rightshift */
201 0, /* size (0 = byte, 1 = short, 2 = long) */
202 8, /* bitsize */
203 FALSE, /* pc_relative */
204 0, /* bitpos */
205 complain_overflow_bitfield,/* complain_on_overflow */
206 bfd_elf_generic_reloc, /* special_function */
207 "R_ARM_ABS8", /* name */
208 FALSE, /* partial_inplace */
209 0x000000ff, /* src_mask */
210 0x000000ff, /* dst_mask */
211 FALSE), /* pcrel_offset */
212
213 HOWTO (R_ARM_SBREL32, /* type */
214 0, /* rightshift */
215 2, /* size (0 = byte, 1 = short, 2 = long) */
216 32, /* bitsize */
217 FALSE, /* pc_relative */
218 0, /* bitpos */
219 complain_overflow_dont,/* complain_on_overflow */
220 bfd_elf_generic_reloc, /* special_function */
221 "R_ARM_SBREL32", /* name */
222 FALSE, /* partial_inplace */
223 0xffffffff, /* src_mask */
224 0xffffffff, /* dst_mask */
225 FALSE), /* pcrel_offset */
226
227 HOWTO (R_ARM_THM_CALL, /* type */
228 1, /* rightshift */
229 2, /* size (0 = byte, 1 = short, 2 = long) */
230 24, /* bitsize */
231 TRUE, /* pc_relative */
232 0, /* bitpos */
233 complain_overflow_signed,/* complain_on_overflow */
234 bfd_elf_generic_reloc, /* special_function */
235 "R_ARM_THM_CALL", /* name */
236 FALSE, /* partial_inplace */
237 0x07ff2fff, /* src_mask */
238 0x07ff2fff, /* dst_mask */
239 TRUE), /* pcrel_offset */
240
241 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* rightshift */
243 1, /* size (0 = byte, 1 = short, 2 = long) */
244 8, /* bitsize */
245 TRUE, /* pc_relative */
246 0, /* bitpos */
247 complain_overflow_signed,/* complain_on_overflow */
248 bfd_elf_generic_reloc, /* special_function */
249 "R_ARM_THM_PC8", /* name */
250 FALSE, /* partial_inplace */
251 0x000000ff, /* src_mask */
252 0x000000ff, /* dst_mask */
253 TRUE), /* pcrel_offset */
254
255 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* rightshift */
257 1, /* size (0 = byte, 1 = short, 2 = long) */
258 32, /* bitsize */
259 FALSE, /* pc_relative */
260 0, /* bitpos */
261 complain_overflow_signed,/* complain_on_overflow */
262 bfd_elf_generic_reloc, /* special_function */
263 "R_ARM_BREL_ADJ", /* name */
264 FALSE, /* partial_inplace */
265 0xffffffff, /* src_mask */
266 0xffffffff, /* dst_mask */
267 FALSE), /* pcrel_offset */
268
269 HOWTO (R_ARM_TLS_DESC, /* type */
270 0, /* rightshift */
271 2, /* size (0 = byte, 1 = short, 2 = long) */
272 32, /* bitsize */
273 FALSE, /* pc_relative */
274 0, /* bitpos */
275 complain_overflow_bitfield,/* complain_on_overflow */
276 bfd_elf_generic_reloc, /* special_function */
277 "R_ARM_TLS_DESC", /* name */
278 FALSE, /* partial_inplace */
279 0xffffffff, /* src_mask */
280 0xffffffff, /* dst_mask */
281 FALSE), /* pcrel_offset */
282
283 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* rightshift */
285 0, /* size (0 = byte, 1 = short, 2 = long) */
286 0, /* bitsize */
287 FALSE, /* pc_relative */
288 0, /* bitpos */
289 complain_overflow_signed,/* complain_on_overflow */
290 bfd_elf_generic_reloc, /* special_function */
291 "R_ARM_SWI8", /* name */
292 FALSE, /* partial_inplace */
293 0x00000000, /* src_mask */
294 0x00000000, /* dst_mask */
295 FALSE), /* pcrel_offset */
296
297 /* BLX instruction for the ARM. */
298 HOWTO (R_ARM_XPC25, /* type */
299 2, /* rightshift */
300 2, /* size (0 = byte, 1 = short, 2 = long) */
301 24, /* bitsize */
302 TRUE, /* pc_relative */
303 0, /* bitpos */
304 complain_overflow_signed,/* complain_on_overflow */
305 bfd_elf_generic_reloc, /* special_function */
306 "R_ARM_XPC25", /* name */
307 FALSE, /* partial_inplace */
308 0x00ffffff, /* src_mask */
309 0x00ffffff, /* dst_mask */
310 TRUE), /* pcrel_offset */
311
312 /* BLX instruction for the Thumb. */
313 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* rightshift */
315 2, /* size (0 = byte, 1 = short, 2 = long) */
316 24, /* bitsize */
317 TRUE, /* pc_relative */
318 0, /* bitpos */
319 complain_overflow_signed,/* complain_on_overflow */
320 bfd_elf_generic_reloc, /* special_function */
321 "R_ARM_THM_XPC22", /* name */
322 FALSE, /* partial_inplace */
323 0x07ff2fff, /* src_mask */
324 0x07ff2fff, /* dst_mask */
325 TRUE), /* pcrel_offset */
326
327 /* Dynamic TLS relocations. */
328
329 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 0, /* rightshift */
331 2, /* size (0 = byte, 1 = short, 2 = long) */
332 32, /* bitsize */
333 FALSE, /* pc_relative */
334 0, /* bitpos */
335 complain_overflow_bitfield,/* complain_on_overflow */
336 bfd_elf_generic_reloc, /* special_function */
337 "R_ARM_TLS_DTPMOD32", /* name */
338 TRUE, /* partial_inplace */
339 0xffffffff, /* src_mask */
340 0xffffffff, /* dst_mask */
341 FALSE), /* pcrel_offset */
342
343 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 0, /* rightshift */
345 2, /* size (0 = byte, 1 = short, 2 = long) */
346 32, /* bitsize */
347 FALSE, /* pc_relative */
348 0, /* bitpos */
349 complain_overflow_bitfield,/* complain_on_overflow */
350 bfd_elf_generic_reloc, /* special_function */
351 "R_ARM_TLS_DTPOFF32", /* name */
352 TRUE, /* partial_inplace */
353 0xffffffff, /* src_mask */
354 0xffffffff, /* dst_mask */
355 FALSE), /* pcrel_offset */
356
357 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 0, /* rightshift */
359 2, /* size (0 = byte, 1 = short, 2 = long) */
360 32, /* bitsize */
361 FALSE, /* pc_relative */
362 0, /* bitpos */
363 complain_overflow_bitfield,/* complain_on_overflow */
364 bfd_elf_generic_reloc, /* special_function */
365 "R_ARM_TLS_TPOFF32", /* name */
366 TRUE, /* partial_inplace */
367 0xffffffff, /* src_mask */
368 0xffffffff, /* dst_mask */
369 FALSE), /* pcrel_offset */
370
371 /* Relocs used in ARM Linux */
372
373 HOWTO (R_ARM_COPY, /* type */
374 0, /* rightshift */
375 2, /* size (0 = byte, 1 = short, 2 = long) */
376 32, /* bitsize */
377 FALSE, /* pc_relative */
378 0, /* bitpos */
379 complain_overflow_bitfield,/* complain_on_overflow */
380 bfd_elf_generic_reloc, /* special_function */
381 "R_ARM_COPY", /* name */
382 TRUE, /* partial_inplace */
383 0xffffffff, /* src_mask */
384 0xffffffff, /* dst_mask */
385 FALSE), /* pcrel_offset */
386
387 HOWTO (R_ARM_GLOB_DAT, /* type */
388 0, /* rightshift */
389 2, /* size (0 = byte, 1 = short, 2 = long) */
390 32, /* bitsize */
391 FALSE, /* pc_relative */
392 0, /* bitpos */
393 complain_overflow_bitfield,/* complain_on_overflow */
394 bfd_elf_generic_reloc, /* special_function */
395 "R_ARM_GLOB_DAT", /* name */
396 TRUE, /* partial_inplace */
397 0xffffffff, /* src_mask */
398 0xffffffff, /* dst_mask */
399 FALSE), /* pcrel_offset */
400
401 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 0, /* rightshift */
403 2, /* size (0 = byte, 1 = short, 2 = long) */
404 32, /* bitsize */
405 FALSE, /* pc_relative */
406 0, /* bitpos */
407 complain_overflow_bitfield,/* complain_on_overflow */
408 bfd_elf_generic_reloc, /* special_function */
409 "R_ARM_JUMP_SLOT", /* name */
410 TRUE, /* partial_inplace */
411 0xffffffff, /* src_mask */
412 0xffffffff, /* dst_mask */
413 FALSE), /* pcrel_offset */
414
415 HOWTO (R_ARM_RELATIVE, /* type */
416 0, /* rightshift */
417 2, /* size (0 = byte, 1 = short, 2 = long) */
418 32, /* bitsize */
419 FALSE, /* pc_relative */
420 0, /* bitpos */
421 complain_overflow_bitfield,/* complain_on_overflow */
422 bfd_elf_generic_reloc, /* special_function */
423 "R_ARM_RELATIVE", /* name */
424 TRUE, /* partial_inplace */
425 0xffffffff, /* src_mask */
426 0xffffffff, /* dst_mask */
427 FALSE), /* pcrel_offset */
428
429 HOWTO (R_ARM_GOTOFF32, /* type */
430 0, /* rightshift */
431 2, /* size (0 = byte, 1 = short, 2 = long) */
432 32, /* bitsize */
433 FALSE, /* pc_relative */
434 0, /* bitpos */
435 complain_overflow_bitfield,/* complain_on_overflow */
436 bfd_elf_generic_reloc, /* special_function */
437 "R_ARM_GOTOFF32", /* name */
438 TRUE, /* partial_inplace */
439 0xffffffff, /* src_mask */
440 0xffffffff, /* dst_mask */
441 FALSE), /* pcrel_offset */
442
443 HOWTO (R_ARM_GOTPC, /* type */
444 0, /* rightshift */
445 2, /* size (0 = byte, 1 = short, 2 = long) */
446 32, /* bitsize */
447 TRUE, /* pc_relative */
448 0, /* bitpos */
449 complain_overflow_bitfield,/* complain_on_overflow */
450 bfd_elf_generic_reloc, /* special_function */
451 "R_ARM_GOTPC", /* name */
452 TRUE, /* partial_inplace */
453 0xffffffff, /* src_mask */
454 0xffffffff, /* dst_mask */
455 TRUE), /* pcrel_offset */
456
457 HOWTO (R_ARM_GOT32, /* type */
458 0, /* rightshift */
459 2, /* size (0 = byte, 1 = short, 2 = long) */
460 32, /* bitsize */
461 FALSE, /* pc_relative */
462 0, /* bitpos */
463 complain_overflow_bitfield,/* complain_on_overflow */
464 bfd_elf_generic_reloc, /* special_function */
465 "R_ARM_GOT32", /* name */
466 TRUE, /* partial_inplace */
467 0xffffffff, /* src_mask */
468 0xffffffff, /* dst_mask */
469 FALSE), /* pcrel_offset */
470
471 HOWTO (R_ARM_PLT32, /* type */
472 2, /* rightshift */
473 2, /* size (0 = byte, 1 = short, 2 = long) */
474 24, /* bitsize */
475 TRUE, /* pc_relative */
476 0, /* bitpos */
477 complain_overflow_bitfield,/* complain_on_overflow */
478 bfd_elf_generic_reloc, /* special_function */
479 "R_ARM_PLT32", /* name */
480 FALSE, /* partial_inplace */
481 0x00ffffff, /* src_mask */
482 0x00ffffff, /* dst_mask */
483 TRUE), /* pcrel_offset */
484
485 HOWTO (R_ARM_CALL, /* type */
486 2, /* rightshift */
487 2, /* size (0 = byte, 1 = short, 2 = long) */
488 24, /* bitsize */
489 TRUE, /* pc_relative */
490 0, /* bitpos */
491 complain_overflow_signed,/* complain_on_overflow */
492 bfd_elf_generic_reloc, /* special_function */
493 "R_ARM_CALL", /* name */
494 FALSE, /* partial_inplace */
495 0x00ffffff, /* src_mask */
496 0x00ffffff, /* dst_mask */
497 TRUE), /* pcrel_offset */
498
499 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* rightshift */
501 2, /* size (0 = byte, 1 = short, 2 = long) */
502 24, /* bitsize */
503 TRUE, /* pc_relative */
504 0, /* bitpos */
505 complain_overflow_signed,/* complain_on_overflow */
506 bfd_elf_generic_reloc, /* special_function */
507 "R_ARM_JUMP24", /* name */
508 FALSE, /* partial_inplace */
509 0x00ffffff, /* src_mask */
510 0x00ffffff, /* dst_mask */
511 TRUE), /* pcrel_offset */
512
513 HOWTO (R_ARM_THM_JUMP24, /* type */
514 1, /* rightshift */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
516 24, /* bitsize */
517 TRUE, /* pc_relative */
518 0, /* bitpos */
519 complain_overflow_signed,/* complain_on_overflow */
520 bfd_elf_generic_reloc, /* special_function */
521 "R_ARM_THM_JUMP24", /* name */
522 FALSE, /* partial_inplace */
523 0x07ff2fff, /* src_mask */
524 0x07ff2fff, /* dst_mask */
525 TRUE), /* pcrel_offset */
526
527 HOWTO (R_ARM_BASE_ABS, /* type */
528 0, /* rightshift */
529 2, /* size (0 = byte, 1 = short, 2 = long) */
530 32, /* bitsize */
531 FALSE, /* pc_relative */
532 0, /* bitpos */
533 complain_overflow_dont,/* complain_on_overflow */
534 bfd_elf_generic_reloc, /* special_function */
535 "R_ARM_BASE_ABS", /* name */
536 FALSE, /* partial_inplace */
537 0xffffffff, /* src_mask */
538 0xffffffff, /* dst_mask */
539 FALSE), /* pcrel_offset */
540
541 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 0, /* rightshift */
543 2, /* size (0 = byte, 1 = short, 2 = long) */
544 12, /* bitsize */
545 TRUE, /* pc_relative */
546 0, /* bitpos */
547 complain_overflow_dont,/* complain_on_overflow */
548 bfd_elf_generic_reloc, /* special_function */
549 "R_ARM_ALU_PCREL_7_0", /* name */
550 FALSE, /* partial_inplace */
551 0x00000fff, /* src_mask */
552 0x00000fff, /* dst_mask */
553 TRUE), /* pcrel_offset */
554
555 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 0, /* rightshift */
557 2, /* size (0 = byte, 1 = short, 2 = long) */
558 12, /* bitsize */
559 TRUE, /* pc_relative */
560 8, /* bitpos */
561 complain_overflow_dont,/* complain_on_overflow */
562 bfd_elf_generic_reloc, /* special_function */
563 "R_ARM_ALU_PCREL_15_8",/* name */
564 FALSE, /* partial_inplace */
565 0x00000fff, /* src_mask */
566 0x00000fff, /* dst_mask */
567 TRUE), /* pcrel_offset */
568
569 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 0, /* rightshift */
571 2, /* size (0 = byte, 1 = short, 2 = long) */
572 12, /* bitsize */
573 TRUE, /* pc_relative */
574 16, /* bitpos */
575 complain_overflow_dont,/* complain_on_overflow */
576 bfd_elf_generic_reloc, /* special_function */
577 "R_ARM_ALU_PCREL_23_15",/* name */
578 FALSE, /* partial_inplace */
579 0x00000fff, /* src_mask */
580 0x00000fff, /* dst_mask */
581 TRUE), /* pcrel_offset */
582
583 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 0, /* rightshift */
585 2, /* size (0 = byte, 1 = short, 2 = long) */
586 12, /* bitsize */
587 FALSE, /* pc_relative */
588 0, /* bitpos */
589 complain_overflow_dont,/* complain_on_overflow */
590 bfd_elf_generic_reloc, /* special_function */
591 "R_ARM_LDR_SBREL_11_0",/* name */
592 FALSE, /* partial_inplace */
593 0x00000fff, /* src_mask */
594 0x00000fff, /* dst_mask */
595 FALSE), /* pcrel_offset */
596
597 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 0, /* rightshift */
599 2, /* size (0 = byte, 1 = short, 2 = long) */
600 8, /* bitsize */
601 FALSE, /* pc_relative */
602 12, /* bitpos */
603 complain_overflow_dont,/* complain_on_overflow */
604 bfd_elf_generic_reloc, /* special_function */
605 "R_ARM_ALU_SBREL_19_12",/* name */
606 FALSE, /* partial_inplace */
607 0x000ff000, /* src_mask */
608 0x000ff000, /* dst_mask */
609 FALSE), /* pcrel_offset */
610
611 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 0, /* rightshift */
613 2, /* size (0 = byte, 1 = short, 2 = long) */
614 8, /* bitsize */
615 FALSE, /* pc_relative */
616 20, /* bitpos */
617 complain_overflow_dont,/* complain_on_overflow */
618 bfd_elf_generic_reloc, /* special_function */
619 "R_ARM_ALU_SBREL_27_20",/* name */
620 FALSE, /* partial_inplace */
621 0x0ff00000, /* src_mask */
622 0x0ff00000, /* dst_mask */
623 FALSE), /* pcrel_offset */
624
625 HOWTO (R_ARM_TARGET1, /* type */
626 0, /* rightshift */
627 2, /* size (0 = byte, 1 = short, 2 = long) */
628 32, /* bitsize */
629 FALSE, /* pc_relative */
630 0, /* bitpos */
631 complain_overflow_dont,/* complain_on_overflow */
632 bfd_elf_generic_reloc, /* special_function */
633 "R_ARM_TARGET1", /* name */
634 FALSE, /* partial_inplace */
635 0xffffffff, /* src_mask */
636 0xffffffff, /* dst_mask */
637 FALSE), /* pcrel_offset */
638
639 HOWTO (R_ARM_ROSEGREL32, /* type */
640 0, /* rightshift */
641 2, /* size (0 = byte, 1 = short, 2 = long) */
642 32, /* bitsize */
643 FALSE, /* pc_relative */
644 0, /* bitpos */
645 complain_overflow_dont,/* complain_on_overflow */
646 bfd_elf_generic_reloc, /* special_function */
647 "R_ARM_ROSEGREL32", /* name */
648 FALSE, /* partial_inplace */
649 0xffffffff, /* src_mask */
650 0xffffffff, /* dst_mask */
651 FALSE), /* pcrel_offset */
652
653 HOWTO (R_ARM_V4BX, /* type */
654 0, /* rightshift */
655 2, /* size (0 = byte, 1 = short, 2 = long) */
656 32, /* bitsize */
657 FALSE, /* pc_relative */
658 0, /* bitpos */
659 complain_overflow_dont,/* complain_on_overflow */
660 bfd_elf_generic_reloc, /* special_function */
661 "R_ARM_V4BX", /* name */
662 FALSE, /* partial_inplace */
663 0xffffffff, /* src_mask */
664 0xffffffff, /* dst_mask */
665 FALSE), /* pcrel_offset */
666
667 HOWTO (R_ARM_TARGET2, /* type */
668 0, /* rightshift */
669 2, /* size (0 = byte, 1 = short, 2 = long) */
670 32, /* bitsize */
671 FALSE, /* pc_relative */
672 0, /* bitpos */
673 complain_overflow_signed,/* complain_on_overflow */
674 bfd_elf_generic_reloc, /* special_function */
675 "R_ARM_TARGET2", /* name */
676 FALSE, /* partial_inplace */
677 0xffffffff, /* src_mask */
678 0xffffffff, /* dst_mask */
679 TRUE), /* pcrel_offset */
680
681 HOWTO (R_ARM_PREL31, /* type */
682 0, /* rightshift */
683 2, /* size (0 = byte, 1 = short, 2 = long) */
684 31, /* bitsize */
685 TRUE, /* pc_relative */
686 0, /* bitpos */
687 complain_overflow_signed,/* complain_on_overflow */
688 bfd_elf_generic_reloc, /* special_function */
689 "R_ARM_PREL31", /* name */
690 FALSE, /* partial_inplace */
691 0x7fffffff, /* src_mask */
692 0x7fffffff, /* dst_mask */
693 TRUE), /* pcrel_offset */
694
695 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 0, /* rightshift */
697 2, /* size (0 = byte, 1 = short, 2 = long) */
698 16, /* bitsize */
699 FALSE, /* pc_relative */
700 0, /* bitpos */
701 complain_overflow_dont,/* complain_on_overflow */
702 bfd_elf_generic_reloc, /* special_function */
703 "R_ARM_MOVW_ABS_NC", /* name */
704 FALSE, /* partial_inplace */
705 0x000f0fff, /* src_mask */
706 0x000f0fff, /* dst_mask */
707 FALSE), /* pcrel_offset */
708
709 HOWTO (R_ARM_MOVT_ABS, /* type */
710 0, /* rightshift */
711 2, /* size (0 = byte, 1 = short, 2 = long) */
712 16, /* bitsize */
713 FALSE, /* pc_relative */
714 0, /* bitpos */
715 complain_overflow_bitfield,/* complain_on_overflow */
716 bfd_elf_generic_reloc, /* special_function */
717 "R_ARM_MOVT_ABS", /* name */
718 FALSE, /* partial_inplace */
719 0x000f0fff, /* src_mask */
720 0x000f0fff, /* dst_mask */
721 FALSE), /* pcrel_offset */
722
723 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 0, /* rightshift */
725 2, /* size (0 = byte, 1 = short, 2 = long) */
726 16, /* bitsize */
727 TRUE, /* pc_relative */
728 0, /* bitpos */
729 complain_overflow_dont,/* complain_on_overflow */
730 bfd_elf_generic_reloc, /* special_function */
731 "R_ARM_MOVW_PREL_NC", /* name */
732 FALSE, /* partial_inplace */
733 0x000f0fff, /* src_mask */
734 0x000f0fff, /* dst_mask */
735 TRUE), /* pcrel_offset */
736
737 HOWTO (R_ARM_MOVT_PREL, /* type */
738 0, /* rightshift */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
740 16, /* bitsize */
741 TRUE, /* pc_relative */
742 0, /* bitpos */
743 complain_overflow_bitfield,/* complain_on_overflow */
744 bfd_elf_generic_reloc, /* special_function */
745 "R_ARM_MOVT_PREL", /* name */
746 FALSE, /* partial_inplace */
747 0x000f0fff, /* src_mask */
748 0x000f0fff, /* dst_mask */
749 TRUE), /* pcrel_offset */
750
751 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 0, /* rightshift */
753 2, /* size (0 = byte, 1 = short, 2 = long) */
754 16, /* bitsize */
755 FALSE, /* pc_relative */
756 0, /* bitpos */
757 complain_overflow_dont,/* complain_on_overflow */
758 bfd_elf_generic_reloc, /* special_function */
759 "R_ARM_THM_MOVW_ABS_NC",/* name */
760 FALSE, /* partial_inplace */
761 0x040f70ff, /* src_mask */
762 0x040f70ff, /* dst_mask */
763 FALSE), /* pcrel_offset */
764
765 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 0, /* rightshift */
767 2, /* size (0 = byte, 1 = short, 2 = long) */
768 16, /* bitsize */
769 FALSE, /* pc_relative */
770 0, /* bitpos */
771 complain_overflow_bitfield,/* complain_on_overflow */
772 bfd_elf_generic_reloc, /* special_function */
773 "R_ARM_THM_MOVT_ABS", /* name */
774 FALSE, /* partial_inplace */
775 0x040f70ff, /* src_mask */
776 0x040f70ff, /* dst_mask */
777 FALSE), /* pcrel_offset */
778
779 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 0, /* rightshift */
781 2, /* size (0 = byte, 1 = short, 2 = long) */
782 16, /* bitsize */
783 TRUE, /* pc_relative */
784 0, /* bitpos */
785 complain_overflow_dont,/* complain_on_overflow */
786 bfd_elf_generic_reloc, /* special_function */
787 "R_ARM_THM_MOVW_PREL_NC",/* name */
788 FALSE, /* partial_inplace */
789 0x040f70ff, /* src_mask */
790 0x040f70ff, /* dst_mask */
791 TRUE), /* pcrel_offset */
792
793 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 0, /* rightshift */
795 2, /* size (0 = byte, 1 = short, 2 = long) */
796 16, /* bitsize */
797 TRUE, /* pc_relative */
798 0, /* bitpos */
799 complain_overflow_bitfield,/* complain_on_overflow */
800 bfd_elf_generic_reloc, /* special_function */
801 "R_ARM_THM_MOVT_PREL", /* name */
802 FALSE, /* partial_inplace */
803 0x040f70ff, /* src_mask */
804 0x040f70ff, /* dst_mask */
805 TRUE), /* pcrel_offset */
806
807 HOWTO (R_ARM_THM_JUMP19, /* type */
808 1, /* rightshift */
809 2, /* size (0 = byte, 1 = short, 2 = long) */
810 19, /* bitsize */
811 TRUE, /* pc_relative */
812 0, /* bitpos */
813 complain_overflow_signed,/* complain_on_overflow */
814 bfd_elf_generic_reloc, /* special_function */
815 "R_ARM_THM_JUMP19", /* name */
816 FALSE, /* partial_inplace */
817 0x043f2fff, /* src_mask */
818 0x043f2fff, /* dst_mask */
819 TRUE), /* pcrel_offset */
820
821 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* rightshift */
823 1, /* size (0 = byte, 1 = short, 2 = long) */
824 6, /* bitsize */
825 TRUE, /* pc_relative */
826 0, /* bitpos */
827 complain_overflow_unsigned,/* complain_on_overflow */
828 bfd_elf_generic_reloc, /* special_function */
829 "R_ARM_THM_JUMP6", /* name */
830 FALSE, /* partial_inplace */
831 0x02f8, /* src_mask */
832 0x02f8, /* dst_mask */
833 TRUE), /* pcrel_offset */
834
835 /* These are declared as 13-bit signed relocations because we can
836 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 versa. */
838 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 0, /* rightshift */
840 2, /* size (0 = byte, 1 = short, 2 = long) */
841 13, /* bitsize */
842 TRUE, /* pc_relative */
843 0, /* bitpos */
844 complain_overflow_dont,/* complain_on_overflow */
845 bfd_elf_generic_reloc, /* special_function */
846 "R_ARM_THM_ALU_PREL_11_0",/* name */
847 FALSE, /* partial_inplace */
848 0xffffffff, /* src_mask */
849 0xffffffff, /* dst_mask */
850 TRUE), /* pcrel_offset */
851
852 HOWTO (R_ARM_THM_PC12, /* type */
853 0, /* rightshift */
854 2, /* size (0 = byte, 1 = short, 2 = long) */
855 13, /* bitsize */
856 TRUE, /* pc_relative */
857 0, /* bitpos */
858 complain_overflow_dont,/* complain_on_overflow */
859 bfd_elf_generic_reloc, /* special_function */
860 "R_ARM_THM_PC12", /* name */
861 FALSE, /* partial_inplace */
862 0xffffffff, /* src_mask */
863 0xffffffff, /* dst_mask */
864 TRUE), /* pcrel_offset */
865
866 HOWTO (R_ARM_ABS32_NOI, /* type */
867 0, /* rightshift */
868 2, /* size (0 = byte, 1 = short, 2 = long) */
869 32, /* bitsize */
870 FALSE, /* pc_relative */
871 0, /* bitpos */
872 complain_overflow_dont,/* complain_on_overflow */
873 bfd_elf_generic_reloc, /* special_function */
874 "R_ARM_ABS32_NOI", /* name */
875 FALSE, /* partial_inplace */
876 0xffffffff, /* src_mask */
877 0xffffffff, /* dst_mask */
878 FALSE), /* pcrel_offset */
879
880 HOWTO (R_ARM_REL32_NOI, /* type */
881 0, /* rightshift */
882 2, /* size (0 = byte, 1 = short, 2 = long) */
883 32, /* bitsize */
884 TRUE, /* pc_relative */
885 0, /* bitpos */
886 complain_overflow_dont,/* complain_on_overflow */
887 bfd_elf_generic_reloc, /* special_function */
888 "R_ARM_REL32_NOI", /* name */
889 FALSE, /* partial_inplace */
890 0xffffffff, /* src_mask */
891 0xffffffff, /* dst_mask */
892 FALSE), /* pcrel_offset */
893
894 /* Group relocations. */
895
896 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 0, /* rightshift */
898 2, /* size (0 = byte, 1 = short, 2 = long) */
899 32, /* bitsize */
900 TRUE, /* pc_relative */
901 0, /* bitpos */
902 complain_overflow_dont,/* complain_on_overflow */
903 bfd_elf_generic_reloc, /* special_function */
904 "R_ARM_ALU_PC_G0_NC", /* name */
905 FALSE, /* partial_inplace */
906 0xffffffff, /* src_mask */
907 0xffffffff, /* dst_mask */
908 TRUE), /* pcrel_offset */
909
910 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 0, /* rightshift */
912 2, /* size (0 = byte, 1 = short, 2 = long) */
913 32, /* bitsize */
914 TRUE, /* pc_relative */
915 0, /* bitpos */
916 complain_overflow_dont,/* complain_on_overflow */
917 bfd_elf_generic_reloc, /* special_function */
918 "R_ARM_ALU_PC_G0", /* name */
919 FALSE, /* partial_inplace */
920 0xffffffff, /* src_mask */
921 0xffffffff, /* dst_mask */
922 TRUE), /* pcrel_offset */
923
924 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 0, /* rightshift */
926 2, /* size (0 = byte, 1 = short, 2 = long) */
927 32, /* bitsize */
928 TRUE, /* pc_relative */
929 0, /* bitpos */
930 complain_overflow_dont,/* complain_on_overflow */
931 bfd_elf_generic_reloc, /* special_function */
932 "R_ARM_ALU_PC_G1_NC", /* name */
933 FALSE, /* partial_inplace */
934 0xffffffff, /* src_mask */
935 0xffffffff, /* dst_mask */
936 TRUE), /* pcrel_offset */
937
938 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 0, /* rightshift */
940 2, /* size (0 = byte, 1 = short, 2 = long) */
941 32, /* bitsize */
942 TRUE, /* pc_relative */
943 0, /* bitpos */
944 complain_overflow_dont,/* complain_on_overflow */
945 bfd_elf_generic_reloc, /* special_function */
946 "R_ARM_ALU_PC_G1", /* name */
947 FALSE, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 TRUE), /* pcrel_offset */
951
952 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 0, /* rightshift */
954 2, /* size (0 = byte, 1 = short, 2 = long) */
955 32, /* bitsize */
956 TRUE, /* pc_relative */
957 0, /* bitpos */
958 complain_overflow_dont,/* complain_on_overflow */
959 bfd_elf_generic_reloc, /* special_function */
960 "R_ARM_ALU_PC_G2", /* name */
961 FALSE, /* partial_inplace */
962 0xffffffff, /* src_mask */
963 0xffffffff, /* dst_mask */
964 TRUE), /* pcrel_offset */
965
966 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 0, /* rightshift */
968 2, /* size (0 = byte, 1 = short, 2 = long) */
969 32, /* bitsize */
970 TRUE, /* pc_relative */
971 0, /* bitpos */
972 complain_overflow_dont,/* complain_on_overflow */
973 bfd_elf_generic_reloc, /* special_function */
974 "R_ARM_LDR_PC_G1", /* name */
975 FALSE, /* partial_inplace */
976 0xffffffff, /* src_mask */
977 0xffffffff, /* dst_mask */
978 TRUE), /* pcrel_offset */
979
980 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 0, /* rightshift */
982 2, /* size (0 = byte, 1 = short, 2 = long) */
983 32, /* bitsize */
984 TRUE, /* pc_relative */
985 0, /* bitpos */
986 complain_overflow_dont,/* complain_on_overflow */
987 bfd_elf_generic_reloc, /* special_function */
988 "R_ARM_LDR_PC_G2", /* name */
989 FALSE, /* partial_inplace */
990 0xffffffff, /* src_mask */
991 0xffffffff, /* dst_mask */
992 TRUE), /* pcrel_offset */
993
994 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 0, /* rightshift */
996 2, /* size (0 = byte, 1 = short, 2 = long) */
997 32, /* bitsize */
998 TRUE, /* pc_relative */
999 0, /* bitpos */
1000 complain_overflow_dont,/* complain_on_overflow */
1001 bfd_elf_generic_reloc, /* special_function */
1002 "R_ARM_LDRS_PC_G0", /* name */
1003 FALSE, /* partial_inplace */
1004 0xffffffff, /* src_mask */
1005 0xffffffff, /* dst_mask */
1006 TRUE), /* pcrel_offset */
1007
1008 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 0, /* rightshift */
1010 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 32, /* bitsize */
1012 TRUE, /* pc_relative */
1013 0, /* bitpos */
1014 complain_overflow_dont,/* complain_on_overflow */
1015 bfd_elf_generic_reloc, /* special_function */
1016 "R_ARM_LDRS_PC_G1", /* name */
1017 FALSE, /* partial_inplace */
1018 0xffffffff, /* src_mask */
1019 0xffffffff, /* dst_mask */
1020 TRUE), /* pcrel_offset */
1021
1022 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 0, /* rightshift */
1024 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 32, /* bitsize */
1026 TRUE, /* pc_relative */
1027 0, /* bitpos */
1028 complain_overflow_dont,/* complain_on_overflow */
1029 bfd_elf_generic_reloc, /* special_function */
1030 "R_ARM_LDRS_PC_G2", /* name */
1031 FALSE, /* partial_inplace */
1032 0xffffffff, /* src_mask */
1033 0xffffffff, /* dst_mask */
1034 TRUE), /* pcrel_offset */
1035
1036 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 0, /* rightshift */
1038 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 32, /* bitsize */
1040 TRUE, /* pc_relative */
1041 0, /* bitpos */
1042 complain_overflow_dont,/* complain_on_overflow */
1043 bfd_elf_generic_reloc, /* special_function */
1044 "R_ARM_LDC_PC_G0", /* name */
1045 FALSE, /* partial_inplace */
1046 0xffffffff, /* src_mask */
1047 0xffffffff, /* dst_mask */
1048 TRUE), /* pcrel_offset */
1049
1050 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 0, /* rightshift */
1052 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 32, /* bitsize */
1054 TRUE, /* pc_relative */
1055 0, /* bitpos */
1056 complain_overflow_dont,/* complain_on_overflow */
1057 bfd_elf_generic_reloc, /* special_function */
1058 "R_ARM_LDC_PC_G1", /* name */
1059 FALSE, /* partial_inplace */
1060 0xffffffff, /* src_mask */
1061 0xffffffff, /* dst_mask */
1062 TRUE), /* pcrel_offset */
1063
1064 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 0, /* rightshift */
1066 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 32, /* bitsize */
1068 TRUE, /* pc_relative */
1069 0, /* bitpos */
1070 complain_overflow_dont,/* complain_on_overflow */
1071 bfd_elf_generic_reloc, /* special_function */
1072 "R_ARM_LDC_PC_G2", /* name */
1073 FALSE, /* partial_inplace */
1074 0xffffffff, /* src_mask */
1075 0xffffffff, /* dst_mask */
1076 TRUE), /* pcrel_offset */
1077
1078 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 0, /* rightshift */
1080 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 32, /* bitsize */
1082 TRUE, /* pc_relative */
1083 0, /* bitpos */
1084 complain_overflow_dont,/* complain_on_overflow */
1085 bfd_elf_generic_reloc, /* special_function */
1086 "R_ARM_ALU_SB_G0_NC", /* name */
1087 FALSE, /* partial_inplace */
1088 0xffffffff, /* src_mask */
1089 0xffffffff, /* dst_mask */
1090 TRUE), /* pcrel_offset */
1091
1092 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 0, /* rightshift */
1094 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 32, /* bitsize */
1096 TRUE, /* pc_relative */
1097 0, /* bitpos */
1098 complain_overflow_dont,/* complain_on_overflow */
1099 bfd_elf_generic_reloc, /* special_function */
1100 "R_ARM_ALU_SB_G0", /* name */
1101 FALSE, /* partial_inplace */
1102 0xffffffff, /* src_mask */
1103 0xffffffff, /* dst_mask */
1104 TRUE), /* pcrel_offset */
1105
1106 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 0, /* rightshift */
1108 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 32, /* bitsize */
1110 TRUE, /* pc_relative */
1111 0, /* bitpos */
1112 complain_overflow_dont,/* complain_on_overflow */
1113 bfd_elf_generic_reloc, /* special_function */
1114 "R_ARM_ALU_SB_G1_NC", /* name */
1115 FALSE, /* partial_inplace */
1116 0xffffffff, /* src_mask */
1117 0xffffffff, /* dst_mask */
1118 TRUE), /* pcrel_offset */
1119
1120 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 0, /* rightshift */
1122 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 32, /* bitsize */
1124 TRUE, /* pc_relative */
1125 0, /* bitpos */
1126 complain_overflow_dont,/* complain_on_overflow */
1127 bfd_elf_generic_reloc, /* special_function */
1128 "R_ARM_ALU_SB_G1", /* name */
1129 FALSE, /* partial_inplace */
1130 0xffffffff, /* src_mask */
1131 0xffffffff, /* dst_mask */
1132 TRUE), /* pcrel_offset */
1133
1134 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 0, /* rightshift */
1136 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 32, /* bitsize */
1138 TRUE, /* pc_relative */
1139 0, /* bitpos */
1140 complain_overflow_dont,/* complain_on_overflow */
1141 bfd_elf_generic_reloc, /* special_function */
1142 "R_ARM_ALU_SB_G2", /* name */
1143 FALSE, /* partial_inplace */
1144 0xffffffff, /* src_mask */
1145 0xffffffff, /* dst_mask */
1146 TRUE), /* pcrel_offset */
1147
1148 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 0, /* rightshift */
1150 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 32, /* bitsize */
1152 TRUE, /* pc_relative */
1153 0, /* bitpos */
1154 complain_overflow_dont,/* complain_on_overflow */
1155 bfd_elf_generic_reloc, /* special_function */
1156 "R_ARM_LDR_SB_G0", /* name */
1157 FALSE, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 TRUE), /* pcrel_offset */
1161
1162 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 0, /* rightshift */
1164 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 32, /* bitsize */
1166 TRUE, /* pc_relative */
1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 bfd_elf_generic_reloc, /* special_function */
1170 "R_ARM_LDR_SB_G1", /* name */
1171 FALSE, /* partial_inplace */
1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
1174 TRUE), /* pcrel_offset */
1175
1176 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 0, /* rightshift */
1178 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 32, /* bitsize */
1180 TRUE, /* pc_relative */
1181 0, /* bitpos */
1182 complain_overflow_dont,/* complain_on_overflow */
1183 bfd_elf_generic_reloc, /* special_function */
1184 "R_ARM_LDR_SB_G2", /* name */
1185 FALSE, /* partial_inplace */
1186 0xffffffff, /* src_mask */
1187 0xffffffff, /* dst_mask */
1188 TRUE), /* pcrel_offset */
1189
1190 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 0, /* rightshift */
1192 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 32, /* bitsize */
1194 TRUE, /* pc_relative */
1195 0, /* bitpos */
1196 complain_overflow_dont,/* complain_on_overflow */
1197 bfd_elf_generic_reloc, /* special_function */
1198 "R_ARM_LDRS_SB_G0", /* name */
1199 FALSE, /* partial_inplace */
1200 0xffffffff, /* src_mask */
1201 0xffffffff, /* dst_mask */
1202 TRUE), /* pcrel_offset */
1203
1204 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 0, /* rightshift */
1206 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 32, /* bitsize */
1208 TRUE, /* pc_relative */
1209 0, /* bitpos */
1210 complain_overflow_dont,/* complain_on_overflow */
1211 bfd_elf_generic_reloc, /* special_function */
1212 "R_ARM_LDRS_SB_G1", /* name */
1213 FALSE, /* partial_inplace */
1214 0xffffffff, /* src_mask */
1215 0xffffffff, /* dst_mask */
1216 TRUE), /* pcrel_offset */
1217
1218 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 0, /* rightshift */
1220 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 32, /* bitsize */
1222 TRUE, /* pc_relative */
1223 0, /* bitpos */
1224 complain_overflow_dont,/* complain_on_overflow */
1225 bfd_elf_generic_reloc, /* special_function */
1226 "R_ARM_LDRS_SB_G2", /* name */
1227 FALSE, /* partial_inplace */
1228 0xffffffff, /* src_mask */
1229 0xffffffff, /* dst_mask */
1230 TRUE), /* pcrel_offset */
1231
1232 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 0, /* rightshift */
1234 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 32, /* bitsize */
1236 TRUE, /* pc_relative */
1237 0, /* bitpos */
1238 complain_overflow_dont,/* complain_on_overflow */
1239 bfd_elf_generic_reloc, /* special_function */
1240 "R_ARM_LDC_SB_G0", /* name */
1241 FALSE, /* partial_inplace */
1242 0xffffffff, /* src_mask */
1243 0xffffffff, /* dst_mask */
1244 TRUE), /* pcrel_offset */
1245
1246 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 0, /* rightshift */
1248 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 32, /* bitsize */
1250 TRUE, /* pc_relative */
1251 0, /* bitpos */
1252 complain_overflow_dont,/* complain_on_overflow */
1253 bfd_elf_generic_reloc, /* special_function */
1254 "R_ARM_LDC_SB_G1", /* name */
1255 FALSE, /* partial_inplace */
1256 0xffffffff, /* src_mask */
1257 0xffffffff, /* dst_mask */
1258 TRUE), /* pcrel_offset */
1259
1260 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 0, /* rightshift */
1262 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 32, /* bitsize */
1264 TRUE, /* pc_relative */
1265 0, /* bitpos */
1266 complain_overflow_dont,/* complain_on_overflow */
1267 bfd_elf_generic_reloc, /* special_function */
1268 "R_ARM_LDC_SB_G2", /* name */
1269 FALSE, /* partial_inplace */
1270 0xffffffff, /* src_mask */
1271 0xffffffff, /* dst_mask */
1272 TRUE), /* pcrel_offset */
1273
1274 /* End of group relocations. */
1275
1276 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 0, /* rightshift */
1278 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 16, /* bitsize */
1280 FALSE, /* pc_relative */
1281 0, /* bitpos */
1282 complain_overflow_dont,/* complain_on_overflow */
1283 bfd_elf_generic_reloc, /* special_function */
1284 "R_ARM_MOVW_BREL_NC", /* name */
1285 FALSE, /* partial_inplace */
1286 0x0000ffff, /* src_mask */
1287 0x0000ffff, /* dst_mask */
1288 FALSE), /* pcrel_offset */
1289
1290 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 0, /* rightshift */
1292 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 16, /* bitsize */
1294 FALSE, /* pc_relative */
1295 0, /* bitpos */
1296 complain_overflow_bitfield,/* complain_on_overflow */
1297 bfd_elf_generic_reloc, /* special_function */
1298 "R_ARM_MOVT_BREL", /* name */
1299 FALSE, /* partial_inplace */
1300 0x0000ffff, /* src_mask */
1301 0x0000ffff, /* dst_mask */
1302 FALSE), /* pcrel_offset */
1303
1304 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 0, /* rightshift */
1306 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 16, /* bitsize */
1308 FALSE, /* pc_relative */
1309 0, /* bitpos */
1310 complain_overflow_dont,/* complain_on_overflow */
1311 bfd_elf_generic_reloc, /* special_function */
1312 "R_ARM_MOVW_BREL", /* name */
1313 FALSE, /* partial_inplace */
1314 0x0000ffff, /* src_mask */
1315 0x0000ffff, /* dst_mask */
1316 FALSE), /* pcrel_offset */
1317
1318 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 0, /* rightshift */
1320 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 16, /* bitsize */
1322 FALSE, /* pc_relative */
1323 0, /* bitpos */
1324 complain_overflow_dont,/* complain_on_overflow */
1325 bfd_elf_generic_reloc, /* special_function */
1326 "R_ARM_THM_MOVW_BREL_NC",/* name */
1327 FALSE, /* partial_inplace */
1328 0x040f70ff, /* src_mask */
1329 0x040f70ff, /* dst_mask */
1330 FALSE), /* pcrel_offset */
1331
1332 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 0, /* rightshift */
1334 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 16, /* bitsize */
1336 FALSE, /* pc_relative */
1337 0, /* bitpos */
1338 complain_overflow_bitfield,/* complain_on_overflow */
1339 bfd_elf_generic_reloc, /* special_function */
1340 "R_ARM_THM_MOVT_BREL", /* name */
1341 FALSE, /* partial_inplace */
1342 0x040f70ff, /* src_mask */
1343 0x040f70ff, /* dst_mask */
1344 FALSE), /* pcrel_offset */
1345
1346 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 0, /* rightshift */
1348 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 16, /* bitsize */
1350 FALSE, /* pc_relative */
1351 0, /* bitpos */
1352 complain_overflow_dont,/* complain_on_overflow */
1353 bfd_elf_generic_reloc, /* special_function */
1354 "R_ARM_THM_MOVW_BREL", /* name */
1355 FALSE, /* partial_inplace */
1356 0x040f70ff, /* src_mask */
1357 0x040f70ff, /* dst_mask */
1358 FALSE), /* pcrel_offset */
1359
1360 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 0, /* rightshift */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 32, /* bitsize */
1364 FALSE, /* pc_relative */
1365 0, /* bitpos */
1366 complain_overflow_bitfield,/* complain_on_overflow */
1367 NULL, /* special_function */
1368 "R_ARM_TLS_GOTDESC", /* name */
1369 TRUE, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 FALSE), /* pcrel_offset */
1373
1374 HOWTO (R_ARM_TLS_CALL, /* type */
1375 0, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 24, /* bitsize */
1378 FALSE, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_TLS_CALL", /* name */
1383 FALSE, /* partial_inplace */
1384 0x00ffffff, /* src_mask */
1385 0x00ffffff, /* dst_mask */
1386 FALSE), /* pcrel_offset */
1387
1388 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 0, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 0, /* bitsize */
1392 FALSE, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_bitfield,/* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_TLS_DESCSEQ", /* name */
1397 FALSE, /* partial_inplace */
1398 0x00000000, /* src_mask */
1399 0x00000000, /* dst_mask */
1400 FALSE), /* pcrel_offset */
1401
1402 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 0, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 24, /* bitsize */
1406 FALSE, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_dont,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_THM_TLS_CALL", /* name */
1411 FALSE, /* partial_inplace */
1412 0x07ff07ff, /* src_mask */
1413 0x07ff07ff, /* dst_mask */
1414 FALSE), /* pcrel_offset */
1415
1416 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 32, /* bitsize */
1420 FALSE, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_dont,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_PLT32_ABS", /* name */
1425 FALSE, /* partial_inplace */
1426 0xffffffff, /* src_mask */
1427 0xffffffff, /* dst_mask */
1428 FALSE), /* pcrel_offset */
1429
1430 HOWTO (R_ARM_GOT_ABS, /* type */
1431 0, /* rightshift */
1432 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 32, /* bitsize */
1434 FALSE, /* pc_relative */
1435 0, /* bitpos */
1436 complain_overflow_dont,/* complain_on_overflow */
1437 bfd_elf_generic_reloc, /* special_function */
1438 "R_ARM_GOT_ABS", /* name */
1439 FALSE, /* partial_inplace */
1440 0xffffffff, /* src_mask */
1441 0xffffffff, /* dst_mask */
1442 FALSE), /* pcrel_offset */
1443
1444 HOWTO (R_ARM_GOT_PREL, /* type */
1445 0, /* rightshift */
1446 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 32, /* bitsize */
1448 TRUE, /* pc_relative */
1449 0, /* bitpos */
1450 complain_overflow_dont, /* complain_on_overflow */
1451 bfd_elf_generic_reloc, /* special_function */
1452 "R_ARM_GOT_PREL", /* name */
1453 FALSE, /* partial_inplace */
1454 0xffffffff, /* src_mask */
1455 0xffffffff, /* dst_mask */
1456 TRUE), /* pcrel_offset */
1457
1458 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 0, /* rightshift */
1460 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 12, /* bitsize */
1462 FALSE, /* pc_relative */
1463 0, /* bitpos */
1464 complain_overflow_bitfield,/* complain_on_overflow */
1465 bfd_elf_generic_reloc, /* special_function */
1466 "R_ARM_GOT_BREL12", /* name */
1467 FALSE, /* partial_inplace */
1468 0x00000fff, /* src_mask */
1469 0x00000fff, /* dst_mask */
1470 FALSE), /* pcrel_offset */
1471
1472 HOWTO (R_ARM_GOTOFF12, /* type */
1473 0, /* rightshift */
1474 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 12, /* bitsize */
1476 FALSE, /* pc_relative */
1477 0, /* bitpos */
1478 complain_overflow_bitfield,/* complain_on_overflow */
1479 bfd_elf_generic_reloc, /* special_function */
1480 "R_ARM_GOTOFF12", /* name */
1481 FALSE, /* partial_inplace */
1482 0x00000fff, /* src_mask */
1483 0x00000fff, /* dst_mask */
1484 FALSE), /* pcrel_offset */
1485
1486 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487
1488 /* GNU extension to record C++ vtable member usage */
1489 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 0, /* rightshift */
1491 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 0, /* bitsize */
1493 FALSE, /* pc_relative */
1494 0, /* bitpos */
1495 complain_overflow_dont, /* complain_on_overflow */
1496 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1497 "R_ARM_GNU_VTENTRY", /* name */
1498 FALSE, /* partial_inplace */
1499 0, /* src_mask */
1500 0, /* dst_mask */
1501 FALSE), /* pcrel_offset */
1502
1503 /* GNU extension to record C++ vtable hierarchy */
1504 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 0, /* rightshift */
1506 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 0, /* bitsize */
1508 FALSE, /* pc_relative */
1509 0, /* bitpos */
1510 complain_overflow_dont, /* complain_on_overflow */
1511 NULL, /* special_function */
1512 "R_ARM_GNU_VTINHERIT", /* name */
1513 FALSE, /* partial_inplace */
1514 0, /* src_mask */
1515 0, /* dst_mask */
1516 FALSE), /* pcrel_offset */
1517
1518 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* rightshift */
1520 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 11, /* bitsize */
1522 TRUE, /* pc_relative */
1523 0, /* bitpos */
1524 complain_overflow_signed, /* complain_on_overflow */
1525 bfd_elf_generic_reloc, /* special_function */
1526 "R_ARM_THM_JUMP11", /* name */
1527 FALSE, /* partial_inplace */
1528 0x000007ff, /* src_mask */
1529 0x000007ff, /* dst_mask */
1530 TRUE), /* pcrel_offset */
1531
1532 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* rightshift */
1534 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 8, /* bitsize */
1536 TRUE, /* pc_relative */
1537 0, /* bitpos */
1538 complain_overflow_signed, /* complain_on_overflow */
1539 bfd_elf_generic_reloc, /* special_function */
1540 "R_ARM_THM_JUMP8", /* name */
1541 FALSE, /* partial_inplace */
1542 0x000000ff, /* src_mask */
1543 0x000000ff, /* dst_mask */
1544 TRUE), /* pcrel_offset */
1545
1546 /* TLS relocations */
1547 HOWTO (R_ARM_TLS_GD32, /* type */
1548 0, /* rightshift */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 32, /* bitsize */
1551 FALSE, /* pc_relative */
1552 0, /* bitpos */
1553 complain_overflow_bitfield,/* complain_on_overflow */
1554 NULL, /* special_function */
1555 "R_ARM_TLS_GD32", /* name */
1556 TRUE, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 FALSE), /* pcrel_offset */
1560
1561 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 0, /* rightshift */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 32, /* bitsize */
1565 FALSE, /* pc_relative */
1566 0, /* bitpos */
1567 complain_overflow_bitfield,/* complain_on_overflow */
1568 bfd_elf_generic_reloc, /* special_function */
1569 "R_ARM_TLS_LDM32", /* name */
1570 TRUE, /* partial_inplace */
1571 0xffffffff, /* src_mask */
1572 0xffffffff, /* dst_mask */
1573 FALSE), /* pcrel_offset */
1574
1575 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 0, /* rightshift */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 32, /* bitsize */
1579 FALSE, /* pc_relative */
1580 0, /* bitpos */
1581 complain_overflow_bitfield,/* complain_on_overflow */
1582 bfd_elf_generic_reloc, /* special_function */
1583 "R_ARM_TLS_LDO32", /* name */
1584 TRUE, /* partial_inplace */
1585 0xffffffff, /* src_mask */
1586 0xffffffff, /* dst_mask */
1587 FALSE), /* pcrel_offset */
1588
1589 HOWTO (R_ARM_TLS_IE32, /* type */
1590 0, /* rightshift */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 32, /* bitsize */
1593 FALSE, /* pc_relative */
1594 0, /* bitpos */
1595 complain_overflow_bitfield,/* complain_on_overflow */
1596 NULL, /* special_function */
1597 "R_ARM_TLS_IE32", /* name */
1598 TRUE, /* partial_inplace */
1599 0xffffffff, /* src_mask */
1600 0xffffffff, /* dst_mask */
1601 FALSE), /* pcrel_offset */
1602
1603 HOWTO (R_ARM_TLS_LE32, /* type */
1604 0, /* rightshift */
1605 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 32, /* bitsize */
1607 FALSE, /* pc_relative */
1608 0, /* bitpos */
1609 complain_overflow_bitfield,/* complain_on_overflow */
1610 NULL, /* special_function */
1611 "R_ARM_TLS_LE32", /* name */
1612 TRUE, /* partial_inplace */
1613 0xffffffff, /* src_mask */
1614 0xffffffff, /* dst_mask */
1615 FALSE), /* pcrel_offset */
1616
1617 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 0, /* rightshift */
1619 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 12, /* bitsize */
1621 FALSE, /* pc_relative */
1622 0, /* bitpos */
1623 complain_overflow_bitfield,/* complain_on_overflow */
1624 bfd_elf_generic_reloc, /* special_function */
1625 "R_ARM_TLS_LDO12", /* name */
1626 FALSE, /* partial_inplace */
1627 0x00000fff, /* src_mask */
1628 0x00000fff, /* dst_mask */
1629 FALSE), /* pcrel_offset */
1630
1631 HOWTO (R_ARM_TLS_LE12, /* type */
1632 0, /* rightshift */
1633 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 12, /* bitsize */
1635 FALSE, /* pc_relative */
1636 0, /* bitpos */
1637 complain_overflow_bitfield,/* complain_on_overflow */
1638 bfd_elf_generic_reloc, /* special_function */
1639 "R_ARM_TLS_LE12", /* name */
1640 FALSE, /* partial_inplace */
1641 0x00000fff, /* src_mask */
1642 0x00000fff, /* dst_mask */
1643 FALSE), /* pcrel_offset */
1644
1645 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 0, /* rightshift */
1647 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 12, /* bitsize */
1649 FALSE, /* pc_relative */
1650 0, /* bitpos */
1651 complain_overflow_bitfield,/* complain_on_overflow */
1652 bfd_elf_generic_reloc, /* special_function */
1653 "R_ARM_TLS_IE12GP", /* name */
1654 FALSE, /* partial_inplace */
1655 0x00000fff, /* src_mask */
1656 0x00000fff, /* dst_mask */
1657 FALSE), /* pcrel_offset */
1658
1659 /* 112-127 private relocations. */
1660 EMPTY_HOWTO (112),
1661 EMPTY_HOWTO (113),
1662 EMPTY_HOWTO (114),
1663 EMPTY_HOWTO (115),
1664 EMPTY_HOWTO (116),
1665 EMPTY_HOWTO (117),
1666 EMPTY_HOWTO (118),
1667 EMPTY_HOWTO (119),
1668 EMPTY_HOWTO (120),
1669 EMPTY_HOWTO (121),
1670 EMPTY_HOWTO (122),
1671 EMPTY_HOWTO (123),
1672 EMPTY_HOWTO (124),
1673 EMPTY_HOWTO (125),
1674 EMPTY_HOWTO (126),
1675 EMPTY_HOWTO (127),
1676
1677 /* R_ARM_ME_TOO, obsolete. */
1678 EMPTY_HOWTO (128),
1679
1680 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 0, /* rightshift */
1682 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 0, /* bitsize */
1684 FALSE, /* pc_relative */
1685 0, /* bitpos */
1686 complain_overflow_bitfield,/* complain_on_overflow */
1687 bfd_elf_generic_reloc, /* special_function */
1688 "R_ARM_THM_TLS_DESCSEQ",/* name */
1689 FALSE, /* partial_inplace */
1690 0x00000000, /* src_mask */
1691 0x00000000, /* dst_mask */
1692 FALSE), /* pcrel_offset */
1693 EMPTY_HOWTO (130),
1694 EMPTY_HOWTO (131),
1695 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1696 0, /* rightshift. */
1697 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 16, /* bitsize. */
1699 FALSE, /* pc_relative. */
1700 0, /* bitpos. */
1701 complain_overflow_bitfield,/* complain_on_overflow. */
1702 bfd_elf_generic_reloc, /* special_function. */
1703 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1704 FALSE, /* partial_inplace. */
1705 0x00000000, /* src_mask. */
1706 0x00000000, /* dst_mask. */
1707 FALSE), /* pcrel_offset. */
1708 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1709 0, /* rightshift. */
1710 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 16, /* bitsize. */
1712 FALSE, /* pc_relative. */
1713 0, /* bitpos. */
1714 complain_overflow_bitfield,/* complain_on_overflow. */
1715 bfd_elf_generic_reloc, /* special_function. */
1716 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1717 FALSE, /* partial_inplace. */
1718 0x00000000, /* src_mask. */
1719 0x00000000, /* dst_mask. */
1720 FALSE), /* pcrel_offset. */
1721 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1722 0, /* rightshift. */
1723 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 16, /* bitsize. */
1725 FALSE, /* pc_relative. */
1726 0, /* bitpos. */
1727 complain_overflow_bitfield,/* complain_on_overflow. */
1728 bfd_elf_generic_reloc, /* special_function. */
1729 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1730 FALSE, /* partial_inplace. */
1731 0x00000000, /* src_mask. */
1732 0x00000000, /* dst_mask. */
1733 FALSE), /* pcrel_offset. */
1734 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1735 0, /* rightshift. */
1736 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 16, /* bitsize. */
1738 FALSE, /* pc_relative. */
1739 0, /* bitpos. */
1740 complain_overflow_bitfield,/* complain_on_overflow. */
1741 bfd_elf_generic_reloc, /* special_function. */
1742 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1743 FALSE, /* partial_inplace. */
1744 0x00000000, /* src_mask. */
1745 0x00000000, /* dst_mask. */
1746 FALSE), /* pcrel_offset. */
1747 /* Relocations for Armv8.1-M Mainline. */
1748 HOWTO (R_ARM_THM_BF16, /* type. */
1749 0, /* rightshift. */
1750 1, /* size (0 = byte, 1 = short, 2 = long). */
1751 16, /* bitsize. */
1752 TRUE, /* pc_relative. */
1753 0, /* bitpos. */
1754 complain_overflow_dont,/* do not complain_on_overflow. */
1755 bfd_elf_generic_reloc, /* special_function. */
1756 "R_ARM_THM_BF16", /* name. */
1757 FALSE, /* partial_inplace. */
1758 0x001f0ffe, /* src_mask. */
1759 0x001f0ffe, /* dst_mask. */
1760 TRUE), /* pcrel_offset. */
1761 HOWTO (R_ARM_THM_BF12, /* type. */
1762 0, /* rightshift. */
1763 1, /* size (0 = byte, 1 = short, 2 = long). */
1764 12, /* bitsize. */
1765 TRUE, /* pc_relative. */
1766 0, /* bitpos. */
1767 complain_overflow_dont,/* do not complain_on_overflow. */
1768 bfd_elf_generic_reloc, /* special_function. */
1769 "R_ARM_THM_BF12", /* name. */
1770 FALSE, /* partial_inplace. */
1771 0x00010ffe, /* src_mask. */
1772 0x00010ffe, /* dst_mask. */
1773 TRUE), /* pcrel_offset. */
1774 HOWTO (R_ARM_THM_BF18, /* type. */
1775 0, /* rightshift. */
1776 1, /* size (0 = byte, 1 = short, 2 = long). */
1777 18, /* bitsize. */
1778 TRUE, /* pc_relative. */
1779 0, /* bitpos. */
1780 complain_overflow_dont,/* do not complain_on_overflow. */
1781 bfd_elf_generic_reloc, /* special_function. */
1782 "R_ARM_THM_BF18", /* name. */
1783 FALSE, /* partial_inplace. */
1784 0x007f0ffe, /* src_mask. */
1785 0x007f0ffe, /* dst_mask. */
1786 TRUE), /* pcrel_offset. */
1787 };
1788
1789 /* 160 onwards: */
1790 static reloc_howto_type elf32_arm_howto_table_2[8] =
1791 {
1792 HOWTO (R_ARM_IRELATIVE, /* type */
1793 0, /* rightshift */
1794 2, /* size (0 = byte, 1 = short, 2 = long) */
1795 32, /* bitsize */
1796 FALSE, /* pc_relative */
1797 0, /* bitpos */
1798 complain_overflow_bitfield,/* complain_on_overflow */
1799 bfd_elf_generic_reloc, /* special_function */
1800 "R_ARM_IRELATIVE", /* name */
1801 TRUE, /* partial_inplace */
1802 0xffffffff, /* src_mask */
1803 0xffffffff, /* dst_mask */
1804 FALSE), /* pcrel_offset */
1805 HOWTO (R_ARM_GOTFUNCDESC, /* type */
1806 0, /* rightshift */
1807 2, /* size (0 = byte, 1 = short, 2 = long) */
1808 32, /* bitsize */
1809 FALSE, /* pc_relative */
1810 0, /* bitpos */
1811 complain_overflow_bitfield,/* complain_on_overflow */
1812 bfd_elf_generic_reloc, /* special_function */
1813 "R_ARM_GOTFUNCDESC", /* name */
1814 FALSE, /* partial_inplace */
1815 0, /* src_mask */
1816 0xffffffff, /* dst_mask */
1817 FALSE), /* pcrel_offset */
1818 HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */
1819 0, /* rightshift */
1820 2, /* size (0 = byte, 1 = short, 2 = long) */
1821 32, /* bitsize */
1822 FALSE, /* pc_relative */
1823 0, /* bitpos */
1824 complain_overflow_bitfield,/* complain_on_overflow */
1825 bfd_elf_generic_reloc, /* special_function */
1826 "R_ARM_GOTOFFFUNCDESC",/* name */
1827 FALSE, /* partial_inplace */
1828 0, /* src_mask */
1829 0xffffffff, /* dst_mask */
1830 FALSE), /* pcrel_offset */
1831 HOWTO (R_ARM_FUNCDESC, /* type */
1832 0, /* rightshift */
1833 2, /* size (0 = byte, 1 = short, 2 = long) */
1834 32, /* bitsize */
1835 FALSE, /* pc_relative */
1836 0, /* bitpos */
1837 complain_overflow_bitfield,/* complain_on_overflow */
1838 bfd_elf_generic_reloc, /* special_function */
1839 "R_ARM_FUNCDESC", /* name */
1840 FALSE, /* partial_inplace */
1841 0, /* src_mask */
1842 0xffffffff, /* dst_mask */
1843 FALSE), /* pcrel_offset */
1844 HOWTO (R_ARM_FUNCDESC_VALUE, /* type */
1845 0, /* rightshift */
1846 2, /* size (0 = byte, 1 = short, 2 = long) */
1847 64, /* bitsize */
1848 FALSE, /* pc_relative */
1849 0, /* bitpos */
1850 complain_overflow_bitfield,/* complain_on_overflow */
1851 bfd_elf_generic_reloc, /* special_function */
1852 "R_ARM_FUNCDESC_VALUE",/* name */
1853 FALSE, /* partial_inplace */
1854 0, /* src_mask */
1855 0xffffffff, /* dst_mask */
1856 FALSE), /* pcrel_offset */
1857 HOWTO (R_ARM_TLS_GD32_FDPIC, /* type */
1858 0, /* rightshift */
1859 2, /* size (0 = byte, 1 = short, 2 = long) */
1860 32, /* bitsize */
1861 FALSE, /* pc_relative */
1862 0, /* bitpos */
1863 complain_overflow_bitfield,/* complain_on_overflow */
1864 bfd_elf_generic_reloc, /* special_function */
1865 "R_ARM_TLS_GD32_FDPIC",/* name */
1866 FALSE, /* partial_inplace */
1867 0, /* src_mask */
1868 0xffffffff, /* dst_mask */
1869 FALSE), /* pcrel_offset */
1870 HOWTO (R_ARM_TLS_LDM32_FDPIC, /* type */
1871 0, /* rightshift */
1872 2, /* size (0 = byte, 1 = short, 2 = long) */
1873 32, /* bitsize */
1874 FALSE, /* pc_relative */
1875 0, /* bitpos */
1876 complain_overflow_bitfield,/* complain_on_overflow */
1877 bfd_elf_generic_reloc, /* special_function */
1878 "R_ARM_TLS_LDM32_FDPIC",/* name */
1879 FALSE, /* partial_inplace */
1880 0, /* src_mask */
1881 0xffffffff, /* dst_mask */
1882 FALSE), /* pcrel_offset */
1883 HOWTO (R_ARM_TLS_IE32_FDPIC, /* type */
1884 0, /* rightshift */
1885 2, /* size (0 = byte, 1 = short, 2 = long) */
1886 32, /* bitsize */
1887 FALSE, /* pc_relative */
1888 0, /* bitpos */
1889 complain_overflow_bitfield,/* complain_on_overflow */
1890 bfd_elf_generic_reloc, /* special_function */
1891 "R_ARM_TLS_IE32_FDPIC",/* name */
1892 FALSE, /* partial_inplace */
1893 0, /* src_mask */
1894 0xffffffff, /* dst_mask */
1895 FALSE), /* pcrel_offset */
1896 };
1897
1898 /* 249-255 extended, currently unused, relocations: */
1899 static reloc_howto_type elf32_arm_howto_table_3[4] =
1900 {
1901 HOWTO (R_ARM_RREL32, /* type */
1902 0, /* rightshift */
1903 0, /* size (0 = byte, 1 = short, 2 = long) */
1904 0, /* bitsize */
1905 FALSE, /* pc_relative */
1906 0, /* bitpos */
1907 complain_overflow_dont,/* complain_on_overflow */
1908 bfd_elf_generic_reloc, /* special_function */
1909 "R_ARM_RREL32", /* name */
1910 FALSE, /* partial_inplace */
1911 0, /* src_mask */
1912 0, /* dst_mask */
1913 FALSE), /* pcrel_offset */
1914
1915 HOWTO (R_ARM_RABS32, /* type */
1916 0, /* rightshift */
1917 0, /* size (0 = byte, 1 = short, 2 = long) */
1918 0, /* bitsize */
1919 FALSE, /* pc_relative */
1920 0, /* bitpos */
1921 complain_overflow_dont,/* complain_on_overflow */
1922 bfd_elf_generic_reloc, /* special_function */
1923 "R_ARM_RABS32", /* name */
1924 FALSE, /* partial_inplace */
1925 0, /* src_mask */
1926 0, /* dst_mask */
1927 FALSE), /* pcrel_offset */
1928
1929 HOWTO (R_ARM_RPC24, /* type */
1930 0, /* rightshift */
1931 0, /* size (0 = byte, 1 = short, 2 = long) */
1932 0, /* bitsize */
1933 FALSE, /* pc_relative */
1934 0, /* bitpos */
1935 complain_overflow_dont,/* complain_on_overflow */
1936 bfd_elf_generic_reloc, /* special_function */
1937 "R_ARM_RPC24", /* name */
1938 FALSE, /* partial_inplace */
1939 0, /* src_mask */
1940 0, /* dst_mask */
1941 FALSE), /* pcrel_offset */
1942
1943 HOWTO (R_ARM_RBASE, /* type */
1944 0, /* rightshift */
1945 0, /* size (0 = byte, 1 = short, 2 = long) */
1946 0, /* bitsize */
1947 FALSE, /* pc_relative */
1948 0, /* bitpos */
1949 complain_overflow_dont,/* complain_on_overflow */
1950 bfd_elf_generic_reloc, /* special_function */
1951 "R_ARM_RBASE", /* name */
1952 FALSE, /* partial_inplace */
1953 0, /* src_mask */
1954 0, /* dst_mask */
1955 FALSE) /* pcrel_offset */
1956 };
1957
1958 static reloc_howto_type *
1959 elf32_arm_howto_from_type (unsigned int r_type)
1960 {
1961 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1962 return &elf32_arm_howto_table_1[r_type];
1963
1964 if (r_type >= R_ARM_IRELATIVE
1965 && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2))
1966 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1967
1968 if (r_type >= R_ARM_RREL32
1969 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1970 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1971
1972 return NULL;
1973 }
1974
1975 static bfd_boolean
1976 elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc,
1977 Elf_Internal_Rela * elf_reloc)
1978 {
1979 unsigned int r_type;
1980
1981 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1982 if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL)
1983 {
1984 /* xgettext:c-format */
1985 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1986 abfd, r_type);
1987 bfd_set_error (bfd_error_bad_value);
1988 return FALSE;
1989 }
1990 return TRUE;
1991 }
1992
1993 struct elf32_arm_reloc_map
1994 {
1995 bfd_reloc_code_real_type bfd_reloc_val;
1996 unsigned char elf_reloc_val;
1997 };
1998
1999 /* All entries in this list must also be present in elf32_arm_howto_table. */
2000 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
2001 {
2002 {BFD_RELOC_NONE, R_ARM_NONE},
2003 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
2004 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
2005 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
2006 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
2007 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
2008 {BFD_RELOC_32, R_ARM_ABS32},
2009 {BFD_RELOC_32_PCREL, R_ARM_REL32},
2010 {BFD_RELOC_8, R_ARM_ABS8},
2011 {BFD_RELOC_16, R_ARM_ABS16},
2012 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
2013 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
2014 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
2015 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
2016 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
2017 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
2018 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
2019 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
2020 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
2021 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
2022 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
2023 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
2024 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
2025 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
2026 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
2027 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
2028 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
2029 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
2030 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
2031 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
2032 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
2033 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
2034 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
2035 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
2036 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
2037 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
2038 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
2039 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
2040 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
2041 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
2042 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
2043 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
2044 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
2045 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
2046 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
2047 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
2048 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
2049 {BFD_RELOC_ARM_GOTFUNCDESC, R_ARM_GOTFUNCDESC},
2050 {BFD_RELOC_ARM_GOTOFFFUNCDESC, R_ARM_GOTOFFFUNCDESC},
2051 {BFD_RELOC_ARM_FUNCDESC, R_ARM_FUNCDESC},
2052 {BFD_RELOC_ARM_FUNCDESC_VALUE, R_ARM_FUNCDESC_VALUE},
2053 {BFD_RELOC_ARM_TLS_GD32_FDPIC, R_ARM_TLS_GD32_FDPIC},
2054 {BFD_RELOC_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_LDM32_FDPIC},
2055 {BFD_RELOC_ARM_TLS_IE32_FDPIC, R_ARM_TLS_IE32_FDPIC},
2056 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
2057 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
2058 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
2059 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
2060 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
2061 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
2062 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
2063 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
2064 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
2065 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
2066 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
2067 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
2068 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
2069 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
2070 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
2071 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
2072 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
2073 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
2074 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
2075 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
2076 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
2077 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
2078 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
2079 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
2080 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
2081 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
2082 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
2083 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
2084 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
2085 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
2086 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
2087 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
2088 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
2089 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
2090 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
2091 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
2092 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
2093 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
2094 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
2095 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
2096 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
2097 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
2098 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC},
2099 {BFD_RELOC_ARM_THUMB_BF17, R_ARM_THM_BF16},
2100 {BFD_RELOC_ARM_THUMB_BF13, R_ARM_THM_BF12},
2101 {BFD_RELOC_ARM_THUMB_BF19, R_ARM_THM_BF18}
2102 };
2103
2104 static reloc_howto_type *
2105 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2106 bfd_reloc_code_real_type code)
2107 {
2108 unsigned int i;
2109
2110 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
2111 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
2112 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
2113
2114 return NULL;
2115 }
2116
2117 static reloc_howto_type *
2118 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2119 const char *r_name)
2120 {
2121 unsigned int i;
2122
2123 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
2124 if (elf32_arm_howto_table_1[i].name != NULL
2125 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
2126 return &elf32_arm_howto_table_1[i];
2127
2128 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
2129 if (elf32_arm_howto_table_2[i].name != NULL
2130 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
2131 return &elf32_arm_howto_table_2[i];
2132
2133 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
2134 if (elf32_arm_howto_table_3[i].name != NULL
2135 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
2136 return &elf32_arm_howto_table_3[i];
2137
2138 return NULL;
2139 }
2140
2141 /* Support for core dump NOTE sections. */
2142
2143 static bfd_boolean
2144 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2145 {
2146 int offset;
2147 size_t size;
2148
2149 switch (note->descsz)
2150 {
2151 default:
2152 return FALSE;
2153
2154 case 148: /* Linux/ARM 32-bit. */
2155 /* pr_cursig */
2156 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2157
2158 /* pr_pid */
2159 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2160
2161 /* pr_reg */
2162 offset = 72;
2163 size = 72;
2164
2165 break;
2166 }
2167
2168 /* Make a ".reg/999" section. */
2169 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2170 size, note->descpos + offset);
2171 }
2172
2173 static bfd_boolean
2174 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2175 {
2176 switch (note->descsz)
2177 {
2178 default:
2179 return FALSE;
2180
2181 case 124: /* Linux/ARM elf_prpsinfo. */
2182 elf_tdata (abfd)->core->pid
2183 = bfd_get_32 (abfd, note->descdata + 12);
2184 elf_tdata (abfd)->core->program
2185 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2186 elf_tdata (abfd)->core->command
2187 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2188 }
2189
2190 /* Note that for some reason, a spurious space is tacked
2191 onto the end of the args in some (at least one anyway)
2192 implementations, so strip it off if it exists. */
2193 {
2194 char *command = elf_tdata (abfd)->core->command;
2195 int n = strlen (command);
2196
2197 if (0 < n && command[n - 1] == ' ')
2198 command[n - 1] = '\0';
2199 }
2200
2201 return TRUE;
2202 }
2203
2204 static char *
2205 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2206 int note_type, ...)
2207 {
2208 switch (note_type)
2209 {
2210 default:
2211 return NULL;
2212
2213 case NT_PRPSINFO:
2214 {
2215 char data[124] ATTRIBUTE_NONSTRING;
2216 va_list ap;
2217
2218 va_start (ap, note_type);
2219 memset (data, 0, sizeof (data));
2220 strncpy (data + 28, va_arg (ap, const char *), 16);
2221 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2222 DIAGNOSTIC_PUSH;
2223 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
2224 -Wstringop-truncation:
2225 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
2226 */
2227 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
2228 #endif
2229 strncpy (data + 44, va_arg (ap, const char *), 80);
2230 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2231 DIAGNOSTIC_POP;
2232 #endif
2233 va_end (ap);
2234
2235 return elfcore_write_note (abfd, buf, bufsiz,
2236 "CORE", note_type, data, sizeof (data));
2237 }
2238
2239 case NT_PRSTATUS:
2240 {
2241 char data[148];
2242 va_list ap;
2243 long pid;
2244 int cursig;
2245 const void *greg;
2246
2247 va_start (ap, note_type);
2248 memset (data, 0, sizeof (data));
2249 pid = va_arg (ap, long);
2250 bfd_put_32 (abfd, pid, data + 24);
2251 cursig = va_arg (ap, int);
2252 bfd_put_16 (abfd, cursig, data + 12);
2253 greg = va_arg (ap, const void *);
2254 memcpy (data + 72, greg, 72);
2255 va_end (ap);
2256
2257 return elfcore_write_note (abfd, buf, bufsiz,
2258 "CORE", note_type, data, sizeof (data));
2259 }
2260 }
2261 }
2262
2263 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2264 #define TARGET_LITTLE_NAME "elf32-littlearm"
2265 #define TARGET_BIG_SYM arm_elf32_be_vec
2266 #define TARGET_BIG_NAME "elf32-bigarm"
2267
2268 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2269 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2270 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2271
2272 typedef unsigned long int insn32;
2273 typedef unsigned short int insn16;
2274
2275 /* In lieu of proper flags, assume all EABIv4 or later objects are
2276 interworkable. */
2277 #define INTERWORK_FLAG(abfd) \
2278 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2279 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2280 || ((abfd)->flags & BFD_LINKER_CREATED))
2281
2282 /* The linker script knows the section names for placement.
2283 The entry_names are used to do simple name mangling on the stubs.
2284 Given a function name, and its type, the stub can be found. The
2285 name can be changed. The only requirement is the %s be present. */
2286 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2287 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2288
2289 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2290 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2291
2292 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2293 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2294
2295 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2296 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2297
2298 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2299 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2300
2301 #define STUB_ENTRY_NAME "__%s_veneer"
2302
2303 #define CMSE_PREFIX "__acle_se_"
2304
2305 #define CMSE_STUB_NAME ".gnu.sgstubs"
2306
2307 /* The name of the dynamic interpreter. This is put in the .interp
2308 section. */
2309 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2310
2311 /* FDPIC default stack size. */
2312 #define DEFAULT_STACK_SIZE 0x8000
2313
2314 static const unsigned long tls_trampoline [] =
2315 {
2316 0xe08e0000, /* add r0, lr, r0 */
2317 0xe5901004, /* ldr r1, [r0,#4] */
2318 0xe12fff11, /* bx r1 */
2319 };
2320
2321 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2322 {
2323 0xe52d2004, /* push {r2} */
2324 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2325 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2326 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2327 0xe081100f, /* 2: add r1, pc */
2328 0xe12fff12, /* bx r2 */
2329 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2330 + dl_tlsdesc_lazy_resolver(GOT) */
2331 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2332 };
2333
2334 /* NOTE: [Thumb nop sequence]
2335 When adding code that transitions from Thumb to Arm the instruction that
2336 should be used for the alignment padding should be 0xe7fd (b .-2) instead of
2337 a nop for performance reasons. */
2338
2339 /* ARM FDPIC PLT entry. */
2340 /* The last 5 words contain PLT lazy fragment code and data. */
2341 static const bfd_vma elf32_arm_fdpic_plt_entry [] =
2342 {
2343 0xe59fc008, /* ldr r12, .L1 */
2344 0xe08cc009, /* add r12, r12, r9 */
2345 0xe59c9004, /* ldr r9, [r12, #4] */
2346 0xe59cf000, /* ldr pc, [r12] */
2347 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */
2348 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */
2349 0xe51fc00c, /* ldr r12, [pc, #-12] */
2350 0xe92d1000, /* push {r12} */
2351 0xe599c004, /* ldr r12, [r9, #4] */
2352 0xe599f000, /* ldr pc, [r9] */
2353 };
2354
2355 /* Thumb FDPIC PLT entry. */
2356 /* The last 5 words contain PLT lazy fragment code and data. */
2357 static const bfd_vma elf32_arm_fdpic_thumb_plt_entry [] =
2358 {
2359 0xc00cf8df, /* ldr.w r12, .L1 */
2360 0x0c09eb0c, /* add.w r12, r12, r9 */
2361 0x9004f8dc, /* ldr.w r9, [r12, #4] */
2362 0xf000f8dc, /* ldr.w pc, [r12] */
2363 0x00000000, /* .L1 .word foo(GOTOFFFUNCDESC) */
2364 0x00000000, /* .L2 .word foo(funcdesc_value_reloc_offset) */
2365 0xc008f85f, /* ldr.w r12, .L2 */
2366 0xcd04f84d, /* push {r12} */
2367 0xc004f8d9, /* ldr.w r12, [r9, #4] */
2368 0xf000f8d9, /* ldr.w pc, [r9] */
2369 };
2370
2371 #ifdef FOUR_WORD_PLT
2372
2373 /* The first entry in a procedure linkage table looks like
2374 this. It is set up so that any shared library function that is
2375 called before the relocation has been set up calls the dynamic
2376 linker first. */
2377 static const bfd_vma elf32_arm_plt0_entry [] =
2378 {
2379 0xe52de004, /* str lr, [sp, #-4]! */
2380 0xe59fe010, /* ldr lr, [pc, #16] */
2381 0xe08fe00e, /* add lr, pc, lr */
2382 0xe5bef008, /* ldr pc, [lr, #8]! */
2383 };
2384
2385 /* Subsequent entries in a procedure linkage table look like
2386 this. */
2387 static const bfd_vma elf32_arm_plt_entry [] =
2388 {
2389 0xe28fc600, /* add ip, pc, #NN */
2390 0xe28cca00, /* add ip, ip, #NN */
2391 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2392 0x00000000, /* unused */
2393 };
2394
2395 #else /* not FOUR_WORD_PLT */
2396
2397 /* The first entry in a procedure linkage table looks like
2398 this. It is set up so that any shared library function that is
2399 called before the relocation has been set up calls the dynamic
2400 linker first. */
2401 static const bfd_vma elf32_arm_plt0_entry [] =
2402 {
2403 0xe52de004, /* str lr, [sp, #-4]! */
2404 0xe59fe004, /* ldr lr, [pc, #4] */
2405 0xe08fe00e, /* add lr, pc, lr */
2406 0xe5bef008, /* ldr pc, [lr, #8]! */
2407 0x00000000, /* &GOT[0] - . */
2408 };
2409
2410 /* By default subsequent entries in a procedure linkage table look like
2411 this. Offsets that don't fit into 28 bits will cause link error. */
2412 static const bfd_vma elf32_arm_plt_entry_short [] =
2413 {
2414 0xe28fc600, /* add ip, pc, #0xNN00000 */
2415 0xe28cca00, /* add ip, ip, #0xNN000 */
2416 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2417 };
2418
2419 /* When explicitly asked, we'll use this "long" entry format
2420 which can cope with arbitrary displacements. */
2421 static const bfd_vma elf32_arm_plt_entry_long [] =
2422 {
2423 0xe28fc200, /* add ip, pc, #0xN0000000 */
2424 0xe28cc600, /* add ip, ip, #0xNN00000 */
2425 0xe28cca00, /* add ip, ip, #0xNN000 */
2426 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2427 };
2428
2429 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2430
2431 #endif /* not FOUR_WORD_PLT */
2432
2433 /* The first entry in a procedure linkage table looks like this.
2434 It is set up so that any shared library function that is called before the
2435 relocation has been set up calls the dynamic linker first. */
2436 static const bfd_vma elf32_thumb2_plt0_entry [] =
2437 {
2438 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2439 an instruction maybe encoded to one or two array elements. */
2440 0xf8dfb500, /* push {lr} */
2441 0x44fee008, /* ldr.w lr, [pc, #8] */
2442 /* add lr, pc */
2443 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2444 0x00000000, /* &GOT[0] - . */
2445 };
2446
2447 /* Subsequent entries in a procedure linkage table for thumb only target
2448 look like this. */
2449 static const bfd_vma elf32_thumb2_plt_entry [] =
2450 {
2451 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2452 an instruction maybe encoded to one or two array elements. */
2453 0x0c00f240, /* movw ip, #0xNNNN */
2454 0x0c00f2c0, /* movt ip, #0xNNNN */
2455 0xf8dc44fc, /* add ip, pc */
2456 0xe7fdf000 /* ldr.w pc, [ip] */
2457 /* b .-2 */
2458 };
2459
2460 /* The format of the first entry in the procedure linkage table
2461 for a VxWorks executable. */
2462 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2463 {
2464 0xe52dc008, /* str ip,[sp,#-8]! */
2465 0xe59fc000, /* ldr ip,[pc] */
2466 0xe59cf008, /* ldr pc,[ip,#8] */
2467 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2468 };
2469
2470 /* The format of subsequent entries in a VxWorks executable. */
2471 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2472 {
2473 0xe59fc000, /* ldr ip,[pc] */
2474 0xe59cf000, /* ldr pc,[ip] */
2475 0x00000000, /* .long @got */
2476 0xe59fc000, /* ldr ip,[pc] */
2477 0xea000000, /* b _PLT */
2478 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2479 };
2480
2481 /* The format of entries in a VxWorks shared library. */
2482 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2483 {
2484 0xe59fc000, /* ldr ip,[pc] */
2485 0xe79cf009, /* ldr pc,[ip,r9] */
2486 0x00000000, /* .long @got */
2487 0xe59fc000, /* ldr ip,[pc] */
2488 0xe599f008, /* ldr pc,[r9,#8] */
2489 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2490 };
2491
2492 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2493 #define PLT_THUMB_STUB_SIZE 4
2494 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2495 {
2496 0x4778, /* bx pc */
2497 0xe7fd /* b .-2 */
2498 };
2499
2500 /* The entries in a PLT when using a DLL-based target with multiple
2501 address spaces. */
2502 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2503 {
2504 0xe51ff004, /* ldr pc, [pc, #-4] */
2505 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2506 };
2507
2508 /* The first entry in a procedure linkage table looks like
2509 this. It is set up so that any shared library function that is
2510 called before the relocation has been set up calls the dynamic
2511 linker first. */
2512 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2513 {
2514 /* First bundle: */
2515 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2516 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2517 0xe08cc00f, /* add ip, ip, pc */
2518 0xe52dc008, /* str ip, [sp, #-8]! */
2519 /* Second bundle: */
2520 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2521 0xe59cc000, /* ldr ip, [ip] */
2522 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2523 0xe12fff1c, /* bx ip */
2524 /* Third bundle: */
2525 0xe320f000, /* nop */
2526 0xe320f000, /* nop */
2527 0xe320f000, /* nop */
2528 /* .Lplt_tail: */
2529 0xe50dc004, /* str ip, [sp, #-4] */
2530 /* Fourth bundle: */
2531 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2532 0xe59cc000, /* ldr ip, [ip] */
2533 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2534 0xe12fff1c, /* bx ip */
2535 };
2536 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2537
2538 /* Subsequent entries in a procedure linkage table look like this. */
2539 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2540 {
2541 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2542 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2543 0xe08cc00f, /* add ip, ip, pc */
2544 0xea000000, /* b .Lplt_tail */
2545 };
2546
2547 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2548 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2549 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2550 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2551 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2552 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2553 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2554 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2555
2556 enum stub_insn_type
2557 {
2558 THUMB16_TYPE = 1,
2559 THUMB32_TYPE,
2560 ARM_TYPE,
2561 DATA_TYPE
2562 };
2563
2564 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2565 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2566 is inserted in arm_build_one_stub(). */
2567 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2568 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2569 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2570 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2571 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2572 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2573 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2574 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2575
2576 typedef struct
2577 {
2578 bfd_vma data;
2579 enum stub_insn_type type;
2580 unsigned int r_type;
2581 int reloc_addend;
2582 } insn_sequence;
2583
2584 /* See note [Thumb nop sequence] when adding a veneer. */
2585
2586 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2587 to reach the stub if necessary. */
2588 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2589 {
2590 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2591 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2592 };
2593
2594 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2595 available. */
2596 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2597 {
2598 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2599 ARM_INSN (0xe12fff1c), /* bx ip */
2600 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2601 };
2602
2603 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2604 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2605 {
2606 THUMB16_INSN (0xb401), /* push {r0} */
2607 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2608 THUMB16_INSN (0x4684), /* mov ip, r0 */
2609 THUMB16_INSN (0xbc01), /* pop {r0} */
2610 THUMB16_INSN (0x4760), /* bx ip */
2611 THUMB16_INSN (0xbf00), /* nop */
2612 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2613 };
2614
2615 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2616 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2617 {
2618 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2619 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2620 };
2621
2622 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2623 M-profile architectures. */
2624 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2625 {
2626 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2627 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2628 THUMB16_INSN (0x4760), /* bx ip */
2629 };
2630
2631 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2632 allowed. */
2633 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2634 {
2635 THUMB16_INSN (0x4778), /* bx pc */
2636 THUMB16_INSN (0xe7fd), /* b .-2 */
2637 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2638 ARM_INSN (0xe12fff1c), /* bx ip */
2639 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2640 };
2641
2642 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2643 available. */
2644 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2645 {
2646 THUMB16_INSN (0x4778), /* bx pc */
2647 THUMB16_INSN (0xe7fd), /* b .-2 */
2648 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2649 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2650 };
2651
2652 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2653 one, when the destination is close enough. */
2654 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2655 {
2656 THUMB16_INSN (0x4778), /* bx pc */
2657 THUMB16_INSN (0xe7fd), /* b .-2 */
2658 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2659 };
2660
2661 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2662 blx to reach the stub if necessary. */
2663 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2664 {
2665 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2666 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2667 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2668 };
2669
2670 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2671 blx to reach the stub if necessary. We can not add into pc;
2672 it is not guaranteed to mode switch (different in ARMv6 and
2673 ARMv7). */
2674 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2675 {
2676 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2677 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2678 ARM_INSN (0xe12fff1c), /* bx ip */
2679 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2680 };
2681
2682 /* V4T ARM -> ARM long branch stub, PIC. */
2683 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2684 {
2685 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2686 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2687 ARM_INSN (0xe12fff1c), /* bx ip */
2688 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2689 };
2690
2691 /* V4T Thumb -> ARM long branch stub, PIC. */
2692 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2693 {
2694 THUMB16_INSN (0x4778), /* bx pc */
2695 THUMB16_INSN (0xe7fd), /* b .-2 */
2696 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2697 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2698 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2699 };
2700
2701 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2702 architectures. */
2703 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2704 {
2705 THUMB16_INSN (0xb401), /* push {r0} */
2706 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2707 THUMB16_INSN (0x46fc), /* mov ip, pc */
2708 THUMB16_INSN (0x4484), /* add ip, r0 */
2709 THUMB16_INSN (0xbc01), /* pop {r0} */
2710 THUMB16_INSN (0x4760), /* bx ip */
2711 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2712 };
2713
2714 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2715 allowed. */
2716 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2717 {
2718 THUMB16_INSN (0x4778), /* bx pc */
2719 THUMB16_INSN (0xe7fd), /* b .-2 */
2720 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2721 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2722 ARM_INSN (0xe12fff1c), /* bx ip */
2723 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2724 };
2725
2726 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2727 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2728 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2729 {
2730 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2731 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2732 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2733 };
2734
2735 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2736 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2737 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2738 {
2739 THUMB16_INSN (0x4778), /* bx pc */
2740 THUMB16_INSN (0xe7fd), /* b .-2 */
2741 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2742 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2743 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2744 };
2745
2746 /* NaCl ARM -> ARM long branch stub. */
2747 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2748 {
2749 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2750 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2751 ARM_INSN (0xe12fff1c), /* bx ip */
2752 ARM_INSN (0xe320f000), /* nop */
2753 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2754 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2755 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2756 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2757 };
2758
2759 /* NaCl ARM -> ARM long branch stub, PIC. */
2760 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2761 {
2762 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2763 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2764 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2765 ARM_INSN (0xe12fff1c), /* bx ip */
2766 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2767 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2768 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2769 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2770 };
2771
2772 /* Stub used for transition to secure state (aka SG veneer). */
2773 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2774 {
2775 THUMB32_INSN (0xe97fe97f), /* sg. */
2776 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2777 };
2778
2779
2780 /* Cortex-A8 erratum-workaround stubs. */
2781
2782 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2783 can't use a conditional branch to reach this stub). */
2784
2785 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2786 {
2787 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2788 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2789 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2790 };
2791
2792 /* Stub used for b.w and bl.w instructions. */
2793
2794 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2795 {
2796 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2797 };
2798
2799 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2800 {
2801 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2802 };
2803
2804 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2805 instruction (which switches to ARM mode) to point to this stub. Jump to the
2806 real destination using an ARM-mode branch. */
2807
2808 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2809 {
2810 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2811 };
2812
2813 /* For each section group there can be a specially created linker section
2814 to hold the stubs for that group. The name of the stub section is based
2815 upon the name of another section within that group with the suffix below
2816 applied.
2817
2818 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2819 create what appeared to be a linker stub section when it actually
2820 contained user code/data. For example, consider this fragment:
2821
2822 const char * stubborn_problems[] = { "np" };
2823
2824 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2825 section called:
2826
2827 .data.rel.local.stubborn_problems
2828
2829 This then causes problems in arm32_arm_build_stubs() as it triggers:
2830
2831 // Ignore non-stub sections.
2832 if (!strstr (stub_sec->name, STUB_SUFFIX))
2833 continue;
2834
2835 And so the section would be ignored instead of being processed. Hence
2836 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2837 C identifier. */
2838 #define STUB_SUFFIX ".__stub"
2839
2840 /* One entry per long/short branch stub defined above. */
2841 #define DEF_STUBS \
2842 DEF_STUB(long_branch_any_any) \
2843 DEF_STUB(long_branch_v4t_arm_thumb) \
2844 DEF_STUB(long_branch_thumb_only) \
2845 DEF_STUB(long_branch_v4t_thumb_thumb) \
2846 DEF_STUB(long_branch_v4t_thumb_arm) \
2847 DEF_STUB(short_branch_v4t_thumb_arm) \
2848 DEF_STUB(long_branch_any_arm_pic) \
2849 DEF_STUB(long_branch_any_thumb_pic) \
2850 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2851 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2852 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2853 DEF_STUB(long_branch_thumb_only_pic) \
2854 DEF_STUB(long_branch_any_tls_pic) \
2855 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2856 DEF_STUB(long_branch_arm_nacl) \
2857 DEF_STUB(long_branch_arm_nacl_pic) \
2858 DEF_STUB(cmse_branch_thumb_only) \
2859 DEF_STUB(a8_veneer_b_cond) \
2860 DEF_STUB(a8_veneer_b) \
2861 DEF_STUB(a8_veneer_bl) \
2862 DEF_STUB(a8_veneer_blx) \
2863 DEF_STUB(long_branch_thumb2_only) \
2864 DEF_STUB(long_branch_thumb2_only_pure)
2865
2866 #define DEF_STUB(x) arm_stub_##x,
2867 enum elf32_arm_stub_type
2868 {
2869 arm_stub_none,
2870 DEF_STUBS
2871 max_stub_type
2872 };
2873 #undef DEF_STUB
2874
2875 /* Note the first a8_veneer type. */
2876 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2877
2878 typedef struct
2879 {
2880 const insn_sequence* template_sequence;
2881 int template_size;
2882 } stub_def;
2883
2884 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2885 static const stub_def stub_definitions[] =
2886 {
2887 {NULL, 0},
2888 DEF_STUBS
2889 };
2890
2891 struct elf32_arm_stub_hash_entry
2892 {
2893 /* Base hash table entry structure. */
2894 struct bfd_hash_entry root;
2895
2896 /* The stub section. */
2897 asection *stub_sec;
2898
2899 /* Offset within stub_sec of the beginning of this stub. */
2900 bfd_vma stub_offset;
2901
2902 /* Given the symbol's value and its section we can determine its final
2903 value when building the stubs (so the stub knows where to jump). */
2904 bfd_vma target_value;
2905 asection *target_section;
2906
2907 /* Same as above but for the source of the branch to the stub. Used for
2908 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2909 such, source section does not need to be recorded since Cortex-A8 erratum
2910 workaround stubs are only generated when both source and target are in the
2911 same section. */
2912 bfd_vma source_value;
2913
2914 /* The instruction which caused this stub to be generated (only valid for
2915 Cortex-A8 erratum workaround stubs at present). */
2916 unsigned long orig_insn;
2917
2918 /* The stub type. */
2919 enum elf32_arm_stub_type stub_type;
2920 /* Its encoding size in bytes. */
2921 int stub_size;
2922 /* Its template. */
2923 const insn_sequence *stub_template;
2924 /* The size of the template (number of entries). */
2925 int stub_template_size;
2926
2927 /* The symbol table entry, if any, that this was derived from. */
2928 struct elf32_arm_link_hash_entry *h;
2929
2930 /* Type of branch. */
2931 enum arm_st_branch_type branch_type;
2932
2933 /* Where this stub is being called from, or, in the case of combined
2934 stub sections, the first input section in the group. */
2935 asection *id_sec;
2936
2937 /* The name for the local symbol at the start of this stub. The
2938 stub name in the hash table has to be unique; this does not, so
2939 it can be friendlier. */
2940 char *output_name;
2941 };
2942
2943 /* Used to build a map of a section. This is required for mixed-endian
2944 code/data. */
2945
2946 typedef struct elf32_elf_section_map
2947 {
2948 bfd_vma vma;
2949 char type;
2950 }
2951 elf32_arm_section_map;
2952
2953 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2954
2955 typedef enum
2956 {
2957 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2958 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2959 VFP11_ERRATUM_ARM_VENEER,
2960 VFP11_ERRATUM_THUMB_VENEER
2961 }
2962 elf32_vfp11_erratum_type;
2963
2964 typedef struct elf32_vfp11_erratum_list
2965 {
2966 struct elf32_vfp11_erratum_list *next;
2967 bfd_vma vma;
2968 union
2969 {
2970 struct
2971 {
2972 struct elf32_vfp11_erratum_list *veneer;
2973 unsigned int vfp_insn;
2974 } b;
2975 struct
2976 {
2977 struct elf32_vfp11_erratum_list *branch;
2978 unsigned int id;
2979 } v;
2980 } u;
2981 elf32_vfp11_erratum_type type;
2982 }
2983 elf32_vfp11_erratum_list;
2984
2985 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2986 veneer. */
2987 typedef enum
2988 {
2989 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2990 STM32L4XX_ERRATUM_VENEER
2991 }
2992 elf32_stm32l4xx_erratum_type;
2993
2994 typedef struct elf32_stm32l4xx_erratum_list
2995 {
2996 struct elf32_stm32l4xx_erratum_list *next;
2997 bfd_vma vma;
2998 union
2999 {
3000 struct
3001 {
3002 struct elf32_stm32l4xx_erratum_list *veneer;
3003 unsigned int insn;
3004 } b;
3005 struct
3006 {
3007 struct elf32_stm32l4xx_erratum_list *branch;
3008 unsigned int id;
3009 } v;
3010 } u;
3011 elf32_stm32l4xx_erratum_type type;
3012 }
3013 elf32_stm32l4xx_erratum_list;
3014
3015 typedef enum
3016 {
3017 DELETE_EXIDX_ENTRY,
3018 INSERT_EXIDX_CANTUNWIND_AT_END
3019 }
3020 arm_unwind_edit_type;
3021
3022 /* A (sorted) list of edits to apply to an unwind table. */
3023 typedef struct arm_unwind_table_edit
3024 {
3025 arm_unwind_edit_type type;
3026 /* Note: we sometimes want to insert an unwind entry corresponding to a
3027 section different from the one we're currently writing out, so record the
3028 (text) section this edit relates to here. */
3029 asection *linked_section;
3030 unsigned int index;
3031 struct arm_unwind_table_edit *next;
3032 }
3033 arm_unwind_table_edit;
3034
3035 typedef struct _arm_elf_section_data
3036 {
3037 /* Information about mapping symbols. */
3038 struct bfd_elf_section_data elf;
3039 unsigned int mapcount;
3040 unsigned int mapsize;
3041 elf32_arm_section_map *map;
3042 /* Information about CPU errata. */
3043 unsigned int erratumcount;
3044 elf32_vfp11_erratum_list *erratumlist;
3045 unsigned int stm32l4xx_erratumcount;
3046 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
3047 unsigned int additional_reloc_count;
3048 /* Information about unwind tables. */
3049 union
3050 {
3051 /* Unwind info attached to a text section. */
3052 struct
3053 {
3054 asection *arm_exidx_sec;
3055 } text;
3056
3057 /* Unwind info attached to an .ARM.exidx section. */
3058 struct
3059 {
3060 arm_unwind_table_edit *unwind_edit_list;
3061 arm_unwind_table_edit *unwind_edit_tail;
3062 } exidx;
3063 } u;
3064 }
3065 _arm_elf_section_data;
3066
3067 #define elf32_arm_section_data(sec) \
3068 ((_arm_elf_section_data *) elf_section_data (sec))
3069
3070 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
3071 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
3072 so may be created multiple times: we use an array of these entries whilst
3073 relaxing which we can refresh easily, then create stubs for each potentially
3074 erratum-triggering instruction once we've settled on a solution. */
3075
3076 struct a8_erratum_fix
3077 {
3078 bfd *input_bfd;
3079 asection *section;
3080 bfd_vma offset;
3081 bfd_vma target_offset;
3082 unsigned long orig_insn;
3083 char *stub_name;
3084 enum elf32_arm_stub_type stub_type;
3085 enum arm_st_branch_type branch_type;
3086 };
3087
3088 /* A table of relocs applied to branches which might trigger Cortex-A8
3089 erratum. */
3090
3091 struct a8_erratum_reloc
3092 {
3093 bfd_vma from;
3094 bfd_vma destination;
3095 struct elf32_arm_link_hash_entry *hash;
3096 const char *sym_name;
3097 unsigned int r_type;
3098 enum arm_st_branch_type branch_type;
3099 bfd_boolean non_a8_stub;
3100 };
3101
3102 /* The size of the thread control block. */
3103 #define TCB_SIZE 8
3104
3105 /* ARM-specific information about a PLT entry, over and above the usual
3106 gotplt_union. */
3107 struct arm_plt_info
3108 {
3109 /* We reference count Thumb references to a PLT entry separately,
3110 so that we can emit the Thumb trampoline only if needed. */
3111 bfd_signed_vma thumb_refcount;
3112
3113 /* Some references from Thumb code may be eliminated by BL->BLX
3114 conversion, so record them separately. */
3115 bfd_signed_vma maybe_thumb_refcount;
3116
3117 /* How many of the recorded PLT accesses were from non-call relocations.
3118 This information is useful when deciding whether anything takes the
3119 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
3120 non-call references to the function should resolve directly to the
3121 real runtime target. */
3122 unsigned int noncall_refcount;
3123
3124 /* Since PLT entries have variable size if the Thumb prologue is
3125 used, we need to record the index into .got.plt instead of
3126 recomputing it from the PLT offset. */
3127 bfd_signed_vma got_offset;
3128 };
3129
3130 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
3131 struct arm_local_iplt_info
3132 {
3133 /* The information that is usually found in the generic ELF part of
3134 the hash table entry. */
3135 union gotplt_union root;
3136
3137 /* The information that is usually found in the ARM-specific part of
3138 the hash table entry. */
3139 struct arm_plt_info arm;
3140
3141 /* A list of all potential dynamic relocations against this symbol. */
3142 struct elf_dyn_relocs *dyn_relocs;
3143 };
3144
3145 /* Structure to handle FDPIC support for local functions. */
3146 struct fdpic_local {
3147 unsigned int funcdesc_cnt;
3148 unsigned int gotofffuncdesc_cnt;
3149 int funcdesc_offset;
3150 };
3151
3152 struct elf_arm_obj_tdata
3153 {
3154 struct elf_obj_tdata root;
3155
3156 /* tls_type for each local got entry. */
3157 char *local_got_tls_type;
3158
3159 /* GOTPLT entries for TLS descriptors. */
3160 bfd_vma *local_tlsdesc_gotent;
3161
3162 /* Information for local symbols that need entries in .iplt. */
3163 struct arm_local_iplt_info **local_iplt;
3164
3165 /* Zero to warn when linking objects with incompatible enum sizes. */
3166 int no_enum_size_warning;
3167
3168 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3169 int no_wchar_size_warning;
3170
3171 /* Maintains FDPIC counters and funcdesc info. */
3172 struct fdpic_local *local_fdpic_cnts;
3173 };
3174
3175 #define elf_arm_tdata(bfd) \
3176 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3177
3178 #define elf32_arm_local_got_tls_type(bfd) \
3179 (elf_arm_tdata (bfd)->local_got_tls_type)
3180
3181 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3182 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3183
3184 #define elf32_arm_local_iplt(bfd) \
3185 (elf_arm_tdata (bfd)->local_iplt)
3186
3187 #define elf32_arm_local_fdpic_cnts(bfd) \
3188 (elf_arm_tdata (bfd)->local_fdpic_cnts)
3189
3190 #define is_arm_elf(bfd) \
3191 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3192 && elf_tdata (bfd) != NULL \
3193 && elf_object_id (bfd) == ARM_ELF_DATA)
3194
3195 static bfd_boolean
3196 elf32_arm_mkobject (bfd *abfd)
3197 {
3198 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
3199 ARM_ELF_DATA);
3200 }
3201
3202 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3203
3204 /* Structure to handle FDPIC support for extern functions. */
3205 struct fdpic_global {
3206 unsigned int gotofffuncdesc_cnt;
3207 unsigned int gotfuncdesc_cnt;
3208 unsigned int funcdesc_cnt;
3209 int funcdesc_offset;
3210 int gotfuncdesc_offset;
3211 };
3212
3213 /* Arm ELF linker hash entry. */
3214 struct elf32_arm_link_hash_entry
3215 {
3216 struct elf_link_hash_entry root;
3217
3218 /* Track dynamic relocs copied for this symbol. */
3219 struct elf_dyn_relocs *dyn_relocs;
3220
3221 /* ARM-specific PLT information. */
3222 struct arm_plt_info plt;
3223
3224 #define GOT_UNKNOWN 0
3225 #define GOT_NORMAL 1
3226 #define GOT_TLS_GD 2
3227 #define GOT_TLS_IE 4
3228 #define GOT_TLS_GDESC 8
3229 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3230 unsigned int tls_type : 8;
3231
3232 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3233 unsigned int is_iplt : 1;
3234
3235 unsigned int unused : 23;
3236
3237 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3238 starting at the end of the jump table. */
3239 bfd_vma tlsdesc_got;
3240
3241 /* The symbol marking the real symbol location for exported thumb
3242 symbols with Arm stubs. */
3243 struct elf_link_hash_entry *export_glue;
3244
3245 /* A pointer to the most recently used stub hash entry against this
3246 symbol. */
3247 struct elf32_arm_stub_hash_entry *stub_cache;
3248
3249 /* Counter for FDPIC relocations against this symbol. */
3250 struct fdpic_global fdpic_cnts;
3251 };
3252
3253 /* Traverse an arm ELF linker hash table. */
3254 #define elf32_arm_link_hash_traverse(table, func, info) \
3255 (elf_link_hash_traverse \
3256 (&(table)->root, \
3257 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3258 (info)))
3259
3260 /* Get the ARM elf linker hash table from a link_info structure. */
3261 #define elf32_arm_hash_table(info) \
3262 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3263 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3264
3265 #define arm_stub_hash_lookup(table, string, create, copy) \
3266 ((struct elf32_arm_stub_hash_entry *) \
3267 bfd_hash_lookup ((table), (string), (create), (copy)))
3268
3269 /* Array to keep track of which stub sections have been created, and
3270 information on stub grouping. */
3271 struct map_stub
3272 {
3273 /* This is the section to which stubs in the group will be
3274 attached. */
3275 asection *link_sec;
3276 /* The stub section. */
3277 asection *stub_sec;
3278 };
3279
3280 #define elf32_arm_compute_jump_table_size(htab) \
3281 ((htab)->next_tls_desc_index * 4)
3282
3283 /* ARM ELF linker hash table. */
3284 struct elf32_arm_link_hash_table
3285 {
3286 /* The main hash table. */
3287 struct elf_link_hash_table root;
3288
3289 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3290 bfd_size_type thumb_glue_size;
3291
3292 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3293 bfd_size_type arm_glue_size;
3294
3295 /* The size in bytes of section containing the ARMv4 BX veneers. */
3296 bfd_size_type bx_glue_size;
3297
3298 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3299 veneer has been populated. */
3300 bfd_vma bx_glue_offset[15];
3301
3302 /* The size in bytes of the section containing glue for VFP11 erratum
3303 veneers. */
3304 bfd_size_type vfp11_erratum_glue_size;
3305
3306 /* The size in bytes of the section containing glue for STM32L4XX erratum
3307 veneers. */
3308 bfd_size_type stm32l4xx_erratum_glue_size;
3309
3310 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3311 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3312 elf32_arm_write_section(). */
3313 struct a8_erratum_fix *a8_erratum_fixes;
3314 unsigned int num_a8_erratum_fixes;
3315
3316 /* An arbitrary input BFD chosen to hold the glue sections. */
3317 bfd * bfd_of_glue_owner;
3318
3319 /* Nonzero to output a BE8 image. */
3320 int byteswap_code;
3321
3322 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3323 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3324 int target1_is_rel;
3325
3326 /* The relocation to use for R_ARM_TARGET2 relocations. */
3327 int target2_reloc;
3328
3329 /* 0 = Ignore R_ARM_V4BX.
3330 1 = Convert BX to MOV PC.
3331 2 = Generate v4 interworing stubs. */
3332 int fix_v4bx;
3333
3334 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3335 int fix_cortex_a8;
3336
3337 /* Whether we should fix the ARM1176 BLX immediate issue. */
3338 int fix_arm1176;
3339
3340 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3341 int use_blx;
3342
3343 /* What sort of code sequences we should look for which may trigger the
3344 VFP11 denorm erratum. */
3345 bfd_arm_vfp11_fix vfp11_fix;
3346
3347 /* Global counter for the number of fixes we have emitted. */
3348 int num_vfp11_fixes;
3349
3350 /* What sort of code sequences we should look for which may trigger the
3351 STM32L4XX erratum. */
3352 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3353
3354 /* Global counter for the number of fixes we have emitted. */
3355 int num_stm32l4xx_fixes;
3356
3357 /* Nonzero to force PIC branch veneers. */
3358 int pic_veneer;
3359
3360 /* The number of bytes in the initial entry in the PLT. */
3361 bfd_size_type plt_header_size;
3362
3363 /* The number of bytes in the subsequent PLT etries. */
3364 bfd_size_type plt_entry_size;
3365
3366 /* True if the target system is VxWorks. */
3367 int vxworks_p;
3368
3369 /* True if the target system is Symbian OS. */
3370 int symbian_p;
3371
3372 /* True if the target system is Native Client. */
3373 int nacl_p;
3374
3375 /* True if the target uses REL relocations. */
3376 bfd_boolean use_rel;
3377
3378 /* Nonzero if import library must be a secure gateway import library
3379 as per ARMv8-M Security Extensions. */
3380 int cmse_implib;
3381
3382 /* The import library whose symbols' address must remain stable in
3383 the import library generated. */
3384 bfd *in_implib_bfd;
3385
3386 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3387 bfd_vma next_tls_desc_index;
3388
3389 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3390 bfd_vma num_tls_desc;
3391
3392 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3393 asection *srelplt2;
3394
3395 /* The offset into splt of the PLT entry for the TLS descriptor
3396 resolver. Special values are 0, if not necessary (or not found
3397 to be necessary yet), and -1 if needed but not determined
3398 yet. */
3399 bfd_vma dt_tlsdesc_plt;
3400
3401 /* The offset into sgot of the GOT entry used by the PLT entry
3402 above. */
3403 bfd_vma dt_tlsdesc_got;
3404
3405 /* Offset in .plt section of tls_arm_trampoline. */
3406 bfd_vma tls_trampoline;
3407
3408 /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
3409 union
3410 {
3411 bfd_signed_vma refcount;
3412 bfd_vma offset;
3413 } tls_ldm_got;
3414
3415 /* Small local sym cache. */
3416 struct sym_cache sym_cache;
3417
3418 /* For convenience in allocate_dynrelocs. */
3419 bfd * obfd;
3420
3421 /* The amount of space used by the reserved portion of the sgotplt
3422 section, plus whatever space is used by the jump slots. */
3423 bfd_vma sgotplt_jump_table_size;
3424
3425 /* The stub hash table. */
3426 struct bfd_hash_table stub_hash_table;
3427
3428 /* Linker stub bfd. */
3429 bfd *stub_bfd;
3430
3431 /* Linker call-backs. */
3432 asection * (*add_stub_section) (const char *, asection *, asection *,
3433 unsigned int);
3434 void (*layout_sections_again) (void);
3435
3436 /* Array to keep track of which stub sections have been created, and
3437 information on stub grouping. */
3438 struct map_stub *stub_group;
3439
3440 /* Input stub section holding secure gateway veneers. */
3441 asection *cmse_stub_sec;
3442
3443 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3444 start to be allocated. */
3445 bfd_vma new_cmse_stub_offset;
3446
3447 /* Number of elements in stub_group. */
3448 unsigned int top_id;
3449
3450 /* Assorted information used by elf32_arm_size_stubs. */
3451 unsigned int bfd_count;
3452 unsigned int top_index;
3453 asection **input_list;
3454
3455 /* True if the target system uses FDPIC. */
3456 int fdpic_p;
3457
3458 /* Fixup section. Used for FDPIC. */
3459 asection *srofixup;
3460 };
3461
3462 /* Add an FDPIC read-only fixup. */
3463 static void
3464 arm_elf_add_rofixup (bfd *output_bfd, asection *srofixup, bfd_vma offset)
3465 {
3466 bfd_vma fixup_offset;
3467
3468 fixup_offset = srofixup->reloc_count++ * 4;
3469 BFD_ASSERT (fixup_offset < srofixup->size);
3470 bfd_put_32 (output_bfd, offset, srofixup->contents + fixup_offset);
3471 }
3472
3473 static inline int
3474 ctz (unsigned int mask)
3475 {
3476 #if GCC_VERSION >= 3004
3477 return __builtin_ctz (mask);
3478 #else
3479 unsigned int i;
3480
3481 for (i = 0; i < 8 * sizeof (mask); i++)
3482 {
3483 if (mask & 0x1)
3484 break;
3485 mask = (mask >> 1);
3486 }
3487 return i;
3488 #endif
3489 }
3490
3491 static inline int
3492 elf32_arm_popcount (unsigned int mask)
3493 {
3494 #if GCC_VERSION >= 3004
3495 return __builtin_popcount (mask);
3496 #else
3497 unsigned int i;
3498 int sum = 0;
3499
3500 for (i = 0; i < 8 * sizeof (mask); i++)
3501 {
3502 if (mask & 0x1)
3503 sum++;
3504 mask = (mask >> 1);
3505 }
3506 return sum;
3507 #endif
3508 }
3509
3510 static void elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
3511 asection *sreloc, Elf_Internal_Rela *rel);
3512
3513 static void
3514 arm_elf_fill_funcdesc(bfd *output_bfd,
3515 struct bfd_link_info *info,
3516 int *funcdesc_offset,
3517 int dynindx,
3518 int offset,
3519 bfd_vma addr,
3520 bfd_vma dynreloc_value,
3521 bfd_vma seg)
3522 {
3523 if ((*funcdesc_offset & 1) == 0)
3524 {
3525 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
3526 asection *sgot = globals->root.sgot;
3527
3528 if (bfd_link_pic(info))
3529 {
3530 asection *srelgot = globals->root.srelgot;
3531 Elf_Internal_Rela outrel;
3532
3533 outrel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
3534 outrel.r_offset = sgot->output_section->vma + sgot->output_offset + offset;
3535 outrel.r_addend = 0;
3536
3537 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
3538 bfd_put_32 (output_bfd, addr, sgot->contents + offset);
3539 bfd_put_32 (output_bfd, seg, sgot->contents + offset + 4);
3540 }
3541 else
3542 {
3543 struct elf_link_hash_entry *hgot = globals->root.hgot;
3544 bfd_vma got_value = hgot->root.u.def.value
3545 + hgot->root.u.def.section->output_section->vma
3546 + hgot->root.u.def.section->output_offset;
3547
3548 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3549 sgot->output_section->vma + sgot->output_offset
3550 + offset);
3551 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3552 sgot->output_section->vma + sgot->output_offset
3553 + offset + 4);
3554 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + offset);
3555 bfd_put_32 (output_bfd, got_value, sgot->contents + offset + 4);
3556 }
3557 *funcdesc_offset |= 1;
3558 }
3559 }
3560
3561 /* Create an entry in an ARM ELF linker hash table. */
3562
3563 static struct bfd_hash_entry *
3564 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3565 struct bfd_hash_table * table,
3566 const char * string)
3567 {
3568 struct elf32_arm_link_hash_entry * ret =
3569 (struct elf32_arm_link_hash_entry *) entry;
3570
3571 /* Allocate the structure if it has not already been allocated by a
3572 subclass. */
3573 if (ret == NULL)
3574 ret = (struct elf32_arm_link_hash_entry *)
3575 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3576 if (ret == NULL)
3577 return (struct bfd_hash_entry *) ret;
3578
3579 /* Call the allocation method of the superclass. */
3580 ret = ((struct elf32_arm_link_hash_entry *)
3581 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3582 table, string));
3583 if (ret != NULL)
3584 {
3585 ret->dyn_relocs = NULL;
3586 ret->tls_type = GOT_UNKNOWN;
3587 ret->tlsdesc_got = (bfd_vma) -1;
3588 ret->plt.thumb_refcount = 0;
3589 ret->plt.maybe_thumb_refcount = 0;
3590 ret->plt.noncall_refcount = 0;
3591 ret->plt.got_offset = -1;
3592 ret->is_iplt = FALSE;
3593 ret->export_glue = NULL;
3594
3595 ret->stub_cache = NULL;
3596
3597 ret->fdpic_cnts.gotofffuncdesc_cnt = 0;
3598 ret->fdpic_cnts.gotfuncdesc_cnt = 0;
3599 ret->fdpic_cnts.funcdesc_cnt = 0;
3600 ret->fdpic_cnts.funcdesc_offset = -1;
3601 ret->fdpic_cnts.gotfuncdesc_offset = -1;
3602 }
3603
3604 return (struct bfd_hash_entry *) ret;
3605 }
3606
3607 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3608 symbols. */
3609
3610 static bfd_boolean
3611 elf32_arm_allocate_local_sym_info (bfd *abfd)
3612 {
3613 if (elf_local_got_refcounts (abfd) == NULL)
3614 {
3615 bfd_size_type num_syms;
3616 bfd_size_type size;
3617 char *data;
3618
3619 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3620 size = num_syms * (sizeof (bfd_signed_vma)
3621 + sizeof (struct arm_local_iplt_info *)
3622 + sizeof (bfd_vma)
3623 + sizeof (char)
3624 + sizeof (struct fdpic_local));
3625 data = bfd_zalloc (abfd, size);
3626 if (data == NULL)
3627 return FALSE;
3628
3629 elf32_arm_local_fdpic_cnts (abfd) = (struct fdpic_local *) data;
3630 data += num_syms * sizeof (struct fdpic_local);
3631
3632 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3633 data += num_syms * sizeof (bfd_signed_vma);
3634
3635 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3636 data += num_syms * sizeof (struct arm_local_iplt_info *);
3637
3638 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3639 data += num_syms * sizeof (bfd_vma);
3640
3641 elf32_arm_local_got_tls_type (abfd) = data;
3642 }
3643 return TRUE;
3644 }
3645
3646 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3647 to input bfd ABFD. Create the information if it doesn't already exist.
3648 Return null if an allocation fails. */
3649
3650 static struct arm_local_iplt_info *
3651 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3652 {
3653 struct arm_local_iplt_info **ptr;
3654
3655 if (!elf32_arm_allocate_local_sym_info (abfd))
3656 return NULL;
3657
3658 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3659 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3660 if (*ptr == NULL)
3661 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3662 return *ptr;
3663 }
3664
3665 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3666 in ABFD's symbol table. If the symbol is global, H points to its
3667 hash table entry, otherwise H is null.
3668
3669 Return true if the symbol does have PLT information. When returning
3670 true, point *ROOT_PLT at the target-independent reference count/offset
3671 union and *ARM_PLT at the ARM-specific information. */
3672
3673 static bfd_boolean
3674 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3675 struct elf32_arm_link_hash_entry *h,
3676 unsigned long r_symndx, union gotplt_union **root_plt,
3677 struct arm_plt_info **arm_plt)
3678 {
3679 struct arm_local_iplt_info *local_iplt;
3680
3681 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3682 return FALSE;
3683
3684 if (h != NULL)
3685 {
3686 *root_plt = &h->root.plt;
3687 *arm_plt = &h->plt;
3688 return TRUE;
3689 }
3690
3691 if (elf32_arm_local_iplt (abfd) == NULL)
3692 return FALSE;
3693
3694 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3695 if (local_iplt == NULL)
3696 return FALSE;
3697
3698 *root_plt = &local_iplt->root;
3699 *arm_plt = &local_iplt->arm;
3700 return TRUE;
3701 }
3702
3703 static bfd_boolean using_thumb_only (struct elf32_arm_link_hash_table *globals);
3704
3705 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3706 before it. */
3707
3708 static bfd_boolean
3709 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3710 struct arm_plt_info *arm_plt)
3711 {
3712 struct elf32_arm_link_hash_table *htab;
3713
3714 htab = elf32_arm_hash_table (info);
3715
3716 return (!using_thumb_only(htab) && (arm_plt->thumb_refcount != 0
3717 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0)));
3718 }
3719
3720 /* Return a pointer to the head of the dynamic reloc list that should
3721 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3722 ABFD's symbol table. Return null if an error occurs. */
3723
3724 static struct elf_dyn_relocs **
3725 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3726 Elf_Internal_Sym *isym)
3727 {
3728 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3729 {
3730 struct arm_local_iplt_info *local_iplt;
3731
3732 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3733 if (local_iplt == NULL)
3734 return NULL;
3735 return &local_iplt->dyn_relocs;
3736 }
3737 else
3738 {
3739 /* Track dynamic relocs needed for local syms too.
3740 We really need local syms available to do this
3741 easily. Oh well. */
3742 asection *s;
3743 void *vpp;
3744
3745 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3746 if (s == NULL)
3747 abort ();
3748
3749 vpp = &elf_section_data (s)->local_dynrel;
3750 return (struct elf_dyn_relocs **) vpp;
3751 }
3752 }
3753
3754 /* Initialize an entry in the stub hash table. */
3755
3756 static struct bfd_hash_entry *
3757 stub_hash_newfunc (struct bfd_hash_entry *entry,
3758 struct bfd_hash_table *table,
3759 const char *string)
3760 {
3761 /* Allocate the structure if it has not already been allocated by a
3762 subclass. */
3763 if (entry == NULL)
3764 {
3765 entry = (struct bfd_hash_entry *)
3766 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3767 if (entry == NULL)
3768 return entry;
3769 }
3770
3771 /* Call the allocation method of the superclass. */
3772 entry = bfd_hash_newfunc (entry, table, string);
3773 if (entry != NULL)
3774 {
3775 struct elf32_arm_stub_hash_entry *eh;
3776
3777 /* Initialize the local fields. */
3778 eh = (struct elf32_arm_stub_hash_entry *) entry;
3779 eh->stub_sec = NULL;
3780 eh->stub_offset = (bfd_vma) -1;
3781 eh->source_value = 0;
3782 eh->target_value = 0;
3783 eh->target_section = NULL;
3784 eh->orig_insn = 0;
3785 eh->stub_type = arm_stub_none;
3786 eh->stub_size = 0;
3787 eh->stub_template = NULL;
3788 eh->stub_template_size = -1;
3789 eh->h = NULL;
3790 eh->id_sec = NULL;
3791 eh->output_name = NULL;
3792 }
3793
3794 return entry;
3795 }
3796
3797 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3798 shortcuts to them in our hash table. */
3799
3800 static bfd_boolean
3801 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3802 {
3803 struct elf32_arm_link_hash_table *htab;
3804
3805 htab = elf32_arm_hash_table (info);
3806 if (htab == NULL)
3807 return FALSE;
3808
3809 /* BPABI objects never have a GOT, or associated sections. */
3810 if (htab->symbian_p)
3811 return TRUE;
3812
3813 if (! _bfd_elf_create_got_section (dynobj, info))
3814 return FALSE;
3815
3816 /* Also create .rofixup. */
3817 if (htab->fdpic_p)
3818 {
3819 htab->srofixup = bfd_make_section_with_flags (dynobj, ".rofixup",
3820 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3821 | SEC_IN_MEMORY | SEC_LINKER_CREATED | SEC_READONLY));
3822 if (htab->srofixup == NULL
3823 || !bfd_set_section_alignment (htab->srofixup, 2))
3824 return FALSE;
3825 }
3826
3827 return TRUE;
3828 }
3829
3830 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3831
3832 static bfd_boolean
3833 create_ifunc_sections (struct bfd_link_info *info)
3834 {
3835 struct elf32_arm_link_hash_table *htab;
3836 const struct elf_backend_data *bed;
3837 bfd *dynobj;
3838 asection *s;
3839 flagword flags;
3840
3841 htab = elf32_arm_hash_table (info);
3842 dynobj = htab->root.dynobj;
3843 bed = get_elf_backend_data (dynobj);
3844 flags = bed->dynamic_sec_flags;
3845
3846 if (htab->root.iplt == NULL)
3847 {
3848 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3849 flags | SEC_READONLY | SEC_CODE);
3850 if (s == NULL
3851 || !bfd_set_section_alignment (s, bed->plt_alignment))
3852 return FALSE;
3853 htab->root.iplt = s;
3854 }
3855
3856 if (htab->root.irelplt == NULL)
3857 {
3858 s = bfd_make_section_anyway_with_flags (dynobj,
3859 RELOC_SECTION (htab, ".iplt"),
3860 flags | SEC_READONLY);
3861 if (s == NULL
3862 || !bfd_set_section_alignment (s, bed->s->log_file_align))
3863 return FALSE;
3864 htab->root.irelplt = s;
3865 }
3866
3867 if (htab->root.igotplt == NULL)
3868 {
3869 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3870 if (s == NULL
3871 || !bfd_set_section_alignment (s, bed->s->log_file_align))
3872 return FALSE;
3873 htab->root.igotplt = s;
3874 }
3875 return TRUE;
3876 }
3877
3878 /* Determine if we're dealing with a Thumb only architecture. */
3879
3880 static bfd_boolean
3881 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3882 {
3883 int arch;
3884 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3885 Tag_CPU_arch_profile);
3886
3887 if (profile)
3888 return profile == 'M';
3889
3890 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3891
3892 /* Force return logic to be reviewed for each new architecture. */
3893 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3894
3895 if (arch == TAG_CPU_ARCH_V6_M
3896 || arch == TAG_CPU_ARCH_V6S_M
3897 || arch == TAG_CPU_ARCH_V7E_M
3898 || arch == TAG_CPU_ARCH_V8M_BASE
3899 || arch == TAG_CPU_ARCH_V8M_MAIN
3900 || arch == TAG_CPU_ARCH_V8_1M_MAIN)
3901 return TRUE;
3902
3903 return FALSE;
3904 }
3905
3906 /* Determine if we're dealing with a Thumb-2 object. */
3907
3908 static bfd_boolean
3909 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3910 {
3911 int arch;
3912 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3913 Tag_THUMB_ISA_use);
3914
3915 if (thumb_isa)
3916 return thumb_isa == 2;
3917
3918 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3919
3920 /* Force return logic to be reviewed for each new architecture. */
3921 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3922
3923 return (arch == TAG_CPU_ARCH_V6T2
3924 || arch == TAG_CPU_ARCH_V7
3925 || arch == TAG_CPU_ARCH_V7E_M
3926 || arch == TAG_CPU_ARCH_V8
3927 || arch == TAG_CPU_ARCH_V8R
3928 || arch == TAG_CPU_ARCH_V8M_MAIN
3929 || arch == TAG_CPU_ARCH_V8_1M_MAIN);
3930 }
3931
3932 /* Determine whether Thumb-2 BL instruction is available. */
3933
3934 static bfd_boolean
3935 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3936 {
3937 int arch =
3938 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3939
3940 /* Force return logic to be reviewed for each new architecture. */
3941 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3942
3943 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3944 return (arch == TAG_CPU_ARCH_V6T2
3945 || arch >= TAG_CPU_ARCH_V7);
3946 }
3947
3948 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3949 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3950 hash table. */
3951
3952 static bfd_boolean
3953 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3954 {
3955 struct elf32_arm_link_hash_table *htab;
3956
3957 htab = elf32_arm_hash_table (info);
3958 if (htab == NULL)
3959 return FALSE;
3960
3961 if (!htab->root.sgot && !create_got_section (dynobj, info))
3962 return FALSE;
3963
3964 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3965 return FALSE;
3966
3967 if (htab->vxworks_p)
3968 {
3969 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3970 return FALSE;
3971
3972 if (bfd_link_pic (info))
3973 {
3974 htab->plt_header_size = 0;
3975 htab->plt_entry_size
3976 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3977 }
3978 else
3979 {
3980 htab->plt_header_size
3981 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3982 htab->plt_entry_size
3983 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3984 }
3985
3986 if (elf_elfheader (dynobj))
3987 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3988 }
3989 else
3990 {
3991 /* PR ld/16017
3992 Test for thumb only architectures. Note - we cannot just call
3993 using_thumb_only() as the attributes in the output bfd have not been
3994 initialised at this point, so instead we use the input bfd. */
3995 bfd * saved_obfd = htab->obfd;
3996
3997 htab->obfd = dynobj;
3998 if (using_thumb_only (htab))
3999 {
4000 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
4001 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
4002 }
4003 htab->obfd = saved_obfd;
4004 }
4005
4006 if (htab->fdpic_p) {
4007 htab->plt_header_size = 0;
4008 if (info->flags & DF_BIND_NOW)
4009 htab->plt_entry_size = 4 * (ARRAY_SIZE(elf32_arm_fdpic_plt_entry) - 5);
4010 else
4011 htab->plt_entry_size = 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry);
4012 }
4013
4014 if (!htab->root.splt
4015 || !htab->root.srelplt
4016 || !htab->root.sdynbss
4017 || (!bfd_link_pic (info) && !htab->root.srelbss))
4018 abort ();
4019
4020 return TRUE;
4021 }
4022
4023 /* Copy the extra info we tack onto an elf_link_hash_entry. */
4024
4025 static void
4026 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
4027 struct elf_link_hash_entry *dir,
4028 struct elf_link_hash_entry *ind)
4029 {
4030 struct elf32_arm_link_hash_entry *edir, *eind;
4031
4032 edir = (struct elf32_arm_link_hash_entry *) dir;
4033 eind = (struct elf32_arm_link_hash_entry *) ind;
4034
4035 if (eind->dyn_relocs != NULL)
4036 {
4037 if (edir->dyn_relocs != NULL)
4038 {
4039 struct elf_dyn_relocs **pp;
4040 struct elf_dyn_relocs *p;
4041
4042 /* Add reloc counts against the indirect sym to the direct sym
4043 list. Merge any entries against the same section. */
4044 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
4045 {
4046 struct elf_dyn_relocs *q;
4047
4048 for (q = edir->dyn_relocs; q != NULL; q = q->next)
4049 if (q->sec == p->sec)
4050 {
4051 q->pc_count += p->pc_count;
4052 q->count += p->count;
4053 *pp = p->next;
4054 break;
4055 }
4056 if (q == NULL)
4057 pp = &p->next;
4058 }
4059 *pp = edir->dyn_relocs;
4060 }
4061
4062 edir->dyn_relocs = eind->dyn_relocs;
4063 eind->dyn_relocs = NULL;
4064 }
4065
4066 if (ind->root.type == bfd_link_hash_indirect)
4067 {
4068 /* Copy over PLT info. */
4069 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
4070 eind->plt.thumb_refcount = 0;
4071 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
4072 eind->plt.maybe_thumb_refcount = 0;
4073 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
4074 eind->plt.noncall_refcount = 0;
4075
4076 /* Copy FDPIC counters. */
4077 edir->fdpic_cnts.gotofffuncdesc_cnt += eind->fdpic_cnts.gotofffuncdesc_cnt;
4078 edir->fdpic_cnts.gotfuncdesc_cnt += eind->fdpic_cnts.gotfuncdesc_cnt;
4079 edir->fdpic_cnts.funcdesc_cnt += eind->fdpic_cnts.funcdesc_cnt;
4080
4081 /* We should only allocate a function to .iplt once the final
4082 symbol information is known. */
4083 BFD_ASSERT (!eind->is_iplt);
4084
4085 if (dir->got.refcount <= 0)
4086 {
4087 edir->tls_type = eind->tls_type;
4088 eind->tls_type = GOT_UNKNOWN;
4089 }
4090 }
4091
4092 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
4093 }
4094
4095 /* Destroy an ARM elf linker hash table. */
4096
4097 static void
4098 elf32_arm_link_hash_table_free (bfd *obfd)
4099 {
4100 struct elf32_arm_link_hash_table *ret
4101 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
4102
4103 bfd_hash_table_free (&ret->stub_hash_table);
4104 _bfd_elf_link_hash_table_free (obfd);
4105 }
4106
4107 /* Create an ARM elf linker hash table. */
4108
4109 static struct bfd_link_hash_table *
4110 elf32_arm_link_hash_table_create (bfd *abfd)
4111 {
4112 struct elf32_arm_link_hash_table *ret;
4113 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
4114
4115 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
4116 if (ret == NULL)
4117 return NULL;
4118
4119 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
4120 elf32_arm_link_hash_newfunc,
4121 sizeof (struct elf32_arm_link_hash_entry),
4122 ARM_ELF_DATA))
4123 {
4124 free (ret);
4125 return NULL;
4126 }
4127
4128 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
4129 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
4130 #ifdef FOUR_WORD_PLT
4131 ret->plt_header_size = 16;
4132 ret->plt_entry_size = 16;
4133 #else
4134 ret->plt_header_size = 20;
4135 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
4136 #endif
4137 ret->use_rel = TRUE;
4138 ret->obfd = abfd;
4139 ret->fdpic_p = 0;
4140
4141 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
4142 sizeof (struct elf32_arm_stub_hash_entry)))
4143 {
4144 _bfd_elf_link_hash_table_free (abfd);
4145 return NULL;
4146 }
4147 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
4148
4149 return &ret->root.root;
4150 }
4151
4152 /* Determine what kind of NOPs are available. */
4153
4154 static bfd_boolean
4155 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
4156 {
4157 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4158 Tag_CPU_arch);
4159
4160 /* Force return logic to be reviewed for each new architecture. */
4161 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
4162
4163 return (arch == TAG_CPU_ARCH_V6T2
4164 || arch == TAG_CPU_ARCH_V6K
4165 || arch == TAG_CPU_ARCH_V7
4166 || arch == TAG_CPU_ARCH_V8
4167 || arch == TAG_CPU_ARCH_V8R);
4168 }
4169
4170 static bfd_boolean
4171 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
4172 {
4173 switch (stub_type)
4174 {
4175 case arm_stub_long_branch_thumb_only:
4176 case arm_stub_long_branch_thumb2_only:
4177 case arm_stub_long_branch_thumb2_only_pure:
4178 case arm_stub_long_branch_v4t_thumb_arm:
4179 case arm_stub_short_branch_v4t_thumb_arm:
4180 case arm_stub_long_branch_v4t_thumb_arm_pic:
4181 case arm_stub_long_branch_v4t_thumb_tls_pic:
4182 case arm_stub_long_branch_thumb_only_pic:
4183 case arm_stub_cmse_branch_thumb_only:
4184 return TRUE;
4185 case arm_stub_none:
4186 BFD_FAIL ();
4187 return FALSE;
4188 break;
4189 default:
4190 return FALSE;
4191 }
4192 }
4193
4194 /* Determine the type of stub needed, if any, for a call. */
4195
4196 static enum elf32_arm_stub_type
4197 arm_type_of_stub (struct bfd_link_info *info,
4198 asection *input_sec,
4199 const Elf_Internal_Rela *rel,
4200 unsigned char st_type,
4201 enum arm_st_branch_type *actual_branch_type,
4202 struct elf32_arm_link_hash_entry *hash,
4203 bfd_vma destination,
4204 asection *sym_sec,
4205 bfd *input_bfd,
4206 const char *name)
4207 {
4208 bfd_vma location;
4209 bfd_signed_vma branch_offset;
4210 unsigned int r_type;
4211 struct elf32_arm_link_hash_table * globals;
4212 bfd_boolean thumb2, thumb2_bl, thumb_only;
4213 enum elf32_arm_stub_type stub_type = arm_stub_none;
4214 int use_plt = 0;
4215 enum arm_st_branch_type branch_type = *actual_branch_type;
4216 union gotplt_union *root_plt;
4217 struct arm_plt_info *arm_plt;
4218 int arch;
4219 int thumb2_movw;
4220
4221 if (branch_type == ST_BRANCH_LONG)
4222 return stub_type;
4223
4224 globals = elf32_arm_hash_table (info);
4225 if (globals == NULL)
4226 return stub_type;
4227
4228 thumb_only = using_thumb_only (globals);
4229 thumb2 = using_thumb2 (globals);
4230 thumb2_bl = using_thumb2_bl (globals);
4231
4232 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
4233
4234 /* True for architectures that implement the thumb2 movw instruction. */
4235 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
4236
4237 /* Determine where the call point is. */
4238 location = (input_sec->output_offset
4239 + input_sec->output_section->vma
4240 + rel->r_offset);
4241
4242 r_type = ELF32_R_TYPE (rel->r_info);
4243
4244 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4245 are considering a function call relocation. */
4246 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4247 || r_type == R_ARM_THM_JUMP19)
4248 && branch_type == ST_BRANCH_TO_ARM)
4249 branch_type = ST_BRANCH_TO_THUMB;
4250
4251 /* For TLS call relocs, it is the caller's responsibility to provide
4252 the address of the appropriate trampoline. */
4253 if (r_type != R_ARM_TLS_CALL
4254 && r_type != R_ARM_THM_TLS_CALL
4255 && elf32_arm_get_plt_info (input_bfd, globals, hash,
4256 ELF32_R_SYM (rel->r_info), &root_plt,
4257 &arm_plt)
4258 && root_plt->offset != (bfd_vma) -1)
4259 {
4260 asection *splt;
4261
4262 if (hash == NULL || hash->is_iplt)
4263 splt = globals->root.iplt;
4264 else
4265 splt = globals->root.splt;
4266 if (splt != NULL)
4267 {
4268 use_plt = 1;
4269
4270 /* Note when dealing with PLT entries: the main PLT stub is in
4271 ARM mode, so if the branch is in Thumb mode, another
4272 Thumb->ARM stub will be inserted later just before the ARM
4273 PLT stub. If a long branch stub is needed, we'll add a
4274 Thumb->Arm one and branch directly to the ARM PLT entry.
4275 Here, we have to check if a pre-PLT Thumb->ARM stub
4276 is needed and if it will be close enough. */
4277
4278 destination = (splt->output_section->vma
4279 + splt->output_offset
4280 + root_plt->offset);
4281 st_type = STT_FUNC;
4282
4283 /* Thumb branch/call to PLT: it can become a branch to ARM
4284 or to Thumb. We must perform the same checks and
4285 corrections as in elf32_arm_final_link_relocate. */
4286 if ((r_type == R_ARM_THM_CALL)
4287 || (r_type == R_ARM_THM_JUMP24))
4288 {
4289 if (globals->use_blx
4290 && r_type == R_ARM_THM_CALL
4291 && !thumb_only)
4292 {
4293 /* If the Thumb BLX instruction is available, convert
4294 the BL to a BLX instruction to call the ARM-mode
4295 PLT entry. */
4296 branch_type = ST_BRANCH_TO_ARM;
4297 }
4298 else
4299 {
4300 if (!thumb_only)
4301 /* Target the Thumb stub before the ARM PLT entry. */
4302 destination -= PLT_THUMB_STUB_SIZE;
4303 branch_type = ST_BRANCH_TO_THUMB;
4304 }
4305 }
4306 else
4307 {
4308 branch_type = ST_BRANCH_TO_ARM;
4309 }
4310 }
4311 }
4312 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4313 BFD_ASSERT (st_type != STT_GNU_IFUNC);
4314
4315 branch_offset = (bfd_signed_vma)(destination - location);
4316
4317 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4318 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
4319 {
4320 /* Handle cases where:
4321 - this call goes too far (different Thumb/Thumb2 max
4322 distance)
4323 - it's a Thumb->Arm call and blx is not available, or it's a
4324 Thumb->Arm branch (not bl). A stub is needed in this case,
4325 but only if this call is not through a PLT entry. Indeed,
4326 PLT stubs handle mode switching already. */
4327 if ((!thumb2_bl
4328 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4329 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4330 || (thumb2_bl
4331 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4332 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4333 || (thumb2
4334 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4335 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4336 && (r_type == R_ARM_THM_JUMP19))
4337 || (branch_type == ST_BRANCH_TO_ARM
4338 && (((r_type == R_ARM_THM_CALL
4339 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4340 || (r_type == R_ARM_THM_JUMP24)
4341 || (r_type == R_ARM_THM_JUMP19))
4342 && !use_plt))
4343 {
4344 /* If we need to insert a Thumb-Thumb long branch stub to a
4345 PLT, use one that branches directly to the ARM PLT
4346 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4347 stub, undo this now. */
4348 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4349 {
4350 branch_type = ST_BRANCH_TO_ARM;
4351 branch_offset += PLT_THUMB_STUB_SIZE;
4352 }
4353
4354 if (branch_type == ST_BRANCH_TO_THUMB)
4355 {
4356 /* Thumb to thumb. */
4357 if (!thumb_only)
4358 {
4359 if (input_sec->flags & SEC_ELF_PURECODE)
4360 _bfd_error_handler
4361 (_("%pB(%pA): warning: long branch veneers used in"
4362 " section with SHF_ARM_PURECODE section"
4363 " attribute is only supported for M-profile"
4364 " targets that implement the movw instruction"),
4365 input_bfd, input_sec);
4366
4367 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4368 /* PIC stubs. */
4369 ? ((globals->use_blx
4370 && (r_type == R_ARM_THM_CALL))
4371 /* V5T and above. Stub starts with ARM code, so
4372 we must be able to switch mode before
4373 reaching it, which is only possible for 'bl'
4374 (ie R_ARM_THM_CALL relocation). */
4375 ? arm_stub_long_branch_any_thumb_pic
4376 /* On V4T, use Thumb code only. */
4377 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4378
4379 /* non-PIC stubs. */
4380 : ((globals->use_blx
4381 && (r_type == R_ARM_THM_CALL))
4382 /* V5T and above. */
4383 ? arm_stub_long_branch_any_any
4384 /* V4T. */
4385 : arm_stub_long_branch_v4t_thumb_thumb);
4386 }
4387 else
4388 {
4389 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4390 stub_type = arm_stub_long_branch_thumb2_only_pure;
4391 else
4392 {
4393 if (input_sec->flags & SEC_ELF_PURECODE)
4394 _bfd_error_handler
4395 (_("%pB(%pA): warning: long branch veneers used in"
4396 " section with SHF_ARM_PURECODE section"
4397 " attribute is only supported for M-profile"
4398 " targets that implement the movw instruction"),
4399 input_bfd, input_sec);
4400
4401 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4402 /* PIC stub. */
4403 ? arm_stub_long_branch_thumb_only_pic
4404 /* non-PIC stub. */
4405 : (thumb2 ? arm_stub_long_branch_thumb2_only
4406 : arm_stub_long_branch_thumb_only);
4407 }
4408 }
4409 }
4410 else
4411 {
4412 if (input_sec->flags & SEC_ELF_PURECODE)
4413 _bfd_error_handler
4414 (_("%pB(%pA): warning: long branch veneers used in"
4415 " section with SHF_ARM_PURECODE section"
4416 " attribute is only supported" " for M-profile"
4417 " targets that implement the movw instruction"),
4418 input_bfd, input_sec);
4419
4420 /* Thumb to arm. */
4421 if (sym_sec != NULL
4422 && sym_sec->owner != NULL
4423 && !INTERWORK_FLAG (sym_sec->owner))
4424 {
4425 _bfd_error_handler
4426 (_("%pB(%s): warning: interworking not enabled;"
4427 " first occurrence: %pB: %s call to %s"),
4428 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
4429 }
4430
4431 stub_type =
4432 (bfd_link_pic (info) | globals->pic_veneer)
4433 /* PIC stubs. */
4434 ? (r_type == R_ARM_THM_TLS_CALL
4435 /* TLS PIC stubs. */
4436 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4437 : arm_stub_long_branch_v4t_thumb_tls_pic)
4438 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4439 /* V5T PIC and above. */
4440 ? arm_stub_long_branch_any_arm_pic
4441 /* V4T PIC stub. */
4442 : arm_stub_long_branch_v4t_thumb_arm_pic))
4443
4444 /* non-PIC stubs. */
4445 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4446 /* V5T and above. */
4447 ? arm_stub_long_branch_any_any
4448 /* V4T. */
4449 : arm_stub_long_branch_v4t_thumb_arm);
4450
4451 /* Handle v4t short branches. */
4452 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4453 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4454 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4455 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4456 }
4457 }
4458 }
4459 else if (r_type == R_ARM_CALL
4460 || r_type == R_ARM_JUMP24
4461 || r_type == R_ARM_PLT32
4462 || r_type == R_ARM_TLS_CALL)
4463 {
4464 if (input_sec->flags & SEC_ELF_PURECODE)
4465 _bfd_error_handler
4466 (_("%pB(%pA): warning: long branch veneers used in"
4467 " section with SHF_ARM_PURECODE section"
4468 " attribute is only supported for M-profile"
4469 " targets that implement the movw instruction"),
4470 input_bfd, input_sec);
4471 if (branch_type == ST_BRANCH_TO_THUMB)
4472 {
4473 /* Arm to thumb. */
4474
4475 if (sym_sec != NULL
4476 && sym_sec->owner != NULL
4477 && !INTERWORK_FLAG (sym_sec->owner))
4478 {
4479 _bfd_error_handler
4480 (_("%pB(%s): warning: interworking not enabled;"
4481 " first occurrence: %pB: %s call to %s"),
4482 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
4483 }
4484
4485 /* We have an extra 2-bytes reach because of
4486 the mode change (bit 24 (H) of BLX encoding). */
4487 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4488 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4489 || (r_type == R_ARM_CALL && !globals->use_blx)
4490 || (r_type == R_ARM_JUMP24)
4491 || (r_type == R_ARM_PLT32))
4492 {
4493 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4494 /* PIC stubs. */
4495 ? ((globals->use_blx)
4496 /* V5T and above. */
4497 ? arm_stub_long_branch_any_thumb_pic
4498 /* V4T stub. */
4499 : arm_stub_long_branch_v4t_arm_thumb_pic)
4500
4501 /* non-PIC stubs. */
4502 : ((globals->use_blx)
4503 /* V5T and above. */
4504 ? arm_stub_long_branch_any_any
4505 /* V4T. */
4506 : arm_stub_long_branch_v4t_arm_thumb);
4507 }
4508 }
4509 else
4510 {
4511 /* Arm to arm. */
4512 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4513 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4514 {
4515 stub_type =
4516 (bfd_link_pic (info) | globals->pic_veneer)
4517 /* PIC stubs. */
4518 ? (r_type == R_ARM_TLS_CALL
4519 /* TLS PIC Stub. */
4520 ? arm_stub_long_branch_any_tls_pic
4521 : (globals->nacl_p
4522 ? arm_stub_long_branch_arm_nacl_pic
4523 : arm_stub_long_branch_any_arm_pic))
4524 /* non-PIC stubs. */
4525 : (globals->nacl_p
4526 ? arm_stub_long_branch_arm_nacl
4527 : arm_stub_long_branch_any_any);
4528 }
4529 }
4530 }
4531
4532 /* If a stub is needed, record the actual destination type. */
4533 if (stub_type != arm_stub_none)
4534 *actual_branch_type = branch_type;
4535
4536 return stub_type;
4537 }
4538
4539 /* Build a name for an entry in the stub hash table. */
4540
4541 static char *
4542 elf32_arm_stub_name (const asection *input_section,
4543 const asection *sym_sec,
4544 const struct elf32_arm_link_hash_entry *hash,
4545 const Elf_Internal_Rela *rel,
4546 enum elf32_arm_stub_type stub_type)
4547 {
4548 char *stub_name;
4549 bfd_size_type len;
4550
4551 if (hash)
4552 {
4553 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4554 stub_name = (char *) bfd_malloc (len);
4555 if (stub_name != NULL)
4556 sprintf (stub_name, "%08x_%s+%x_%d",
4557 input_section->id & 0xffffffff,
4558 hash->root.root.root.string,
4559 (int) rel->r_addend & 0xffffffff,
4560 (int) stub_type);
4561 }
4562 else
4563 {
4564 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4565 stub_name = (char *) bfd_malloc (len);
4566 if (stub_name != NULL)
4567 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4568 input_section->id & 0xffffffff,
4569 sym_sec->id & 0xffffffff,
4570 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4571 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4572 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4573 (int) rel->r_addend & 0xffffffff,
4574 (int) stub_type);
4575 }
4576
4577 return stub_name;
4578 }
4579
4580 /* Look up an entry in the stub hash. Stub entries are cached because
4581 creating the stub name takes a bit of time. */
4582
4583 static struct elf32_arm_stub_hash_entry *
4584 elf32_arm_get_stub_entry (const asection *input_section,
4585 const asection *sym_sec,
4586 struct elf_link_hash_entry *hash,
4587 const Elf_Internal_Rela *rel,
4588 struct elf32_arm_link_hash_table *htab,
4589 enum elf32_arm_stub_type stub_type)
4590 {
4591 struct elf32_arm_stub_hash_entry *stub_entry;
4592 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4593 const asection *id_sec;
4594
4595 if ((input_section->flags & SEC_CODE) == 0)
4596 return NULL;
4597
4598 /* If the input section is the CMSE stubs one and it needs a long
4599 branch stub to reach it's final destination, give up with an
4600 error message: this is not supported. See PR ld/24709. */
4601 if (!strncmp (input_section->name, CMSE_STUB_NAME, strlen(CMSE_STUB_NAME)))
4602 {
4603 bfd *output_bfd = htab->obfd;
4604 asection *out_sec = bfd_get_section_by_name (output_bfd, CMSE_STUB_NAME);
4605
4606 _bfd_error_handler (_("ERROR: CMSE stub (%s section) too far "
4607 "(%#" PRIx64 ") from destination (%#" PRIx64 ")"),
4608 CMSE_STUB_NAME,
4609 (uint64_t)out_sec->output_section->vma
4610 + out_sec->output_offset,
4611 (uint64_t)sym_sec->output_section->vma
4612 + sym_sec->output_offset
4613 + h->root.root.u.def.value);
4614 /* Exit, rather than leave incompletely processed
4615 relocations. */
4616 xexit(1);
4617 }
4618
4619 /* If this input section is part of a group of sections sharing one
4620 stub section, then use the id of the first section in the group.
4621 Stub names need to include a section id, as there may well be
4622 more than one stub used to reach say, printf, and we need to
4623 distinguish between them. */
4624 BFD_ASSERT (input_section->id <= htab->top_id);
4625 id_sec = htab->stub_group[input_section->id].link_sec;
4626
4627 if (h != NULL && h->stub_cache != NULL
4628 && h->stub_cache->h == h
4629 && h->stub_cache->id_sec == id_sec
4630 && h->stub_cache->stub_type == stub_type)
4631 {
4632 stub_entry = h->stub_cache;
4633 }
4634 else
4635 {
4636 char *stub_name;
4637
4638 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4639 if (stub_name == NULL)
4640 return NULL;
4641
4642 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4643 stub_name, FALSE, FALSE);
4644 if (h != NULL)
4645 h->stub_cache = stub_entry;
4646
4647 free (stub_name);
4648 }
4649
4650 return stub_entry;
4651 }
4652
4653 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4654 section. */
4655
4656 static bfd_boolean
4657 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4658 {
4659 if (stub_type >= max_stub_type)
4660 abort (); /* Should be unreachable. */
4661
4662 switch (stub_type)
4663 {
4664 case arm_stub_cmse_branch_thumb_only:
4665 return TRUE;
4666
4667 default:
4668 return FALSE;
4669 }
4670
4671 abort (); /* Should be unreachable. */
4672 }
4673
4674 /* Required alignment (as a power of 2) for the dedicated section holding
4675 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4676 with input sections. */
4677
4678 static int
4679 arm_dedicated_stub_output_section_required_alignment
4680 (enum elf32_arm_stub_type stub_type)
4681 {
4682 if (stub_type >= max_stub_type)
4683 abort (); /* Should be unreachable. */
4684
4685 switch (stub_type)
4686 {
4687 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4688 boundary. */
4689 case arm_stub_cmse_branch_thumb_only:
4690 return 5;
4691
4692 default:
4693 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4694 return 0;
4695 }
4696
4697 abort (); /* Should be unreachable. */
4698 }
4699
4700 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4701 NULL if veneers of this type are interspersed with input sections. */
4702
4703 static const char *
4704 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4705 {
4706 if (stub_type >= max_stub_type)
4707 abort (); /* Should be unreachable. */
4708
4709 switch (stub_type)
4710 {
4711 case arm_stub_cmse_branch_thumb_only:
4712 return CMSE_STUB_NAME;
4713
4714 default:
4715 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4716 return NULL;
4717 }
4718
4719 abort (); /* Should be unreachable. */
4720 }
4721
4722 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4723 returns the address of the hash table field in HTAB holding a pointer to the
4724 corresponding input section. Otherwise, returns NULL. */
4725
4726 static asection **
4727 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4728 enum elf32_arm_stub_type stub_type)
4729 {
4730 if (stub_type >= max_stub_type)
4731 abort (); /* Should be unreachable. */
4732
4733 switch (stub_type)
4734 {
4735 case arm_stub_cmse_branch_thumb_only:
4736 return &htab->cmse_stub_sec;
4737
4738 default:
4739 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4740 return NULL;
4741 }
4742
4743 abort (); /* Should be unreachable. */
4744 }
4745
4746 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4747 is the section that branch into veneer and can be NULL if stub should go in
4748 a dedicated output section. Returns a pointer to the stub section, and the
4749 section to which the stub section will be attached (in *LINK_SEC_P).
4750 LINK_SEC_P may be NULL. */
4751
4752 static asection *
4753 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4754 struct elf32_arm_link_hash_table *htab,
4755 enum elf32_arm_stub_type stub_type)
4756 {
4757 asection *link_sec, *out_sec, **stub_sec_p;
4758 const char *stub_sec_prefix;
4759 bfd_boolean dedicated_output_section =
4760 arm_dedicated_stub_output_section_required (stub_type);
4761 int align;
4762
4763 if (dedicated_output_section)
4764 {
4765 bfd *output_bfd = htab->obfd;
4766 const char *out_sec_name =
4767 arm_dedicated_stub_output_section_name (stub_type);
4768 link_sec = NULL;
4769 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4770 stub_sec_prefix = out_sec_name;
4771 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4772 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4773 if (out_sec == NULL)
4774 {
4775 _bfd_error_handler (_("no address assigned to the veneers output "
4776 "section %s"), out_sec_name);
4777 return NULL;
4778 }
4779 }
4780 else
4781 {
4782 BFD_ASSERT (section->id <= htab->top_id);
4783 link_sec = htab->stub_group[section->id].link_sec;
4784 BFD_ASSERT (link_sec != NULL);
4785 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4786 if (*stub_sec_p == NULL)
4787 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4788 stub_sec_prefix = link_sec->name;
4789 out_sec = link_sec->output_section;
4790 align = htab->nacl_p ? 4 : 3;
4791 }
4792
4793 if (*stub_sec_p == NULL)
4794 {
4795 size_t namelen;
4796 bfd_size_type len;
4797 char *s_name;
4798
4799 namelen = strlen (stub_sec_prefix);
4800 len = namelen + sizeof (STUB_SUFFIX);
4801 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4802 if (s_name == NULL)
4803 return NULL;
4804
4805 memcpy (s_name, stub_sec_prefix, namelen);
4806 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4807 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4808 align);
4809 if (*stub_sec_p == NULL)
4810 return NULL;
4811
4812 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4813 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4814 | SEC_KEEP;
4815 }
4816
4817 if (!dedicated_output_section)
4818 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4819
4820 if (link_sec_p)
4821 *link_sec_p = link_sec;
4822
4823 return *stub_sec_p;
4824 }
4825
4826 /* Add a new stub entry to the stub hash. Not all fields of the new
4827 stub entry are initialised. */
4828
4829 static struct elf32_arm_stub_hash_entry *
4830 elf32_arm_add_stub (const char *stub_name, asection *section,
4831 struct elf32_arm_link_hash_table *htab,
4832 enum elf32_arm_stub_type stub_type)
4833 {
4834 asection *link_sec;
4835 asection *stub_sec;
4836 struct elf32_arm_stub_hash_entry *stub_entry;
4837
4838 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4839 stub_type);
4840 if (stub_sec == NULL)
4841 return NULL;
4842
4843 /* Enter this entry into the linker stub hash table. */
4844 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4845 TRUE, FALSE);
4846 if (stub_entry == NULL)
4847 {
4848 if (section == NULL)
4849 section = stub_sec;
4850 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4851 section->owner, stub_name);
4852 return NULL;
4853 }
4854
4855 stub_entry->stub_sec = stub_sec;
4856 stub_entry->stub_offset = (bfd_vma) -1;
4857 stub_entry->id_sec = link_sec;
4858
4859 return stub_entry;
4860 }
4861
4862 /* Store an Arm insn into an output section not processed by
4863 elf32_arm_write_section. */
4864
4865 static void
4866 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4867 bfd * output_bfd, bfd_vma val, void * ptr)
4868 {
4869 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4870 bfd_putl32 (val, ptr);
4871 else
4872 bfd_putb32 (val, ptr);
4873 }
4874
4875 /* Store a 16-bit Thumb insn into an output section not processed by
4876 elf32_arm_write_section. */
4877
4878 static void
4879 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4880 bfd * output_bfd, bfd_vma val, void * ptr)
4881 {
4882 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4883 bfd_putl16 (val, ptr);
4884 else
4885 bfd_putb16 (val, ptr);
4886 }
4887
4888 /* Store a Thumb2 insn into an output section not processed by
4889 elf32_arm_write_section. */
4890
4891 static void
4892 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4893 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4894 {
4895 /* T2 instructions are 16-bit streamed. */
4896 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4897 {
4898 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4899 bfd_putl16 ((val & 0xffff), ptr + 2);
4900 }
4901 else
4902 {
4903 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4904 bfd_putb16 ((val & 0xffff), ptr + 2);
4905 }
4906 }
4907
4908 /* If it's possible to change R_TYPE to a more efficient access
4909 model, return the new reloc type. */
4910
4911 static unsigned
4912 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4913 struct elf_link_hash_entry *h)
4914 {
4915 int is_local = (h == NULL);
4916
4917 if (bfd_link_dll (info)
4918 || (h && h->root.type == bfd_link_hash_undefweak))
4919 return r_type;
4920
4921 /* We do not support relaxations for Old TLS models. */
4922 switch (r_type)
4923 {
4924 case R_ARM_TLS_GOTDESC:
4925 case R_ARM_TLS_CALL:
4926 case R_ARM_THM_TLS_CALL:
4927 case R_ARM_TLS_DESCSEQ:
4928 case R_ARM_THM_TLS_DESCSEQ:
4929 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4930 }
4931
4932 return r_type;
4933 }
4934
4935 static bfd_reloc_status_type elf32_arm_final_link_relocate
4936 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4937 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4938 const char *, unsigned char, enum arm_st_branch_type,
4939 struct elf_link_hash_entry *, bfd_boolean *, char **);
4940
4941 static unsigned int
4942 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4943 {
4944 switch (stub_type)
4945 {
4946 case arm_stub_a8_veneer_b_cond:
4947 case arm_stub_a8_veneer_b:
4948 case arm_stub_a8_veneer_bl:
4949 return 2;
4950
4951 case arm_stub_long_branch_any_any:
4952 case arm_stub_long_branch_v4t_arm_thumb:
4953 case arm_stub_long_branch_thumb_only:
4954 case arm_stub_long_branch_thumb2_only:
4955 case arm_stub_long_branch_thumb2_only_pure:
4956 case arm_stub_long_branch_v4t_thumb_thumb:
4957 case arm_stub_long_branch_v4t_thumb_arm:
4958 case arm_stub_short_branch_v4t_thumb_arm:
4959 case arm_stub_long_branch_any_arm_pic:
4960 case arm_stub_long_branch_any_thumb_pic:
4961 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4962 case arm_stub_long_branch_v4t_arm_thumb_pic:
4963 case arm_stub_long_branch_v4t_thumb_arm_pic:
4964 case arm_stub_long_branch_thumb_only_pic:
4965 case arm_stub_long_branch_any_tls_pic:
4966 case arm_stub_long_branch_v4t_thumb_tls_pic:
4967 case arm_stub_cmse_branch_thumb_only:
4968 case arm_stub_a8_veneer_blx:
4969 return 4;
4970
4971 case arm_stub_long_branch_arm_nacl:
4972 case arm_stub_long_branch_arm_nacl_pic:
4973 return 16;
4974
4975 default:
4976 abort (); /* Should be unreachable. */
4977 }
4978 }
4979
4980 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4981 veneering (TRUE) or have their own symbol (FALSE). */
4982
4983 static bfd_boolean
4984 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4985 {
4986 if (stub_type >= max_stub_type)
4987 abort (); /* Should be unreachable. */
4988
4989 switch (stub_type)
4990 {
4991 case arm_stub_cmse_branch_thumb_only:
4992 return TRUE;
4993
4994 default:
4995 return FALSE;
4996 }
4997
4998 abort (); /* Should be unreachable. */
4999 }
5000
5001 /* Returns the padding needed for the dedicated section used stubs of type
5002 STUB_TYPE. */
5003
5004 static int
5005 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
5006 {
5007 if (stub_type >= max_stub_type)
5008 abort (); /* Should be unreachable. */
5009
5010 switch (stub_type)
5011 {
5012 case arm_stub_cmse_branch_thumb_only:
5013 return 32;
5014
5015 default:
5016 return 0;
5017 }
5018
5019 abort (); /* Should be unreachable. */
5020 }
5021
5022 /* If veneers of type STUB_TYPE should go in a dedicated output section,
5023 returns the address of the hash table field in HTAB holding the offset at
5024 which new veneers should be layed out in the stub section. */
5025
5026 static bfd_vma*
5027 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
5028 enum elf32_arm_stub_type stub_type)
5029 {
5030 switch (stub_type)
5031 {
5032 case arm_stub_cmse_branch_thumb_only:
5033 return &htab->new_cmse_stub_offset;
5034
5035 default:
5036 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
5037 return NULL;
5038 }
5039 }
5040
5041 static bfd_boolean
5042 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
5043 void * in_arg)
5044 {
5045 #define MAXRELOCS 3
5046 bfd_boolean removed_sg_veneer;
5047 struct elf32_arm_stub_hash_entry *stub_entry;
5048 struct elf32_arm_link_hash_table *globals;
5049 struct bfd_link_info *info;
5050 asection *stub_sec;
5051 bfd *stub_bfd;
5052 bfd_byte *loc;
5053 bfd_vma sym_value;
5054 int template_size;
5055 int size;
5056 const insn_sequence *template_sequence;
5057 int i;
5058 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
5059 int stub_reloc_offset[MAXRELOCS] = {0, 0};
5060 int nrelocs = 0;
5061 int just_allocated = 0;
5062
5063 /* Massage our args to the form they really have. */
5064 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5065 info = (struct bfd_link_info *) in_arg;
5066
5067 globals = elf32_arm_hash_table (info);
5068 if (globals == NULL)
5069 return FALSE;
5070
5071 stub_sec = stub_entry->stub_sec;
5072
5073 if ((globals->fix_cortex_a8 < 0)
5074 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
5075 /* We have to do less-strictly-aligned fixes last. */
5076 return TRUE;
5077
5078 /* Assign a slot at the end of section if none assigned yet. */
5079 if (stub_entry->stub_offset == (bfd_vma) -1)
5080 {
5081 stub_entry->stub_offset = stub_sec->size;
5082 just_allocated = 1;
5083 }
5084 loc = stub_sec->contents + stub_entry->stub_offset;
5085
5086 stub_bfd = stub_sec->owner;
5087
5088 /* This is the address of the stub destination. */
5089 sym_value = (stub_entry->target_value
5090 + stub_entry->target_section->output_offset
5091 + stub_entry->target_section->output_section->vma);
5092
5093 template_sequence = stub_entry->stub_template;
5094 template_size = stub_entry->stub_template_size;
5095
5096 size = 0;
5097 for (i = 0; i < template_size; i++)
5098 {
5099 switch (template_sequence[i].type)
5100 {
5101 case THUMB16_TYPE:
5102 {
5103 bfd_vma data = (bfd_vma) template_sequence[i].data;
5104 if (template_sequence[i].reloc_addend != 0)
5105 {
5106 /* We've borrowed the reloc_addend field to mean we should
5107 insert a condition code into this (Thumb-1 branch)
5108 instruction. See THUMB16_BCOND_INSN. */
5109 BFD_ASSERT ((data & 0xff00) == 0xd000);
5110 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
5111 }
5112 bfd_put_16 (stub_bfd, data, loc + size);
5113 size += 2;
5114 }
5115 break;
5116
5117 case THUMB32_TYPE:
5118 bfd_put_16 (stub_bfd,
5119 (template_sequence[i].data >> 16) & 0xffff,
5120 loc + size);
5121 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
5122 loc + size + 2);
5123 if (template_sequence[i].r_type != R_ARM_NONE)
5124 {
5125 stub_reloc_idx[nrelocs] = i;
5126 stub_reloc_offset[nrelocs++] = size;
5127 }
5128 size += 4;
5129 break;
5130
5131 case ARM_TYPE:
5132 bfd_put_32 (stub_bfd, template_sequence[i].data,
5133 loc + size);
5134 /* Handle cases where the target is encoded within the
5135 instruction. */
5136 if (template_sequence[i].r_type == R_ARM_JUMP24)
5137 {
5138 stub_reloc_idx[nrelocs] = i;
5139 stub_reloc_offset[nrelocs++] = size;
5140 }
5141 size += 4;
5142 break;
5143
5144 case DATA_TYPE:
5145 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
5146 stub_reloc_idx[nrelocs] = i;
5147 stub_reloc_offset[nrelocs++] = size;
5148 size += 4;
5149 break;
5150
5151 default:
5152 BFD_FAIL ();
5153 return FALSE;
5154 }
5155 }
5156
5157 if (just_allocated)
5158 stub_sec->size += size;
5159
5160 /* Stub size has already been computed in arm_size_one_stub. Check
5161 consistency. */
5162 BFD_ASSERT (size == stub_entry->stub_size);
5163
5164 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
5165 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
5166 sym_value |= 1;
5167
5168 /* Assume non empty slots have at least one and at most MAXRELOCS entries
5169 to relocate in each stub. */
5170 removed_sg_veneer =
5171 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5172 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
5173
5174 for (i = 0; i < nrelocs; i++)
5175 {
5176 Elf_Internal_Rela rel;
5177 bfd_boolean unresolved_reloc;
5178 char *error_message;
5179 bfd_vma points_to =
5180 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
5181
5182 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
5183 rel.r_info = ELF32_R_INFO (0,
5184 template_sequence[stub_reloc_idx[i]].r_type);
5185 rel.r_addend = 0;
5186
5187 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
5188 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5189 template should refer back to the instruction after the original
5190 branch. We use target_section as Cortex-A8 erratum workaround stubs
5191 are only generated when both source and target are in the same
5192 section. */
5193 points_to = stub_entry->target_section->output_section->vma
5194 + stub_entry->target_section->output_offset
5195 + stub_entry->source_value;
5196
5197 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5198 (template_sequence[stub_reloc_idx[i]].r_type),
5199 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
5200 points_to, info, stub_entry->target_section, "", STT_FUNC,
5201 stub_entry->branch_type,
5202 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
5203 &error_message);
5204 }
5205
5206 return TRUE;
5207 #undef MAXRELOCS
5208 }
5209
5210 /* Calculate the template, template size and instruction size for a stub.
5211 Return value is the instruction size. */
5212
5213 static unsigned int
5214 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
5215 const insn_sequence **stub_template,
5216 int *stub_template_size)
5217 {
5218 const insn_sequence *template_sequence = NULL;
5219 int template_size = 0, i;
5220 unsigned int size;
5221
5222 template_sequence = stub_definitions[stub_type].template_sequence;
5223 if (stub_template)
5224 *stub_template = template_sequence;
5225
5226 template_size = stub_definitions[stub_type].template_size;
5227 if (stub_template_size)
5228 *stub_template_size = template_size;
5229
5230 size = 0;
5231 for (i = 0; i < template_size; i++)
5232 {
5233 switch (template_sequence[i].type)
5234 {
5235 case THUMB16_TYPE:
5236 size += 2;
5237 break;
5238
5239 case ARM_TYPE:
5240 case THUMB32_TYPE:
5241 case DATA_TYPE:
5242 size += 4;
5243 break;
5244
5245 default:
5246 BFD_FAIL ();
5247 return 0;
5248 }
5249 }
5250
5251 return size;
5252 }
5253
5254 /* As above, but don't actually build the stub. Just bump offset so
5255 we know stub section sizes. */
5256
5257 static bfd_boolean
5258 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
5259 void *in_arg ATTRIBUTE_UNUSED)
5260 {
5261 struct elf32_arm_stub_hash_entry *stub_entry;
5262 const insn_sequence *template_sequence;
5263 int template_size, size;
5264
5265 /* Massage our args to the form they really have. */
5266 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5267
5268 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
5269 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
5270
5271 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
5272 &template_size);
5273
5274 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
5275 if (stub_entry->stub_template_size)
5276 {
5277 stub_entry->stub_size = size;
5278 stub_entry->stub_template = template_sequence;
5279 stub_entry->stub_template_size = template_size;
5280 }
5281
5282 /* Already accounted for. */
5283 if (stub_entry->stub_offset != (bfd_vma) -1)
5284 return TRUE;
5285
5286 size = (size + 7) & ~7;
5287 stub_entry->stub_sec->size += size;
5288
5289 return TRUE;
5290 }
5291
5292 /* External entry points for sizing and building linker stubs. */
5293
5294 /* Set up various things so that we can make a list of input sections
5295 for each output section included in the link. Returns -1 on error,
5296 0 when no stubs will be needed, and 1 on success. */
5297
5298 int
5299 elf32_arm_setup_section_lists (bfd *output_bfd,
5300 struct bfd_link_info *info)
5301 {
5302 bfd *input_bfd;
5303 unsigned int bfd_count;
5304 unsigned int top_id, top_index;
5305 asection *section;
5306 asection **input_list, **list;
5307 bfd_size_type amt;
5308 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5309
5310 if (htab == NULL)
5311 return 0;
5312 if (! is_elf_hash_table (htab))
5313 return 0;
5314
5315 /* Count the number of input BFDs and find the top input section id. */
5316 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
5317 input_bfd != NULL;
5318 input_bfd = input_bfd->link.next)
5319 {
5320 bfd_count += 1;
5321 for (section = input_bfd->sections;
5322 section != NULL;
5323 section = section->next)
5324 {
5325 if (top_id < section->id)
5326 top_id = section->id;
5327 }
5328 }
5329 htab->bfd_count = bfd_count;
5330
5331 amt = sizeof (struct map_stub) * (top_id + 1);
5332 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
5333 if (htab->stub_group == NULL)
5334 return -1;
5335 htab->top_id = top_id;
5336
5337 /* We can't use output_bfd->section_count here to find the top output
5338 section index as some sections may have been removed, and
5339 _bfd_strip_section_from_output doesn't renumber the indices. */
5340 for (section = output_bfd->sections, top_index = 0;
5341 section != NULL;
5342 section = section->next)
5343 {
5344 if (top_index < section->index)
5345 top_index = section->index;
5346 }
5347
5348 htab->top_index = top_index;
5349 amt = sizeof (asection *) * (top_index + 1);
5350 input_list = (asection **) bfd_malloc (amt);
5351 htab->input_list = input_list;
5352 if (input_list == NULL)
5353 return -1;
5354
5355 /* For sections we aren't interested in, mark their entries with a
5356 value we can check later. */
5357 list = input_list + top_index;
5358 do
5359 *list = bfd_abs_section_ptr;
5360 while (list-- != input_list);
5361
5362 for (section = output_bfd->sections;
5363 section != NULL;
5364 section = section->next)
5365 {
5366 if ((section->flags & SEC_CODE) != 0)
5367 input_list[section->index] = NULL;
5368 }
5369
5370 return 1;
5371 }
5372
5373 /* The linker repeatedly calls this function for each input section,
5374 in the order that input sections are linked into output sections.
5375 Build lists of input sections to determine groupings between which
5376 we may insert linker stubs. */
5377
5378 void
5379 elf32_arm_next_input_section (struct bfd_link_info *info,
5380 asection *isec)
5381 {
5382 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5383
5384 if (htab == NULL)
5385 return;
5386
5387 if (isec->output_section->index <= htab->top_index)
5388 {
5389 asection **list = htab->input_list + isec->output_section->index;
5390
5391 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5392 {
5393 /* Steal the link_sec pointer for our list. */
5394 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5395 /* This happens to make the list in reverse order,
5396 which we reverse later. */
5397 PREV_SEC (isec) = *list;
5398 *list = isec;
5399 }
5400 }
5401 }
5402
5403 /* See whether we can group stub sections together. Grouping stub
5404 sections may result in fewer stubs. More importantly, we need to
5405 put all .init* and .fini* stubs at the end of the .init or
5406 .fini output sections respectively, because glibc splits the
5407 _init and _fini functions into multiple parts. Putting a stub in
5408 the middle of a function is not a good idea. */
5409
5410 static void
5411 group_sections (struct elf32_arm_link_hash_table *htab,
5412 bfd_size_type stub_group_size,
5413 bfd_boolean stubs_always_after_branch)
5414 {
5415 asection **list = htab->input_list;
5416
5417 do
5418 {
5419 asection *tail = *list;
5420 asection *head;
5421
5422 if (tail == bfd_abs_section_ptr)
5423 continue;
5424
5425 /* Reverse the list: we must avoid placing stubs at the
5426 beginning of the section because the beginning of the text
5427 section may be required for an interrupt vector in bare metal
5428 code. */
5429 #define NEXT_SEC PREV_SEC
5430 head = NULL;
5431 while (tail != NULL)
5432 {
5433 /* Pop from tail. */
5434 asection *item = tail;
5435 tail = PREV_SEC (item);
5436
5437 /* Push on head. */
5438 NEXT_SEC (item) = head;
5439 head = item;
5440 }
5441
5442 while (head != NULL)
5443 {
5444 asection *curr;
5445 asection *next;
5446 bfd_vma stub_group_start = head->output_offset;
5447 bfd_vma end_of_next;
5448
5449 curr = head;
5450 while (NEXT_SEC (curr) != NULL)
5451 {
5452 next = NEXT_SEC (curr);
5453 end_of_next = next->output_offset + next->size;
5454 if (end_of_next - stub_group_start >= stub_group_size)
5455 /* End of NEXT is too far from start, so stop. */
5456 break;
5457 /* Add NEXT to the group. */
5458 curr = next;
5459 }
5460
5461 /* OK, the size from the start to the start of CURR is less
5462 than stub_group_size and thus can be handled by one stub
5463 section. (Or the head section is itself larger than
5464 stub_group_size, in which case we may be toast.)
5465 We should really be keeping track of the total size of
5466 stubs added here, as stubs contribute to the final output
5467 section size. */
5468 do
5469 {
5470 next = NEXT_SEC (head);
5471 /* Set up this stub group. */
5472 htab->stub_group[head->id].link_sec = curr;
5473 }
5474 while (head != curr && (head = next) != NULL);
5475
5476 /* But wait, there's more! Input sections up to stub_group_size
5477 bytes after the stub section can be handled by it too. */
5478 if (!stubs_always_after_branch)
5479 {
5480 stub_group_start = curr->output_offset + curr->size;
5481
5482 while (next != NULL)
5483 {
5484 end_of_next = next->output_offset + next->size;
5485 if (end_of_next - stub_group_start >= stub_group_size)
5486 /* End of NEXT is too far from stubs, so stop. */
5487 break;
5488 /* Add NEXT to the stub group. */
5489 head = next;
5490 next = NEXT_SEC (head);
5491 htab->stub_group[head->id].link_sec = curr;
5492 }
5493 }
5494 head = next;
5495 }
5496 }
5497 while (list++ != htab->input_list + htab->top_index);
5498
5499 free (htab->input_list);
5500 #undef PREV_SEC
5501 #undef NEXT_SEC
5502 }
5503
5504 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5505 erratum fix. */
5506
5507 static int
5508 a8_reloc_compare (const void *a, const void *b)
5509 {
5510 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5511 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5512
5513 if (ra->from < rb->from)
5514 return -1;
5515 else if (ra->from > rb->from)
5516 return 1;
5517 else
5518 return 0;
5519 }
5520
5521 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5522 const char *, char **);
5523
5524 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5525 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5526 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5527 otherwise. */
5528
5529 static bfd_boolean
5530 cortex_a8_erratum_scan (bfd *input_bfd,
5531 struct bfd_link_info *info,
5532 struct a8_erratum_fix **a8_fixes_p,
5533 unsigned int *num_a8_fixes_p,
5534 unsigned int *a8_fix_table_size_p,
5535 struct a8_erratum_reloc *a8_relocs,
5536 unsigned int num_a8_relocs,
5537 unsigned prev_num_a8_fixes,
5538 bfd_boolean *stub_changed_p)
5539 {
5540 asection *section;
5541 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5542 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5543 unsigned int num_a8_fixes = *num_a8_fixes_p;
5544 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5545
5546 if (htab == NULL)
5547 return FALSE;
5548
5549 for (section = input_bfd->sections;
5550 section != NULL;
5551 section = section->next)
5552 {
5553 bfd_byte *contents = NULL;
5554 struct _arm_elf_section_data *sec_data;
5555 unsigned int span;
5556 bfd_vma base_vma;
5557
5558 if (elf_section_type (section) != SHT_PROGBITS
5559 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5560 || (section->flags & SEC_EXCLUDE) != 0
5561 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5562 || (section->output_section == bfd_abs_section_ptr))
5563 continue;
5564
5565 base_vma = section->output_section->vma + section->output_offset;
5566
5567 if (elf_section_data (section)->this_hdr.contents != NULL)
5568 contents = elf_section_data (section)->this_hdr.contents;
5569 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5570 return TRUE;
5571
5572 sec_data = elf32_arm_section_data (section);
5573
5574 for (span = 0; span < sec_data->mapcount; span++)
5575 {
5576 unsigned int span_start = sec_data->map[span].vma;
5577 unsigned int span_end = (span == sec_data->mapcount - 1)
5578 ? section->size : sec_data->map[span + 1].vma;
5579 unsigned int i;
5580 char span_type = sec_data->map[span].type;
5581 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5582
5583 if (span_type != 't')
5584 continue;
5585
5586 /* Span is entirely within a single 4KB region: skip scanning. */
5587 if (((base_vma + span_start) & ~0xfff)
5588 == ((base_vma + span_end) & ~0xfff))
5589 continue;
5590
5591 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5592
5593 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5594 * The branch target is in the same 4KB region as the
5595 first half of the branch.
5596 * The instruction before the branch is a 32-bit
5597 length non-branch instruction. */
5598 for (i = span_start; i < span_end;)
5599 {
5600 unsigned int insn = bfd_getl16 (&contents[i]);
5601 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5602 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5603
5604 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5605 insn_32bit = TRUE;
5606
5607 if (insn_32bit)
5608 {
5609 /* Load the rest of the insn (in manual-friendly order). */
5610 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5611
5612 /* Encoding T4: B<c>.W. */
5613 is_b = (insn & 0xf800d000) == 0xf0009000;
5614 /* Encoding T1: BL<c>.W. */
5615 is_bl = (insn & 0xf800d000) == 0xf000d000;
5616 /* Encoding T2: BLX<c>.W. */
5617 is_blx = (insn & 0xf800d000) == 0xf000c000;
5618 /* Encoding T3: B<c>.W (not permitted in IT block). */
5619 is_bcc = (insn & 0xf800d000) == 0xf0008000
5620 && (insn & 0x07f00000) != 0x03800000;
5621 }
5622
5623 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5624
5625 if (((base_vma + i) & 0xfff) == 0xffe
5626 && insn_32bit
5627 && is_32bit_branch
5628 && last_was_32bit
5629 && ! last_was_branch)
5630 {
5631 bfd_signed_vma offset = 0;
5632 bfd_boolean force_target_arm = FALSE;
5633 bfd_boolean force_target_thumb = FALSE;
5634 bfd_vma target;
5635 enum elf32_arm_stub_type stub_type = arm_stub_none;
5636 struct a8_erratum_reloc key, *found;
5637 bfd_boolean use_plt = FALSE;
5638
5639 key.from = base_vma + i;
5640 found = (struct a8_erratum_reloc *)
5641 bsearch (&key, a8_relocs, num_a8_relocs,
5642 sizeof (struct a8_erratum_reloc),
5643 &a8_reloc_compare);
5644
5645 if (found)
5646 {
5647 char *error_message = NULL;
5648 struct elf_link_hash_entry *entry;
5649
5650 /* We don't care about the error returned from this
5651 function, only if there is glue or not. */
5652 entry = find_thumb_glue (info, found->sym_name,
5653 &error_message);
5654
5655 if (entry)
5656 found->non_a8_stub = TRUE;
5657
5658 /* Keep a simpler condition, for the sake of clarity. */
5659 if (htab->root.splt != NULL && found->hash != NULL
5660 && found->hash->root.plt.offset != (bfd_vma) -1)
5661 use_plt = TRUE;
5662
5663 if (found->r_type == R_ARM_THM_CALL)
5664 {
5665 if (found->branch_type == ST_BRANCH_TO_ARM
5666 || use_plt)
5667 force_target_arm = TRUE;
5668 else
5669 force_target_thumb = TRUE;
5670 }
5671 }
5672
5673 /* Check if we have an offending branch instruction. */
5674
5675 if (found && found->non_a8_stub)
5676 /* We've already made a stub for this instruction, e.g.
5677 it's a long branch or a Thumb->ARM stub. Assume that
5678 stub will suffice to work around the A8 erratum (see
5679 setting of always_after_branch above). */
5680 ;
5681 else if (is_bcc)
5682 {
5683 offset = (insn & 0x7ff) << 1;
5684 offset |= (insn & 0x3f0000) >> 4;
5685 offset |= (insn & 0x2000) ? 0x40000 : 0;
5686 offset |= (insn & 0x800) ? 0x80000 : 0;
5687 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5688 if (offset & 0x100000)
5689 offset |= ~ ((bfd_signed_vma) 0xfffff);
5690 stub_type = arm_stub_a8_veneer_b_cond;
5691 }
5692 else if (is_b || is_bl || is_blx)
5693 {
5694 int s = (insn & 0x4000000) != 0;
5695 int j1 = (insn & 0x2000) != 0;
5696 int j2 = (insn & 0x800) != 0;
5697 int i1 = !(j1 ^ s);
5698 int i2 = !(j2 ^ s);
5699
5700 offset = (insn & 0x7ff) << 1;
5701 offset |= (insn & 0x3ff0000) >> 4;
5702 offset |= i2 << 22;
5703 offset |= i1 << 23;
5704 offset |= s << 24;
5705 if (offset & 0x1000000)
5706 offset |= ~ ((bfd_signed_vma) 0xffffff);
5707
5708 if (is_blx)
5709 offset &= ~ ((bfd_signed_vma) 3);
5710
5711 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5712 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5713 }
5714
5715 if (stub_type != arm_stub_none)
5716 {
5717 bfd_vma pc_for_insn = base_vma + i + 4;
5718
5719 /* The original instruction is a BL, but the target is
5720 an ARM instruction. If we were not making a stub,
5721 the BL would have been converted to a BLX. Use the
5722 BLX stub instead in that case. */
5723 if (htab->use_blx && force_target_arm
5724 && stub_type == arm_stub_a8_veneer_bl)
5725 {
5726 stub_type = arm_stub_a8_veneer_blx;
5727 is_blx = TRUE;
5728 is_bl = FALSE;
5729 }
5730 /* Conversely, if the original instruction was
5731 BLX but the target is Thumb mode, use the BL
5732 stub. */
5733 else if (force_target_thumb
5734 && stub_type == arm_stub_a8_veneer_blx)
5735 {
5736 stub_type = arm_stub_a8_veneer_bl;
5737 is_blx = FALSE;
5738 is_bl = TRUE;
5739 }
5740
5741 if (is_blx)
5742 pc_for_insn &= ~ ((bfd_vma) 3);
5743
5744 /* If we found a relocation, use the proper destination,
5745 not the offset in the (unrelocated) instruction.
5746 Note this is always done if we switched the stub type
5747 above. */
5748 if (found)
5749 offset =
5750 (bfd_signed_vma) (found->destination - pc_for_insn);
5751
5752 /* If the stub will use a Thumb-mode branch to a
5753 PLT target, redirect it to the preceding Thumb
5754 entry point. */
5755 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5756 offset -= PLT_THUMB_STUB_SIZE;
5757
5758 target = pc_for_insn + offset;
5759
5760 /* The BLX stub is ARM-mode code. Adjust the offset to
5761 take the different PC value (+8 instead of +4) into
5762 account. */
5763 if (stub_type == arm_stub_a8_veneer_blx)
5764 offset += 4;
5765
5766 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5767 {
5768 char *stub_name = NULL;
5769
5770 if (num_a8_fixes == a8_fix_table_size)
5771 {
5772 a8_fix_table_size *= 2;
5773 a8_fixes = (struct a8_erratum_fix *)
5774 bfd_realloc (a8_fixes,
5775 sizeof (struct a8_erratum_fix)
5776 * a8_fix_table_size);
5777 }
5778
5779 if (num_a8_fixes < prev_num_a8_fixes)
5780 {
5781 /* If we're doing a subsequent scan,
5782 check if we've found the same fix as
5783 before, and try and reuse the stub
5784 name. */
5785 stub_name = a8_fixes[num_a8_fixes].stub_name;
5786 if ((a8_fixes[num_a8_fixes].section != section)
5787 || (a8_fixes[num_a8_fixes].offset != i))
5788 {
5789 free (stub_name);
5790 stub_name = NULL;
5791 *stub_changed_p = TRUE;
5792 }
5793 }
5794
5795 if (!stub_name)
5796 {
5797 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5798 if (stub_name != NULL)
5799 sprintf (stub_name, "%x:%x", section->id, i);
5800 }
5801
5802 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5803 a8_fixes[num_a8_fixes].section = section;
5804 a8_fixes[num_a8_fixes].offset = i;
5805 a8_fixes[num_a8_fixes].target_offset =
5806 target - base_vma;
5807 a8_fixes[num_a8_fixes].orig_insn = insn;
5808 a8_fixes[num_a8_fixes].stub_name = stub_name;
5809 a8_fixes[num_a8_fixes].stub_type = stub_type;
5810 a8_fixes[num_a8_fixes].branch_type =
5811 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5812
5813 num_a8_fixes++;
5814 }
5815 }
5816 }
5817
5818 i += insn_32bit ? 4 : 2;
5819 last_was_32bit = insn_32bit;
5820 last_was_branch = is_32bit_branch;
5821 }
5822 }
5823
5824 if (elf_section_data (section)->this_hdr.contents == NULL)
5825 free (contents);
5826 }
5827
5828 *a8_fixes_p = a8_fixes;
5829 *num_a8_fixes_p = num_a8_fixes;
5830 *a8_fix_table_size_p = a8_fix_table_size;
5831
5832 return FALSE;
5833 }
5834
5835 /* Create or update a stub entry depending on whether the stub can already be
5836 found in HTAB. The stub is identified by:
5837 - its type STUB_TYPE
5838 - its source branch (note that several can share the same stub) whose
5839 section and relocation (if any) are given by SECTION and IRELA
5840 respectively
5841 - its target symbol whose input section, hash, name, value and branch type
5842 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5843 respectively
5844
5845 If found, the value of the stub's target symbol is updated from SYM_VALUE
5846 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5847 TRUE and the stub entry is initialized.
5848
5849 Returns the stub that was created or updated, or NULL if an error
5850 occurred. */
5851
5852 static struct elf32_arm_stub_hash_entry *
5853 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5854 enum elf32_arm_stub_type stub_type, asection *section,
5855 Elf_Internal_Rela *irela, asection *sym_sec,
5856 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5857 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5858 bfd_boolean *new_stub)
5859 {
5860 const asection *id_sec;
5861 char *stub_name;
5862 struct elf32_arm_stub_hash_entry *stub_entry;
5863 unsigned int r_type;
5864 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5865
5866 BFD_ASSERT (stub_type != arm_stub_none);
5867 *new_stub = FALSE;
5868
5869 if (sym_claimed)
5870 stub_name = sym_name;
5871 else
5872 {
5873 BFD_ASSERT (irela);
5874 BFD_ASSERT (section);
5875 BFD_ASSERT (section->id <= htab->top_id);
5876
5877 /* Support for grouping stub sections. */
5878 id_sec = htab->stub_group[section->id].link_sec;
5879
5880 /* Get the name of this stub. */
5881 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5882 stub_type);
5883 if (!stub_name)
5884 return NULL;
5885 }
5886
5887 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5888 FALSE);
5889 /* The proper stub has already been created, just update its value. */
5890 if (stub_entry != NULL)
5891 {
5892 if (!sym_claimed)
5893 free (stub_name);
5894 stub_entry->target_value = sym_value;
5895 return stub_entry;
5896 }
5897
5898 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5899 if (stub_entry == NULL)
5900 {
5901 if (!sym_claimed)
5902 free (stub_name);
5903 return NULL;
5904 }
5905
5906 stub_entry->target_value = sym_value;
5907 stub_entry->target_section = sym_sec;
5908 stub_entry->stub_type = stub_type;
5909 stub_entry->h = hash;
5910 stub_entry->branch_type = branch_type;
5911
5912 if (sym_claimed)
5913 stub_entry->output_name = sym_name;
5914 else
5915 {
5916 if (sym_name == NULL)
5917 sym_name = "unnamed";
5918 stub_entry->output_name = (char *)
5919 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5920 + strlen (sym_name));
5921 if (stub_entry->output_name == NULL)
5922 {
5923 free (stub_name);
5924 return NULL;
5925 }
5926
5927 /* For historical reasons, use the existing names for ARM-to-Thumb and
5928 Thumb-to-ARM stubs. */
5929 r_type = ELF32_R_TYPE (irela->r_info);
5930 if ((r_type == (unsigned int) R_ARM_THM_CALL
5931 || r_type == (unsigned int) R_ARM_THM_JUMP24
5932 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5933 && branch_type == ST_BRANCH_TO_ARM)
5934 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5935 else if ((r_type == (unsigned int) R_ARM_CALL
5936 || r_type == (unsigned int) R_ARM_JUMP24)
5937 && branch_type == ST_BRANCH_TO_THUMB)
5938 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5939 else
5940 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5941 }
5942
5943 *new_stub = TRUE;
5944 return stub_entry;
5945 }
5946
5947 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5948 gateway veneer to transition from non secure to secure state and create them
5949 accordingly.
5950
5951 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5952 defines the conditions that govern Secure Gateway veneer creation for a
5953 given symbol <SYM> as follows:
5954 - it has function type
5955 - it has non local binding
5956 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5957 same type, binding and value as <SYM> (called normal symbol).
5958 An entry function can handle secure state transition itself in which case
5959 its special symbol would have a different value from the normal symbol.
5960
5961 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5962 entry mapping while HTAB gives the name to hash entry mapping.
5963 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5964 created.
5965
5966 The return value gives whether a stub failed to be allocated. */
5967
5968 static bfd_boolean
5969 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5970 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5971 int *cmse_stub_created)
5972 {
5973 const struct elf_backend_data *bed;
5974 Elf_Internal_Shdr *symtab_hdr;
5975 unsigned i, j, sym_count, ext_start;
5976 Elf_Internal_Sym *cmse_sym, *local_syms;
5977 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5978 enum arm_st_branch_type branch_type;
5979 char *sym_name, *lsym_name;
5980 bfd_vma sym_value;
5981 asection *section;
5982 struct elf32_arm_stub_hash_entry *stub_entry;
5983 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5984
5985 bed = get_elf_backend_data (input_bfd);
5986 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5987 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5988 ext_start = symtab_hdr->sh_info;
5989 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5990 && out_attr[Tag_CPU_arch_profile].i == 'M');
5991
5992 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5993 if (local_syms == NULL)
5994 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5995 symtab_hdr->sh_info, 0, NULL, NULL,
5996 NULL);
5997 if (symtab_hdr->sh_info && local_syms == NULL)
5998 return FALSE;
5999
6000 /* Scan symbols. */
6001 for (i = 0; i < sym_count; i++)
6002 {
6003 cmse_invalid = FALSE;
6004
6005 if (i < ext_start)
6006 {
6007 cmse_sym = &local_syms[i];
6008 sym_name = bfd_elf_string_from_elf_section (input_bfd,
6009 symtab_hdr->sh_link,
6010 cmse_sym->st_name);
6011 if (!sym_name || !CONST_STRNEQ (sym_name, CMSE_PREFIX))
6012 continue;
6013
6014 /* Special symbol with local binding. */
6015 cmse_invalid = TRUE;
6016 }
6017 else
6018 {
6019 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
6020 sym_name = (char *) cmse_hash->root.root.root.string;
6021 if (!CONST_STRNEQ (sym_name, CMSE_PREFIX))
6022 continue;
6023
6024 /* Special symbol has incorrect binding or type. */
6025 if ((cmse_hash->root.root.type != bfd_link_hash_defined
6026 && cmse_hash->root.root.type != bfd_link_hash_defweak)
6027 || cmse_hash->root.type != STT_FUNC)
6028 cmse_invalid = TRUE;
6029 }
6030
6031 if (!is_v8m)
6032 {
6033 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
6034 "ARMv8-M architecture or later"),
6035 input_bfd, sym_name);
6036 is_v8m = TRUE; /* Avoid multiple warning. */
6037 ret = FALSE;
6038 }
6039
6040 if (cmse_invalid)
6041 {
6042 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
6043 " a global or weak function symbol"),
6044 input_bfd, sym_name);
6045 ret = FALSE;
6046 if (i < ext_start)
6047 continue;
6048 }
6049
6050 sym_name += strlen (CMSE_PREFIX);
6051 hash = (struct elf32_arm_link_hash_entry *)
6052 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
6053
6054 /* No associated normal symbol or it is neither global nor weak. */
6055 if (!hash
6056 || (hash->root.root.type != bfd_link_hash_defined
6057 && hash->root.root.type != bfd_link_hash_defweak)
6058 || hash->root.type != STT_FUNC)
6059 {
6060 /* Initialize here to avoid warning about use of possibly
6061 uninitialized variable. */
6062 j = 0;
6063
6064 if (!hash)
6065 {
6066 /* Searching for a normal symbol with local binding. */
6067 for (; j < ext_start; j++)
6068 {
6069 lsym_name =
6070 bfd_elf_string_from_elf_section (input_bfd,
6071 symtab_hdr->sh_link,
6072 local_syms[j].st_name);
6073 if (!strcmp (sym_name, lsym_name))
6074 break;
6075 }
6076 }
6077
6078 if (hash || j < ext_start)
6079 {
6080 _bfd_error_handler
6081 (_("%pB: invalid standard symbol `%s'; it must be "
6082 "a global or weak function symbol"),
6083 input_bfd, sym_name);
6084 }
6085 else
6086 _bfd_error_handler
6087 (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name);
6088 ret = FALSE;
6089 if (!hash)
6090 continue;
6091 }
6092
6093 sym_value = hash->root.root.u.def.value;
6094 section = hash->root.root.u.def.section;
6095
6096 if (cmse_hash->root.root.u.def.section != section)
6097 {
6098 _bfd_error_handler
6099 (_("%pB: `%s' and its special symbol are in different sections"),
6100 input_bfd, sym_name);
6101 ret = FALSE;
6102 }
6103 if (cmse_hash->root.root.u.def.value != sym_value)
6104 continue; /* Ignore: could be an entry function starting with SG. */
6105
6106 /* If this section is a link-once section that will be discarded, then
6107 don't create any stubs. */
6108 if (section->output_section == NULL)
6109 {
6110 _bfd_error_handler
6111 (_("%pB: entry function `%s' not output"), input_bfd, sym_name);
6112 continue;
6113 }
6114
6115 if (hash->root.size == 0)
6116 {
6117 _bfd_error_handler
6118 (_("%pB: entry function `%s' is empty"), input_bfd, sym_name);
6119 ret = FALSE;
6120 }
6121
6122 if (!ret)
6123 continue;
6124 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6125 stub_entry
6126 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6127 NULL, NULL, section, hash, sym_name,
6128 sym_value, branch_type, &new_stub);
6129
6130 if (stub_entry == NULL)
6131 ret = FALSE;
6132 else
6133 {
6134 BFD_ASSERT (new_stub);
6135 (*cmse_stub_created)++;
6136 }
6137 }
6138
6139 if (!symtab_hdr->contents)
6140 free (local_syms);
6141 return ret;
6142 }
6143
6144 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
6145 code entry function, ie can be called from non secure code without using a
6146 veneer. */
6147
6148 static bfd_boolean
6149 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
6150 {
6151 bfd_byte contents[4];
6152 uint32_t first_insn;
6153 asection *section;
6154 file_ptr offset;
6155 bfd *abfd;
6156
6157 /* Defined symbol of function type. */
6158 if (hash->root.root.type != bfd_link_hash_defined
6159 && hash->root.root.type != bfd_link_hash_defweak)
6160 return FALSE;
6161 if (hash->root.type != STT_FUNC)
6162 return FALSE;
6163
6164 /* Read first instruction. */
6165 section = hash->root.root.u.def.section;
6166 abfd = section->owner;
6167 offset = hash->root.root.u.def.value - section->vma;
6168 if (!bfd_get_section_contents (abfd, section, contents, offset,
6169 sizeof (contents)))
6170 return FALSE;
6171
6172 first_insn = bfd_get_32 (abfd, contents);
6173
6174 /* Starts by SG instruction. */
6175 return first_insn == 0xe97fe97f;
6176 }
6177
6178 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6179 secure gateway veneers (ie. the veneers was not in the input import library)
6180 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
6181
6182 static bfd_boolean
6183 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
6184 {
6185 struct elf32_arm_stub_hash_entry *stub_entry;
6186 struct bfd_link_info *info;
6187
6188 /* Massage our args to the form they really have. */
6189 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
6190 info = (struct bfd_link_info *) gen_info;
6191
6192 if (info->out_implib_bfd)
6193 return TRUE;
6194
6195 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
6196 return TRUE;
6197
6198 if (stub_entry->stub_offset == (bfd_vma) -1)
6199 _bfd_error_handler (" %s", stub_entry->output_name);
6200
6201 return TRUE;
6202 }
6203
6204 /* Set offset of each secure gateway veneers so that its address remain
6205 identical to the one in the input import library referred by
6206 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
6207 (present in input import library but absent from the executable being
6208 linked) or if new veneers appeared and there is no output import library
6209 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6210 number of secure gateway veneers found in the input import library.
6211
6212 The function returns whether an error occurred. If no error occurred,
6213 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6214 and this function and HTAB->new_cmse_stub_offset is set to the biggest
6215 veneer observed set for new veneers to be layed out after. */
6216
6217 static bfd_boolean
6218 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
6219 struct elf32_arm_link_hash_table *htab,
6220 int *cmse_stub_created)
6221 {
6222 long symsize;
6223 char *sym_name;
6224 flagword flags;
6225 long i, symcount;
6226 bfd *in_implib_bfd;
6227 asection *stub_out_sec;
6228 bfd_boolean ret = TRUE;
6229 Elf_Internal_Sym *intsym;
6230 const char *out_sec_name;
6231 bfd_size_type cmse_stub_size;
6232 asymbol **sympp = NULL, *sym;
6233 struct elf32_arm_link_hash_entry *hash;
6234 const insn_sequence *cmse_stub_template;
6235 struct elf32_arm_stub_hash_entry *stub_entry;
6236 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
6237 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
6238 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
6239
6240 /* No input secure gateway import library. */
6241 if (!htab->in_implib_bfd)
6242 return TRUE;
6243
6244 in_implib_bfd = htab->in_implib_bfd;
6245 if (!htab->cmse_implib)
6246 {
6247 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6248 "Gateway import libraries"), in_implib_bfd);
6249 return FALSE;
6250 }
6251
6252 /* Get symbol table size. */
6253 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
6254 if (symsize < 0)
6255 return FALSE;
6256
6257 /* Read in the input secure gateway import library's symbol table. */
6258 sympp = (asymbol **) bfd_malloc (symsize);
6259 if (sympp == NULL)
6260 return FALSE;
6261
6262 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
6263 if (symcount < 0)
6264 {
6265 ret = FALSE;
6266 goto free_sym_buf;
6267 }
6268
6269 htab->new_cmse_stub_offset = 0;
6270 cmse_stub_size =
6271 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
6272 &cmse_stub_template,
6273 &cmse_stub_template_size);
6274 out_sec_name =
6275 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
6276 stub_out_sec =
6277 bfd_get_section_by_name (htab->obfd, out_sec_name);
6278 if (stub_out_sec != NULL)
6279 cmse_stub_sec_vma = stub_out_sec->vma;
6280
6281 /* Set addresses of veneers mentionned in input secure gateway import
6282 library's symbol table. */
6283 for (i = 0; i < symcount; i++)
6284 {
6285 sym = sympp[i];
6286 flags = sym->flags;
6287 sym_name = (char *) bfd_asymbol_name (sym);
6288 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
6289
6290 if (sym->section != bfd_abs_section_ptr
6291 || !(flags & (BSF_GLOBAL | BSF_WEAK))
6292 || (flags & BSF_FUNCTION) != BSF_FUNCTION
6293 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
6294 != ST_BRANCH_TO_THUMB))
6295 {
6296 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6297 "symbol should be absolute, global and "
6298 "refer to Thumb functions"),
6299 in_implib_bfd, sym_name);
6300 ret = FALSE;
6301 continue;
6302 }
6303
6304 veneer_value = bfd_asymbol_value (sym);
6305 stub_offset = veneer_value - cmse_stub_sec_vma;
6306 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
6307 FALSE, FALSE);
6308 hash = (struct elf32_arm_link_hash_entry *)
6309 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
6310
6311 /* Stub entry should have been created by cmse_scan or the symbol be of
6312 a secure function callable from non secure code. */
6313 if (!stub_entry && !hash)
6314 {
6315 bfd_boolean new_stub;
6316
6317 _bfd_error_handler
6318 (_("entry function `%s' disappeared from secure code"), sym_name);
6319 hash = (struct elf32_arm_link_hash_entry *)
6320 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
6321 stub_entry
6322 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6323 NULL, NULL, bfd_abs_section_ptr, hash,
6324 sym_name, veneer_value,
6325 ST_BRANCH_TO_THUMB, &new_stub);
6326 if (stub_entry == NULL)
6327 ret = FALSE;
6328 else
6329 {
6330 BFD_ASSERT (new_stub);
6331 new_cmse_stubs_created++;
6332 (*cmse_stub_created)++;
6333 }
6334 stub_entry->stub_template_size = stub_entry->stub_size = 0;
6335 stub_entry->stub_offset = stub_offset;
6336 }
6337 /* Symbol found is not callable from non secure code. */
6338 else if (!stub_entry)
6339 {
6340 if (!cmse_entry_fct_p (hash))
6341 {
6342 _bfd_error_handler (_("`%s' refers to a non entry function"),
6343 sym_name);
6344 ret = FALSE;
6345 }
6346 continue;
6347 }
6348 else
6349 {
6350 /* Only stubs for SG veneers should have been created. */
6351 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6352
6353 /* Check visibility hasn't changed. */
6354 if (!!(flags & BSF_GLOBAL)
6355 != (hash->root.root.type == bfd_link_hash_defined))
6356 _bfd_error_handler
6357 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd,
6358 sym_name);
6359
6360 stub_entry->stub_offset = stub_offset;
6361 }
6362
6363 /* Size should match that of a SG veneer. */
6364 if (intsym->st_size != cmse_stub_size)
6365 {
6366 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6367 in_implib_bfd, sym_name);
6368 ret = FALSE;
6369 }
6370
6371 /* Previous veneer address is before current SG veneer section. */
6372 if (veneer_value < cmse_stub_sec_vma)
6373 {
6374 /* Avoid offset underflow. */
6375 if (stub_entry)
6376 stub_entry->stub_offset = 0;
6377 stub_offset = 0;
6378 ret = FALSE;
6379 }
6380
6381 /* Complain if stub offset not a multiple of stub size. */
6382 if (stub_offset % cmse_stub_size)
6383 {
6384 _bfd_error_handler
6385 (_("offset of veneer for entry function `%s' not a multiple of "
6386 "its size"), sym_name);
6387 ret = FALSE;
6388 }
6389
6390 if (!ret)
6391 continue;
6392
6393 new_cmse_stubs_created--;
6394 if (veneer_value < cmse_stub_array_start)
6395 cmse_stub_array_start = veneer_value;
6396 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6397 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6398 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6399 }
6400
6401 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6402 {
6403 BFD_ASSERT (new_cmse_stubs_created > 0);
6404 _bfd_error_handler
6405 (_("new entry function(s) introduced but no output import library "
6406 "specified:"));
6407 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6408 }
6409
6410 if (cmse_stub_array_start != cmse_stub_sec_vma)
6411 {
6412 _bfd_error_handler
6413 (_("start address of `%s' is different from previous link"),
6414 out_sec_name);
6415 ret = FALSE;
6416 }
6417
6418 free_sym_buf:
6419 free (sympp);
6420 return ret;
6421 }
6422
6423 /* Determine and set the size of the stub section for a final link.
6424
6425 The basic idea here is to examine all the relocations looking for
6426 PC-relative calls to a target that is unreachable with a "bl"
6427 instruction. */
6428
6429 bfd_boolean
6430 elf32_arm_size_stubs (bfd *output_bfd,
6431 bfd *stub_bfd,
6432 struct bfd_link_info *info,
6433 bfd_signed_vma group_size,
6434 asection * (*add_stub_section) (const char *, asection *,
6435 asection *,
6436 unsigned int),
6437 void (*layout_sections_again) (void))
6438 {
6439 bfd_boolean ret = TRUE;
6440 obj_attribute *out_attr;
6441 int cmse_stub_created = 0;
6442 bfd_size_type stub_group_size;
6443 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6444 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6445 struct a8_erratum_fix *a8_fixes = NULL;
6446 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6447 struct a8_erratum_reloc *a8_relocs = NULL;
6448 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6449
6450 if (htab == NULL)
6451 return FALSE;
6452
6453 if (htab->fix_cortex_a8)
6454 {
6455 a8_fixes = (struct a8_erratum_fix *)
6456 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6457 a8_relocs = (struct a8_erratum_reloc *)
6458 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6459 }
6460
6461 /* Propagate mach to stub bfd, because it may not have been
6462 finalized when we created stub_bfd. */
6463 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6464 bfd_get_mach (output_bfd));
6465
6466 /* Stash our params away. */
6467 htab->stub_bfd = stub_bfd;
6468 htab->add_stub_section = add_stub_section;
6469 htab->layout_sections_again = layout_sections_again;
6470 stubs_always_after_branch = group_size < 0;
6471
6472 out_attr = elf_known_obj_attributes_proc (output_bfd);
6473 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6474
6475 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6476 as the first half of a 32-bit branch straddling two 4K pages. This is a
6477 crude way of enforcing that. */
6478 if (htab->fix_cortex_a8)
6479 stubs_always_after_branch = 1;
6480
6481 if (group_size < 0)
6482 stub_group_size = -group_size;
6483 else
6484 stub_group_size = group_size;
6485
6486 if (stub_group_size == 1)
6487 {
6488 /* Default values. */
6489 /* Thumb branch range is +-4MB has to be used as the default
6490 maximum size (a given section can contain both ARM and Thumb
6491 code, so the worst case has to be taken into account).
6492
6493 This value is 24K less than that, which allows for 2025
6494 12-byte stubs. If we exceed that, then we will fail to link.
6495 The user will have to relink with an explicit group size
6496 option. */
6497 stub_group_size = 4170000;
6498 }
6499
6500 group_sections (htab, stub_group_size, stubs_always_after_branch);
6501
6502 /* If we're applying the cortex A8 fix, we need to determine the
6503 program header size now, because we cannot change it later --
6504 that could alter section placements. Notice the A8 erratum fix
6505 ends up requiring the section addresses to remain unchanged
6506 modulo the page size. That's something we cannot represent
6507 inside BFD, and we don't want to force the section alignment to
6508 be the page size. */
6509 if (htab->fix_cortex_a8)
6510 (*htab->layout_sections_again) ();
6511
6512 while (1)
6513 {
6514 bfd *input_bfd;
6515 unsigned int bfd_indx;
6516 asection *stub_sec;
6517 enum elf32_arm_stub_type stub_type;
6518 bfd_boolean stub_changed = FALSE;
6519 unsigned prev_num_a8_fixes = num_a8_fixes;
6520
6521 num_a8_fixes = 0;
6522 for (input_bfd = info->input_bfds, bfd_indx = 0;
6523 input_bfd != NULL;
6524 input_bfd = input_bfd->link.next, bfd_indx++)
6525 {
6526 Elf_Internal_Shdr *symtab_hdr;
6527 asection *section;
6528 Elf_Internal_Sym *local_syms = NULL;
6529
6530 if (!is_arm_elf (input_bfd))
6531 continue;
6532 if ((input_bfd->flags & DYNAMIC) != 0
6533 && (elf_sym_hashes (input_bfd) == NULL
6534 || (elf_dyn_lib_class (input_bfd) & DYN_AS_NEEDED) != 0))
6535 continue;
6536
6537 num_a8_relocs = 0;
6538
6539 /* We'll need the symbol table in a second. */
6540 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6541 if (symtab_hdr->sh_info == 0)
6542 continue;
6543
6544 /* Limit scan of symbols to object file whose profile is
6545 Microcontroller to not hinder performance in the general case. */
6546 if (m_profile && first_veneer_scan)
6547 {
6548 struct elf_link_hash_entry **sym_hashes;
6549
6550 sym_hashes = elf_sym_hashes (input_bfd);
6551 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6552 &cmse_stub_created))
6553 goto error_ret_free_local;
6554
6555 if (cmse_stub_created != 0)
6556 stub_changed = TRUE;
6557 }
6558
6559 /* Walk over each section attached to the input bfd. */
6560 for (section = input_bfd->sections;
6561 section != NULL;
6562 section = section->next)
6563 {
6564 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6565
6566 /* If there aren't any relocs, then there's nothing more
6567 to do. */
6568 if ((section->flags & SEC_RELOC) == 0
6569 || section->reloc_count == 0
6570 || (section->flags & SEC_CODE) == 0)
6571 continue;
6572
6573 /* If this section is a link-once section that will be
6574 discarded, then don't create any stubs. */
6575 if (section->output_section == NULL
6576 || section->output_section->owner != output_bfd)
6577 continue;
6578
6579 /* Get the relocs. */
6580 internal_relocs
6581 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6582 NULL, info->keep_memory);
6583 if (internal_relocs == NULL)
6584 goto error_ret_free_local;
6585
6586 /* Now examine each relocation. */
6587 irela = internal_relocs;
6588 irelaend = irela + section->reloc_count;
6589 for (; irela < irelaend; irela++)
6590 {
6591 unsigned int r_type, r_indx;
6592 asection *sym_sec;
6593 bfd_vma sym_value;
6594 bfd_vma destination;
6595 struct elf32_arm_link_hash_entry *hash;
6596 const char *sym_name;
6597 unsigned char st_type;
6598 enum arm_st_branch_type branch_type;
6599 bfd_boolean created_stub = FALSE;
6600
6601 r_type = ELF32_R_TYPE (irela->r_info);
6602 r_indx = ELF32_R_SYM (irela->r_info);
6603
6604 if (r_type >= (unsigned int) R_ARM_max)
6605 {
6606 bfd_set_error (bfd_error_bad_value);
6607 error_ret_free_internal:
6608 if (elf_section_data (section)->relocs == NULL)
6609 free (internal_relocs);
6610 /* Fall through. */
6611 error_ret_free_local:
6612 if (local_syms != NULL
6613 && (symtab_hdr->contents
6614 != (unsigned char *) local_syms))
6615 free (local_syms);
6616 return FALSE;
6617 }
6618
6619 hash = NULL;
6620 if (r_indx >= symtab_hdr->sh_info)
6621 hash = elf32_arm_hash_entry
6622 (elf_sym_hashes (input_bfd)
6623 [r_indx - symtab_hdr->sh_info]);
6624
6625 /* Only look for stubs on branch instructions, or
6626 non-relaxed TLSCALL */
6627 if ((r_type != (unsigned int) R_ARM_CALL)
6628 && (r_type != (unsigned int) R_ARM_THM_CALL)
6629 && (r_type != (unsigned int) R_ARM_JUMP24)
6630 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6631 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6632 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6633 && (r_type != (unsigned int) R_ARM_PLT32)
6634 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6635 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6636 && r_type == elf32_arm_tls_transition
6637 (info, r_type, &hash->root)
6638 && ((hash ? hash->tls_type
6639 : (elf32_arm_local_got_tls_type
6640 (input_bfd)[r_indx]))
6641 & GOT_TLS_GDESC) != 0))
6642 continue;
6643
6644 /* Now determine the call target, its name, value,
6645 section. */
6646 sym_sec = NULL;
6647 sym_value = 0;
6648 destination = 0;
6649 sym_name = NULL;
6650
6651 if (r_type == (unsigned int) R_ARM_TLS_CALL
6652 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6653 {
6654 /* A non-relaxed TLS call. The target is the
6655 plt-resident trampoline and nothing to do
6656 with the symbol. */
6657 BFD_ASSERT (htab->tls_trampoline > 0);
6658 sym_sec = htab->root.splt;
6659 sym_value = htab->tls_trampoline;
6660 hash = 0;
6661 st_type = STT_FUNC;
6662 branch_type = ST_BRANCH_TO_ARM;
6663 }
6664 else if (!hash)
6665 {
6666 /* It's a local symbol. */
6667 Elf_Internal_Sym *sym;
6668
6669 if (local_syms == NULL)
6670 {
6671 local_syms
6672 = (Elf_Internal_Sym *) symtab_hdr->contents;
6673 if (local_syms == NULL)
6674 local_syms
6675 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6676 symtab_hdr->sh_info, 0,
6677 NULL, NULL, NULL);
6678 if (local_syms == NULL)
6679 goto error_ret_free_internal;
6680 }
6681
6682 sym = local_syms + r_indx;
6683 if (sym->st_shndx == SHN_UNDEF)
6684 sym_sec = bfd_und_section_ptr;
6685 else if (sym->st_shndx == SHN_ABS)
6686 sym_sec = bfd_abs_section_ptr;
6687 else if (sym->st_shndx == SHN_COMMON)
6688 sym_sec = bfd_com_section_ptr;
6689 else
6690 sym_sec =
6691 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6692
6693 if (!sym_sec)
6694 /* This is an undefined symbol. It can never
6695 be resolved. */
6696 continue;
6697
6698 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6699 sym_value = sym->st_value;
6700 destination = (sym_value + irela->r_addend
6701 + sym_sec->output_offset
6702 + sym_sec->output_section->vma);
6703 st_type = ELF_ST_TYPE (sym->st_info);
6704 branch_type =
6705 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6706 sym_name
6707 = bfd_elf_string_from_elf_section (input_bfd,
6708 symtab_hdr->sh_link,
6709 sym->st_name);
6710 }
6711 else
6712 {
6713 /* It's an external symbol. */
6714 while (hash->root.root.type == bfd_link_hash_indirect
6715 || hash->root.root.type == bfd_link_hash_warning)
6716 hash = ((struct elf32_arm_link_hash_entry *)
6717 hash->root.root.u.i.link);
6718
6719 if (hash->root.root.type == bfd_link_hash_defined
6720 || hash->root.root.type == bfd_link_hash_defweak)
6721 {
6722 sym_sec = hash->root.root.u.def.section;
6723 sym_value = hash->root.root.u.def.value;
6724
6725 struct elf32_arm_link_hash_table *globals =
6726 elf32_arm_hash_table (info);
6727
6728 /* For a destination in a shared library,
6729 use the PLT stub as target address to
6730 decide whether a branch stub is
6731 needed. */
6732 if (globals != NULL
6733 && globals->root.splt != NULL
6734 && hash != NULL
6735 && hash->root.plt.offset != (bfd_vma) -1)
6736 {
6737 sym_sec = globals->root.splt;
6738 sym_value = hash->root.plt.offset;
6739 if (sym_sec->output_section != NULL)
6740 destination = (sym_value
6741 + sym_sec->output_offset
6742 + sym_sec->output_section->vma);
6743 }
6744 else if (sym_sec->output_section != NULL)
6745 destination = (sym_value + irela->r_addend
6746 + sym_sec->output_offset
6747 + sym_sec->output_section->vma);
6748 }
6749 else if ((hash->root.root.type == bfd_link_hash_undefined)
6750 || (hash->root.root.type == bfd_link_hash_undefweak))
6751 {
6752 /* For a shared library, use the PLT stub as
6753 target address to decide whether a long
6754 branch stub is needed.
6755 For absolute code, they cannot be handled. */
6756 struct elf32_arm_link_hash_table *globals =
6757 elf32_arm_hash_table (info);
6758
6759 if (globals != NULL
6760 && globals->root.splt != NULL
6761 && hash != NULL
6762 && hash->root.plt.offset != (bfd_vma) -1)
6763 {
6764 sym_sec = globals->root.splt;
6765 sym_value = hash->root.plt.offset;
6766 if (sym_sec->output_section != NULL)
6767 destination = (sym_value
6768 + sym_sec->output_offset
6769 + sym_sec->output_section->vma);
6770 }
6771 else
6772 continue;
6773 }
6774 else
6775 {
6776 bfd_set_error (bfd_error_bad_value);
6777 goto error_ret_free_internal;
6778 }
6779 st_type = hash->root.type;
6780 branch_type =
6781 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6782 sym_name = hash->root.root.root.string;
6783 }
6784
6785 do
6786 {
6787 bfd_boolean new_stub;
6788 struct elf32_arm_stub_hash_entry *stub_entry;
6789
6790 /* Determine what (if any) linker stub is needed. */
6791 stub_type = arm_type_of_stub (info, section, irela,
6792 st_type, &branch_type,
6793 hash, destination, sym_sec,
6794 input_bfd, sym_name);
6795 if (stub_type == arm_stub_none)
6796 break;
6797
6798 /* We've either created a stub for this reloc already,
6799 or we are about to. */
6800 stub_entry =
6801 elf32_arm_create_stub (htab, stub_type, section, irela,
6802 sym_sec, hash,
6803 (char *) sym_name, sym_value,
6804 branch_type, &new_stub);
6805
6806 created_stub = stub_entry != NULL;
6807 if (!created_stub)
6808 goto error_ret_free_internal;
6809 else if (!new_stub)
6810 break;
6811 else
6812 stub_changed = TRUE;
6813 }
6814 while (0);
6815
6816 /* Look for relocations which might trigger Cortex-A8
6817 erratum. */
6818 if (htab->fix_cortex_a8
6819 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6820 || r_type == (unsigned int) R_ARM_THM_JUMP19
6821 || r_type == (unsigned int) R_ARM_THM_CALL
6822 || r_type == (unsigned int) R_ARM_THM_XPC22))
6823 {
6824 bfd_vma from = section->output_section->vma
6825 + section->output_offset
6826 + irela->r_offset;
6827
6828 if ((from & 0xfff) == 0xffe)
6829 {
6830 /* Found a candidate. Note we haven't checked the
6831 destination is within 4K here: if we do so (and
6832 don't create an entry in a8_relocs) we can't tell
6833 that a branch should have been relocated when
6834 scanning later. */
6835 if (num_a8_relocs == a8_reloc_table_size)
6836 {
6837 a8_reloc_table_size *= 2;
6838 a8_relocs = (struct a8_erratum_reloc *)
6839 bfd_realloc (a8_relocs,
6840 sizeof (struct a8_erratum_reloc)
6841 * a8_reloc_table_size);
6842 }
6843
6844 a8_relocs[num_a8_relocs].from = from;
6845 a8_relocs[num_a8_relocs].destination = destination;
6846 a8_relocs[num_a8_relocs].r_type = r_type;
6847 a8_relocs[num_a8_relocs].branch_type = branch_type;
6848 a8_relocs[num_a8_relocs].sym_name = sym_name;
6849 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6850 a8_relocs[num_a8_relocs].hash = hash;
6851
6852 num_a8_relocs++;
6853 }
6854 }
6855 }
6856
6857 /* We're done with the internal relocs, free them. */
6858 if (elf_section_data (section)->relocs == NULL)
6859 free (internal_relocs);
6860 }
6861
6862 if (htab->fix_cortex_a8)
6863 {
6864 /* Sort relocs which might apply to Cortex-A8 erratum. */
6865 qsort (a8_relocs, num_a8_relocs,
6866 sizeof (struct a8_erratum_reloc),
6867 &a8_reloc_compare);
6868
6869 /* Scan for branches which might trigger Cortex-A8 erratum. */
6870 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6871 &num_a8_fixes, &a8_fix_table_size,
6872 a8_relocs, num_a8_relocs,
6873 prev_num_a8_fixes, &stub_changed)
6874 != 0)
6875 goto error_ret_free_local;
6876 }
6877
6878 if (local_syms != NULL
6879 && symtab_hdr->contents != (unsigned char *) local_syms)
6880 {
6881 if (!info->keep_memory)
6882 free (local_syms);
6883 else
6884 symtab_hdr->contents = (unsigned char *) local_syms;
6885 }
6886 }
6887
6888 if (first_veneer_scan
6889 && !set_cmse_veneer_addr_from_implib (info, htab,
6890 &cmse_stub_created))
6891 ret = FALSE;
6892
6893 if (prev_num_a8_fixes != num_a8_fixes)
6894 stub_changed = TRUE;
6895
6896 if (!stub_changed)
6897 break;
6898
6899 /* OK, we've added some stubs. Find out the new size of the
6900 stub sections. */
6901 for (stub_sec = htab->stub_bfd->sections;
6902 stub_sec != NULL;
6903 stub_sec = stub_sec->next)
6904 {
6905 /* Ignore non-stub sections. */
6906 if (!strstr (stub_sec->name, STUB_SUFFIX))
6907 continue;
6908
6909 stub_sec->size = 0;
6910 }
6911
6912 /* Add new SG veneers after those already in the input import
6913 library. */
6914 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6915 stub_type++)
6916 {
6917 bfd_vma *start_offset_p;
6918 asection **stub_sec_p;
6919
6920 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6921 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6922 if (start_offset_p == NULL)
6923 continue;
6924
6925 BFD_ASSERT (stub_sec_p != NULL);
6926 if (*stub_sec_p != NULL)
6927 (*stub_sec_p)->size = *start_offset_p;
6928 }
6929
6930 /* Compute stub section size, considering padding. */
6931 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6932 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6933 stub_type++)
6934 {
6935 int size, padding;
6936 asection **stub_sec_p;
6937
6938 padding = arm_dedicated_stub_section_padding (stub_type);
6939 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6940 /* Skip if no stub input section or no stub section padding
6941 required. */
6942 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6943 continue;
6944 /* Stub section padding required but no dedicated section. */
6945 BFD_ASSERT (stub_sec_p);
6946
6947 size = (*stub_sec_p)->size;
6948 size = (size + padding - 1) & ~(padding - 1);
6949 (*stub_sec_p)->size = size;
6950 }
6951
6952 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6953 if (htab->fix_cortex_a8)
6954 for (i = 0; i < num_a8_fixes; i++)
6955 {
6956 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6957 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6958
6959 if (stub_sec == NULL)
6960 return FALSE;
6961
6962 stub_sec->size
6963 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6964 NULL);
6965 }
6966
6967
6968 /* Ask the linker to do its stuff. */
6969 (*htab->layout_sections_again) ();
6970 first_veneer_scan = FALSE;
6971 }
6972
6973 /* Add stubs for Cortex-A8 erratum fixes now. */
6974 if (htab->fix_cortex_a8)
6975 {
6976 for (i = 0; i < num_a8_fixes; i++)
6977 {
6978 struct elf32_arm_stub_hash_entry *stub_entry;
6979 char *stub_name = a8_fixes[i].stub_name;
6980 asection *section = a8_fixes[i].section;
6981 unsigned int section_id = a8_fixes[i].section->id;
6982 asection *link_sec = htab->stub_group[section_id].link_sec;
6983 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6984 const insn_sequence *template_sequence;
6985 int template_size, size = 0;
6986
6987 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6988 TRUE, FALSE);
6989 if (stub_entry == NULL)
6990 {
6991 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6992 section->owner, stub_name);
6993 return FALSE;
6994 }
6995
6996 stub_entry->stub_sec = stub_sec;
6997 stub_entry->stub_offset = (bfd_vma) -1;
6998 stub_entry->id_sec = link_sec;
6999 stub_entry->stub_type = a8_fixes[i].stub_type;
7000 stub_entry->source_value = a8_fixes[i].offset;
7001 stub_entry->target_section = a8_fixes[i].section;
7002 stub_entry->target_value = a8_fixes[i].target_offset;
7003 stub_entry->orig_insn = a8_fixes[i].orig_insn;
7004 stub_entry->branch_type = a8_fixes[i].branch_type;
7005
7006 size = find_stub_size_and_template (a8_fixes[i].stub_type,
7007 &template_sequence,
7008 &template_size);
7009
7010 stub_entry->stub_size = size;
7011 stub_entry->stub_template = template_sequence;
7012 stub_entry->stub_template_size = template_size;
7013 }
7014
7015 /* Stash the Cortex-A8 erratum fix array for use later in
7016 elf32_arm_write_section(). */
7017 htab->a8_erratum_fixes = a8_fixes;
7018 htab->num_a8_erratum_fixes = num_a8_fixes;
7019 }
7020 else
7021 {
7022 htab->a8_erratum_fixes = NULL;
7023 htab->num_a8_erratum_fixes = 0;
7024 }
7025 return ret;
7026 }
7027
7028 /* Build all the stubs associated with the current output file. The
7029 stubs are kept in a hash table attached to the main linker hash
7030 table. We also set up the .plt entries for statically linked PIC
7031 functions here. This function is called via arm_elf_finish in the
7032 linker. */
7033
7034 bfd_boolean
7035 elf32_arm_build_stubs (struct bfd_link_info *info)
7036 {
7037 asection *stub_sec;
7038 struct bfd_hash_table *table;
7039 enum elf32_arm_stub_type stub_type;
7040 struct elf32_arm_link_hash_table *htab;
7041
7042 htab = elf32_arm_hash_table (info);
7043 if (htab == NULL)
7044 return FALSE;
7045
7046 for (stub_sec = htab->stub_bfd->sections;
7047 stub_sec != NULL;
7048 stub_sec = stub_sec->next)
7049 {
7050 bfd_size_type size;
7051
7052 /* Ignore non-stub sections. */
7053 if (!strstr (stub_sec->name, STUB_SUFFIX))
7054 continue;
7055
7056 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
7057 must at least be done for stub section requiring padding and for SG
7058 veneers to ensure that a non secure code branching to a removed SG
7059 veneer causes an error. */
7060 size = stub_sec->size;
7061 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
7062 if (stub_sec->contents == NULL && size != 0)
7063 return FALSE;
7064
7065 stub_sec->size = 0;
7066 }
7067
7068 /* Add new SG veneers after those already in the input import library. */
7069 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7070 {
7071 bfd_vma *start_offset_p;
7072 asection **stub_sec_p;
7073
7074 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
7075 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
7076 if (start_offset_p == NULL)
7077 continue;
7078
7079 BFD_ASSERT (stub_sec_p != NULL);
7080 if (*stub_sec_p != NULL)
7081 (*stub_sec_p)->size = *start_offset_p;
7082 }
7083
7084 /* Build the stubs as directed by the stub hash table. */
7085 table = &htab->stub_hash_table;
7086 bfd_hash_traverse (table, arm_build_one_stub, info);
7087 if (htab->fix_cortex_a8)
7088 {
7089 /* Place the cortex a8 stubs last. */
7090 htab->fix_cortex_a8 = -1;
7091 bfd_hash_traverse (table, arm_build_one_stub, info);
7092 }
7093
7094 return TRUE;
7095 }
7096
7097 /* Locate the Thumb encoded calling stub for NAME. */
7098
7099 static struct elf_link_hash_entry *
7100 find_thumb_glue (struct bfd_link_info *link_info,
7101 const char *name,
7102 char **error_message)
7103 {
7104 char *tmp_name;
7105 struct elf_link_hash_entry *hash;
7106 struct elf32_arm_link_hash_table *hash_table;
7107
7108 /* We need a pointer to the armelf specific hash table. */
7109 hash_table = elf32_arm_hash_table (link_info);
7110 if (hash_table == NULL)
7111 return NULL;
7112
7113 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7114 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
7115
7116 BFD_ASSERT (tmp_name);
7117
7118 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
7119
7120 hash = elf_link_hash_lookup
7121 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
7122
7123 if (hash == NULL
7124 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7125 "Thumb", tmp_name, name) == -1)
7126 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7127
7128 free (tmp_name);
7129
7130 return hash;
7131 }
7132
7133 /* Locate the ARM encoded calling stub for NAME. */
7134
7135 static struct elf_link_hash_entry *
7136 find_arm_glue (struct bfd_link_info *link_info,
7137 const char *name,
7138 char **error_message)
7139 {
7140 char *tmp_name;
7141 struct elf_link_hash_entry *myh;
7142 struct elf32_arm_link_hash_table *hash_table;
7143
7144 /* We need a pointer to the elfarm specific hash table. */
7145 hash_table = elf32_arm_hash_table (link_info);
7146 if (hash_table == NULL)
7147 return NULL;
7148
7149 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7150 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7151 BFD_ASSERT (tmp_name);
7152
7153 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7154
7155 myh = elf_link_hash_lookup
7156 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
7157
7158 if (myh == NULL
7159 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7160 "ARM", tmp_name, name) == -1)
7161 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7162
7163 free (tmp_name);
7164
7165 return myh;
7166 }
7167
7168 /* ARM->Thumb glue (static images):
7169
7170 .arm
7171 __func_from_arm:
7172 ldr r12, __func_addr
7173 bx r12
7174 __func_addr:
7175 .word func @ behave as if you saw a ARM_32 reloc.
7176
7177 (v5t static images)
7178 .arm
7179 __func_from_arm:
7180 ldr pc, __func_addr
7181 __func_addr:
7182 .word func @ behave as if you saw a ARM_32 reloc.
7183
7184 (relocatable images)
7185 .arm
7186 __func_from_arm:
7187 ldr r12, __func_offset
7188 add r12, r12, pc
7189 bx r12
7190 __func_offset:
7191 .word func - . */
7192
7193 #define ARM2THUMB_STATIC_GLUE_SIZE 12
7194 static const insn32 a2t1_ldr_insn = 0xe59fc000;
7195 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
7196 static const insn32 a2t3_func_addr_insn = 0x00000001;
7197
7198 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7199 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
7200 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
7201
7202 #define ARM2THUMB_PIC_GLUE_SIZE 16
7203 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
7204 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
7205 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
7206
7207 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
7208
7209 .thumb .thumb
7210 .align 2 .align 2
7211 __func_from_thumb: __func_from_thumb:
7212 bx pc push {r6, lr}
7213 nop ldr r6, __func_addr
7214 .arm mov lr, pc
7215 b func bx r6
7216 .arm
7217 ;; back_to_thumb
7218 ldmia r13! {r6, lr}
7219 bx lr
7220 __func_addr:
7221 .word func */
7222
7223 #define THUMB2ARM_GLUE_SIZE 8
7224 static const insn16 t2a1_bx_pc_insn = 0x4778;
7225 static const insn16 t2a2_noop_insn = 0x46c0;
7226 static const insn32 t2a3_b_insn = 0xea000000;
7227
7228 #define VFP11_ERRATUM_VENEER_SIZE 8
7229 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7230 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7231
7232 #define ARM_BX_VENEER_SIZE 12
7233 static const insn32 armbx1_tst_insn = 0xe3100001;
7234 static const insn32 armbx2_moveq_insn = 0x01a0f000;
7235 static const insn32 armbx3_bx_insn = 0xe12fff10;
7236
7237 #ifndef ELFARM_NABI_C_INCLUDED
7238 static void
7239 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
7240 {
7241 asection * s;
7242 bfd_byte * contents;
7243
7244 if (size == 0)
7245 {
7246 /* Do not include empty glue sections in the output. */
7247 if (abfd != NULL)
7248 {
7249 s = bfd_get_linker_section (abfd, name);
7250 if (s != NULL)
7251 s->flags |= SEC_EXCLUDE;
7252 }
7253 return;
7254 }
7255
7256 BFD_ASSERT (abfd != NULL);
7257
7258 s = bfd_get_linker_section (abfd, name);
7259 BFD_ASSERT (s != NULL);
7260
7261 contents = (bfd_byte *) bfd_zalloc (abfd, size);
7262
7263 BFD_ASSERT (s->size == size);
7264 s->contents = contents;
7265 }
7266
7267 bfd_boolean
7268 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
7269 {
7270 struct elf32_arm_link_hash_table * globals;
7271
7272 globals = elf32_arm_hash_table (info);
7273 BFD_ASSERT (globals != NULL);
7274
7275 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7276 globals->arm_glue_size,
7277 ARM2THUMB_GLUE_SECTION_NAME);
7278
7279 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7280 globals->thumb_glue_size,
7281 THUMB2ARM_GLUE_SECTION_NAME);
7282
7283 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7284 globals->vfp11_erratum_glue_size,
7285 VFP11_ERRATUM_VENEER_SECTION_NAME);
7286
7287 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7288 globals->stm32l4xx_erratum_glue_size,
7289 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7290
7291 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7292 globals->bx_glue_size,
7293 ARM_BX_GLUE_SECTION_NAME);
7294
7295 return TRUE;
7296 }
7297
7298 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7299 returns the symbol identifying the stub. */
7300
7301 static struct elf_link_hash_entry *
7302 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
7303 struct elf_link_hash_entry * h)
7304 {
7305 const char * name = h->root.root.string;
7306 asection * s;
7307 char * tmp_name;
7308 struct elf_link_hash_entry * myh;
7309 struct bfd_link_hash_entry * bh;
7310 struct elf32_arm_link_hash_table * globals;
7311 bfd_vma val;
7312 bfd_size_type size;
7313
7314 globals = elf32_arm_hash_table (link_info);
7315 BFD_ASSERT (globals != NULL);
7316 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7317
7318 s = bfd_get_linker_section
7319 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
7320
7321 BFD_ASSERT (s != NULL);
7322
7323 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7324 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7325 BFD_ASSERT (tmp_name);
7326
7327 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7328
7329 myh = elf_link_hash_lookup
7330 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7331
7332 if (myh != NULL)
7333 {
7334 /* We've already seen this guy. */
7335 free (tmp_name);
7336 return myh;
7337 }
7338
7339 /* The only trick here is using hash_table->arm_glue_size as the value.
7340 Even though the section isn't allocated yet, this is where we will be
7341 putting it. The +1 on the value marks that the stub has not been
7342 output yet - not that it is a Thumb function. */
7343 bh = NULL;
7344 val = globals->arm_glue_size + 1;
7345 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7346 tmp_name, BSF_GLOBAL, s, val,
7347 NULL, TRUE, FALSE, &bh);
7348
7349 myh = (struct elf_link_hash_entry *) bh;
7350 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7351 myh->forced_local = 1;
7352
7353 free (tmp_name);
7354
7355 if (bfd_link_pic (link_info)
7356 || globals->root.is_relocatable_executable
7357 || globals->pic_veneer)
7358 size = ARM2THUMB_PIC_GLUE_SIZE;
7359 else if (globals->use_blx)
7360 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7361 else
7362 size = ARM2THUMB_STATIC_GLUE_SIZE;
7363
7364 s->size += size;
7365 globals->arm_glue_size += size;
7366
7367 return myh;
7368 }
7369
7370 /* Allocate space for ARMv4 BX veneers. */
7371
7372 static void
7373 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7374 {
7375 asection * s;
7376 struct elf32_arm_link_hash_table *globals;
7377 char *tmp_name;
7378 struct elf_link_hash_entry *myh;
7379 struct bfd_link_hash_entry *bh;
7380 bfd_vma val;
7381
7382 /* BX PC does not need a veneer. */
7383 if (reg == 15)
7384 return;
7385
7386 globals = elf32_arm_hash_table (link_info);
7387 BFD_ASSERT (globals != NULL);
7388 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7389
7390 /* Check if this veneer has already been allocated. */
7391 if (globals->bx_glue_offset[reg])
7392 return;
7393
7394 s = bfd_get_linker_section
7395 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7396
7397 BFD_ASSERT (s != NULL);
7398
7399 /* Add symbol for veneer. */
7400 tmp_name = (char *)
7401 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7402 BFD_ASSERT (tmp_name);
7403
7404 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7405
7406 myh = elf_link_hash_lookup
7407 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7408
7409 BFD_ASSERT (myh == NULL);
7410
7411 bh = NULL;
7412 val = globals->bx_glue_size;
7413 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7414 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7415 NULL, TRUE, FALSE, &bh);
7416
7417 myh = (struct elf_link_hash_entry *) bh;
7418 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7419 myh->forced_local = 1;
7420
7421 s->size += ARM_BX_VENEER_SIZE;
7422 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7423 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7424 }
7425
7426
7427 /* Add an entry to the code/data map for section SEC. */
7428
7429 static void
7430 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7431 {
7432 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7433 unsigned int newidx;
7434
7435 if (sec_data->map == NULL)
7436 {
7437 sec_data->map = (elf32_arm_section_map *)
7438 bfd_malloc (sizeof (elf32_arm_section_map));
7439 sec_data->mapcount = 0;
7440 sec_data->mapsize = 1;
7441 }
7442
7443 newidx = sec_data->mapcount++;
7444
7445 if (sec_data->mapcount > sec_data->mapsize)
7446 {
7447 sec_data->mapsize *= 2;
7448 sec_data->map = (elf32_arm_section_map *)
7449 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7450 * sizeof (elf32_arm_section_map));
7451 }
7452
7453 if (sec_data->map)
7454 {
7455 sec_data->map[newidx].vma = vma;
7456 sec_data->map[newidx].type = type;
7457 }
7458 }
7459
7460
7461 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7462 veneers are handled for now. */
7463
7464 static bfd_vma
7465 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7466 elf32_vfp11_erratum_list *branch,
7467 bfd *branch_bfd,
7468 asection *branch_sec,
7469 unsigned int offset)
7470 {
7471 asection *s;
7472 struct elf32_arm_link_hash_table *hash_table;
7473 char *tmp_name;
7474 struct elf_link_hash_entry *myh;
7475 struct bfd_link_hash_entry *bh;
7476 bfd_vma val;
7477 struct _arm_elf_section_data *sec_data;
7478 elf32_vfp11_erratum_list *newerr;
7479
7480 hash_table = elf32_arm_hash_table (link_info);
7481 BFD_ASSERT (hash_table != NULL);
7482 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7483
7484 s = bfd_get_linker_section
7485 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7486
7487 sec_data = elf32_arm_section_data (s);
7488
7489 BFD_ASSERT (s != NULL);
7490
7491 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7492 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7493 BFD_ASSERT (tmp_name);
7494
7495 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7496 hash_table->num_vfp11_fixes);
7497
7498 myh = elf_link_hash_lookup
7499 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7500
7501 BFD_ASSERT (myh == NULL);
7502
7503 bh = NULL;
7504 val = hash_table->vfp11_erratum_glue_size;
7505 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7506 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7507 NULL, TRUE, FALSE, &bh);
7508
7509 myh = (struct elf_link_hash_entry *) bh;
7510 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7511 myh->forced_local = 1;
7512
7513 /* Link veneer back to calling location. */
7514 sec_data->erratumcount += 1;
7515 newerr = (elf32_vfp11_erratum_list *)
7516 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7517
7518 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7519 newerr->vma = -1;
7520 newerr->u.v.branch = branch;
7521 newerr->u.v.id = hash_table->num_vfp11_fixes;
7522 branch->u.b.veneer = newerr;
7523
7524 newerr->next = sec_data->erratumlist;
7525 sec_data->erratumlist = newerr;
7526
7527 /* A symbol for the return from the veneer. */
7528 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7529 hash_table->num_vfp11_fixes);
7530
7531 myh = elf_link_hash_lookup
7532 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7533
7534 if (myh != NULL)
7535 abort ();
7536
7537 bh = NULL;
7538 val = offset + 4;
7539 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7540 branch_sec, val, NULL, TRUE, FALSE, &bh);
7541
7542 myh = (struct elf_link_hash_entry *) bh;
7543 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7544 myh->forced_local = 1;
7545
7546 free (tmp_name);
7547
7548 /* Generate a mapping symbol for the veneer section, and explicitly add an
7549 entry for that symbol to the code/data map for the section. */
7550 if (hash_table->vfp11_erratum_glue_size == 0)
7551 {
7552 bh = NULL;
7553 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7554 ever requires this erratum fix. */
7555 _bfd_generic_link_add_one_symbol (link_info,
7556 hash_table->bfd_of_glue_owner, "$a",
7557 BSF_LOCAL, s, 0, NULL,
7558 TRUE, FALSE, &bh);
7559
7560 myh = (struct elf_link_hash_entry *) bh;
7561 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7562 myh->forced_local = 1;
7563
7564 /* The elf32_arm_init_maps function only cares about symbols from input
7565 BFDs. We must make a note of this generated mapping symbol
7566 ourselves so that code byteswapping works properly in
7567 elf32_arm_write_section. */
7568 elf32_arm_section_map_add (s, 'a', 0);
7569 }
7570
7571 s->size += VFP11_ERRATUM_VENEER_SIZE;
7572 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7573 hash_table->num_vfp11_fixes++;
7574
7575 /* The offset of the veneer. */
7576 return val;
7577 }
7578
7579 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7580 veneers need to be handled because used only in Cortex-M. */
7581
7582 static bfd_vma
7583 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7584 elf32_stm32l4xx_erratum_list *branch,
7585 bfd *branch_bfd,
7586 asection *branch_sec,
7587 unsigned int offset,
7588 bfd_size_type veneer_size)
7589 {
7590 asection *s;
7591 struct elf32_arm_link_hash_table *hash_table;
7592 char *tmp_name;
7593 struct elf_link_hash_entry *myh;
7594 struct bfd_link_hash_entry *bh;
7595 bfd_vma val;
7596 struct _arm_elf_section_data *sec_data;
7597 elf32_stm32l4xx_erratum_list *newerr;
7598
7599 hash_table = elf32_arm_hash_table (link_info);
7600 BFD_ASSERT (hash_table != NULL);
7601 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7602
7603 s = bfd_get_linker_section
7604 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7605
7606 BFD_ASSERT (s != NULL);
7607
7608 sec_data = elf32_arm_section_data (s);
7609
7610 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7611 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7612 BFD_ASSERT (tmp_name);
7613
7614 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7615 hash_table->num_stm32l4xx_fixes);
7616
7617 myh = elf_link_hash_lookup
7618 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7619
7620 BFD_ASSERT (myh == NULL);
7621
7622 bh = NULL;
7623 val = hash_table->stm32l4xx_erratum_glue_size;
7624 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7625 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7626 NULL, TRUE, FALSE, &bh);
7627
7628 myh = (struct elf_link_hash_entry *) bh;
7629 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7630 myh->forced_local = 1;
7631
7632 /* Link veneer back to calling location. */
7633 sec_data->stm32l4xx_erratumcount += 1;
7634 newerr = (elf32_stm32l4xx_erratum_list *)
7635 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7636
7637 newerr->type = STM32L4XX_ERRATUM_VENEER;
7638 newerr->vma = -1;
7639 newerr->u.v.branch = branch;
7640 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7641 branch->u.b.veneer = newerr;
7642
7643 newerr->next = sec_data->stm32l4xx_erratumlist;
7644 sec_data->stm32l4xx_erratumlist = newerr;
7645
7646 /* A symbol for the return from the veneer. */
7647 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7648 hash_table->num_stm32l4xx_fixes);
7649
7650 myh = elf_link_hash_lookup
7651 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7652
7653 if (myh != NULL)
7654 abort ();
7655
7656 bh = NULL;
7657 val = offset + 4;
7658 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7659 branch_sec, val, NULL, TRUE, FALSE, &bh);
7660
7661 myh = (struct elf_link_hash_entry *) bh;
7662 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7663 myh->forced_local = 1;
7664
7665 free (tmp_name);
7666
7667 /* Generate a mapping symbol for the veneer section, and explicitly add an
7668 entry for that symbol to the code/data map for the section. */
7669 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7670 {
7671 bh = NULL;
7672 /* Creates a THUMB symbol since there is no other choice. */
7673 _bfd_generic_link_add_one_symbol (link_info,
7674 hash_table->bfd_of_glue_owner, "$t",
7675 BSF_LOCAL, s, 0, NULL,
7676 TRUE, FALSE, &bh);
7677
7678 myh = (struct elf_link_hash_entry *) bh;
7679 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7680 myh->forced_local = 1;
7681
7682 /* The elf32_arm_init_maps function only cares about symbols from input
7683 BFDs. We must make a note of this generated mapping symbol
7684 ourselves so that code byteswapping works properly in
7685 elf32_arm_write_section. */
7686 elf32_arm_section_map_add (s, 't', 0);
7687 }
7688
7689 s->size += veneer_size;
7690 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7691 hash_table->num_stm32l4xx_fixes++;
7692
7693 /* The offset of the veneer. */
7694 return val;
7695 }
7696
7697 #define ARM_GLUE_SECTION_FLAGS \
7698 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7699 | SEC_READONLY | SEC_LINKER_CREATED)
7700
7701 /* Create a fake section for use by the ARM backend of the linker. */
7702
7703 static bfd_boolean
7704 arm_make_glue_section (bfd * abfd, const char * name)
7705 {
7706 asection * sec;
7707
7708 sec = bfd_get_linker_section (abfd, name);
7709 if (sec != NULL)
7710 /* Already made. */
7711 return TRUE;
7712
7713 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7714
7715 if (sec == NULL
7716 || !bfd_set_section_alignment (sec, 2))
7717 return FALSE;
7718
7719 /* Set the gc mark to prevent the section from being removed by garbage
7720 collection, despite the fact that no relocs refer to this section. */
7721 sec->gc_mark = 1;
7722
7723 return TRUE;
7724 }
7725
7726 /* Set size of .plt entries. This function is called from the
7727 linker scripts in ld/emultempl/{armelf}.em. */
7728
7729 void
7730 bfd_elf32_arm_use_long_plt (void)
7731 {
7732 elf32_arm_use_long_plt_entry = TRUE;
7733 }
7734
7735 /* Add the glue sections to ABFD. This function is called from the
7736 linker scripts in ld/emultempl/{armelf}.em. */
7737
7738 bfd_boolean
7739 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7740 struct bfd_link_info *info)
7741 {
7742 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7743 bfd_boolean dostm32l4xx = globals
7744 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7745 bfd_boolean addglue;
7746
7747 /* If we are only performing a partial
7748 link do not bother adding the glue. */
7749 if (bfd_link_relocatable (info))
7750 return TRUE;
7751
7752 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7753 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7754 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7755 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7756
7757 if (!dostm32l4xx)
7758 return addglue;
7759
7760 return addglue
7761 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7762 }
7763
7764 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7765 ensures they are not marked for deletion by
7766 strip_excluded_output_sections () when veneers are going to be created
7767 later. Not doing so would trigger assert on empty section size in
7768 lang_size_sections_1 (). */
7769
7770 void
7771 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7772 {
7773 enum elf32_arm_stub_type stub_type;
7774
7775 /* If we are only performing a partial
7776 link do not bother adding the glue. */
7777 if (bfd_link_relocatable (info))
7778 return;
7779
7780 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7781 {
7782 asection *out_sec;
7783 const char *out_sec_name;
7784
7785 if (!arm_dedicated_stub_output_section_required (stub_type))
7786 continue;
7787
7788 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7789 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7790 if (out_sec != NULL)
7791 out_sec->flags |= SEC_KEEP;
7792 }
7793 }
7794
7795 /* Select a BFD to be used to hold the sections used by the glue code.
7796 This function is called from the linker scripts in ld/emultempl/
7797 {armelf/pe}.em. */
7798
7799 bfd_boolean
7800 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7801 {
7802 struct elf32_arm_link_hash_table *globals;
7803
7804 /* If we are only performing a partial link
7805 do not bother getting a bfd to hold the glue. */
7806 if (bfd_link_relocatable (info))
7807 return TRUE;
7808
7809 /* Make sure we don't attach the glue sections to a dynamic object. */
7810 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7811
7812 globals = elf32_arm_hash_table (info);
7813 BFD_ASSERT (globals != NULL);
7814
7815 if (globals->bfd_of_glue_owner != NULL)
7816 return TRUE;
7817
7818 /* Save the bfd for later use. */
7819 globals->bfd_of_glue_owner = abfd;
7820
7821 return TRUE;
7822 }
7823
7824 static void
7825 check_use_blx (struct elf32_arm_link_hash_table *globals)
7826 {
7827 int cpu_arch;
7828
7829 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7830 Tag_CPU_arch);
7831
7832 if (globals->fix_arm1176)
7833 {
7834 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7835 globals->use_blx = 1;
7836 }
7837 else
7838 {
7839 if (cpu_arch > TAG_CPU_ARCH_V4T)
7840 globals->use_blx = 1;
7841 }
7842 }
7843
7844 bfd_boolean
7845 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7846 struct bfd_link_info *link_info)
7847 {
7848 Elf_Internal_Shdr *symtab_hdr;
7849 Elf_Internal_Rela *internal_relocs = NULL;
7850 Elf_Internal_Rela *irel, *irelend;
7851 bfd_byte *contents = NULL;
7852
7853 asection *sec;
7854 struct elf32_arm_link_hash_table *globals;
7855
7856 /* If we are only performing a partial link do not bother
7857 to construct any glue. */
7858 if (bfd_link_relocatable (link_info))
7859 return TRUE;
7860
7861 /* Here we have a bfd that is to be included on the link. We have a
7862 hook to do reloc rummaging, before section sizes are nailed down. */
7863 globals = elf32_arm_hash_table (link_info);
7864 BFD_ASSERT (globals != NULL);
7865
7866 check_use_blx (globals);
7867
7868 if (globals->byteswap_code && !bfd_big_endian (abfd))
7869 {
7870 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7871 abfd);
7872 return FALSE;
7873 }
7874
7875 /* PR 5398: If we have not decided to include any loadable sections in
7876 the output then we will not have a glue owner bfd. This is OK, it
7877 just means that there is nothing else for us to do here. */
7878 if (globals->bfd_of_glue_owner == NULL)
7879 return TRUE;
7880
7881 /* Rummage around all the relocs and map the glue vectors. */
7882 sec = abfd->sections;
7883
7884 if (sec == NULL)
7885 return TRUE;
7886
7887 for (; sec != NULL; sec = sec->next)
7888 {
7889 if (sec->reloc_count == 0)
7890 continue;
7891
7892 if ((sec->flags & SEC_EXCLUDE) != 0)
7893 continue;
7894
7895 symtab_hdr = & elf_symtab_hdr (abfd);
7896
7897 /* Load the relocs. */
7898 internal_relocs
7899 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7900
7901 if (internal_relocs == NULL)
7902 goto error_return;
7903
7904 irelend = internal_relocs + sec->reloc_count;
7905 for (irel = internal_relocs; irel < irelend; irel++)
7906 {
7907 long r_type;
7908 unsigned long r_index;
7909
7910 struct elf_link_hash_entry *h;
7911
7912 r_type = ELF32_R_TYPE (irel->r_info);
7913 r_index = ELF32_R_SYM (irel->r_info);
7914
7915 /* These are the only relocation types we care about. */
7916 if ( r_type != R_ARM_PC24
7917 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7918 continue;
7919
7920 /* Get the section contents if we haven't done so already. */
7921 if (contents == NULL)
7922 {
7923 /* Get cached copy if it exists. */
7924 if (elf_section_data (sec)->this_hdr.contents != NULL)
7925 contents = elf_section_data (sec)->this_hdr.contents;
7926 else
7927 {
7928 /* Go get them off disk. */
7929 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7930 goto error_return;
7931 }
7932 }
7933
7934 if (r_type == R_ARM_V4BX)
7935 {
7936 int reg;
7937
7938 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7939 record_arm_bx_glue (link_info, reg);
7940 continue;
7941 }
7942
7943 /* If the relocation is not against a symbol it cannot concern us. */
7944 h = NULL;
7945
7946 /* We don't care about local symbols. */
7947 if (r_index < symtab_hdr->sh_info)
7948 continue;
7949
7950 /* This is an external symbol. */
7951 r_index -= symtab_hdr->sh_info;
7952 h = (struct elf_link_hash_entry *)
7953 elf_sym_hashes (abfd)[r_index];
7954
7955 /* If the relocation is against a static symbol it must be within
7956 the current section and so cannot be a cross ARM/Thumb relocation. */
7957 if (h == NULL)
7958 continue;
7959
7960 /* If the call will go through a PLT entry then we do not need
7961 glue. */
7962 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7963 continue;
7964
7965 switch (r_type)
7966 {
7967 case R_ARM_PC24:
7968 /* This one is a call from arm code. We need to look up
7969 the target of the call. If it is a thumb target, we
7970 insert glue. */
7971 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7972 == ST_BRANCH_TO_THUMB)
7973 record_arm_to_thumb_glue (link_info, h);
7974 break;
7975
7976 default:
7977 abort ();
7978 }
7979 }
7980
7981 if (contents != NULL
7982 && elf_section_data (sec)->this_hdr.contents != contents)
7983 free (contents);
7984 contents = NULL;
7985
7986 if (internal_relocs != NULL
7987 && elf_section_data (sec)->relocs != internal_relocs)
7988 free (internal_relocs);
7989 internal_relocs = NULL;
7990 }
7991
7992 return TRUE;
7993
7994 error_return:
7995 if (contents != NULL
7996 && elf_section_data (sec)->this_hdr.contents != contents)
7997 free (contents);
7998 if (internal_relocs != NULL
7999 && elf_section_data (sec)->relocs != internal_relocs)
8000 free (internal_relocs);
8001
8002 return FALSE;
8003 }
8004 #endif
8005
8006
8007 /* Initialise maps of ARM/Thumb/data for input BFDs. */
8008
8009 void
8010 bfd_elf32_arm_init_maps (bfd *abfd)
8011 {
8012 Elf_Internal_Sym *isymbuf;
8013 Elf_Internal_Shdr *hdr;
8014 unsigned int i, localsyms;
8015
8016 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
8017 if (! is_arm_elf (abfd))
8018 return;
8019
8020 if ((abfd->flags & DYNAMIC) != 0)
8021 return;
8022
8023 hdr = & elf_symtab_hdr (abfd);
8024 localsyms = hdr->sh_info;
8025
8026 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
8027 should contain the number of local symbols, which should come before any
8028 global symbols. Mapping symbols are always local. */
8029 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
8030 NULL);
8031
8032 /* No internal symbols read? Skip this BFD. */
8033 if (isymbuf == NULL)
8034 return;
8035
8036 for (i = 0; i < localsyms; i++)
8037 {
8038 Elf_Internal_Sym *isym = &isymbuf[i];
8039 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8040 const char *name;
8041
8042 if (sec != NULL
8043 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
8044 {
8045 name = bfd_elf_string_from_elf_section (abfd,
8046 hdr->sh_link, isym->st_name);
8047
8048 if (bfd_is_arm_special_symbol_name (name,
8049 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
8050 elf32_arm_section_map_add (sec, name[1], isym->st_value);
8051 }
8052 }
8053 }
8054
8055
8056 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
8057 say what they wanted. */
8058
8059 void
8060 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
8061 {
8062 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8063 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8064
8065 if (globals == NULL)
8066 return;
8067
8068 if (globals->fix_cortex_a8 == -1)
8069 {
8070 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
8071 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
8072 && (out_attr[Tag_CPU_arch_profile].i == 'A'
8073 || out_attr[Tag_CPU_arch_profile].i == 0))
8074 globals->fix_cortex_a8 = 1;
8075 else
8076 globals->fix_cortex_a8 = 0;
8077 }
8078 }
8079
8080
8081 void
8082 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
8083 {
8084 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8085 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8086
8087 if (globals == NULL)
8088 return;
8089 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
8090 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
8091 {
8092 switch (globals->vfp11_fix)
8093 {
8094 case BFD_ARM_VFP11_FIX_DEFAULT:
8095 case BFD_ARM_VFP11_FIX_NONE:
8096 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8097 break;
8098
8099 default:
8100 /* Give a warning, but do as the user requests anyway. */
8101 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
8102 "workaround is not necessary for target architecture"), obfd);
8103 }
8104 }
8105 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
8106 /* For earlier architectures, we might need the workaround, but do not
8107 enable it by default. If users is running with broken hardware, they
8108 must enable the erratum fix explicitly. */
8109 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8110 }
8111
8112 void
8113 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
8114 {
8115 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8116 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8117
8118 if (globals == NULL)
8119 return;
8120
8121 /* We assume only Cortex-M4 may require the fix. */
8122 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
8123 || out_attr[Tag_CPU_arch_profile].i != 'M')
8124 {
8125 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
8126 /* Give a warning, but do as the user requests anyway. */
8127 _bfd_error_handler
8128 (_("%pB: warning: selected STM32L4XX erratum "
8129 "workaround is not necessary for target architecture"), obfd);
8130 }
8131 }
8132
8133 enum bfd_arm_vfp11_pipe
8134 {
8135 VFP11_FMAC,
8136 VFP11_LS,
8137 VFP11_DS,
8138 VFP11_BAD
8139 };
8140
8141 /* Return a VFP register number. This is encoded as RX:X for single-precision
8142 registers, or X:RX for double-precision registers, where RX is the group of
8143 four bits in the instruction encoding and X is the single extension bit.
8144 RX and X fields are specified using their lowest (starting) bit. The return
8145 value is:
8146
8147 0...31: single-precision registers s0...s31
8148 32...63: double-precision registers d0...d31.
8149
8150 Although X should be zero for VFP11 (encoding d0...d15 only), we might
8151 encounter VFP3 instructions, so we allow the full range for DP registers. */
8152
8153 static unsigned int
8154 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
8155 unsigned int x)
8156 {
8157 if (is_double)
8158 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
8159 else
8160 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
8161 }
8162
8163 /* Set bits in *WMASK according to a register number REG as encoded by
8164 bfd_arm_vfp11_regno(). Ignore d16-d31. */
8165
8166 static void
8167 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
8168 {
8169 if (reg < 32)
8170 *wmask |= 1 << reg;
8171 else if (reg < 48)
8172 *wmask |= 3 << ((reg - 32) * 2);
8173 }
8174
8175 /* Return TRUE if WMASK overwrites anything in REGS. */
8176
8177 static bfd_boolean
8178 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
8179 {
8180 int i;
8181
8182 for (i = 0; i < numregs; i++)
8183 {
8184 unsigned int reg = regs[i];
8185
8186 if (reg < 32 && (wmask & (1 << reg)) != 0)
8187 return TRUE;
8188
8189 reg -= 32;
8190
8191 if (reg >= 16)
8192 continue;
8193
8194 if ((wmask & (3 << (reg * 2))) != 0)
8195 return TRUE;
8196 }
8197
8198 return FALSE;
8199 }
8200
8201 /* In this function, we're interested in two things: finding input registers
8202 for VFP data-processing instructions, and finding the set of registers which
8203 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
8204 hold the written set, so FLDM etc. are easy to deal with (we're only
8205 interested in 32 SP registers or 16 dp registers, due to the VFP version
8206 implemented by the chip in question). DP registers are marked by setting
8207 both SP registers in the write mask). */
8208
8209 static enum bfd_arm_vfp11_pipe
8210 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
8211 int *numregs)
8212 {
8213 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
8214 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
8215
8216 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
8217 {
8218 unsigned int pqrs;
8219 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8220 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8221
8222 pqrs = ((insn & 0x00800000) >> 20)
8223 | ((insn & 0x00300000) >> 19)
8224 | ((insn & 0x00000040) >> 6);
8225
8226 switch (pqrs)
8227 {
8228 case 0: /* fmac[sd]. */
8229 case 1: /* fnmac[sd]. */
8230 case 2: /* fmsc[sd]. */
8231 case 3: /* fnmsc[sd]. */
8232 vpipe = VFP11_FMAC;
8233 bfd_arm_vfp11_write_mask (destmask, fd);
8234 regs[0] = fd;
8235 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8236 regs[2] = fm;
8237 *numregs = 3;
8238 break;
8239
8240 case 4: /* fmul[sd]. */
8241 case 5: /* fnmul[sd]. */
8242 case 6: /* fadd[sd]. */
8243 case 7: /* fsub[sd]. */
8244 vpipe = VFP11_FMAC;
8245 goto vfp_binop;
8246
8247 case 8: /* fdiv[sd]. */
8248 vpipe = VFP11_DS;
8249 vfp_binop:
8250 bfd_arm_vfp11_write_mask (destmask, fd);
8251 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8252 regs[1] = fm;
8253 *numregs = 2;
8254 break;
8255
8256 case 15: /* extended opcode. */
8257 {
8258 unsigned int extn = ((insn >> 15) & 0x1e)
8259 | ((insn >> 7) & 1);
8260
8261 switch (extn)
8262 {
8263 case 0: /* fcpy[sd]. */
8264 case 1: /* fabs[sd]. */
8265 case 2: /* fneg[sd]. */
8266 case 8: /* fcmp[sd]. */
8267 case 9: /* fcmpe[sd]. */
8268 case 10: /* fcmpz[sd]. */
8269 case 11: /* fcmpez[sd]. */
8270 case 16: /* fuito[sd]. */
8271 case 17: /* fsito[sd]. */
8272 case 24: /* ftoui[sd]. */
8273 case 25: /* ftouiz[sd]. */
8274 case 26: /* ftosi[sd]. */
8275 case 27: /* ftosiz[sd]. */
8276 /* These instructions will not bounce due to underflow. */
8277 *numregs = 0;
8278 vpipe = VFP11_FMAC;
8279 break;
8280
8281 case 3: /* fsqrt[sd]. */
8282 /* fsqrt cannot underflow, but it can (perhaps) overwrite
8283 registers to cause the erratum in previous instructions. */
8284 bfd_arm_vfp11_write_mask (destmask, fd);
8285 vpipe = VFP11_DS;
8286 break;
8287
8288 case 15: /* fcvt{ds,sd}. */
8289 {
8290 int rnum = 0;
8291
8292 bfd_arm_vfp11_write_mask (destmask, fd);
8293
8294 /* Only FCVTSD can underflow. */
8295 if ((insn & 0x100) != 0)
8296 regs[rnum++] = fm;
8297
8298 *numregs = rnum;
8299
8300 vpipe = VFP11_FMAC;
8301 }
8302 break;
8303
8304 default:
8305 return VFP11_BAD;
8306 }
8307 }
8308 break;
8309
8310 default:
8311 return VFP11_BAD;
8312 }
8313 }
8314 /* Two-register transfer. */
8315 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
8316 {
8317 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8318
8319 if ((insn & 0x100000) == 0)
8320 {
8321 if (is_double)
8322 bfd_arm_vfp11_write_mask (destmask, fm);
8323 else
8324 {
8325 bfd_arm_vfp11_write_mask (destmask, fm);
8326 bfd_arm_vfp11_write_mask (destmask, fm + 1);
8327 }
8328 }
8329
8330 vpipe = VFP11_LS;
8331 }
8332 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
8333 {
8334 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8335 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
8336
8337 switch (puw)
8338 {
8339 case 0: /* Two-reg transfer. We should catch these above. */
8340 abort ();
8341
8342 case 2: /* fldm[sdx]. */
8343 case 3:
8344 case 5:
8345 {
8346 unsigned int i, offset = insn & 0xff;
8347
8348 if (is_double)
8349 offset >>= 1;
8350
8351 for (i = fd; i < fd + offset; i++)
8352 bfd_arm_vfp11_write_mask (destmask, i);
8353 }
8354 break;
8355
8356 case 4: /* fld[sd]. */
8357 case 6:
8358 bfd_arm_vfp11_write_mask (destmask, fd);
8359 break;
8360
8361 default:
8362 return VFP11_BAD;
8363 }
8364
8365 vpipe = VFP11_LS;
8366 }
8367 /* Single-register transfer. Note L==0. */
8368 else if ((insn & 0x0f100e10) == 0x0e000a10)
8369 {
8370 unsigned int opcode = (insn >> 21) & 7;
8371 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8372
8373 switch (opcode)
8374 {
8375 case 0: /* fmsr/fmdlr. */
8376 case 1: /* fmdhr. */
8377 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8378 destination register. I don't know if this is exactly right,
8379 but it is the conservative choice. */
8380 bfd_arm_vfp11_write_mask (destmask, fn);
8381 break;
8382
8383 case 7: /* fmxr. */
8384 break;
8385 }
8386
8387 vpipe = VFP11_LS;
8388 }
8389
8390 return vpipe;
8391 }
8392
8393
8394 static int elf32_arm_compare_mapping (const void * a, const void * b);
8395
8396
8397 /* Look for potentially-troublesome code sequences which might trigger the
8398 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8399 (available from ARM) for details of the erratum. A short version is
8400 described in ld.texinfo. */
8401
8402 bfd_boolean
8403 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8404 {
8405 asection *sec;
8406 bfd_byte *contents = NULL;
8407 int state = 0;
8408 int regs[3], numregs = 0;
8409 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8410 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8411
8412 if (globals == NULL)
8413 return FALSE;
8414
8415 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8416 The states transition as follows:
8417
8418 0 -> 1 (vector) or 0 -> 2 (scalar)
8419 A VFP FMAC-pipeline instruction has been seen. Fill
8420 regs[0]..regs[numregs-1] with its input operands. Remember this
8421 instruction in 'first_fmac'.
8422
8423 1 -> 2
8424 Any instruction, except for a VFP instruction which overwrites
8425 regs[*].
8426
8427 1 -> 3 [ -> 0 ] or
8428 2 -> 3 [ -> 0 ]
8429 A VFP instruction has been seen which overwrites any of regs[*].
8430 We must make a veneer! Reset state to 0 before examining next
8431 instruction.
8432
8433 2 -> 0
8434 If we fail to match anything in state 2, reset to state 0 and reset
8435 the instruction pointer to the instruction after 'first_fmac'.
8436
8437 If the VFP11 vector mode is in use, there must be at least two unrelated
8438 instructions between anti-dependent VFP11 instructions to properly avoid
8439 triggering the erratum, hence the use of the extra state 1. */
8440
8441 /* If we are only performing a partial link do not bother
8442 to construct any glue. */
8443 if (bfd_link_relocatable (link_info))
8444 return TRUE;
8445
8446 /* Skip if this bfd does not correspond to an ELF image. */
8447 if (! is_arm_elf (abfd))
8448 return TRUE;
8449
8450 /* We should have chosen a fix type by the time we get here. */
8451 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8452
8453 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8454 return TRUE;
8455
8456 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8457 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8458 return TRUE;
8459
8460 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8461 {
8462 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8463 struct _arm_elf_section_data *sec_data;
8464
8465 /* If we don't have executable progbits, we're not interested in this
8466 section. Also skip if section is to be excluded. */
8467 if (elf_section_type (sec) != SHT_PROGBITS
8468 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8469 || (sec->flags & SEC_EXCLUDE) != 0
8470 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8471 || sec->output_section == bfd_abs_section_ptr
8472 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8473 continue;
8474
8475 sec_data = elf32_arm_section_data (sec);
8476
8477 if (sec_data->mapcount == 0)
8478 continue;
8479
8480 if (elf_section_data (sec)->this_hdr.contents != NULL)
8481 contents = elf_section_data (sec)->this_hdr.contents;
8482 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8483 goto error_return;
8484
8485 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8486 elf32_arm_compare_mapping);
8487
8488 for (span = 0; span < sec_data->mapcount; span++)
8489 {
8490 unsigned int span_start = sec_data->map[span].vma;
8491 unsigned int span_end = (span == sec_data->mapcount - 1)
8492 ? sec->size : sec_data->map[span + 1].vma;
8493 char span_type = sec_data->map[span].type;
8494
8495 /* FIXME: Only ARM mode is supported at present. We may need to
8496 support Thumb-2 mode also at some point. */
8497 if (span_type != 'a')
8498 continue;
8499
8500 for (i = span_start; i < span_end;)
8501 {
8502 unsigned int next_i = i + 4;
8503 unsigned int insn = bfd_big_endian (abfd)
8504 ? (((unsigned) contents[i] << 24)
8505 | (contents[i + 1] << 16)
8506 | (contents[i + 2] << 8)
8507 | contents[i + 3])
8508 : (((unsigned) contents[i + 3] << 24)
8509 | (contents[i + 2] << 16)
8510 | (contents[i + 1] << 8)
8511 | contents[i]);
8512 unsigned int writemask = 0;
8513 enum bfd_arm_vfp11_pipe vpipe;
8514
8515 switch (state)
8516 {
8517 case 0:
8518 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8519 &numregs);
8520 /* I'm assuming the VFP11 erratum can trigger with denorm
8521 operands on either the FMAC or the DS pipeline. This might
8522 lead to slightly overenthusiastic veneer insertion. */
8523 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8524 {
8525 state = use_vector ? 1 : 2;
8526 first_fmac = i;
8527 veneer_of_insn = insn;
8528 }
8529 break;
8530
8531 case 1:
8532 {
8533 int other_regs[3], other_numregs;
8534 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8535 other_regs,
8536 &other_numregs);
8537 if (vpipe != VFP11_BAD
8538 && bfd_arm_vfp11_antidependency (writemask, regs,
8539 numregs))
8540 state = 3;
8541 else
8542 state = 2;
8543 }
8544 break;
8545
8546 case 2:
8547 {
8548 int other_regs[3], other_numregs;
8549 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8550 other_regs,
8551 &other_numregs);
8552 if (vpipe != VFP11_BAD
8553 && bfd_arm_vfp11_antidependency (writemask, regs,
8554 numregs))
8555 state = 3;
8556 else
8557 {
8558 state = 0;
8559 next_i = first_fmac + 4;
8560 }
8561 }
8562 break;
8563
8564 case 3:
8565 abort (); /* Should be unreachable. */
8566 }
8567
8568 if (state == 3)
8569 {
8570 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8571 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8572
8573 elf32_arm_section_data (sec)->erratumcount += 1;
8574
8575 newerr->u.b.vfp_insn = veneer_of_insn;
8576
8577 switch (span_type)
8578 {
8579 case 'a':
8580 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8581 break;
8582
8583 default:
8584 abort ();
8585 }
8586
8587 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8588 first_fmac);
8589
8590 newerr->vma = -1;
8591
8592 newerr->next = sec_data->erratumlist;
8593 sec_data->erratumlist = newerr;
8594
8595 state = 0;
8596 }
8597
8598 i = next_i;
8599 }
8600 }
8601
8602 if (contents != NULL
8603 && elf_section_data (sec)->this_hdr.contents != contents)
8604 free (contents);
8605 contents = NULL;
8606 }
8607
8608 return TRUE;
8609
8610 error_return:
8611 if (contents != NULL
8612 && elf_section_data (sec)->this_hdr.contents != contents)
8613 free (contents);
8614
8615 return FALSE;
8616 }
8617
8618 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8619 after sections have been laid out, using specially-named symbols. */
8620
8621 void
8622 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8623 struct bfd_link_info *link_info)
8624 {
8625 asection *sec;
8626 struct elf32_arm_link_hash_table *globals;
8627 char *tmp_name;
8628
8629 if (bfd_link_relocatable (link_info))
8630 return;
8631
8632 /* Skip if this bfd does not correspond to an ELF image. */
8633 if (! is_arm_elf (abfd))
8634 return;
8635
8636 globals = elf32_arm_hash_table (link_info);
8637 if (globals == NULL)
8638 return;
8639
8640 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8641 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8642 BFD_ASSERT (tmp_name);
8643
8644 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8645 {
8646 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8647 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8648
8649 for (; errnode != NULL; errnode = errnode->next)
8650 {
8651 struct elf_link_hash_entry *myh;
8652 bfd_vma vma;
8653
8654 switch (errnode->type)
8655 {
8656 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8657 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8658 /* Find veneer symbol. */
8659 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8660 errnode->u.b.veneer->u.v.id);
8661
8662 myh = elf_link_hash_lookup
8663 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8664
8665 if (myh == NULL)
8666 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8667 abfd, "VFP11", tmp_name);
8668
8669 vma = myh->root.u.def.section->output_section->vma
8670 + myh->root.u.def.section->output_offset
8671 + myh->root.u.def.value;
8672
8673 errnode->u.b.veneer->vma = vma;
8674 break;
8675
8676 case VFP11_ERRATUM_ARM_VENEER:
8677 case VFP11_ERRATUM_THUMB_VENEER:
8678 /* Find return location. */
8679 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8680 errnode->u.v.id);
8681
8682 myh = elf_link_hash_lookup
8683 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8684
8685 if (myh == NULL)
8686 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8687 abfd, "VFP11", tmp_name);
8688
8689 vma = myh->root.u.def.section->output_section->vma
8690 + myh->root.u.def.section->output_offset
8691 + myh->root.u.def.value;
8692
8693 errnode->u.v.branch->vma = vma;
8694 break;
8695
8696 default:
8697 abort ();
8698 }
8699 }
8700 }
8701
8702 free (tmp_name);
8703 }
8704
8705 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8706 return locations after sections have been laid out, using
8707 specially-named symbols. */
8708
8709 void
8710 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8711 struct bfd_link_info *link_info)
8712 {
8713 asection *sec;
8714 struct elf32_arm_link_hash_table *globals;
8715 char *tmp_name;
8716
8717 if (bfd_link_relocatable (link_info))
8718 return;
8719
8720 /* Skip if this bfd does not correspond to an ELF image. */
8721 if (! is_arm_elf (abfd))
8722 return;
8723
8724 globals = elf32_arm_hash_table (link_info);
8725 if (globals == NULL)
8726 return;
8727
8728 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8729 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8730 BFD_ASSERT (tmp_name);
8731
8732 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8733 {
8734 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8735 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8736
8737 for (; errnode != NULL; errnode = errnode->next)
8738 {
8739 struct elf_link_hash_entry *myh;
8740 bfd_vma vma;
8741
8742 switch (errnode->type)
8743 {
8744 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8745 /* Find veneer symbol. */
8746 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8747 errnode->u.b.veneer->u.v.id);
8748
8749 myh = elf_link_hash_lookup
8750 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8751
8752 if (myh == NULL)
8753 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8754 abfd, "STM32L4XX", tmp_name);
8755
8756 vma = myh->root.u.def.section->output_section->vma
8757 + myh->root.u.def.section->output_offset
8758 + myh->root.u.def.value;
8759
8760 errnode->u.b.veneer->vma = vma;
8761 break;
8762
8763 case STM32L4XX_ERRATUM_VENEER:
8764 /* Find return location. */
8765 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8766 errnode->u.v.id);
8767
8768 myh = elf_link_hash_lookup
8769 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8770
8771 if (myh == NULL)
8772 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8773 abfd, "STM32L4XX", tmp_name);
8774
8775 vma = myh->root.u.def.section->output_section->vma
8776 + myh->root.u.def.section->output_offset
8777 + myh->root.u.def.value;
8778
8779 errnode->u.v.branch->vma = vma;
8780 break;
8781
8782 default:
8783 abort ();
8784 }
8785 }
8786 }
8787
8788 free (tmp_name);
8789 }
8790
8791 static inline bfd_boolean
8792 is_thumb2_ldmia (const insn32 insn)
8793 {
8794 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8795 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8796 return (insn & 0xffd02000) == 0xe8900000;
8797 }
8798
8799 static inline bfd_boolean
8800 is_thumb2_ldmdb (const insn32 insn)
8801 {
8802 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8803 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8804 return (insn & 0xffd02000) == 0xe9100000;
8805 }
8806
8807 static inline bfd_boolean
8808 is_thumb2_vldm (const insn32 insn)
8809 {
8810 /* A6.5 Extension register load or store instruction
8811 A7.7.229
8812 We look for SP 32-bit and DP 64-bit registers.
8813 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8814 <list> is consecutive 64-bit registers
8815 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8816 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8817 <list> is consecutive 32-bit registers
8818 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8819 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8820 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8821 return
8822 (((insn & 0xfe100f00) == 0xec100b00) ||
8823 ((insn & 0xfe100f00) == 0xec100a00))
8824 && /* (IA without !). */
8825 (((((insn << 7) >> 28) & 0xd) == 0x4)
8826 /* (IA with !), includes VPOP (when reg number is SP). */
8827 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8828 /* (DB with !). */
8829 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8830 }
8831
8832 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8833 VLDM opcode and:
8834 - computes the number and the mode of memory accesses
8835 - decides if the replacement should be done:
8836 . replaces only if > 8-word accesses
8837 . or (testing purposes only) replaces all accesses. */
8838
8839 static bfd_boolean
8840 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8841 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8842 {
8843 int nb_words = 0;
8844
8845 /* The field encoding the register list is the same for both LDMIA
8846 and LDMDB encodings. */
8847 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8848 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8849 else if (is_thumb2_vldm (insn))
8850 nb_words = (insn & 0xff);
8851
8852 /* DEFAULT mode accounts for the real bug condition situation,
8853 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8854 return
8855 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8856 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8857 }
8858
8859 /* Look for potentially-troublesome code sequences which might trigger
8860 the STM STM32L4XX erratum. */
8861
8862 bfd_boolean
8863 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8864 struct bfd_link_info *link_info)
8865 {
8866 asection *sec;
8867 bfd_byte *contents = NULL;
8868 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8869
8870 if (globals == NULL)
8871 return FALSE;
8872
8873 /* If we are only performing a partial link do not bother
8874 to construct any glue. */
8875 if (bfd_link_relocatable (link_info))
8876 return TRUE;
8877
8878 /* Skip if this bfd does not correspond to an ELF image. */
8879 if (! is_arm_elf (abfd))
8880 return TRUE;
8881
8882 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8883 return TRUE;
8884
8885 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8886 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8887 return TRUE;
8888
8889 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8890 {
8891 unsigned int i, span;
8892 struct _arm_elf_section_data *sec_data;
8893
8894 /* If we don't have executable progbits, we're not interested in this
8895 section. Also skip if section is to be excluded. */
8896 if (elf_section_type (sec) != SHT_PROGBITS
8897 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8898 || (sec->flags & SEC_EXCLUDE) != 0
8899 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8900 || sec->output_section == bfd_abs_section_ptr
8901 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8902 continue;
8903
8904 sec_data = elf32_arm_section_data (sec);
8905
8906 if (sec_data->mapcount == 0)
8907 continue;
8908
8909 if (elf_section_data (sec)->this_hdr.contents != NULL)
8910 contents = elf_section_data (sec)->this_hdr.contents;
8911 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8912 goto error_return;
8913
8914 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8915 elf32_arm_compare_mapping);
8916
8917 for (span = 0; span < sec_data->mapcount; span++)
8918 {
8919 unsigned int span_start = sec_data->map[span].vma;
8920 unsigned int span_end = (span == sec_data->mapcount - 1)
8921 ? sec->size : sec_data->map[span + 1].vma;
8922 char span_type = sec_data->map[span].type;
8923 int itblock_current_pos = 0;
8924
8925 /* Only Thumb2 mode need be supported with this CM4 specific
8926 code, we should not encounter any arm mode eg span_type
8927 != 'a'. */
8928 if (span_type != 't')
8929 continue;
8930
8931 for (i = span_start; i < span_end;)
8932 {
8933 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8934 bfd_boolean insn_32bit = FALSE;
8935 bfd_boolean is_ldm = FALSE;
8936 bfd_boolean is_vldm = FALSE;
8937 bfd_boolean is_not_last_in_it_block = FALSE;
8938
8939 /* The first 16-bits of all 32-bit thumb2 instructions start
8940 with opcode[15..13]=0b111 and the encoded op1 can be anything
8941 except opcode[12..11]!=0b00.
8942 See 32-bit Thumb instruction encoding. */
8943 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8944 insn_32bit = TRUE;
8945
8946 /* Compute the predicate that tells if the instruction
8947 is concerned by the IT block
8948 - Creates an error if there is a ldm that is not
8949 last in the IT block thus cannot be replaced
8950 - Otherwise we can create a branch at the end of the
8951 IT block, it will be controlled naturally by IT
8952 with the proper pseudo-predicate
8953 - So the only interesting predicate is the one that
8954 tells that we are not on the last item of an IT
8955 block. */
8956 if (itblock_current_pos != 0)
8957 is_not_last_in_it_block = !!--itblock_current_pos;
8958
8959 if (insn_32bit)
8960 {
8961 /* Load the rest of the insn (in manual-friendly order). */
8962 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8963 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8964 is_vldm = is_thumb2_vldm (insn);
8965
8966 /* Veneers are created for (v)ldm depending on
8967 option flags and memory accesses conditions; but
8968 if the instruction is not the last instruction of
8969 an IT block, we cannot create a jump there, so we
8970 bail out. */
8971 if ((is_ldm || is_vldm)
8972 && stm32l4xx_need_create_replacing_stub
8973 (insn, globals->stm32l4xx_fix))
8974 {
8975 if (is_not_last_in_it_block)
8976 {
8977 _bfd_error_handler
8978 /* xgettext:c-format */
8979 (_("%pB(%pA+%#x): error: multiple load detected"
8980 " in non-last IT block instruction:"
8981 " STM32L4XX veneer cannot be generated; "
8982 "use gcc option -mrestrict-it to generate"
8983 " only one instruction per IT block"),
8984 abfd, sec, i);
8985 }
8986 else
8987 {
8988 elf32_stm32l4xx_erratum_list *newerr =
8989 (elf32_stm32l4xx_erratum_list *)
8990 bfd_zmalloc
8991 (sizeof (elf32_stm32l4xx_erratum_list));
8992
8993 elf32_arm_section_data (sec)
8994 ->stm32l4xx_erratumcount += 1;
8995 newerr->u.b.insn = insn;
8996 /* We create only thumb branches. */
8997 newerr->type =
8998 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8999 record_stm32l4xx_erratum_veneer
9000 (link_info, newerr, abfd, sec,
9001 i,
9002 is_ldm ?
9003 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
9004 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
9005 newerr->vma = -1;
9006 newerr->next = sec_data->stm32l4xx_erratumlist;
9007 sec_data->stm32l4xx_erratumlist = newerr;
9008 }
9009 }
9010 }
9011 else
9012 {
9013 /* A7.7.37 IT p208
9014 IT blocks are only encoded in T1
9015 Encoding T1: IT{x{y{z}}} <firstcond>
9016 1 0 1 1 - 1 1 1 1 - firstcond - mask
9017 if mask = '0000' then see 'related encodings'
9018 We don't deal with UNPREDICTABLE, just ignore these.
9019 There can be no nested IT blocks so an IT block
9020 is naturally a new one for which it is worth
9021 computing its size. */
9022 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00)
9023 && ((insn & 0x000f) != 0x0000);
9024 /* If we have a new IT block we compute its size. */
9025 if (is_newitblock)
9026 {
9027 /* Compute the number of instructions controlled
9028 by the IT block, it will be used to decide
9029 whether we are inside an IT block or not. */
9030 unsigned int mask = insn & 0x000f;
9031 itblock_current_pos = 4 - ctz (mask);
9032 }
9033 }
9034
9035 i += insn_32bit ? 4 : 2;
9036 }
9037 }
9038
9039 if (contents != NULL
9040 && elf_section_data (sec)->this_hdr.contents != contents)
9041 free (contents);
9042 contents = NULL;
9043 }
9044
9045 return TRUE;
9046
9047 error_return:
9048 if (contents != NULL
9049 && elf_section_data (sec)->this_hdr.contents != contents)
9050 free (contents);
9051
9052 return FALSE;
9053 }
9054
9055 /* Set target relocation values needed during linking. */
9056
9057 void
9058 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
9059 struct bfd_link_info *link_info,
9060 struct elf32_arm_params *params)
9061 {
9062 struct elf32_arm_link_hash_table *globals;
9063
9064 globals = elf32_arm_hash_table (link_info);
9065 if (globals == NULL)
9066 return;
9067
9068 globals->target1_is_rel = params->target1_is_rel;
9069 if (globals->fdpic_p)
9070 globals->target2_reloc = R_ARM_GOT32;
9071 else if (strcmp (params->target2_type, "rel") == 0)
9072 globals->target2_reloc = R_ARM_REL32;
9073 else if (strcmp (params->target2_type, "abs") == 0)
9074 globals->target2_reloc = R_ARM_ABS32;
9075 else if (strcmp (params->target2_type, "got-rel") == 0)
9076 globals->target2_reloc = R_ARM_GOT_PREL;
9077 else
9078 {
9079 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
9080 params->target2_type);
9081 }
9082 globals->fix_v4bx = params->fix_v4bx;
9083 globals->use_blx |= params->use_blx;
9084 globals->vfp11_fix = params->vfp11_denorm_fix;
9085 globals->stm32l4xx_fix = params->stm32l4xx_fix;
9086 if (globals->fdpic_p)
9087 globals->pic_veneer = 1;
9088 else
9089 globals->pic_veneer = params->pic_veneer;
9090 globals->fix_cortex_a8 = params->fix_cortex_a8;
9091 globals->fix_arm1176 = params->fix_arm1176;
9092 globals->cmse_implib = params->cmse_implib;
9093 globals->in_implib_bfd = params->in_implib_bfd;
9094
9095 BFD_ASSERT (is_arm_elf (output_bfd));
9096 elf_arm_tdata (output_bfd)->no_enum_size_warning
9097 = params->no_enum_size_warning;
9098 elf_arm_tdata (output_bfd)->no_wchar_size_warning
9099 = params->no_wchar_size_warning;
9100 }
9101
9102 /* Replace the target offset of a Thumb bl or b.w instruction. */
9103
9104 static void
9105 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
9106 {
9107 bfd_vma upper;
9108 bfd_vma lower;
9109 int reloc_sign;
9110
9111 BFD_ASSERT ((offset & 1) == 0);
9112
9113 upper = bfd_get_16 (abfd, insn);
9114 lower = bfd_get_16 (abfd, insn + 2);
9115 reloc_sign = (offset < 0) ? 1 : 0;
9116 upper = (upper & ~(bfd_vma) 0x7ff)
9117 | ((offset >> 12) & 0x3ff)
9118 | (reloc_sign << 10);
9119 lower = (lower & ~(bfd_vma) 0x2fff)
9120 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
9121 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
9122 | ((offset >> 1) & 0x7ff);
9123 bfd_put_16 (abfd, upper, insn);
9124 bfd_put_16 (abfd, lower, insn + 2);
9125 }
9126
9127 /* Thumb code calling an ARM function. */
9128
9129 static int
9130 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
9131 const char * name,
9132 bfd * input_bfd,
9133 bfd * output_bfd,
9134 asection * input_section,
9135 bfd_byte * hit_data,
9136 asection * sym_sec,
9137 bfd_vma offset,
9138 bfd_signed_vma addend,
9139 bfd_vma val,
9140 char **error_message)
9141 {
9142 asection * s = 0;
9143 bfd_vma my_offset;
9144 long int ret_offset;
9145 struct elf_link_hash_entry * myh;
9146 struct elf32_arm_link_hash_table * globals;
9147
9148 myh = find_thumb_glue (info, name, error_message);
9149 if (myh == NULL)
9150 return FALSE;
9151
9152 globals = elf32_arm_hash_table (info);
9153 BFD_ASSERT (globals != NULL);
9154 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9155
9156 my_offset = myh->root.u.def.value;
9157
9158 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9159 THUMB2ARM_GLUE_SECTION_NAME);
9160
9161 BFD_ASSERT (s != NULL);
9162 BFD_ASSERT (s->contents != NULL);
9163 BFD_ASSERT (s->output_section != NULL);
9164
9165 if ((my_offset & 0x01) == 0x01)
9166 {
9167 if (sym_sec != NULL
9168 && sym_sec->owner != NULL
9169 && !INTERWORK_FLAG (sym_sec->owner))
9170 {
9171 _bfd_error_handler
9172 (_("%pB(%s): warning: interworking not enabled;"
9173 " first occurrence: %pB: %s call to %s"),
9174 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
9175
9176 return FALSE;
9177 }
9178
9179 --my_offset;
9180 myh->root.u.def.value = my_offset;
9181
9182 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
9183 s->contents + my_offset);
9184
9185 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
9186 s->contents + my_offset + 2);
9187
9188 ret_offset =
9189 /* Address of destination of the stub. */
9190 ((bfd_signed_vma) val)
9191 - ((bfd_signed_vma)
9192 /* Offset from the start of the current section
9193 to the start of the stubs. */
9194 (s->output_offset
9195 /* Offset of the start of this stub from the start of the stubs. */
9196 + my_offset
9197 /* Address of the start of the current section. */
9198 + s->output_section->vma)
9199 /* The branch instruction is 4 bytes into the stub. */
9200 + 4
9201 /* ARM branches work from the pc of the instruction + 8. */
9202 + 8);
9203
9204 put_arm_insn (globals, output_bfd,
9205 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
9206 s->contents + my_offset + 4);
9207 }
9208
9209 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
9210
9211 /* Now go back and fix up the original BL insn to point to here. */
9212 ret_offset =
9213 /* Address of where the stub is located. */
9214 (s->output_section->vma + s->output_offset + my_offset)
9215 /* Address of where the BL is located. */
9216 - (input_section->output_section->vma + input_section->output_offset
9217 + offset)
9218 /* Addend in the relocation. */
9219 - addend
9220 /* Biassing for PC-relative addressing. */
9221 - 8;
9222
9223 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
9224
9225 return TRUE;
9226 }
9227
9228 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
9229
9230 static struct elf_link_hash_entry *
9231 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
9232 const char * name,
9233 bfd * input_bfd,
9234 bfd * output_bfd,
9235 asection * sym_sec,
9236 bfd_vma val,
9237 asection * s,
9238 char ** error_message)
9239 {
9240 bfd_vma my_offset;
9241 long int ret_offset;
9242 struct elf_link_hash_entry * myh;
9243 struct elf32_arm_link_hash_table * globals;
9244
9245 myh = find_arm_glue (info, name, error_message);
9246 if (myh == NULL)
9247 return NULL;
9248
9249 globals = elf32_arm_hash_table (info);
9250 BFD_ASSERT (globals != NULL);
9251 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9252
9253 my_offset = myh->root.u.def.value;
9254
9255 if ((my_offset & 0x01) == 0x01)
9256 {
9257 if (sym_sec != NULL
9258 && sym_sec->owner != NULL
9259 && !INTERWORK_FLAG (sym_sec->owner))
9260 {
9261 _bfd_error_handler
9262 (_("%pB(%s): warning: interworking not enabled;"
9263 " first occurrence: %pB: %s call to %s"),
9264 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
9265 }
9266
9267 --my_offset;
9268 myh->root.u.def.value = my_offset;
9269
9270 if (bfd_link_pic (info)
9271 || globals->root.is_relocatable_executable
9272 || globals->pic_veneer)
9273 {
9274 /* For relocatable objects we can't use absolute addresses,
9275 so construct the address from a relative offset. */
9276 /* TODO: If the offset is small it's probably worth
9277 constructing the address with adds. */
9278 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
9279 s->contents + my_offset);
9280 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
9281 s->contents + my_offset + 4);
9282 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
9283 s->contents + my_offset + 8);
9284 /* Adjust the offset by 4 for the position of the add,
9285 and 8 for the pipeline offset. */
9286 ret_offset = (val - (s->output_offset
9287 + s->output_section->vma
9288 + my_offset + 12))
9289 | 1;
9290 bfd_put_32 (output_bfd, ret_offset,
9291 s->contents + my_offset + 12);
9292 }
9293 else if (globals->use_blx)
9294 {
9295 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
9296 s->contents + my_offset);
9297
9298 /* It's a thumb address. Add the low order bit. */
9299 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
9300 s->contents + my_offset + 4);
9301 }
9302 else
9303 {
9304 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
9305 s->contents + my_offset);
9306
9307 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
9308 s->contents + my_offset + 4);
9309
9310 /* It's a thumb address. Add the low order bit. */
9311 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
9312 s->contents + my_offset + 8);
9313
9314 my_offset += 12;
9315 }
9316 }
9317
9318 BFD_ASSERT (my_offset <= globals->arm_glue_size);
9319
9320 return myh;
9321 }
9322
9323 /* Arm code calling a Thumb function. */
9324
9325 static int
9326 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
9327 const char * name,
9328 bfd * input_bfd,
9329 bfd * output_bfd,
9330 asection * input_section,
9331 bfd_byte * hit_data,
9332 asection * sym_sec,
9333 bfd_vma offset,
9334 bfd_signed_vma addend,
9335 bfd_vma val,
9336 char **error_message)
9337 {
9338 unsigned long int tmp;
9339 bfd_vma my_offset;
9340 asection * s;
9341 long int ret_offset;
9342 struct elf_link_hash_entry * myh;
9343 struct elf32_arm_link_hash_table * globals;
9344
9345 globals = elf32_arm_hash_table (info);
9346 BFD_ASSERT (globals != NULL);
9347 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9348
9349 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9350 ARM2THUMB_GLUE_SECTION_NAME);
9351 BFD_ASSERT (s != NULL);
9352 BFD_ASSERT (s->contents != NULL);
9353 BFD_ASSERT (s->output_section != NULL);
9354
9355 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9356 sym_sec, val, s, error_message);
9357 if (!myh)
9358 return FALSE;
9359
9360 my_offset = myh->root.u.def.value;
9361 tmp = bfd_get_32 (input_bfd, hit_data);
9362 tmp = tmp & 0xFF000000;
9363
9364 /* Somehow these are both 4 too far, so subtract 8. */
9365 ret_offset = (s->output_offset
9366 + my_offset
9367 + s->output_section->vma
9368 - (input_section->output_offset
9369 + input_section->output_section->vma
9370 + offset + addend)
9371 - 8);
9372
9373 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9374
9375 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9376
9377 return TRUE;
9378 }
9379
9380 /* Populate Arm stub for an exported Thumb function. */
9381
9382 static bfd_boolean
9383 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9384 {
9385 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9386 asection * s;
9387 struct elf_link_hash_entry * myh;
9388 struct elf32_arm_link_hash_entry *eh;
9389 struct elf32_arm_link_hash_table * globals;
9390 asection *sec;
9391 bfd_vma val;
9392 char *error_message;
9393
9394 eh = elf32_arm_hash_entry (h);
9395 /* Allocate stubs for exported Thumb functions on v4t. */
9396 if (eh->export_glue == NULL)
9397 return TRUE;
9398
9399 globals = elf32_arm_hash_table (info);
9400 BFD_ASSERT (globals != NULL);
9401 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9402
9403 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9404 ARM2THUMB_GLUE_SECTION_NAME);
9405 BFD_ASSERT (s != NULL);
9406 BFD_ASSERT (s->contents != NULL);
9407 BFD_ASSERT (s->output_section != NULL);
9408
9409 sec = eh->export_glue->root.u.def.section;
9410
9411 BFD_ASSERT (sec->output_section != NULL);
9412
9413 val = eh->export_glue->root.u.def.value + sec->output_offset
9414 + sec->output_section->vma;
9415
9416 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9417 h->root.u.def.section->owner,
9418 globals->obfd, sec, val, s,
9419 &error_message);
9420 BFD_ASSERT (myh);
9421 return TRUE;
9422 }
9423
9424 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9425
9426 static bfd_vma
9427 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9428 {
9429 bfd_byte *p;
9430 bfd_vma glue_addr;
9431 asection *s;
9432 struct elf32_arm_link_hash_table *globals;
9433
9434 globals = elf32_arm_hash_table (info);
9435 BFD_ASSERT (globals != NULL);
9436 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9437
9438 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9439 ARM_BX_GLUE_SECTION_NAME);
9440 BFD_ASSERT (s != NULL);
9441 BFD_ASSERT (s->contents != NULL);
9442 BFD_ASSERT (s->output_section != NULL);
9443
9444 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9445
9446 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9447
9448 if ((globals->bx_glue_offset[reg] & 1) == 0)
9449 {
9450 p = s->contents + glue_addr;
9451 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9452 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9453 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9454 globals->bx_glue_offset[reg] |= 1;
9455 }
9456
9457 return glue_addr + s->output_section->vma + s->output_offset;
9458 }
9459
9460 /* Generate Arm stubs for exported Thumb symbols. */
9461 static void
9462 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9463 struct bfd_link_info *link_info)
9464 {
9465 struct elf32_arm_link_hash_table * globals;
9466
9467 if (link_info == NULL)
9468 /* Ignore this if we are not called by the ELF backend linker. */
9469 return;
9470
9471 globals = elf32_arm_hash_table (link_info);
9472 if (globals == NULL)
9473 return;
9474
9475 /* If blx is available then exported Thumb symbols are OK and there is
9476 nothing to do. */
9477 if (globals->use_blx)
9478 return;
9479
9480 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9481 link_info);
9482 }
9483
9484 /* Reserve space for COUNT dynamic relocations in relocation selection
9485 SRELOC. */
9486
9487 static void
9488 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9489 bfd_size_type count)
9490 {
9491 struct elf32_arm_link_hash_table *htab;
9492
9493 htab = elf32_arm_hash_table (info);
9494 BFD_ASSERT (htab->root.dynamic_sections_created);
9495 if (sreloc == NULL)
9496 abort ();
9497 sreloc->size += RELOC_SIZE (htab) * count;
9498 }
9499
9500 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9501 dynamic, the relocations should go in SRELOC, otherwise they should
9502 go in the special .rel.iplt section. */
9503
9504 static void
9505 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9506 bfd_size_type count)
9507 {
9508 struct elf32_arm_link_hash_table *htab;
9509
9510 htab = elf32_arm_hash_table (info);
9511 if (!htab->root.dynamic_sections_created)
9512 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9513 else
9514 {
9515 BFD_ASSERT (sreloc != NULL);
9516 sreloc->size += RELOC_SIZE (htab) * count;
9517 }
9518 }
9519
9520 /* Add relocation REL to the end of relocation section SRELOC. */
9521
9522 static void
9523 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9524 asection *sreloc, Elf_Internal_Rela *rel)
9525 {
9526 bfd_byte *loc;
9527 struct elf32_arm_link_hash_table *htab;
9528
9529 htab = elf32_arm_hash_table (info);
9530 if (!htab->root.dynamic_sections_created
9531 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9532 sreloc = htab->root.irelplt;
9533 if (sreloc == NULL)
9534 abort ();
9535 loc = sreloc->contents;
9536 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9537 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9538 abort ();
9539 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9540 }
9541
9542 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9543 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9544 to .plt. */
9545
9546 static void
9547 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9548 bfd_boolean is_iplt_entry,
9549 union gotplt_union *root_plt,
9550 struct arm_plt_info *arm_plt)
9551 {
9552 struct elf32_arm_link_hash_table *htab;
9553 asection *splt;
9554 asection *sgotplt;
9555
9556 htab = elf32_arm_hash_table (info);
9557
9558 if (is_iplt_entry)
9559 {
9560 splt = htab->root.iplt;
9561 sgotplt = htab->root.igotplt;
9562
9563 /* NaCl uses a special first entry in .iplt too. */
9564 if (htab->nacl_p && splt->size == 0)
9565 splt->size += htab->plt_header_size;
9566
9567 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9568 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9569 }
9570 else
9571 {
9572 splt = htab->root.splt;
9573 sgotplt = htab->root.sgotplt;
9574
9575 if (htab->fdpic_p)
9576 {
9577 /* Allocate room for R_ARM_FUNCDESC_VALUE. */
9578 /* For lazy binding, relocations will be put into .rel.plt, in
9579 .rel.got otherwise. */
9580 /* FIXME: today we don't support lazy binding so put it in .rel.got */
9581 if (info->flags & DF_BIND_NOW)
9582 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
9583 else
9584 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9585 }
9586 else
9587 {
9588 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9589 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9590 }
9591
9592 /* If this is the first .plt entry, make room for the special
9593 first entry. */
9594 if (splt->size == 0)
9595 splt->size += htab->plt_header_size;
9596
9597 htab->next_tls_desc_index++;
9598 }
9599
9600 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9601 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9602 splt->size += PLT_THUMB_STUB_SIZE;
9603 root_plt->offset = splt->size;
9604 splt->size += htab->plt_entry_size;
9605
9606 if (!htab->symbian_p)
9607 {
9608 /* We also need to make an entry in the .got.plt section, which
9609 will be placed in the .got section by the linker script. */
9610 if (is_iplt_entry)
9611 arm_plt->got_offset = sgotplt->size;
9612 else
9613 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9614 if (htab->fdpic_p)
9615 /* Function descriptor takes 64 bits in GOT. */
9616 sgotplt->size += 8;
9617 else
9618 sgotplt->size += 4;
9619 }
9620 }
9621
9622 static bfd_vma
9623 arm_movw_immediate (bfd_vma value)
9624 {
9625 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9626 }
9627
9628 static bfd_vma
9629 arm_movt_immediate (bfd_vma value)
9630 {
9631 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9632 }
9633
9634 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9635 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9636 Otherwise, DYNINDX is the index of the symbol in the dynamic
9637 symbol table and SYM_VALUE is undefined.
9638
9639 ROOT_PLT points to the offset of the PLT entry from the start of its
9640 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9641 bookkeeping information.
9642
9643 Returns FALSE if there was a problem. */
9644
9645 static bfd_boolean
9646 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9647 union gotplt_union *root_plt,
9648 struct arm_plt_info *arm_plt,
9649 int dynindx, bfd_vma sym_value)
9650 {
9651 struct elf32_arm_link_hash_table *htab;
9652 asection *sgot;
9653 asection *splt;
9654 asection *srel;
9655 bfd_byte *loc;
9656 bfd_vma plt_index;
9657 Elf_Internal_Rela rel;
9658 bfd_vma plt_header_size;
9659 bfd_vma got_header_size;
9660
9661 htab = elf32_arm_hash_table (info);
9662
9663 /* Pick the appropriate sections and sizes. */
9664 if (dynindx == -1)
9665 {
9666 splt = htab->root.iplt;
9667 sgot = htab->root.igotplt;
9668 srel = htab->root.irelplt;
9669
9670 /* There are no reserved entries in .igot.plt, and no special
9671 first entry in .iplt. */
9672 got_header_size = 0;
9673 plt_header_size = 0;
9674 }
9675 else
9676 {
9677 splt = htab->root.splt;
9678 sgot = htab->root.sgotplt;
9679 srel = htab->root.srelplt;
9680
9681 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9682 plt_header_size = htab->plt_header_size;
9683 }
9684 BFD_ASSERT (splt != NULL && srel != NULL);
9685
9686 /* Fill in the entry in the procedure linkage table. */
9687 if (htab->symbian_p)
9688 {
9689 BFD_ASSERT (dynindx >= 0);
9690 put_arm_insn (htab, output_bfd,
9691 elf32_arm_symbian_plt_entry[0],
9692 splt->contents + root_plt->offset);
9693 bfd_put_32 (output_bfd,
9694 elf32_arm_symbian_plt_entry[1],
9695 splt->contents + root_plt->offset + 4);
9696
9697 /* Fill in the entry in the .rel.plt section. */
9698 rel.r_offset = (splt->output_section->vma
9699 + splt->output_offset
9700 + root_plt->offset + 4);
9701 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9702
9703 /* Get the index in the procedure linkage table which
9704 corresponds to this symbol. This is the index of this symbol
9705 in all the symbols for which we are making plt entries. The
9706 first entry in the procedure linkage table is reserved. */
9707 plt_index = ((root_plt->offset - plt_header_size)
9708 / htab->plt_entry_size);
9709 }
9710 else
9711 {
9712 bfd_vma got_offset, got_address, plt_address;
9713 bfd_vma got_displacement, initial_got_entry;
9714 bfd_byte * ptr;
9715
9716 BFD_ASSERT (sgot != NULL);
9717
9718 /* Get the offset into the .(i)got.plt table of the entry that
9719 corresponds to this function. */
9720 got_offset = (arm_plt->got_offset & -2);
9721
9722 /* Get the index in the procedure linkage table which
9723 corresponds to this symbol. This is the index of this symbol
9724 in all the symbols for which we are making plt entries.
9725 After the reserved .got.plt entries, all symbols appear in
9726 the same order as in .plt. */
9727 if (htab->fdpic_p)
9728 /* Function descriptor takes 8 bytes. */
9729 plt_index = (got_offset - got_header_size) / 8;
9730 else
9731 plt_index = (got_offset - got_header_size) / 4;
9732
9733 /* Calculate the address of the GOT entry. */
9734 got_address = (sgot->output_section->vma
9735 + sgot->output_offset
9736 + got_offset);
9737
9738 /* ...and the address of the PLT entry. */
9739 plt_address = (splt->output_section->vma
9740 + splt->output_offset
9741 + root_plt->offset);
9742
9743 ptr = splt->contents + root_plt->offset;
9744 if (htab->vxworks_p && bfd_link_pic (info))
9745 {
9746 unsigned int i;
9747 bfd_vma val;
9748
9749 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9750 {
9751 val = elf32_arm_vxworks_shared_plt_entry[i];
9752 if (i == 2)
9753 val |= got_address - sgot->output_section->vma;
9754 if (i == 5)
9755 val |= plt_index * RELOC_SIZE (htab);
9756 if (i == 2 || i == 5)
9757 bfd_put_32 (output_bfd, val, ptr);
9758 else
9759 put_arm_insn (htab, output_bfd, val, ptr);
9760 }
9761 }
9762 else if (htab->vxworks_p)
9763 {
9764 unsigned int i;
9765 bfd_vma val;
9766
9767 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9768 {
9769 val = elf32_arm_vxworks_exec_plt_entry[i];
9770 if (i == 2)
9771 val |= got_address;
9772 if (i == 4)
9773 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9774 if (i == 5)
9775 val |= plt_index * RELOC_SIZE (htab);
9776 if (i == 2 || i == 5)
9777 bfd_put_32 (output_bfd, val, ptr);
9778 else
9779 put_arm_insn (htab, output_bfd, val, ptr);
9780 }
9781
9782 loc = (htab->srelplt2->contents
9783 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9784
9785 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9786 referencing the GOT for this PLT entry. */
9787 rel.r_offset = plt_address + 8;
9788 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9789 rel.r_addend = got_offset;
9790 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9791 loc += RELOC_SIZE (htab);
9792
9793 /* Create the R_ARM_ABS32 relocation referencing the
9794 beginning of the PLT for this GOT entry. */
9795 rel.r_offset = got_address;
9796 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9797 rel.r_addend = 0;
9798 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9799 }
9800 else if (htab->nacl_p)
9801 {
9802 /* Calculate the displacement between the PLT slot and the
9803 common tail that's part of the special initial PLT slot. */
9804 int32_t tail_displacement
9805 = ((splt->output_section->vma + splt->output_offset
9806 + ARM_NACL_PLT_TAIL_OFFSET)
9807 - (plt_address + htab->plt_entry_size + 4));
9808 BFD_ASSERT ((tail_displacement & 3) == 0);
9809 tail_displacement >>= 2;
9810
9811 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9812 || (-tail_displacement & 0xff000000) == 0);
9813
9814 /* Calculate the displacement between the PLT slot and the entry
9815 in the GOT. The offset accounts for the value produced by
9816 adding to pc in the penultimate instruction of the PLT stub. */
9817 got_displacement = (got_address
9818 - (plt_address + htab->plt_entry_size));
9819
9820 /* NaCl does not support interworking at all. */
9821 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9822
9823 put_arm_insn (htab, output_bfd,
9824 elf32_arm_nacl_plt_entry[0]
9825 | arm_movw_immediate (got_displacement),
9826 ptr + 0);
9827 put_arm_insn (htab, output_bfd,
9828 elf32_arm_nacl_plt_entry[1]
9829 | arm_movt_immediate (got_displacement),
9830 ptr + 4);
9831 put_arm_insn (htab, output_bfd,
9832 elf32_arm_nacl_plt_entry[2],
9833 ptr + 8);
9834 put_arm_insn (htab, output_bfd,
9835 elf32_arm_nacl_plt_entry[3]
9836 | (tail_displacement & 0x00ffffff),
9837 ptr + 12);
9838 }
9839 else if (htab->fdpic_p)
9840 {
9841 const bfd_vma *plt_entry = using_thumb_only(htab)
9842 ? elf32_arm_fdpic_thumb_plt_entry
9843 : elf32_arm_fdpic_plt_entry;
9844
9845 /* Fill-up Thumb stub if needed. */
9846 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9847 {
9848 put_thumb_insn (htab, output_bfd,
9849 elf32_arm_plt_thumb_stub[0], ptr - 4);
9850 put_thumb_insn (htab, output_bfd,
9851 elf32_arm_plt_thumb_stub[1], ptr - 2);
9852 }
9853 /* As we are using 32 bit instructions even for the Thumb
9854 version, we have to use 'put_arm_insn' instead of
9855 'put_thumb_insn'. */
9856 put_arm_insn(htab, output_bfd, plt_entry[0], ptr + 0);
9857 put_arm_insn(htab, output_bfd, plt_entry[1], ptr + 4);
9858 put_arm_insn(htab, output_bfd, plt_entry[2], ptr + 8);
9859 put_arm_insn(htab, output_bfd, plt_entry[3], ptr + 12);
9860 bfd_put_32 (output_bfd, got_offset, ptr + 16);
9861
9862 if (!(info->flags & DF_BIND_NOW))
9863 {
9864 /* funcdesc_value_reloc_offset. */
9865 bfd_put_32 (output_bfd,
9866 htab->root.srelplt->reloc_count * RELOC_SIZE (htab),
9867 ptr + 20);
9868 put_arm_insn(htab, output_bfd, plt_entry[6], ptr + 24);
9869 put_arm_insn(htab, output_bfd, plt_entry[7], ptr + 28);
9870 put_arm_insn(htab, output_bfd, plt_entry[8], ptr + 32);
9871 put_arm_insn(htab, output_bfd, plt_entry[9], ptr + 36);
9872 }
9873 }
9874 else if (using_thumb_only (htab))
9875 {
9876 /* PR ld/16017: Generate thumb only PLT entries. */
9877 if (!using_thumb2 (htab))
9878 {
9879 /* FIXME: We ought to be able to generate thumb-1 PLT
9880 instructions... */
9881 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9882 output_bfd);
9883 return FALSE;
9884 }
9885
9886 /* Calculate the displacement between the PLT slot and the entry in
9887 the GOT. The 12-byte offset accounts for the value produced by
9888 adding to pc in the 3rd instruction of the PLT stub. */
9889 got_displacement = got_address - (plt_address + 12);
9890
9891 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9892 instead of 'put_thumb_insn'. */
9893 put_arm_insn (htab, output_bfd,
9894 elf32_thumb2_plt_entry[0]
9895 | ((got_displacement & 0x000000ff) << 16)
9896 | ((got_displacement & 0x00000700) << 20)
9897 | ((got_displacement & 0x00000800) >> 1)
9898 | ((got_displacement & 0x0000f000) >> 12),
9899 ptr + 0);
9900 put_arm_insn (htab, output_bfd,
9901 elf32_thumb2_plt_entry[1]
9902 | ((got_displacement & 0x00ff0000) )
9903 | ((got_displacement & 0x07000000) << 4)
9904 | ((got_displacement & 0x08000000) >> 17)
9905 | ((got_displacement & 0xf0000000) >> 28),
9906 ptr + 4);
9907 put_arm_insn (htab, output_bfd,
9908 elf32_thumb2_plt_entry[2],
9909 ptr + 8);
9910 put_arm_insn (htab, output_bfd,
9911 elf32_thumb2_plt_entry[3],
9912 ptr + 12);
9913 }
9914 else
9915 {
9916 /* Calculate the displacement between the PLT slot and the
9917 entry in the GOT. The eight-byte offset accounts for the
9918 value produced by adding to pc in the first instruction
9919 of the PLT stub. */
9920 got_displacement = got_address - (plt_address + 8);
9921
9922 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9923 {
9924 put_thumb_insn (htab, output_bfd,
9925 elf32_arm_plt_thumb_stub[0], ptr - 4);
9926 put_thumb_insn (htab, output_bfd,
9927 elf32_arm_plt_thumb_stub[1], ptr - 2);
9928 }
9929
9930 if (!elf32_arm_use_long_plt_entry)
9931 {
9932 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9933
9934 put_arm_insn (htab, output_bfd,
9935 elf32_arm_plt_entry_short[0]
9936 | ((got_displacement & 0x0ff00000) >> 20),
9937 ptr + 0);
9938 put_arm_insn (htab, output_bfd,
9939 elf32_arm_plt_entry_short[1]
9940 | ((got_displacement & 0x000ff000) >> 12),
9941 ptr+ 4);
9942 put_arm_insn (htab, output_bfd,
9943 elf32_arm_plt_entry_short[2]
9944 | (got_displacement & 0x00000fff),
9945 ptr + 8);
9946 #ifdef FOUR_WORD_PLT
9947 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9948 #endif
9949 }
9950 else
9951 {
9952 put_arm_insn (htab, output_bfd,
9953 elf32_arm_plt_entry_long[0]
9954 | ((got_displacement & 0xf0000000) >> 28),
9955 ptr + 0);
9956 put_arm_insn (htab, output_bfd,
9957 elf32_arm_plt_entry_long[1]
9958 | ((got_displacement & 0x0ff00000) >> 20),
9959 ptr + 4);
9960 put_arm_insn (htab, output_bfd,
9961 elf32_arm_plt_entry_long[2]
9962 | ((got_displacement & 0x000ff000) >> 12),
9963 ptr+ 8);
9964 put_arm_insn (htab, output_bfd,
9965 elf32_arm_plt_entry_long[3]
9966 | (got_displacement & 0x00000fff),
9967 ptr + 12);
9968 }
9969 }
9970
9971 /* Fill in the entry in the .rel(a).(i)plt section. */
9972 rel.r_offset = got_address;
9973 rel.r_addend = 0;
9974 if (dynindx == -1)
9975 {
9976 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9977 The dynamic linker or static executable then calls SYM_VALUE
9978 to determine the correct run-time value of the .igot.plt entry. */
9979 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9980 initial_got_entry = sym_value;
9981 }
9982 else
9983 {
9984 /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
9985 used by PLT entry. */
9986 if (htab->fdpic_p)
9987 {
9988 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
9989 initial_got_entry = 0;
9990 }
9991 else
9992 {
9993 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9994 initial_got_entry = (splt->output_section->vma
9995 + splt->output_offset);
9996 }
9997 }
9998
9999 /* Fill in the entry in the global offset table. */
10000 bfd_put_32 (output_bfd, initial_got_entry,
10001 sgot->contents + got_offset);
10002
10003 if (htab->fdpic_p && !(info->flags & DF_BIND_NOW))
10004 {
10005 /* Setup initial funcdesc value. */
10006 /* FIXME: we don't support lazy binding because there is a
10007 race condition between both words getting written and
10008 some other thread attempting to read them. The ARM
10009 architecture does not have an atomic 64 bit load/store
10010 instruction that could be used to prevent it; it is
10011 recommended that threaded FDPIC applications run with the
10012 LD_BIND_NOW environment variable set. */
10013 bfd_put_32(output_bfd, plt_address + 0x18,
10014 sgot->contents + got_offset);
10015 bfd_put_32(output_bfd, -1 /*TODO*/,
10016 sgot->contents + got_offset + 4);
10017 }
10018 }
10019
10020 if (dynindx == -1)
10021 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
10022 else
10023 {
10024 if (htab->fdpic_p)
10025 {
10026 /* For FDPIC we put PLT relocationss into .rel.got when not
10027 lazy binding otherwise we put them in .rel.plt. For now,
10028 we don't support lazy binding so put it in .rel.got. */
10029 if (info->flags & DF_BIND_NOW)
10030 elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelgot, &rel);
10031 else
10032 elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelplt, &rel);
10033 }
10034 else
10035 {
10036 loc = srel->contents + plt_index * RELOC_SIZE (htab);
10037 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
10038 }
10039 }
10040
10041 return TRUE;
10042 }
10043
10044 /* Some relocations map to different relocations depending on the
10045 target. Return the real relocation. */
10046
10047 static int
10048 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
10049 int r_type)
10050 {
10051 switch (r_type)
10052 {
10053 case R_ARM_TARGET1:
10054 if (globals->target1_is_rel)
10055 return R_ARM_REL32;
10056 else
10057 return R_ARM_ABS32;
10058
10059 case R_ARM_TARGET2:
10060 return globals->target2_reloc;
10061
10062 default:
10063 return r_type;
10064 }
10065 }
10066
10067 /* Return the base VMA address which should be subtracted from real addresses
10068 when resolving @dtpoff relocation.
10069 This is PT_TLS segment p_vaddr. */
10070
10071 static bfd_vma
10072 dtpoff_base (struct bfd_link_info *info)
10073 {
10074 /* If tls_sec is NULL, we should have signalled an error already. */
10075 if (elf_hash_table (info)->tls_sec == NULL)
10076 return 0;
10077 return elf_hash_table (info)->tls_sec->vma;
10078 }
10079
10080 /* Return the relocation value for @tpoff relocation
10081 if STT_TLS virtual address is ADDRESS. */
10082
10083 static bfd_vma
10084 tpoff (struct bfd_link_info *info, bfd_vma address)
10085 {
10086 struct elf_link_hash_table *htab = elf_hash_table (info);
10087 bfd_vma base;
10088
10089 /* If tls_sec is NULL, we should have signalled an error already. */
10090 if (htab->tls_sec == NULL)
10091 return 0;
10092 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
10093 return address - htab->tls_sec->vma + base;
10094 }
10095
10096 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
10097 VALUE is the relocation value. */
10098
10099 static bfd_reloc_status_type
10100 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
10101 {
10102 if (value > 0xfff)
10103 return bfd_reloc_overflow;
10104
10105 value |= bfd_get_32 (abfd, data) & 0xfffff000;
10106 bfd_put_32 (abfd, value, data);
10107 return bfd_reloc_ok;
10108 }
10109
10110 /* Handle TLS relaxations. Relaxing is possible for symbols that use
10111 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
10112 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
10113
10114 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
10115 is to then call final_link_relocate. Return other values in the
10116 case of error.
10117
10118 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
10119 the pre-relaxed code. It would be nice if the relocs were updated
10120 to match the optimization. */
10121
10122 static bfd_reloc_status_type
10123 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
10124 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
10125 Elf_Internal_Rela *rel, unsigned long is_local)
10126 {
10127 unsigned long insn;
10128
10129 switch (ELF32_R_TYPE (rel->r_info))
10130 {
10131 default:
10132 return bfd_reloc_notsupported;
10133
10134 case R_ARM_TLS_GOTDESC:
10135 if (is_local)
10136 insn = 0;
10137 else
10138 {
10139 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10140 if (insn & 1)
10141 insn -= 5; /* THUMB */
10142 else
10143 insn -= 8; /* ARM */
10144 }
10145 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10146 return bfd_reloc_continue;
10147
10148 case R_ARM_THM_TLS_DESCSEQ:
10149 /* Thumb insn. */
10150 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
10151 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
10152 {
10153 if (is_local)
10154 /* nop */
10155 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10156 }
10157 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
10158 {
10159 if (is_local)
10160 /* nop */
10161 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10162 else
10163 /* ldr rx,[ry] */
10164 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
10165 }
10166 else if ((insn & 0xff87) == 0x4780) /* blx rx */
10167 {
10168 if (is_local)
10169 /* nop */
10170 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10171 else
10172 /* mov r0, rx */
10173 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
10174 contents + rel->r_offset);
10175 }
10176 else
10177 {
10178 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
10179 /* It's a 32 bit instruction, fetch the rest of it for
10180 error generation. */
10181 insn = (insn << 16)
10182 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
10183 _bfd_error_handler
10184 /* xgettext:c-format */
10185 (_("%pB(%pA+%#" PRIx64 "): "
10186 "unexpected %s instruction '%#lx' in TLS trampoline"),
10187 input_bfd, input_sec, (uint64_t) rel->r_offset,
10188 "Thumb", insn);
10189 return bfd_reloc_notsupported;
10190 }
10191 break;
10192
10193 case R_ARM_TLS_DESCSEQ:
10194 /* arm insn. */
10195 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10196 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
10197 {
10198 if (is_local)
10199 /* mov rx, ry */
10200 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
10201 contents + rel->r_offset);
10202 }
10203 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
10204 {
10205 if (is_local)
10206 /* nop */
10207 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10208 else
10209 /* ldr rx,[ry] */
10210 bfd_put_32 (input_bfd, insn & 0xfffff000,
10211 contents + rel->r_offset);
10212 }
10213 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
10214 {
10215 if (is_local)
10216 /* nop */
10217 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10218 else
10219 /* mov r0, rx */
10220 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
10221 contents + rel->r_offset);
10222 }
10223 else
10224 {
10225 _bfd_error_handler
10226 /* xgettext:c-format */
10227 (_("%pB(%pA+%#" PRIx64 "): "
10228 "unexpected %s instruction '%#lx' in TLS trampoline"),
10229 input_bfd, input_sec, (uint64_t) rel->r_offset,
10230 "ARM", insn);
10231 return bfd_reloc_notsupported;
10232 }
10233 break;
10234
10235 case R_ARM_TLS_CALL:
10236 /* GD->IE relaxation, turn the instruction into 'nop' or
10237 'ldr r0, [pc,r0]' */
10238 insn = is_local ? 0xe1a00000 : 0xe79f0000;
10239 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10240 break;
10241
10242 case R_ARM_THM_TLS_CALL:
10243 /* GD->IE relaxation. */
10244 if (!is_local)
10245 /* add r0,pc; ldr r0, [r0] */
10246 insn = 0x44786800;
10247 else if (using_thumb2 (globals))
10248 /* nop.w */
10249 insn = 0xf3af8000;
10250 else
10251 /* nop; nop */
10252 insn = 0xbf00bf00;
10253
10254 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
10255 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
10256 break;
10257 }
10258 return bfd_reloc_ok;
10259 }
10260
10261 /* For a given value of n, calculate the value of G_n as required to
10262 deal with group relocations. We return it in the form of an
10263 encoded constant-and-rotation, together with the final residual. If n is
10264 specified as less than zero, then final_residual is filled with the
10265 input value and no further action is performed. */
10266
10267 static bfd_vma
10268 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
10269 {
10270 int current_n;
10271 bfd_vma g_n;
10272 bfd_vma encoded_g_n = 0;
10273 bfd_vma residual = value; /* Also known as Y_n. */
10274
10275 for (current_n = 0; current_n <= n; current_n++)
10276 {
10277 int shift;
10278
10279 /* Calculate which part of the value to mask. */
10280 if (residual == 0)
10281 shift = 0;
10282 else
10283 {
10284 int msb;
10285
10286 /* Determine the most significant bit in the residual and
10287 align the resulting value to a 2-bit boundary. */
10288 for (msb = 30; msb >= 0; msb -= 2)
10289 if (residual & (3 << msb))
10290 break;
10291
10292 /* The desired shift is now (msb - 6), or zero, whichever
10293 is the greater. */
10294 shift = msb - 6;
10295 if (shift < 0)
10296 shift = 0;
10297 }
10298
10299 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
10300 g_n = residual & (0xff << shift);
10301 encoded_g_n = (g_n >> shift)
10302 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
10303
10304 /* Calculate the residual for the next time around. */
10305 residual &= ~g_n;
10306 }
10307
10308 *final_residual = residual;
10309
10310 return encoded_g_n;
10311 }
10312
10313 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
10314 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
10315
10316 static int
10317 identify_add_or_sub (bfd_vma insn)
10318 {
10319 int opcode = insn & 0x1e00000;
10320
10321 if (opcode == 1 << 23) /* ADD */
10322 return 1;
10323
10324 if (opcode == 1 << 22) /* SUB */
10325 return -1;
10326
10327 return 0;
10328 }
10329
10330 /* Perform a relocation as part of a final link. */
10331
10332 static bfd_reloc_status_type
10333 elf32_arm_final_link_relocate (reloc_howto_type * howto,
10334 bfd * input_bfd,
10335 bfd * output_bfd,
10336 asection * input_section,
10337 bfd_byte * contents,
10338 Elf_Internal_Rela * rel,
10339 bfd_vma value,
10340 struct bfd_link_info * info,
10341 asection * sym_sec,
10342 const char * sym_name,
10343 unsigned char st_type,
10344 enum arm_st_branch_type branch_type,
10345 struct elf_link_hash_entry * h,
10346 bfd_boolean * unresolved_reloc_p,
10347 char ** error_message)
10348 {
10349 unsigned long r_type = howto->type;
10350 unsigned long r_symndx;
10351 bfd_byte * hit_data = contents + rel->r_offset;
10352 bfd_vma * local_got_offsets;
10353 bfd_vma * local_tlsdesc_gotents;
10354 asection * sgot;
10355 asection * splt;
10356 asection * sreloc = NULL;
10357 asection * srelgot;
10358 bfd_vma addend;
10359 bfd_signed_vma signed_addend;
10360 unsigned char dynreloc_st_type;
10361 bfd_vma dynreloc_value;
10362 struct elf32_arm_link_hash_table * globals;
10363 struct elf32_arm_link_hash_entry *eh;
10364 union gotplt_union *root_plt;
10365 struct arm_plt_info *arm_plt;
10366 bfd_vma plt_offset;
10367 bfd_vma gotplt_offset;
10368 bfd_boolean has_iplt_entry;
10369 bfd_boolean resolved_to_zero;
10370
10371 globals = elf32_arm_hash_table (info);
10372 if (globals == NULL)
10373 return bfd_reloc_notsupported;
10374
10375 BFD_ASSERT (is_arm_elf (input_bfd));
10376 BFD_ASSERT (howto != NULL);
10377
10378 /* Some relocation types map to different relocations depending on the
10379 target. We pick the right one here. */
10380 r_type = arm_real_reloc_type (globals, r_type);
10381
10382 /* It is possible to have linker relaxations on some TLS access
10383 models. Update our information here. */
10384 r_type = elf32_arm_tls_transition (info, r_type, h);
10385
10386 if (r_type != howto->type)
10387 howto = elf32_arm_howto_from_type (r_type);
10388
10389 eh = (struct elf32_arm_link_hash_entry *) h;
10390 sgot = globals->root.sgot;
10391 local_got_offsets = elf_local_got_offsets (input_bfd);
10392 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
10393
10394 if (globals->root.dynamic_sections_created)
10395 srelgot = globals->root.srelgot;
10396 else
10397 srelgot = NULL;
10398
10399 r_symndx = ELF32_R_SYM (rel->r_info);
10400
10401 if (globals->use_rel)
10402 {
10403 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
10404
10405 if (addend & ((howto->src_mask + 1) >> 1))
10406 {
10407 signed_addend = -1;
10408 signed_addend &= ~ howto->src_mask;
10409 signed_addend |= addend;
10410 }
10411 else
10412 signed_addend = addend;
10413 }
10414 else
10415 addend = signed_addend = rel->r_addend;
10416
10417 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10418 are resolving a function call relocation. */
10419 if (using_thumb_only (globals)
10420 && (r_type == R_ARM_THM_CALL
10421 || r_type == R_ARM_THM_JUMP24)
10422 && branch_type == ST_BRANCH_TO_ARM)
10423 branch_type = ST_BRANCH_TO_THUMB;
10424
10425 /* Record the symbol information that should be used in dynamic
10426 relocations. */
10427 dynreloc_st_type = st_type;
10428 dynreloc_value = value;
10429 if (branch_type == ST_BRANCH_TO_THUMB)
10430 dynreloc_value |= 1;
10431
10432 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10433 VALUE appropriately for relocations that we resolve at link time. */
10434 has_iplt_entry = FALSE;
10435 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
10436 &arm_plt)
10437 && root_plt->offset != (bfd_vma) -1)
10438 {
10439 plt_offset = root_plt->offset;
10440 gotplt_offset = arm_plt->got_offset;
10441
10442 if (h == NULL || eh->is_iplt)
10443 {
10444 has_iplt_entry = TRUE;
10445 splt = globals->root.iplt;
10446
10447 /* Populate .iplt entries here, because not all of them will
10448 be seen by finish_dynamic_symbol. The lower bit is set if
10449 we have already populated the entry. */
10450 if (plt_offset & 1)
10451 plt_offset--;
10452 else
10453 {
10454 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
10455 -1, dynreloc_value))
10456 root_plt->offset |= 1;
10457 else
10458 return bfd_reloc_notsupported;
10459 }
10460
10461 /* Static relocations always resolve to the .iplt entry. */
10462 st_type = STT_FUNC;
10463 value = (splt->output_section->vma
10464 + splt->output_offset
10465 + plt_offset);
10466 branch_type = ST_BRANCH_TO_ARM;
10467
10468 /* If there are non-call relocations that resolve to the .iplt
10469 entry, then all dynamic ones must too. */
10470 if (arm_plt->noncall_refcount != 0)
10471 {
10472 dynreloc_st_type = st_type;
10473 dynreloc_value = value;
10474 }
10475 }
10476 else
10477 /* We populate the .plt entry in finish_dynamic_symbol. */
10478 splt = globals->root.splt;
10479 }
10480 else
10481 {
10482 splt = NULL;
10483 plt_offset = (bfd_vma) -1;
10484 gotplt_offset = (bfd_vma) -1;
10485 }
10486
10487 resolved_to_zero = (h != NULL
10488 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
10489
10490 switch (r_type)
10491 {
10492 case R_ARM_NONE:
10493 /* We don't need to find a value for this symbol. It's just a
10494 marker. */
10495 *unresolved_reloc_p = FALSE;
10496 return bfd_reloc_ok;
10497
10498 case R_ARM_ABS12:
10499 if (!globals->vxworks_p)
10500 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10501 /* Fall through. */
10502
10503 case R_ARM_PC24:
10504 case R_ARM_ABS32:
10505 case R_ARM_ABS32_NOI:
10506 case R_ARM_REL32:
10507 case R_ARM_REL32_NOI:
10508 case R_ARM_CALL:
10509 case R_ARM_JUMP24:
10510 case R_ARM_XPC25:
10511 case R_ARM_PREL31:
10512 case R_ARM_PLT32:
10513 /* Handle relocations which should use the PLT entry. ABS32/REL32
10514 will use the symbol's value, which may point to a PLT entry, but we
10515 don't need to handle that here. If we created a PLT entry, all
10516 branches in this object should go to it, except if the PLT is too
10517 far away, in which case a long branch stub should be inserted. */
10518 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10519 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10520 && r_type != R_ARM_CALL
10521 && r_type != R_ARM_JUMP24
10522 && r_type != R_ARM_PLT32)
10523 && plt_offset != (bfd_vma) -1)
10524 {
10525 /* If we've created a .plt section, and assigned a PLT entry
10526 to this function, it must either be a STT_GNU_IFUNC reference
10527 or not be known to bind locally. In other cases, we should
10528 have cleared the PLT entry by now. */
10529 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10530
10531 value = (splt->output_section->vma
10532 + splt->output_offset
10533 + plt_offset);
10534 *unresolved_reloc_p = FALSE;
10535 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10536 contents, rel->r_offset, value,
10537 rel->r_addend);
10538 }
10539
10540 /* When generating a shared object or relocatable executable, these
10541 relocations are copied into the output file to be resolved at
10542 run time. */
10543 if ((bfd_link_pic (info)
10544 || globals->root.is_relocatable_executable
10545 || globals->fdpic_p)
10546 && (input_section->flags & SEC_ALLOC)
10547 && !(globals->vxworks_p
10548 && strcmp (input_section->output_section->name,
10549 ".tls_vars") == 0)
10550 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10551 || !SYMBOL_CALLS_LOCAL (info, h))
10552 && !(input_bfd == globals->stub_bfd
10553 && strstr (input_section->name, STUB_SUFFIX))
10554 && (h == NULL
10555 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10556 && !resolved_to_zero)
10557 || h->root.type != bfd_link_hash_undefweak)
10558 && r_type != R_ARM_PC24
10559 && r_type != R_ARM_CALL
10560 && r_type != R_ARM_JUMP24
10561 && r_type != R_ARM_PREL31
10562 && r_type != R_ARM_PLT32)
10563 {
10564 Elf_Internal_Rela outrel;
10565 bfd_boolean skip, relocate;
10566 int isrofixup = 0;
10567
10568 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10569 && !h->def_regular)
10570 {
10571 char *v = _("shared object");
10572
10573 if (bfd_link_executable (info))
10574 v = _("PIE executable");
10575
10576 _bfd_error_handler
10577 (_("%pB: relocation %s against external or undefined symbol `%s'"
10578 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10579 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10580 return bfd_reloc_notsupported;
10581 }
10582
10583 *unresolved_reloc_p = FALSE;
10584
10585 if (sreloc == NULL && globals->root.dynamic_sections_created)
10586 {
10587 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10588 ! globals->use_rel);
10589
10590 if (sreloc == NULL)
10591 return bfd_reloc_notsupported;
10592 }
10593
10594 skip = FALSE;
10595 relocate = FALSE;
10596
10597 outrel.r_addend = addend;
10598 outrel.r_offset =
10599 _bfd_elf_section_offset (output_bfd, info, input_section,
10600 rel->r_offset);
10601 if (outrel.r_offset == (bfd_vma) -1)
10602 skip = TRUE;
10603 else if (outrel.r_offset == (bfd_vma) -2)
10604 skip = TRUE, relocate = TRUE;
10605 outrel.r_offset += (input_section->output_section->vma
10606 + input_section->output_offset);
10607
10608 if (skip)
10609 memset (&outrel, 0, sizeof outrel);
10610 else if (h != NULL
10611 && h->dynindx != -1
10612 && (!bfd_link_pic (info)
10613 || !(bfd_link_pie (info)
10614 || SYMBOLIC_BIND (info, h))
10615 || !h->def_regular))
10616 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10617 else
10618 {
10619 int symbol;
10620
10621 /* This symbol is local, or marked to become local. */
10622 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI
10623 || (globals->fdpic_p && !bfd_link_pic(info)));
10624 if (globals->symbian_p)
10625 {
10626 asection *osec;
10627
10628 /* On Symbian OS, the data segment and text segement
10629 can be relocated independently. Therefore, we
10630 must indicate the segment to which this
10631 relocation is relative. The BPABI allows us to
10632 use any symbol in the right segment; we just use
10633 the section symbol as it is convenient. (We
10634 cannot use the symbol given by "h" directly as it
10635 will not appear in the dynamic symbol table.)
10636
10637 Note that the dynamic linker ignores the section
10638 symbol value, so we don't subtract osec->vma
10639 from the emitted reloc addend. */
10640 if (sym_sec)
10641 osec = sym_sec->output_section;
10642 else
10643 osec = input_section->output_section;
10644 symbol = elf_section_data (osec)->dynindx;
10645 if (symbol == 0)
10646 {
10647 struct elf_link_hash_table *htab = elf_hash_table (info);
10648
10649 if ((osec->flags & SEC_READONLY) == 0
10650 && htab->data_index_section != NULL)
10651 osec = htab->data_index_section;
10652 else
10653 osec = htab->text_index_section;
10654 symbol = elf_section_data (osec)->dynindx;
10655 }
10656 BFD_ASSERT (symbol != 0);
10657 }
10658 else
10659 /* On SVR4-ish systems, the dynamic loader cannot
10660 relocate the text and data segments independently,
10661 so the symbol does not matter. */
10662 symbol = 0;
10663 if (dynreloc_st_type == STT_GNU_IFUNC)
10664 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10665 to the .iplt entry. Instead, every non-call reference
10666 must use an R_ARM_IRELATIVE relocation to obtain the
10667 correct run-time address. */
10668 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10669 else if (globals->fdpic_p && !bfd_link_pic(info))
10670 isrofixup = 1;
10671 else
10672 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10673 if (globals->use_rel)
10674 relocate = TRUE;
10675 else
10676 outrel.r_addend += dynreloc_value;
10677 }
10678
10679 if (isrofixup)
10680 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
10681 else
10682 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10683
10684 /* If this reloc is against an external symbol, we do not want to
10685 fiddle with the addend. Otherwise, we need to include the symbol
10686 value so that it becomes an addend for the dynamic reloc. */
10687 if (! relocate)
10688 return bfd_reloc_ok;
10689
10690 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10691 contents, rel->r_offset,
10692 dynreloc_value, (bfd_vma) 0);
10693 }
10694 else switch (r_type)
10695 {
10696 case R_ARM_ABS12:
10697 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10698
10699 case R_ARM_XPC25: /* Arm BLX instruction. */
10700 case R_ARM_CALL:
10701 case R_ARM_JUMP24:
10702 case R_ARM_PC24: /* Arm B/BL instruction. */
10703 case R_ARM_PLT32:
10704 {
10705 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10706
10707 if (r_type == R_ARM_XPC25)
10708 {
10709 /* Check for Arm calling Arm function. */
10710 /* FIXME: Should we translate the instruction into a BL
10711 instruction instead ? */
10712 if (branch_type != ST_BRANCH_TO_THUMB)
10713 _bfd_error_handler
10714 (_("\%pB: warning: %s BLX instruction targets"
10715 " %s function '%s'"),
10716 input_bfd, "ARM",
10717 "ARM", h ? h->root.root.string : "(local)");
10718 }
10719 else if (r_type == R_ARM_PC24)
10720 {
10721 /* Check for Arm calling Thumb function. */
10722 if (branch_type == ST_BRANCH_TO_THUMB)
10723 {
10724 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10725 output_bfd, input_section,
10726 hit_data, sym_sec, rel->r_offset,
10727 signed_addend, value,
10728 error_message))
10729 return bfd_reloc_ok;
10730 else
10731 return bfd_reloc_dangerous;
10732 }
10733 }
10734
10735 /* Check if a stub has to be inserted because the
10736 destination is too far or we are changing mode. */
10737 if ( r_type == R_ARM_CALL
10738 || r_type == R_ARM_JUMP24
10739 || r_type == R_ARM_PLT32)
10740 {
10741 enum elf32_arm_stub_type stub_type = arm_stub_none;
10742 struct elf32_arm_link_hash_entry *hash;
10743
10744 hash = (struct elf32_arm_link_hash_entry *) h;
10745 stub_type = arm_type_of_stub (info, input_section, rel,
10746 st_type, &branch_type,
10747 hash, value, sym_sec,
10748 input_bfd, sym_name);
10749
10750 if (stub_type != arm_stub_none)
10751 {
10752 /* The target is out of reach, so redirect the
10753 branch to the local stub for this function. */
10754 stub_entry = elf32_arm_get_stub_entry (input_section,
10755 sym_sec, h,
10756 rel, globals,
10757 stub_type);
10758 {
10759 if (stub_entry != NULL)
10760 value = (stub_entry->stub_offset
10761 + stub_entry->stub_sec->output_offset
10762 + stub_entry->stub_sec->output_section->vma);
10763
10764 if (plt_offset != (bfd_vma) -1)
10765 *unresolved_reloc_p = FALSE;
10766 }
10767 }
10768 else
10769 {
10770 /* If the call goes through a PLT entry, make sure to
10771 check distance to the right destination address. */
10772 if (plt_offset != (bfd_vma) -1)
10773 {
10774 value = (splt->output_section->vma
10775 + splt->output_offset
10776 + plt_offset);
10777 *unresolved_reloc_p = FALSE;
10778 /* The PLT entry is in ARM mode, regardless of the
10779 target function. */
10780 branch_type = ST_BRANCH_TO_ARM;
10781 }
10782 }
10783 }
10784
10785 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10786 where:
10787 S is the address of the symbol in the relocation.
10788 P is address of the instruction being relocated.
10789 A is the addend (extracted from the instruction) in bytes.
10790
10791 S is held in 'value'.
10792 P is the base address of the section containing the
10793 instruction plus the offset of the reloc into that
10794 section, ie:
10795 (input_section->output_section->vma +
10796 input_section->output_offset +
10797 rel->r_offset).
10798 A is the addend, converted into bytes, ie:
10799 (signed_addend * 4)
10800
10801 Note: None of these operations have knowledge of the pipeline
10802 size of the processor, thus it is up to the assembler to
10803 encode this information into the addend. */
10804 value -= (input_section->output_section->vma
10805 + input_section->output_offset);
10806 value -= rel->r_offset;
10807 if (globals->use_rel)
10808 value += (signed_addend << howto->size);
10809 else
10810 /* RELA addends do not have to be adjusted by howto->size. */
10811 value += signed_addend;
10812
10813 signed_addend = value;
10814 signed_addend >>= howto->rightshift;
10815
10816 /* A branch to an undefined weak symbol is turned into a jump to
10817 the next instruction unless a PLT entry will be created.
10818 Do the same for local undefined symbols (but not for STN_UNDEF).
10819 The jump to the next instruction is optimized as a NOP depending
10820 on the architecture. */
10821 if (h ? (h->root.type == bfd_link_hash_undefweak
10822 && plt_offset == (bfd_vma) -1)
10823 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10824 {
10825 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10826
10827 if (arch_has_arm_nop (globals))
10828 value |= 0x0320f000;
10829 else
10830 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10831 }
10832 else
10833 {
10834 /* Perform a signed range check. */
10835 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10836 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10837 return bfd_reloc_overflow;
10838
10839 addend = (value & 2);
10840
10841 value = (signed_addend & howto->dst_mask)
10842 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10843
10844 if (r_type == R_ARM_CALL)
10845 {
10846 /* Set the H bit in the BLX instruction. */
10847 if (branch_type == ST_BRANCH_TO_THUMB)
10848 {
10849 if (addend)
10850 value |= (1 << 24);
10851 else
10852 value &= ~(bfd_vma)(1 << 24);
10853 }
10854
10855 /* Select the correct instruction (BL or BLX). */
10856 /* Only if we are not handling a BL to a stub. In this
10857 case, mode switching is performed by the stub. */
10858 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10859 value |= (1 << 28);
10860 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10861 {
10862 value &= ~(bfd_vma)(1 << 28);
10863 value |= (1 << 24);
10864 }
10865 }
10866 }
10867 }
10868 break;
10869
10870 case R_ARM_ABS32:
10871 value += addend;
10872 if (branch_type == ST_BRANCH_TO_THUMB)
10873 value |= 1;
10874 break;
10875
10876 case R_ARM_ABS32_NOI:
10877 value += addend;
10878 break;
10879
10880 case R_ARM_REL32:
10881 value += addend;
10882 if (branch_type == ST_BRANCH_TO_THUMB)
10883 value |= 1;
10884 value -= (input_section->output_section->vma
10885 + input_section->output_offset + rel->r_offset);
10886 break;
10887
10888 case R_ARM_REL32_NOI:
10889 value += addend;
10890 value -= (input_section->output_section->vma
10891 + input_section->output_offset + rel->r_offset);
10892 break;
10893
10894 case R_ARM_PREL31:
10895 value -= (input_section->output_section->vma
10896 + input_section->output_offset + rel->r_offset);
10897 value += signed_addend;
10898 if (! h || h->root.type != bfd_link_hash_undefweak)
10899 {
10900 /* Check for overflow. */
10901 if ((value ^ (value >> 1)) & (1 << 30))
10902 return bfd_reloc_overflow;
10903 }
10904 value &= 0x7fffffff;
10905 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10906 if (branch_type == ST_BRANCH_TO_THUMB)
10907 value |= 1;
10908 break;
10909 }
10910
10911 bfd_put_32 (input_bfd, value, hit_data);
10912 return bfd_reloc_ok;
10913
10914 case R_ARM_ABS8:
10915 /* PR 16202: Refectch the addend using the correct size. */
10916 if (globals->use_rel)
10917 addend = bfd_get_8 (input_bfd, hit_data);
10918 value += addend;
10919
10920 /* There is no way to tell whether the user intended to use a signed or
10921 unsigned addend. When checking for overflow we accept either,
10922 as specified by the AAELF. */
10923 if ((long) value > 0xff || (long) value < -0x80)
10924 return bfd_reloc_overflow;
10925
10926 bfd_put_8 (input_bfd, value, hit_data);
10927 return bfd_reloc_ok;
10928
10929 case R_ARM_ABS16:
10930 /* PR 16202: Refectch the addend using the correct size. */
10931 if (globals->use_rel)
10932 addend = bfd_get_16 (input_bfd, hit_data);
10933 value += addend;
10934
10935 /* See comment for R_ARM_ABS8. */
10936 if ((long) value > 0xffff || (long) value < -0x8000)
10937 return bfd_reloc_overflow;
10938
10939 bfd_put_16 (input_bfd, value, hit_data);
10940 return bfd_reloc_ok;
10941
10942 case R_ARM_THM_ABS5:
10943 /* Support ldr and str instructions for the thumb. */
10944 if (globals->use_rel)
10945 {
10946 /* Need to refetch addend. */
10947 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10948 /* ??? Need to determine shift amount from operand size. */
10949 addend >>= howto->rightshift;
10950 }
10951 value += addend;
10952
10953 /* ??? Isn't value unsigned? */
10954 if ((long) value > 0x1f || (long) value < -0x10)
10955 return bfd_reloc_overflow;
10956
10957 /* ??? Value needs to be properly shifted into place first. */
10958 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10959 bfd_put_16 (input_bfd, value, hit_data);
10960 return bfd_reloc_ok;
10961
10962 case R_ARM_THM_ALU_PREL_11_0:
10963 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10964 {
10965 bfd_vma insn;
10966 bfd_signed_vma relocation;
10967
10968 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10969 | bfd_get_16 (input_bfd, hit_data + 2);
10970
10971 if (globals->use_rel)
10972 {
10973 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10974 | ((insn & (1 << 26)) >> 15);
10975 if (insn & 0xf00000)
10976 signed_addend = -signed_addend;
10977 }
10978
10979 relocation = value + signed_addend;
10980 relocation -= Pa (input_section->output_section->vma
10981 + input_section->output_offset
10982 + rel->r_offset);
10983
10984 /* PR 21523: Use an absolute value. The user of this reloc will
10985 have already selected an ADD or SUB insn appropriately. */
10986 value = llabs (relocation);
10987
10988 if (value >= 0x1000)
10989 return bfd_reloc_overflow;
10990
10991 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10992 if (branch_type == ST_BRANCH_TO_THUMB)
10993 value |= 1;
10994
10995 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10996 | ((value & 0x700) << 4)
10997 | ((value & 0x800) << 15);
10998 if (relocation < 0)
10999 insn |= 0xa00000;
11000
11001 bfd_put_16 (input_bfd, insn >> 16, hit_data);
11002 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
11003
11004 return bfd_reloc_ok;
11005 }
11006
11007 case R_ARM_THM_PC8:
11008 /* PR 10073: This reloc is not generated by the GNU toolchain,
11009 but it is supported for compatibility with third party libraries
11010 generated by other compilers, specifically the ARM/IAR. */
11011 {
11012 bfd_vma insn;
11013 bfd_signed_vma relocation;
11014
11015 insn = bfd_get_16 (input_bfd, hit_data);
11016
11017 if (globals->use_rel)
11018 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
11019
11020 relocation = value + addend;
11021 relocation -= Pa (input_section->output_section->vma
11022 + input_section->output_offset
11023 + rel->r_offset);
11024
11025 value = relocation;
11026
11027 /* We do not check for overflow of this reloc. Although strictly
11028 speaking this is incorrect, it appears to be necessary in order
11029 to work with IAR generated relocs. Since GCC and GAS do not
11030 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
11031 a problem for them. */
11032 value &= 0x3fc;
11033
11034 insn = (insn & 0xff00) | (value >> 2);
11035
11036 bfd_put_16 (input_bfd, insn, hit_data);
11037
11038 return bfd_reloc_ok;
11039 }
11040
11041 case R_ARM_THM_PC12:
11042 /* Corresponds to: ldr.w reg, [pc, #offset]. */
11043 {
11044 bfd_vma insn;
11045 bfd_signed_vma relocation;
11046
11047 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
11048 | bfd_get_16 (input_bfd, hit_data + 2);
11049
11050 if (globals->use_rel)
11051 {
11052 signed_addend = insn & 0xfff;
11053 if (!(insn & (1 << 23)))
11054 signed_addend = -signed_addend;
11055 }
11056
11057 relocation = value + signed_addend;
11058 relocation -= Pa (input_section->output_section->vma
11059 + input_section->output_offset
11060 + rel->r_offset);
11061
11062 value = relocation;
11063
11064 if (value >= 0x1000)
11065 return bfd_reloc_overflow;
11066
11067 insn = (insn & 0xff7ff000) | value;
11068 if (relocation >= 0)
11069 insn |= (1 << 23);
11070
11071 bfd_put_16 (input_bfd, insn >> 16, hit_data);
11072 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
11073
11074 return bfd_reloc_ok;
11075 }
11076
11077 case R_ARM_THM_XPC22:
11078 case R_ARM_THM_CALL:
11079 case R_ARM_THM_JUMP24:
11080 /* Thumb BL (branch long instruction). */
11081 {
11082 bfd_vma relocation;
11083 bfd_vma reloc_sign;
11084 bfd_boolean overflow = FALSE;
11085 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11086 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11087 bfd_signed_vma reloc_signed_max;
11088 bfd_signed_vma reloc_signed_min;
11089 bfd_vma check;
11090 bfd_signed_vma signed_check;
11091 int bitsize;
11092 const int thumb2 = using_thumb2 (globals);
11093 const int thumb2_bl = using_thumb2_bl (globals);
11094
11095 /* A branch to an undefined weak symbol is turned into a jump to
11096 the next instruction unless a PLT entry will be created.
11097 The jump to the next instruction is optimized as a NOP.W for
11098 Thumb-2 enabled architectures. */
11099 if (h && h->root.type == bfd_link_hash_undefweak
11100 && plt_offset == (bfd_vma) -1)
11101 {
11102 if (thumb2)
11103 {
11104 bfd_put_16 (input_bfd, 0xf3af, hit_data);
11105 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
11106 }
11107 else
11108 {
11109 bfd_put_16 (input_bfd, 0xe000, hit_data);
11110 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
11111 }
11112 return bfd_reloc_ok;
11113 }
11114
11115 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
11116 with Thumb-1) involving the J1 and J2 bits. */
11117 if (globals->use_rel)
11118 {
11119 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
11120 bfd_vma upper = upper_insn & 0x3ff;
11121 bfd_vma lower = lower_insn & 0x7ff;
11122 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
11123 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
11124 bfd_vma i1 = j1 ^ s ? 0 : 1;
11125 bfd_vma i2 = j2 ^ s ? 0 : 1;
11126
11127 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
11128 /* Sign extend. */
11129 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
11130
11131 signed_addend = addend;
11132 }
11133
11134 if (r_type == R_ARM_THM_XPC22)
11135 {
11136 /* Check for Thumb to Thumb call. */
11137 /* FIXME: Should we translate the instruction into a BL
11138 instruction instead ? */
11139 if (branch_type == ST_BRANCH_TO_THUMB)
11140 _bfd_error_handler
11141 (_("%pB: warning: %s BLX instruction targets"
11142 " %s function '%s'"),
11143 input_bfd, "Thumb",
11144 "Thumb", h ? h->root.root.string : "(local)");
11145 }
11146 else
11147 {
11148 /* If it is not a call to Thumb, assume call to Arm.
11149 If it is a call relative to a section name, then it is not a
11150 function call at all, but rather a long jump. Calls through
11151 the PLT do not require stubs. */
11152 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
11153 {
11154 if (globals->use_blx && r_type == R_ARM_THM_CALL)
11155 {
11156 /* Convert BL to BLX. */
11157 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11158 }
11159 else if (( r_type != R_ARM_THM_CALL)
11160 && (r_type != R_ARM_THM_JUMP24))
11161 {
11162 if (elf32_thumb_to_arm_stub
11163 (info, sym_name, input_bfd, output_bfd, input_section,
11164 hit_data, sym_sec, rel->r_offset, signed_addend, value,
11165 error_message))
11166 return bfd_reloc_ok;
11167 else
11168 return bfd_reloc_dangerous;
11169 }
11170 }
11171 else if (branch_type == ST_BRANCH_TO_THUMB
11172 && globals->use_blx
11173 && r_type == R_ARM_THM_CALL)
11174 {
11175 /* Make sure this is a BL. */
11176 lower_insn |= 0x1800;
11177 }
11178 }
11179
11180 enum elf32_arm_stub_type stub_type = arm_stub_none;
11181 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
11182 {
11183 /* Check if a stub has to be inserted because the destination
11184 is too far. */
11185 struct elf32_arm_stub_hash_entry *stub_entry;
11186 struct elf32_arm_link_hash_entry *hash;
11187
11188 hash = (struct elf32_arm_link_hash_entry *) h;
11189
11190 stub_type = arm_type_of_stub (info, input_section, rel,
11191 st_type, &branch_type,
11192 hash, value, sym_sec,
11193 input_bfd, sym_name);
11194
11195 if (stub_type != arm_stub_none)
11196 {
11197 /* The target is out of reach or we are changing modes, so
11198 redirect the branch to the local stub for this
11199 function. */
11200 stub_entry = elf32_arm_get_stub_entry (input_section,
11201 sym_sec, h,
11202 rel, globals,
11203 stub_type);
11204 if (stub_entry != NULL)
11205 {
11206 value = (stub_entry->stub_offset
11207 + stub_entry->stub_sec->output_offset
11208 + stub_entry->stub_sec->output_section->vma);
11209
11210 if (plt_offset != (bfd_vma) -1)
11211 *unresolved_reloc_p = FALSE;
11212 }
11213
11214 /* If this call becomes a call to Arm, force BLX. */
11215 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
11216 {
11217 if ((stub_entry
11218 && !arm_stub_is_thumb (stub_entry->stub_type))
11219 || branch_type != ST_BRANCH_TO_THUMB)
11220 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11221 }
11222 }
11223 }
11224
11225 /* Handle calls via the PLT. */
11226 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
11227 {
11228 value = (splt->output_section->vma
11229 + splt->output_offset
11230 + plt_offset);
11231
11232 if (globals->use_blx
11233 && r_type == R_ARM_THM_CALL
11234 && ! using_thumb_only (globals))
11235 {
11236 /* If the Thumb BLX instruction is available, convert
11237 the BL to a BLX instruction to call the ARM-mode
11238 PLT entry. */
11239 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11240 branch_type = ST_BRANCH_TO_ARM;
11241 }
11242 else
11243 {
11244 if (! using_thumb_only (globals))
11245 /* Target the Thumb stub before the ARM PLT entry. */
11246 value -= PLT_THUMB_STUB_SIZE;
11247 branch_type = ST_BRANCH_TO_THUMB;
11248 }
11249 *unresolved_reloc_p = FALSE;
11250 }
11251
11252 relocation = value + signed_addend;
11253
11254 relocation -= (input_section->output_section->vma
11255 + input_section->output_offset
11256 + rel->r_offset);
11257
11258 check = relocation >> howto->rightshift;
11259
11260 /* If this is a signed value, the rightshift just dropped
11261 leading 1 bits (assuming twos complement). */
11262 if ((bfd_signed_vma) relocation >= 0)
11263 signed_check = check;
11264 else
11265 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
11266
11267 /* Calculate the permissable maximum and minimum values for
11268 this relocation according to whether we're relocating for
11269 Thumb-2 or not. */
11270 bitsize = howto->bitsize;
11271 if (!thumb2_bl)
11272 bitsize -= 2;
11273 reloc_signed_max = (1 << (bitsize - 1)) - 1;
11274 reloc_signed_min = ~reloc_signed_max;
11275
11276 /* Assumes two's complement. */
11277 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11278 overflow = TRUE;
11279
11280 if ((lower_insn & 0x5000) == 0x4000)
11281 /* For a BLX instruction, make sure that the relocation is rounded up
11282 to a word boundary. This follows the semantics of the instruction
11283 which specifies that bit 1 of the target address will come from bit
11284 1 of the base address. */
11285 relocation = (relocation + 2) & ~ 3;
11286
11287 /* Put RELOCATION back into the insn. Assumes two's complement.
11288 We use the Thumb-2 encoding, which is safe even if dealing with
11289 a Thumb-1 instruction by virtue of our overflow check above. */
11290 reloc_sign = (signed_check < 0) ? 1 : 0;
11291 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
11292 | ((relocation >> 12) & 0x3ff)
11293 | (reloc_sign << 10);
11294 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
11295 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
11296 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
11297 | ((relocation >> 1) & 0x7ff);
11298
11299 /* Put the relocated value back in the object file: */
11300 bfd_put_16 (input_bfd, upper_insn, hit_data);
11301 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11302
11303 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11304 }
11305 break;
11306
11307 case R_ARM_THM_JUMP19:
11308 /* Thumb32 conditional branch instruction. */
11309 {
11310 bfd_vma relocation;
11311 bfd_boolean overflow = FALSE;
11312 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11313 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11314 bfd_signed_vma reloc_signed_max = 0xffffe;
11315 bfd_signed_vma reloc_signed_min = -0x100000;
11316 bfd_signed_vma signed_check;
11317 enum elf32_arm_stub_type stub_type = arm_stub_none;
11318 struct elf32_arm_stub_hash_entry *stub_entry;
11319 struct elf32_arm_link_hash_entry *hash;
11320
11321 /* Need to refetch the addend, reconstruct the top three bits,
11322 and squish the two 11 bit pieces together. */
11323 if (globals->use_rel)
11324 {
11325 bfd_vma S = (upper_insn & 0x0400) >> 10;
11326 bfd_vma upper = (upper_insn & 0x003f);
11327 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
11328 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
11329 bfd_vma lower = (lower_insn & 0x07ff);
11330
11331 upper |= J1 << 6;
11332 upper |= J2 << 7;
11333 upper |= (!S) << 8;
11334 upper -= 0x0100; /* Sign extend. */
11335
11336 addend = (upper << 12) | (lower << 1);
11337 signed_addend = addend;
11338 }
11339
11340 /* Handle calls via the PLT. */
11341 if (plt_offset != (bfd_vma) -1)
11342 {
11343 value = (splt->output_section->vma
11344 + splt->output_offset
11345 + plt_offset);
11346 /* Target the Thumb stub before the ARM PLT entry. */
11347 value -= PLT_THUMB_STUB_SIZE;
11348 *unresolved_reloc_p = FALSE;
11349 }
11350
11351 hash = (struct elf32_arm_link_hash_entry *)h;
11352
11353 stub_type = arm_type_of_stub (info, input_section, rel,
11354 st_type, &branch_type,
11355 hash, value, sym_sec,
11356 input_bfd, sym_name);
11357 if (stub_type != arm_stub_none)
11358 {
11359 stub_entry = elf32_arm_get_stub_entry (input_section,
11360 sym_sec, h,
11361 rel, globals,
11362 stub_type);
11363 if (stub_entry != NULL)
11364 {
11365 value = (stub_entry->stub_offset
11366 + stub_entry->stub_sec->output_offset
11367 + stub_entry->stub_sec->output_section->vma);
11368 }
11369 }
11370
11371 relocation = value + signed_addend;
11372 relocation -= (input_section->output_section->vma
11373 + input_section->output_offset
11374 + rel->r_offset);
11375 signed_check = (bfd_signed_vma) relocation;
11376
11377 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11378 overflow = TRUE;
11379
11380 /* Put RELOCATION back into the insn. */
11381 {
11382 bfd_vma S = (relocation & 0x00100000) >> 20;
11383 bfd_vma J2 = (relocation & 0x00080000) >> 19;
11384 bfd_vma J1 = (relocation & 0x00040000) >> 18;
11385 bfd_vma hi = (relocation & 0x0003f000) >> 12;
11386 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
11387
11388 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
11389 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
11390 }
11391
11392 /* Put the relocated value back in the object file: */
11393 bfd_put_16 (input_bfd, upper_insn, hit_data);
11394 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11395
11396 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11397 }
11398
11399 case R_ARM_THM_JUMP11:
11400 case R_ARM_THM_JUMP8:
11401 case R_ARM_THM_JUMP6:
11402 /* Thumb B (branch) instruction). */
11403 {
11404 bfd_signed_vma relocation;
11405 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
11406 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
11407 bfd_signed_vma signed_check;
11408
11409 /* CZB cannot jump backward. */
11410 if (r_type == R_ARM_THM_JUMP6)
11411 reloc_signed_min = 0;
11412
11413 if (globals->use_rel)
11414 {
11415 /* Need to refetch addend. */
11416 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
11417 if (addend & ((howto->src_mask + 1) >> 1))
11418 {
11419 signed_addend = -1;
11420 signed_addend &= ~ howto->src_mask;
11421 signed_addend |= addend;
11422 }
11423 else
11424 signed_addend = addend;
11425 /* The value in the insn has been right shifted. We need to
11426 undo this, so that we can perform the address calculation
11427 in terms of bytes. */
11428 signed_addend <<= howto->rightshift;
11429 }
11430 relocation = value + signed_addend;
11431
11432 relocation -= (input_section->output_section->vma
11433 + input_section->output_offset
11434 + rel->r_offset);
11435
11436 relocation >>= howto->rightshift;
11437 signed_check = relocation;
11438
11439 if (r_type == R_ARM_THM_JUMP6)
11440 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
11441 else
11442 relocation &= howto->dst_mask;
11443 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
11444
11445 bfd_put_16 (input_bfd, relocation, hit_data);
11446
11447 /* Assumes two's complement. */
11448 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11449 return bfd_reloc_overflow;
11450
11451 return bfd_reloc_ok;
11452 }
11453
11454 case R_ARM_ALU_PCREL7_0:
11455 case R_ARM_ALU_PCREL15_8:
11456 case R_ARM_ALU_PCREL23_15:
11457 {
11458 bfd_vma insn;
11459 bfd_vma relocation;
11460
11461 insn = bfd_get_32 (input_bfd, hit_data);
11462 if (globals->use_rel)
11463 {
11464 /* Extract the addend. */
11465 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
11466 signed_addend = addend;
11467 }
11468 relocation = value + signed_addend;
11469
11470 relocation -= (input_section->output_section->vma
11471 + input_section->output_offset
11472 + rel->r_offset);
11473 insn = (insn & ~0xfff)
11474 | ((howto->bitpos << 7) & 0xf00)
11475 | ((relocation >> howto->bitpos) & 0xff);
11476 bfd_put_32 (input_bfd, value, hit_data);
11477 }
11478 return bfd_reloc_ok;
11479
11480 case R_ARM_GNU_VTINHERIT:
11481 case R_ARM_GNU_VTENTRY:
11482 return bfd_reloc_ok;
11483
11484 case R_ARM_GOTOFF32:
11485 /* Relocation is relative to the start of the
11486 global offset table. */
11487
11488 BFD_ASSERT (sgot != NULL);
11489 if (sgot == NULL)
11490 return bfd_reloc_notsupported;
11491
11492 /* If we are addressing a Thumb function, we need to adjust the
11493 address by one, so that attempts to call the function pointer will
11494 correctly interpret it as Thumb code. */
11495 if (branch_type == ST_BRANCH_TO_THUMB)
11496 value += 1;
11497
11498 /* Note that sgot->output_offset is not involved in this
11499 calculation. We always want the start of .got. If we
11500 define _GLOBAL_OFFSET_TABLE in a different way, as is
11501 permitted by the ABI, we might have to change this
11502 calculation. */
11503 value -= sgot->output_section->vma;
11504 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11505 contents, rel->r_offset, value,
11506 rel->r_addend);
11507
11508 case R_ARM_GOTPC:
11509 /* Use global offset table as symbol value. */
11510 BFD_ASSERT (sgot != NULL);
11511
11512 if (sgot == NULL)
11513 return bfd_reloc_notsupported;
11514
11515 *unresolved_reloc_p = FALSE;
11516 value = sgot->output_section->vma;
11517 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11518 contents, rel->r_offset, value,
11519 rel->r_addend);
11520
11521 case R_ARM_GOT32:
11522 case R_ARM_GOT_PREL:
11523 /* Relocation is to the entry for this symbol in the
11524 global offset table. */
11525 if (sgot == NULL)
11526 return bfd_reloc_notsupported;
11527
11528 if (dynreloc_st_type == STT_GNU_IFUNC
11529 && plt_offset != (bfd_vma) -1
11530 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11531 {
11532 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11533 symbol, and the relocation resolves directly to the runtime
11534 target rather than to the .iplt entry. This means that any
11535 .got entry would be the same value as the .igot.plt entry,
11536 so there's no point creating both. */
11537 sgot = globals->root.igotplt;
11538 value = sgot->output_offset + gotplt_offset;
11539 }
11540 else if (h != NULL)
11541 {
11542 bfd_vma off;
11543
11544 off = h->got.offset;
11545 BFD_ASSERT (off != (bfd_vma) -1);
11546 if ((off & 1) != 0)
11547 {
11548 /* We have already processsed one GOT relocation against
11549 this symbol. */
11550 off &= ~1;
11551 if (globals->root.dynamic_sections_created
11552 && !SYMBOL_REFERENCES_LOCAL (info, h))
11553 *unresolved_reloc_p = FALSE;
11554 }
11555 else
11556 {
11557 Elf_Internal_Rela outrel;
11558 int isrofixup = 0;
11559
11560 if (((h->dynindx != -1) || globals->fdpic_p)
11561 && !SYMBOL_REFERENCES_LOCAL (info, h))
11562 {
11563 /* If the symbol doesn't resolve locally in a static
11564 object, we have an undefined reference. If the
11565 symbol doesn't resolve locally in a dynamic object,
11566 it should be resolved by the dynamic linker. */
11567 if (globals->root.dynamic_sections_created)
11568 {
11569 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11570 *unresolved_reloc_p = FALSE;
11571 }
11572 else
11573 outrel.r_info = 0;
11574 outrel.r_addend = 0;
11575 }
11576 else
11577 {
11578 if (dynreloc_st_type == STT_GNU_IFUNC)
11579 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11580 else if (bfd_link_pic (info)
11581 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11582 || h->root.type != bfd_link_hash_undefweak))
11583 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11584 else
11585 {
11586 outrel.r_info = 0;
11587 if (globals->fdpic_p)
11588 isrofixup = 1;
11589 }
11590 outrel.r_addend = dynreloc_value;
11591 }
11592
11593 /* The GOT entry is initialized to zero by default.
11594 See if we should install a different value. */
11595 if (outrel.r_addend != 0
11596 && (globals->use_rel || outrel.r_info == 0))
11597 {
11598 bfd_put_32 (output_bfd, outrel.r_addend,
11599 sgot->contents + off);
11600 outrel.r_addend = 0;
11601 }
11602
11603 if (isrofixup)
11604 arm_elf_add_rofixup (output_bfd,
11605 elf32_arm_hash_table(info)->srofixup,
11606 sgot->output_section->vma
11607 + sgot->output_offset + off);
11608
11609 else if (outrel.r_info != 0)
11610 {
11611 outrel.r_offset = (sgot->output_section->vma
11612 + sgot->output_offset
11613 + off);
11614 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11615 }
11616
11617 h->got.offset |= 1;
11618 }
11619 value = sgot->output_offset + off;
11620 }
11621 else
11622 {
11623 bfd_vma off;
11624
11625 BFD_ASSERT (local_got_offsets != NULL
11626 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11627
11628 off = local_got_offsets[r_symndx];
11629
11630 /* The offset must always be a multiple of 4. We use the
11631 least significant bit to record whether we have already
11632 generated the necessary reloc. */
11633 if ((off & 1) != 0)
11634 off &= ~1;
11635 else
11636 {
11637 Elf_Internal_Rela outrel;
11638 int isrofixup = 0;
11639
11640 if (dynreloc_st_type == STT_GNU_IFUNC)
11641 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11642 else if (bfd_link_pic (info))
11643 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11644 else
11645 {
11646 outrel.r_info = 0;
11647 if (globals->fdpic_p)
11648 isrofixup = 1;
11649 }
11650
11651 /* The GOT entry is initialized to zero by default.
11652 See if we should install a different value. */
11653 if (globals->use_rel || outrel.r_info == 0)
11654 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11655
11656 if (isrofixup)
11657 arm_elf_add_rofixup (output_bfd,
11658 globals->srofixup,
11659 sgot->output_section->vma
11660 + sgot->output_offset + off);
11661
11662 else if (outrel.r_info != 0)
11663 {
11664 outrel.r_addend = addend + dynreloc_value;
11665 outrel.r_offset = (sgot->output_section->vma
11666 + sgot->output_offset
11667 + off);
11668 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11669 }
11670
11671 local_got_offsets[r_symndx] |= 1;
11672 }
11673
11674 value = sgot->output_offset + off;
11675 }
11676 if (r_type != R_ARM_GOT32)
11677 value += sgot->output_section->vma;
11678
11679 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11680 contents, rel->r_offset, value,
11681 rel->r_addend);
11682
11683 case R_ARM_TLS_LDO32:
11684 value = value - dtpoff_base (info);
11685
11686 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11687 contents, rel->r_offset, value,
11688 rel->r_addend);
11689
11690 case R_ARM_TLS_LDM32:
11691 case R_ARM_TLS_LDM32_FDPIC:
11692 {
11693 bfd_vma off;
11694
11695 if (sgot == NULL)
11696 abort ();
11697
11698 off = globals->tls_ldm_got.offset;
11699
11700 if ((off & 1) != 0)
11701 off &= ~1;
11702 else
11703 {
11704 /* If we don't know the module number, create a relocation
11705 for it. */
11706 if (bfd_link_dll (info))
11707 {
11708 Elf_Internal_Rela outrel;
11709
11710 if (srelgot == NULL)
11711 abort ();
11712
11713 outrel.r_addend = 0;
11714 outrel.r_offset = (sgot->output_section->vma
11715 + sgot->output_offset + off);
11716 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11717
11718 if (globals->use_rel)
11719 bfd_put_32 (output_bfd, outrel.r_addend,
11720 sgot->contents + off);
11721
11722 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11723 }
11724 else
11725 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11726
11727 globals->tls_ldm_got.offset |= 1;
11728 }
11729
11730 if (r_type == R_ARM_TLS_LDM32_FDPIC)
11731 {
11732 bfd_put_32(output_bfd,
11733 globals->root.sgot->output_offset + off,
11734 contents + rel->r_offset);
11735
11736 return bfd_reloc_ok;
11737 }
11738 else
11739 {
11740 value = sgot->output_section->vma + sgot->output_offset + off
11741 - (input_section->output_section->vma
11742 + input_section->output_offset + rel->r_offset);
11743
11744 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11745 contents, rel->r_offset, value,
11746 rel->r_addend);
11747 }
11748 }
11749
11750 case R_ARM_TLS_CALL:
11751 case R_ARM_THM_TLS_CALL:
11752 case R_ARM_TLS_GD32:
11753 case R_ARM_TLS_GD32_FDPIC:
11754 case R_ARM_TLS_IE32:
11755 case R_ARM_TLS_IE32_FDPIC:
11756 case R_ARM_TLS_GOTDESC:
11757 case R_ARM_TLS_DESCSEQ:
11758 case R_ARM_THM_TLS_DESCSEQ:
11759 {
11760 bfd_vma off, offplt;
11761 int indx = 0;
11762 char tls_type;
11763
11764 BFD_ASSERT (sgot != NULL);
11765
11766 if (h != NULL)
11767 {
11768 bfd_boolean dyn;
11769 dyn = globals->root.dynamic_sections_created;
11770 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11771 bfd_link_pic (info),
11772 h)
11773 && (!bfd_link_pic (info)
11774 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11775 {
11776 *unresolved_reloc_p = FALSE;
11777 indx = h->dynindx;
11778 }
11779 off = h->got.offset;
11780 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11781 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11782 }
11783 else
11784 {
11785 BFD_ASSERT (local_got_offsets != NULL);
11786 off = local_got_offsets[r_symndx];
11787 offplt = local_tlsdesc_gotents[r_symndx];
11788 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11789 }
11790
11791 /* Linker relaxations happens from one of the
11792 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11793 if (ELF32_R_TYPE(rel->r_info) != r_type)
11794 tls_type = GOT_TLS_IE;
11795
11796 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11797
11798 if ((off & 1) != 0)
11799 off &= ~1;
11800 else
11801 {
11802 bfd_boolean need_relocs = FALSE;
11803 Elf_Internal_Rela outrel;
11804 int cur_off = off;
11805
11806 /* The GOT entries have not been initialized yet. Do it
11807 now, and emit any relocations. If both an IE GOT and a
11808 GD GOT are necessary, we emit the GD first. */
11809
11810 if ((bfd_link_dll (info) || indx != 0)
11811 && (h == NULL
11812 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11813 && !resolved_to_zero)
11814 || h->root.type != bfd_link_hash_undefweak))
11815 {
11816 need_relocs = TRUE;
11817 BFD_ASSERT (srelgot != NULL);
11818 }
11819
11820 if (tls_type & GOT_TLS_GDESC)
11821 {
11822 bfd_byte *loc;
11823
11824 /* We should have relaxed, unless this is an undefined
11825 weak symbol. */
11826 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11827 || bfd_link_dll (info));
11828 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11829 <= globals->root.sgotplt->size);
11830
11831 outrel.r_addend = 0;
11832 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11833 + globals->root.sgotplt->output_offset
11834 + offplt
11835 + globals->sgotplt_jump_table_size);
11836
11837 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11838 sreloc = globals->root.srelplt;
11839 loc = sreloc->contents;
11840 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11841 BFD_ASSERT (loc + RELOC_SIZE (globals)
11842 <= sreloc->contents + sreloc->size);
11843
11844 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11845
11846 /* For globals, the first word in the relocation gets
11847 the relocation index and the top bit set, or zero,
11848 if we're binding now. For locals, it gets the
11849 symbol's offset in the tls section. */
11850 bfd_put_32 (output_bfd,
11851 !h ? value - elf_hash_table (info)->tls_sec->vma
11852 : info->flags & DF_BIND_NOW ? 0
11853 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11854 globals->root.sgotplt->contents + offplt
11855 + globals->sgotplt_jump_table_size);
11856
11857 /* Second word in the relocation is always zero. */
11858 bfd_put_32 (output_bfd, 0,
11859 globals->root.sgotplt->contents + offplt
11860 + globals->sgotplt_jump_table_size + 4);
11861 }
11862 if (tls_type & GOT_TLS_GD)
11863 {
11864 if (need_relocs)
11865 {
11866 outrel.r_addend = 0;
11867 outrel.r_offset = (sgot->output_section->vma
11868 + sgot->output_offset
11869 + cur_off);
11870 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11871
11872 if (globals->use_rel)
11873 bfd_put_32 (output_bfd, outrel.r_addend,
11874 sgot->contents + cur_off);
11875
11876 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11877
11878 if (indx == 0)
11879 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11880 sgot->contents + cur_off + 4);
11881 else
11882 {
11883 outrel.r_addend = 0;
11884 outrel.r_info = ELF32_R_INFO (indx,
11885 R_ARM_TLS_DTPOFF32);
11886 outrel.r_offset += 4;
11887
11888 if (globals->use_rel)
11889 bfd_put_32 (output_bfd, outrel.r_addend,
11890 sgot->contents + cur_off + 4);
11891
11892 elf32_arm_add_dynreloc (output_bfd, info,
11893 srelgot, &outrel);
11894 }
11895 }
11896 else
11897 {
11898 /* If we are not emitting relocations for a
11899 general dynamic reference, then we must be in a
11900 static link or an executable link with the
11901 symbol binding locally. Mark it as belonging
11902 to module 1, the executable. */
11903 bfd_put_32 (output_bfd, 1,
11904 sgot->contents + cur_off);
11905 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11906 sgot->contents + cur_off + 4);
11907 }
11908
11909 cur_off += 8;
11910 }
11911
11912 if (tls_type & GOT_TLS_IE)
11913 {
11914 if (need_relocs)
11915 {
11916 if (indx == 0)
11917 outrel.r_addend = value - dtpoff_base (info);
11918 else
11919 outrel.r_addend = 0;
11920 outrel.r_offset = (sgot->output_section->vma
11921 + sgot->output_offset
11922 + cur_off);
11923 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11924
11925 if (globals->use_rel)
11926 bfd_put_32 (output_bfd, outrel.r_addend,
11927 sgot->contents + cur_off);
11928
11929 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11930 }
11931 else
11932 bfd_put_32 (output_bfd, tpoff (info, value),
11933 sgot->contents + cur_off);
11934 cur_off += 4;
11935 }
11936
11937 if (h != NULL)
11938 h->got.offset |= 1;
11939 else
11940 local_got_offsets[r_symndx] |= 1;
11941 }
11942
11943 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32 && r_type != R_ARM_TLS_GD32_FDPIC)
11944 off += 8;
11945 else if (tls_type & GOT_TLS_GDESC)
11946 off = offplt;
11947
11948 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11949 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11950 {
11951 bfd_signed_vma offset;
11952 /* TLS stubs are arm mode. The original symbol is a
11953 data object, so branch_type is bogus. */
11954 branch_type = ST_BRANCH_TO_ARM;
11955 enum elf32_arm_stub_type stub_type
11956 = arm_type_of_stub (info, input_section, rel,
11957 st_type, &branch_type,
11958 (struct elf32_arm_link_hash_entry *)h,
11959 globals->tls_trampoline, globals->root.splt,
11960 input_bfd, sym_name);
11961
11962 if (stub_type != arm_stub_none)
11963 {
11964 struct elf32_arm_stub_hash_entry *stub_entry
11965 = elf32_arm_get_stub_entry
11966 (input_section, globals->root.splt, 0, rel,
11967 globals, stub_type);
11968 offset = (stub_entry->stub_offset
11969 + stub_entry->stub_sec->output_offset
11970 + stub_entry->stub_sec->output_section->vma);
11971 }
11972 else
11973 offset = (globals->root.splt->output_section->vma
11974 + globals->root.splt->output_offset
11975 + globals->tls_trampoline);
11976
11977 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11978 {
11979 unsigned long inst;
11980
11981 offset -= (input_section->output_section->vma
11982 + input_section->output_offset
11983 + rel->r_offset + 8);
11984
11985 inst = offset >> 2;
11986 inst &= 0x00ffffff;
11987 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11988 }
11989 else
11990 {
11991 /* Thumb blx encodes the offset in a complicated
11992 fashion. */
11993 unsigned upper_insn, lower_insn;
11994 unsigned neg;
11995
11996 offset -= (input_section->output_section->vma
11997 + input_section->output_offset
11998 + rel->r_offset + 4);
11999
12000 if (stub_type != arm_stub_none
12001 && arm_stub_is_thumb (stub_type))
12002 {
12003 lower_insn = 0xd000;
12004 }
12005 else
12006 {
12007 lower_insn = 0xc000;
12008 /* Round up the offset to a word boundary. */
12009 offset = (offset + 2) & ~2;
12010 }
12011
12012 neg = offset < 0;
12013 upper_insn = (0xf000
12014 | ((offset >> 12) & 0x3ff)
12015 | (neg << 10));
12016 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
12017 | (((!((offset >> 22) & 1)) ^ neg) << 11)
12018 | ((offset >> 1) & 0x7ff);
12019 bfd_put_16 (input_bfd, upper_insn, hit_data);
12020 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12021 return bfd_reloc_ok;
12022 }
12023 }
12024 /* These relocations needs special care, as besides the fact
12025 they point somewhere in .gotplt, the addend must be
12026 adjusted accordingly depending on the type of instruction
12027 we refer to. */
12028 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
12029 {
12030 unsigned long data, insn;
12031 unsigned thumb;
12032
12033 data = bfd_get_signed_32 (input_bfd, hit_data);
12034 thumb = data & 1;
12035 data &= ~1ul;
12036
12037 if (thumb)
12038 {
12039 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
12040 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
12041 insn = (insn << 16)
12042 | bfd_get_16 (input_bfd,
12043 contents + rel->r_offset - data + 2);
12044 if ((insn & 0xf800c000) == 0xf000c000)
12045 /* bl/blx */
12046 value = -6;
12047 else if ((insn & 0xffffff00) == 0x4400)
12048 /* add */
12049 value = -5;
12050 else
12051 {
12052 _bfd_error_handler
12053 /* xgettext:c-format */
12054 (_("%pB(%pA+%#" PRIx64 "): "
12055 "unexpected %s instruction '%#lx' "
12056 "referenced by TLS_GOTDESC"),
12057 input_bfd, input_section, (uint64_t) rel->r_offset,
12058 "Thumb", insn);
12059 return bfd_reloc_notsupported;
12060 }
12061 }
12062 else
12063 {
12064 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
12065
12066 switch (insn >> 24)
12067 {
12068 case 0xeb: /* bl */
12069 case 0xfa: /* blx */
12070 value = -4;
12071 break;
12072
12073 case 0xe0: /* add */
12074 value = -8;
12075 break;
12076
12077 default:
12078 _bfd_error_handler
12079 /* xgettext:c-format */
12080 (_("%pB(%pA+%#" PRIx64 "): "
12081 "unexpected %s instruction '%#lx' "
12082 "referenced by TLS_GOTDESC"),
12083 input_bfd, input_section, (uint64_t) rel->r_offset,
12084 "ARM", insn);
12085 return bfd_reloc_notsupported;
12086 }
12087 }
12088
12089 value += ((globals->root.sgotplt->output_section->vma
12090 + globals->root.sgotplt->output_offset + off)
12091 - (input_section->output_section->vma
12092 + input_section->output_offset
12093 + rel->r_offset)
12094 + globals->sgotplt_jump_table_size);
12095 }
12096 else
12097 value = ((globals->root.sgot->output_section->vma
12098 + globals->root.sgot->output_offset + off)
12099 - (input_section->output_section->vma
12100 + input_section->output_offset + rel->r_offset));
12101
12102 if (globals->fdpic_p && (r_type == R_ARM_TLS_GD32_FDPIC ||
12103 r_type == R_ARM_TLS_IE32_FDPIC))
12104 {
12105 /* For FDPIC relocations, resolve to the offset of the GOT
12106 entry from the start of GOT. */
12107 bfd_put_32(output_bfd,
12108 globals->root.sgot->output_offset + off,
12109 contents + rel->r_offset);
12110
12111 return bfd_reloc_ok;
12112 }
12113 else
12114 {
12115 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12116 contents, rel->r_offset, value,
12117 rel->r_addend);
12118 }
12119 }
12120
12121 case R_ARM_TLS_LE32:
12122 if (bfd_link_dll (info))
12123 {
12124 _bfd_error_handler
12125 /* xgettext:c-format */
12126 (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted "
12127 "in shared object"),
12128 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name);
12129 return bfd_reloc_notsupported;
12130 }
12131 else
12132 value = tpoff (info, value);
12133
12134 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12135 contents, rel->r_offset, value,
12136 rel->r_addend);
12137
12138 case R_ARM_V4BX:
12139 if (globals->fix_v4bx)
12140 {
12141 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12142
12143 /* Ensure that we have a BX instruction. */
12144 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
12145
12146 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
12147 {
12148 /* Branch to veneer. */
12149 bfd_vma glue_addr;
12150 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
12151 glue_addr -= input_section->output_section->vma
12152 + input_section->output_offset
12153 + rel->r_offset + 8;
12154 insn = (insn & 0xf0000000) | 0x0a000000
12155 | ((glue_addr >> 2) & 0x00ffffff);
12156 }
12157 else
12158 {
12159 /* Preserve Rm (lowest four bits) and the condition code
12160 (highest four bits). Other bits encode MOV PC,Rm. */
12161 insn = (insn & 0xf000000f) | 0x01a0f000;
12162 }
12163
12164 bfd_put_32 (input_bfd, insn, hit_data);
12165 }
12166 return bfd_reloc_ok;
12167
12168 case R_ARM_MOVW_ABS_NC:
12169 case R_ARM_MOVT_ABS:
12170 case R_ARM_MOVW_PREL_NC:
12171 case R_ARM_MOVT_PREL:
12172 /* Until we properly support segment-base-relative addressing then
12173 we assume the segment base to be zero, as for the group relocations.
12174 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
12175 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
12176 case R_ARM_MOVW_BREL_NC:
12177 case R_ARM_MOVW_BREL:
12178 case R_ARM_MOVT_BREL:
12179 {
12180 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12181
12182 if (globals->use_rel)
12183 {
12184 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
12185 signed_addend = (addend ^ 0x8000) - 0x8000;
12186 }
12187
12188 value += signed_addend;
12189
12190 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
12191 value -= (input_section->output_section->vma
12192 + input_section->output_offset + rel->r_offset);
12193
12194 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
12195 return bfd_reloc_overflow;
12196
12197 if (branch_type == ST_BRANCH_TO_THUMB)
12198 value |= 1;
12199
12200 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
12201 || r_type == R_ARM_MOVT_BREL)
12202 value >>= 16;
12203
12204 insn &= 0xfff0f000;
12205 insn |= value & 0xfff;
12206 insn |= (value & 0xf000) << 4;
12207 bfd_put_32 (input_bfd, insn, hit_data);
12208 }
12209 return bfd_reloc_ok;
12210
12211 case R_ARM_THM_MOVW_ABS_NC:
12212 case R_ARM_THM_MOVT_ABS:
12213 case R_ARM_THM_MOVW_PREL_NC:
12214 case R_ARM_THM_MOVT_PREL:
12215 /* Until we properly support segment-base-relative addressing then
12216 we assume the segment base to be zero, as for the above relocations.
12217 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
12218 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
12219 as R_ARM_THM_MOVT_ABS. */
12220 case R_ARM_THM_MOVW_BREL_NC:
12221 case R_ARM_THM_MOVW_BREL:
12222 case R_ARM_THM_MOVT_BREL:
12223 {
12224 bfd_vma insn;
12225
12226 insn = bfd_get_16 (input_bfd, hit_data) << 16;
12227 insn |= bfd_get_16 (input_bfd, hit_data + 2);
12228
12229 if (globals->use_rel)
12230 {
12231 addend = ((insn >> 4) & 0xf000)
12232 | ((insn >> 15) & 0x0800)
12233 | ((insn >> 4) & 0x0700)
12234 | (insn & 0x00ff);
12235 signed_addend = (addend ^ 0x8000) - 0x8000;
12236 }
12237
12238 value += signed_addend;
12239
12240 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
12241 value -= (input_section->output_section->vma
12242 + input_section->output_offset + rel->r_offset);
12243
12244 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
12245 return bfd_reloc_overflow;
12246
12247 if (branch_type == ST_BRANCH_TO_THUMB)
12248 value |= 1;
12249
12250 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
12251 || r_type == R_ARM_THM_MOVT_BREL)
12252 value >>= 16;
12253
12254 insn &= 0xfbf08f00;
12255 insn |= (value & 0xf000) << 4;
12256 insn |= (value & 0x0800) << 15;
12257 insn |= (value & 0x0700) << 4;
12258 insn |= (value & 0x00ff);
12259
12260 bfd_put_16 (input_bfd, insn >> 16, hit_data);
12261 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
12262 }
12263 return bfd_reloc_ok;
12264
12265 case R_ARM_ALU_PC_G0_NC:
12266 case R_ARM_ALU_PC_G1_NC:
12267 case R_ARM_ALU_PC_G0:
12268 case R_ARM_ALU_PC_G1:
12269 case R_ARM_ALU_PC_G2:
12270 case R_ARM_ALU_SB_G0_NC:
12271 case R_ARM_ALU_SB_G1_NC:
12272 case R_ARM_ALU_SB_G0:
12273 case R_ARM_ALU_SB_G1:
12274 case R_ARM_ALU_SB_G2:
12275 {
12276 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12277 bfd_vma pc = input_section->output_section->vma
12278 + input_section->output_offset + rel->r_offset;
12279 /* sb is the origin of the *segment* containing the symbol. */
12280 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12281 bfd_vma residual;
12282 bfd_vma g_n;
12283 bfd_signed_vma signed_value;
12284 int group = 0;
12285
12286 /* Determine which group of bits to select. */
12287 switch (r_type)
12288 {
12289 case R_ARM_ALU_PC_G0_NC:
12290 case R_ARM_ALU_PC_G0:
12291 case R_ARM_ALU_SB_G0_NC:
12292 case R_ARM_ALU_SB_G0:
12293 group = 0;
12294 break;
12295
12296 case R_ARM_ALU_PC_G1_NC:
12297 case R_ARM_ALU_PC_G1:
12298 case R_ARM_ALU_SB_G1_NC:
12299 case R_ARM_ALU_SB_G1:
12300 group = 1;
12301 break;
12302
12303 case R_ARM_ALU_PC_G2:
12304 case R_ARM_ALU_SB_G2:
12305 group = 2;
12306 break;
12307
12308 default:
12309 abort ();
12310 }
12311
12312 /* If REL, extract the addend from the insn. If RELA, it will
12313 have already been fetched for us. */
12314 if (globals->use_rel)
12315 {
12316 int negative;
12317 bfd_vma constant = insn & 0xff;
12318 bfd_vma rotation = (insn & 0xf00) >> 8;
12319
12320 if (rotation == 0)
12321 signed_addend = constant;
12322 else
12323 {
12324 /* Compensate for the fact that in the instruction, the
12325 rotation is stored in multiples of 2 bits. */
12326 rotation *= 2;
12327
12328 /* Rotate "constant" right by "rotation" bits. */
12329 signed_addend = (constant >> rotation) |
12330 (constant << (8 * sizeof (bfd_vma) - rotation));
12331 }
12332
12333 /* Determine if the instruction is an ADD or a SUB.
12334 (For REL, this determines the sign of the addend.) */
12335 negative = identify_add_or_sub (insn);
12336 if (negative == 0)
12337 {
12338 _bfd_error_handler
12339 /* xgettext:c-format */
12340 (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions "
12341 "are allowed for ALU group relocations"),
12342 input_bfd, input_section, (uint64_t) rel->r_offset);
12343 return bfd_reloc_overflow;
12344 }
12345
12346 signed_addend *= negative;
12347 }
12348
12349 /* Compute the value (X) to go in the place. */
12350 if (r_type == R_ARM_ALU_PC_G0_NC
12351 || r_type == R_ARM_ALU_PC_G1_NC
12352 || r_type == R_ARM_ALU_PC_G0
12353 || r_type == R_ARM_ALU_PC_G1
12354 || r_type == R_ARM_ALU_PC_G2)
12355 /* PC relative. */
12356 signed_value = value - pc + signed_addend;
12357 else
12358 /* Section base relative. */
12359 signed_value = value - sb + signed_addend;
12360
12361 /* If the target symbol is a Thumb function, then set the
12362 Thumb bit in the address. */
12363 if (branch_type == ST_BRANCH_TO_THUMB)
12364 signed_value |= 1;
12365
12366 /* Calculate the value of the relevant G_n, in encoded
12367 constant-with-rotation format. */
12368 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12369 group, &residual);
12370
12371 /* Check for overflow if required. */
12372 if ((r_type == R_ARM_ALU_PC_G0
12373 || r_type == R_ARM_ALU_PC_G1
12374 || r_type == R_ARM_ALU_PC_G2
12375 || r_type == R_ARM_ALU_SB_G0
12376 || r_type == R_ARM_ALU_SB_G1
12377 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
12378 {
12379 _bfd_error_handler
12380 /* xgettext:c-format */
12381 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12382 "splitting %#" PRIx64 " for group relocation %s"),
12383 input_bfd, input_section, (uint64_t) rel->r_offset,
12384 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12385 howto->name);
12386 return bfd_reloc_overflow;
12387 }
12388
12389 /* Mask out the value and the ADD/SUB part of the opcode; take care
12390 not to destroy the S bit. */
12391 insn &= 0xff1ff000;
12392
12393 /* Set the opcode according to whether the value to go in the
12394 place is negative. */
12395 if (signed_value < 0)
12396 insn |= 1 << 22;
12397 else
12398 insn |= 1 << 23;
12399
12400 /* Encode the offset. */
12401 insn |= g_n;
12402
12403 bfd_put_32 (input_bfd, insn, hit_data);
12404 }
12405 return bfd_reloc_ok;
12406
12407 case R_ARM_LDR_PC_G0:
12408 case R_ARM_LDR_PC_G1:
12409 case R_ARM_LDR_PC_G2:
12410 case R_ARM_LDR_SB_G0:
12411 case R_ARM_LDR_SB_G1:
12412 case R_ARM_LDR_SB_G2:
12413 {
12414 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12415 bfd_vma pc = input_section->output_section->vma
12416 + input_section->output_offset + rel->r_offset;
12417 /* sb is the origin of the *segment* containing the symbol. */
12418 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12419 bfd_vma residual;
12420 bfd_signed_vma signed_value;
12421 int group = 0;
12422
12423 /* Determine which groups of bits to calculate. */
12424 switch (r_type)
12425 {
12426 case R_ARM_LDR_PC_G0:
12427 case R_ARM_LDR_SB_G0:
12428 group = 0;
12429 break;
12430
12431 case R_ARM_LDR_PC_G1:
12432 case R_ARM_LDR_SB_G1:
12433 group = 1;
12434 break;
12435
12436 case R_ARM_LDR_PC_G2:
12437 case R_ARM_LDR_SB_G2:
12438 group = 2;
12439 break;
12440
12441 default:
12442 abort ();
12443 }
12444
12445 /* If REL, extract the addend from the insn. If RELA, it will
12446 have already been fetched for us. */
12447 if (globals->use_rel)
12448 {
12449 int negative = (insn & (1 << 23)) ? 1 : -1;
12450 signed_addend = negative * (insn & 0xfff);
12451 }
12452
12453 /* Compute the value (X) to go in the place. */
12454 if (r_type == R_ARM_LDR_PC_G0
12455 || r_type == R_ARM_LDR_PC_G1
12456 || r_type == R_ARM_LDR_PC_G2)
12457 /* PC relative. */
12458 signed_value = value - pc + signed_addend;
12459 else
12460 /* Section base relative. */
12461 signed_value = value - sb + signed_addend;
12462
12463 /* Calculate the value of the relevant G_{n-1} to obtain
12464 the residual at that stage. */
12465 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12466 group - 1, &residual);
12467
12468 /* Check for overflow. */
12469 if (residual >= 0x1000)
12470 {
12471 _bfd_error_handler
12472 /* xgettext:c-format */
12473 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12474 "splitting %#" PRIx64 " for group relocation %s"),
12475 input_bfd, input_section, (uint64_t) rel->r_offset,
12476 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12477 howto->name);
12478 return bfd_reloc_overflow;
12479 }
12480
12481 /* Mask out the value and U bit. */
12482 insn &= 0xff7ff000;
12483
12484 /* Set the U bit if the value to go in the place is non-negative. */
12485 if (signed_value >= 0)
12486 insn |= 1 << 23;
12487
12488 /* Encode the offset. */
12489 insn |= residual;
12490
12491 bfd_put_32 (input_bfd, insn, hit_data);
12492 }
12493 return bfd_reloc_ok;
12494
12495 case R_ARM_LDRS_PC_G0:
12496 case R_ARM_LDRS_PC_G1:
12497 case R_ARM_LDRS_PC_G2:
12498 case R_ARM_LDRS_SB_G0:
12499 case R_ARM_LDRS_SB_G1:
12500 case R_ARM_LDRS_SB_G2:
12501 {
12502 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12503 bfd_vma pc = input_section->output_section->vma
12504 + input_section->output_offset + rel->r_offset;
12505 /* sb is the origin of the *segment* containing the symbol. */
12506 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12507 bfd_vma residual;
12508 bfd_signed_vma signed_value;
12509 int group = 0;
12510
12511 /* Determine which groups of bits to calculate. */
12512 switch (r_type)
12513 {
12514 case R_ARM_LDRS_PC_G0:
12515 case R_ARM_LDRS_SB_G0:
12516 group = 0;
12517 break;
12518
12519 case R_ARM_LDRS_PC_G1:
12520 case R_ARM_LDRS_SB_G1:
12521 group = 1;
12522 break;
12523
12524 case R_ARM_LDRS_PC_G2:
12525 case R_ARM_LDRS_SB_G2:
12526 group = 2;
12527 break;
12528
12529 default:
12530 abort ();
12531 }
12532
12533 /* If REL, extract the addend from the insn. If RELA, it will
12534 have already been fetched for us. */
12535 if (globals->use_rel)
12536 {
12537 int negative = (insn & (1 << 23)) ? 1 : -1;
12538 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
12539 }
12540
12541 /* Compute the value (X) to go in the place. */
12542 if (r_type == R_ARM_LDRS_PC_G0
12543 || r_type == R_ARM_LDRS_PC_G1
12544 || r_type == R_ARM_LDRS_PC_G2)
12545 /* PC relative. */
12546 signed_value = value - pc + signed_addend;
12547 else
12548 /* Section base relative. */
12549 signed_value = value - sb + signed_addend;
12550
12551 /* Calculate the value of the relevant G_{n-1} to obtain
12552 the residual at that stage. */
12553 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12554 group - 1, &residual);
12555
12556 /* Check for overflow. */
12557 if (residual >= 0x100)
12558 {
12559 _bfd_error_handler
12560 /* xgettext:c-format */
12561 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12562 "splitting %#" PRIx64 " for group relocation %s"),
12563 input_bfd, input_section, (uint64_t) rel->r_offset,
12564 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12565 howto->name);
12566 return bfd_reloc_overflow;
12567 }
12568
12569 /* Mask out the value and U bit. */
12570 insn &= 0xff7ff0f0;
12571
12572 /* Set the U bit if the value to go in the place is non-negative. */
12573 if (signed_value >= 0)
12574 insn |= 1 << 23;
12575
12576 /* Encode the offset. */
12577 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12578
12579 bfd_put_32 (input_bfd, insn, hit_data);
12580 }
12581 return bfd_reloc_ok;
12582
12583 case R_ARM_LDC_PC_G0:
12584 case R_ARM_LDC_PC_G1:
12585 case R_ARM_LDC_PC_G2:
12586 case R_ARM_LDC_SB_G0:
12587 case R_ARM_LDC_SB_G1:
12588 case R_ARM_LDC_SB_G2:
12589 {
12590 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12591 bfd_vma pc = input_section->output_section->vma
12592 + input_section->output_offset + rel->r_offset;
12593 /* sb is the origin of the *segment* containing the symbol. */
12594 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12595 bfd_vma residual;
12596 bfd_signed_vma signed_value;
12597 int group = 0;
12598
12599 /* Determine which groups of bits to calculate. */
12600 switch (r_type)
12601 {
12602 case R_ARM_LDC_PC_G0:
12603 case R_ARM_LDC_SB_G0:
12604 group = 0;
12605 break;
12606
12607 case R_ARM_LDC_PC_G1:
12608 case R_ARM_LDC_SB_G1:
12609 group = 1;
12610 break;
12611
12612 case R_ARM_LDC_PC_G2:
12613 case R_ARM_LDC_SB_G2:
12614 group = 2;
12615 break;
12616
12617 default:
12618 abort ();
12619 }
12620
12621 /* If REL, extract the addend from the insn. If RELA, it will
12622 have already been fetched for us. */
12623 if (globals->use_rel)
12624 {
12625 int negative = (insn & (1 << 23)) ? 1 : -1;
12626 signed_addend = negative * ((insn & 0xff) << 2);
12627 }
12628
12629 /* Compute the value (X) to go in the place. */
12630 if (r_type == R_ARM_LDC_PC_G0
12631 || r_type == R_ARM_LDC_PC_G1
12632 || r_type == R_ARM_LDC_PC_G2)
12633 /* PC relative. */
12634 signed_value = value - pc + signed_addend;
12635 else
12636 /* Section base relative. */
12637 signed_value = value - sb + signed_addend;
12638
12639 /* Calculate the value of the relevant G_{n-1} to obtain
12640 the residual at that stage. */
12641 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12642 group - 1, &residual);
12643
12644 /* Check for overflow. (The absolute value to go in the place must be
12645 divisible by four and, after having been divided by four, must
12646 fit in eight bits.) */
12647 if ((residual & 0x3) != 0 || residual >= 0x400)
12648 {
12649 _bfd_error_handler
12650 /* xgettext:c-format */
12651 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12652 "splitting %#" PRIx64 " for group relocation %s"),
12653 input_bfd, input_section, (uint64_t) rel->r_offset,
12654 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12655 howto->name);
12656 return bfd_reloc_overflow;
12657 }
12658
12659 /* Mask out the value and U bit. */
12660 insn &= 0xff7fff00;
12661
12662 /* Set the U bit if the value to go in the place is non-negative. */
12663 if (signed_value >= 0)
12664 insn |= 1 << 23;
12665
12666 /* Encode the offset. */
12667 insn |= residual >> 2;
12668
12669 bfd_put_32 (input_bfd, insn, hit_data);
12670 }
12671 return bfd_reloc_ok;
12672
12673 case R_ARM_THM_ALU_ABS_G0_NC:
12674 case R_ARM_THM_ALU_ABS_G1_NC:
12675 case R_ARM_THM_ALU_ABS_G2_NC:
12676 case R_ARM_THM_ALU_ABS_G3_NC:
12677 {
12678 const int shift_array[4] = {0, 8, 16, 24};
12679 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12680 bfd_vma addr = value;
12681 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12682
12683 /* Compute address. */
12684 if (globals->use_rel)
12685 signed_addend = insn & 0xff;
12686 addr += signed_addend;
12687 if (branch_type == ST_BRANCH_TO_THUMB)
12688 addr |= 1;
12689 /* Clean imm8 insn. */
12690 insn &= 0xff00;
12691 /* And update with correct part of address. */
12692 insn |= (addr >> shift) & 0xff;
12693 /* Update insn. */
12694 bfd_put_16 (input_bfd, insn, hit_data);
12695 }
12696
12697 *unresolved_reloc_p = FALSE;
12698 return bfd_reloc_ok;
12699
12700 case R_ARM_GOTOFFFUNCDESC:
12701 {
12702 if (h == NULL)
12703 {
12704 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12705 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12706 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12707 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12708 bfd_vma seg = -1;
12709
12710 if (bfd_link_pic(info) && dynindx == 0)
12711 abort();
12712
12713 /* Resolve relocation. */
12714 bfd_put_32(output_bfd, (offset + sgot->output_offset)
12715 , contents + rel->r_offset);
12716 /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12717 not done yet. */
12718 arm_elf_fill_funcdesc(output_bfd, info,
12719 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12720 dynindx, offset, addr, dynreloc_value, seg);
12721 }
12722 else
12723 {
12724 int dynindx;
12725 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12726 bfd_vma addr;
12727 bfd_vma seg = -1;
12728
12729 /* For static binaries, sym_sec can be null. */
12730 if (sym_sec)
12731 {
12732 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12733 addr = dynreloc_value - sym_sec->output_section->vma;
12734 }
12735 else
12736 {
12737 dynindx = 0;
12738 addr = 0;
12739 }
12740
12741 if (bfd_link_pic(info) && dynindx == 0)
12742 abort();
12743
12744 /* This case cannot occur since funcdesc is allocated by
12745 the dynamic loader so we cannot resolve the relocation. */
12746 if (h->dynindx != -1)
12747 abort();
12748
12749 /* Resolve relocation. */
12750 bfd_put_32(output_bfd, (offset + sgot->output_offset),
12751 contents + rel->r_offset);
12752 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12753 arm_elf_fill_funcdesc(output_bfd, info,
12754 &eh->fdpic_cnts.funcdesc_offset,
12755 dynindx, offset, addr, dynreloc_value, seg);
12756 }
12757 }
12758 *unresolved_reloc_p = FALSE;
12759 return bfd_reloc_ok;
12760
12761 case R_ARM_GOTFUNCDESC:
12762 {
12763 if (h != NULL)
12764 {
12765 Elf_Internal_Rela outrel;
12766
12767 /* Resolve relocation. */
12768 bfd_put_32(output_bfd, ((eh->fdpic_cnts.gotfuncdesc_offset & ~1)
12769 + sgot->output_offset),
12770 contents + rel->r_offset);
12771 /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */
12772 if(h->dynindx == -1)
12773 {
12774 int dynindx;
12775 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12776 bfd_vma addr;
12777 bfd_vma seg = -1;
12778
12779 /* For static binaries sym_sec can be null. */
12780 if (sym_sec)
12781 {
12782 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12783 addr = dynreloc_value - sym_sec->output_section->vma;
12784 }
12785 else
12786 {
12787 dynindx = 0;
12788 addr = 0;
12789 }
12790
12791 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12792 arm_elf_fill_funcdesc(output_bfd, info,
12793 &eh->fdpic_cnts.funcdesc_offset,
12794 dynindx, offset, addr, dynreloc_value, seg);
12795 }
12796
12797 /* Add a dynamic relocation on GOT entry if not already done. */
12798 if ((eh->fdpic_cnts.gotfuncdesc_offset & 1) == 0)
12799 {
12800 if (h->dynindx == -1)
12801 {
12802 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12803 if (h->root.type == bfd_link_hash_undefweak)
12804 bfd_put_32(output_bfd, 0, sgot->contents
12805 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12806 else
12807 bfd_put_32(output_bfd, sgot->output_section->vma
12808 + sgot->output_offset
12809 + (eh->fdpic_cnts.funcdesc_offset & ~1),
12810 sgot->contents
12811 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12812 }
12813 else
12814 {
12815 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12816 }
12817 outrel.r_offset = sgot->output_section->vma
12818 + sgot->output_offset
12819 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1);
12820 outrel.r_addend = 0;
12821 if (h->dynindx == -1 && !bfd_link_pic(info))
12822 if (h->root.type == bfd_link_hash_undefweak)
12823 arm_elf_add_rofixup(output_bfd, globals->srofixup, -1);
12824 else
12825 arm_elf_add_rofixup(output_bfd, globals->srofixup,
12826 outrel.r_offset);
12827 else
12828 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12829 eh->fdpic_cnts.gotfuncdesc_offset |= 1;
12830 }
12831 }
12832 else
12833 {
12834 /* Such relocation on static function should not have been
12835 emitted by the compiler. */
12836 abort();
12837 }
12838 }
12839 *unresolved_reloc_p = FALSE;
12840 return bfd_reloc_ok;
12841
12842 case R_ARM_FUNCDESC:
12843 {
12844 if (h == NULL)
12845 {
12846 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12847 Elf_Internal_Rela outrel;
12848 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12849 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12850 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12851 bfd_vma seg = -1;
12852
12853 if (bfd_link_pic(info) && dynindx == 0)
12854 abort();
12855
12856 /* Replace static FUNCDESC relocation with a
12857 R_ARM_RELATIVE dynamic relocation or with a rofixup for
12858 executable. */
12859 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12860 outrel.r_offset = input_section->output_section->vma
12861 + input_section->output_offset + rel->r_offset;
12862 outrel.r_addend = 0;
12863 if (bfd_link_pic(info))
12864 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12865 else
12866 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12867
12868 bfd_put_32 (input_bfd, sgot->output_section->vma
12869 + sgot->output_offset + offset, hit_data);
12870
12871 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12872 arm_elf_fill_funcdesc(output_bfd, info,
12873 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12874 dynindx, offset, addr, dynreloc_value, seg);
12875 }
12876 else
12877 {
12878 if (h->dynindx == -1)
12879 {
12880 int dynindx;
12881 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12882 bfd_vma addr;
12883 bfd_vma seg = -1;
12884 Elf_Internal_Rela outrel;
12885
12886 /* For static binaries sym_sec can be null. */
12887 if (sym_sec)
12888 {
12889 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12890 addr = dynreloc_value - sym_sec->output_section->vma;
12891 }
12892 else
12893 {
12894 dynindx = 0;
12895 addr = 0;
12896 }
12897
12898 if (bfd_link_pic(info) && dynindx == 0)
12899 abort();
12900
12901 /* Replace static FUNCDESC relocation with a
12902 R_ARM_RELATIVE dynamic relocation. */
12903 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12904 outrel.r_offset = input_section->output_section->vma
12905 + input_section->output_offset + rel->r_offset;
12906 outrel.r_addend = 0;
12907 if (bfd_link_pic(info))
12908 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12909 else
12910 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12911
12912 bfd_put_32 (input_bfd, sgot->output_section->vma
12913 + sgot->output_offset + offset, hit_data);
12914
12915 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12916 arm_elf_fill_funcdesc(output_bfd, info,
12917 &eh->fdpic_cnts.funcdesc_offset,
12918 dynindx, offset, addr, dynreloc_value, seg);
12919 }
12920 else
12921 {
12922 Elf_Internal_Rela outrel;
12923
12924 /* Add a dynamic relocation. */
12925 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12926 outrel.r_offset = input_section->output_section->vma
12927 + input_section->output_offset + rel->r_offset;
12928 outrel.r_addend = 0;
12929 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12930 }
12931 }
12932 }
12933 *unresolved_reloc_p = FALSE;
12934 return bfd_reloc_ok;
12935
12936 case R_ARM_THM_BF16:
12937 {
12938 bfd_vma relocation;
12939 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12940 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12941
12942 if (globals->use_rel)
12943 {
12944 bfd_vma immA = (upper_insn & 0x001f);
12945 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12946 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12947 addend = (immA << 12);
12948 addend |= (immB << 2);
12949 addend |= (immC << 1);
12950 addend |= 1;
12951 /* Sign extend. */
12952 signed_addend = (addend & 0x10000) ? addend - (1 << 17) : addend;
12953 }
12954
12955 relocation = value + signed_addend;
12956 relocation -= (input_section->output_section->vma
12957 + input_section->output_offset
12958 + rel->r_offset);
12959
12960 /* Put RELOCATION back into the insn. */
12961 {
12962 bfd_vma immA = (relocation & 0x0001f000) >> 12;
12963 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12964 bfd_vma immC = (relocation & 0x00000002) >> 1;
12965
12966 upper_insn = (upper_insn & 0xffe0) | immA;
12967 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12968 }
12969
12970 /* Put the relocated value back in the object file: */
12971 bfd_put_16 (input_bfd, upper_insn, hit_data);
12972 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12973
12974 return bfd_reloc_ok;
12975 }
12976
12977 case R_ARM_THM_BF12:
12978 {
12979 bfd_vma relocation;
12980 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12981 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12982
12983 if (globals->use_rel)
12984 {
12985 bfd_vma immA = (upper_insn & 0x0001);
12986 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12987 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12988 addend = (immA << 12);
12989 addend |= (immB << 2);
12990 addend |= (immC << 1);
12991 addend |= 1;
12992 /* Sign extend. */
12993 addend = (addend & 0x1000) ? addend - (1 << 13) : addend;
12994 signed_addend = addend;
12995 }
12996
12997 relocation = value + signed_addend;
12998 relocation -= (input_section->output_section->vma
12999 + input_section->output_offset
13000 + rel->r_offset);
13001
13002 /* Put RELOCATION back into the insn. */
13003 {
13004 bfd_vma immA = (relocation & 0x00001000) >> 12;
13005 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
13006 bfd_vma immC = (relocation & 0x00000002) >> 1;
13007
13008 upper_insn = (upper_insn & 0xfffe) | immA;
13009 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
13010 }
13011
13012 /* Put the relocated value back in the object file: */
13013 bfd_put_16 (input_bfd, upper_insn, hit_data);
13014 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
13015
13016 return bfd_reloc_ok;
13017 }
13018
13019 case R_ARM_THM_BF18:
13020 {
13021 bfd_vma relocation;
13022 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
13023 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
13024
13025 if (globals->use_rel)
13026 {
13027 bfd_vma immA = (upper_insn & 0x007f);
13028 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
13029 bfd_vma immC = (lower_insn & 0x0800) >> 11;
13030 addend = (immA << 12);
13031 addend |= (immB << 2);
13032 addend |= (immC << 1);
13033 addend |= 1;
13034 /* Sign extend. */
13035 addend = (addend & 0x40000) ? addend - (1 << 19) : addend;
13036 signed_addend = addend;
13037 }
13038
13039 relocation = value + signed_addend;
13040 relocation -= (input_section->output_section->vma
13041 + input_section->output_offset
13042 + rel->r_offset);
13043
13044 /* Put RELOCATION back into the insn. */
13045 {
13046 bfd_vma immA = (relocation & 0x0007f000) >> 12;
13047 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
13048 bfd_vma immC = (relocation & 0x00000002) >> 1;
13049
13050 upper_insn = (upper_insn & 0xff80) | immA;
13051 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
13052 }
13053
13054 /* Put the relocated value back in the object file: */
13055 bfd_put_16 (input_bfd, upper_insn, hit_data);
13056 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
13057
13058 return bfd_reloc_ok;
13059 }
13060
13061 default:
13062 return bfd_reloc_notsupported;
13063 }
13064 }
13065
13066 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
13067 static void
13068 arm_add_to_rel (bfd * abfd,
13069 bfd_byte * address,
13070 reloc_howto_type * howto,
13071 bfd_signed_vma increment)
13072 {
13073 bfd_signed_vma addend;
13074
13075 if (howto->type == R_ARM_THM_CALL
13076 || howto->type == R_ARM_THM_JUMP24)
13077 {
13078 int upper_insn, lower_insn;
13079 int upper, lower;
13080
13081 upper_insn = bfd_get_16 (abfd, address);
13082 lower_insn = bfd_get_16 (abfd, address + 2);
13083 upper = upper_insn & 0x7ff;
13084 lower = lower_insn & 0x7ff;
13085
13086 addend = (upper << 12) | (lower << 1);
13087 addend += increment;
13088 addend >>= 1;
13089
13090 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
13091 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
13092
13093 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
13094 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
13095 }
13096 else
13097 {
13098 bfd_vma contents;
13099
13100 contents = bfd_get_32 (abfd, address);
13101
13102 /* Get the (signed) value from the instruction. */
13103 addend = contents & howto->src_mask;
13104 if (addend & ((howto->src_mask + 1) >> 1))
13105 {
13106 bfd_signed_vma mask;
13107
13108 mask = -1;
13109 mask &= ~ howto->src_mask;
13110 addend |= mask;
13111 }
13112
13113 /* Add in the increment, (which is a byte value). */
13114 switch (howto->type)
13115 {
13116 default:
13117 addend += increment;
13118 break;
13119
13120 case R_ARM_PC24:
13121 case R_ARM_PLT32:
13122 case R_ARM_CALL:
13123 case R_ARM_JUMP24:
13124 addend <<= howto->size;
13125 addend += increment;
13126
13127 /* Should we check for overflow here ? */
13128
13129 /* Drop any undesired bits. */
13130 addend >>= howto->rightshift;
13131 break;
13132 }
13133
13134 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
13135
13136 bfd_put_32 (abfd, contents, address);
13137 }
13138 }
13139
13140 #define IS_ARM_TLS_RELOC(R_TYPE) \
13141 ((R_TYPE) == R_ARM_TLS_GD32 \
13142 || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \
13143 || (R_TYPE) == R_ARM_TLS_LDO32 \
13144 || (R_TYPE) == R_ARM_TLS_LDM32 \
13145 || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \
13146 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
13147 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
13148 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
13149 || (R_TYPE) == R_ARM_TLS_LE32 \
13150 || (R_TYPE) == R_ARM_TLS_IE32 \
13151 || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \
13152 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
13153
13154 /* Specific set of relocations for the gnu tls dialect. */
13155 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
13156 ((R_TYPE) == R_ARM_TLS_GOTDESC \
13157 || (R_TYPE) == R_ARM_TLS_CALL \
13158 || (R_TYPE) == R_ARM_THM_TLS_CALL \
13159 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
13160 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
13161
13162 /* Relocate an ARM ELF section. */
13163
13164 static bfd_boolean
13165 elf32_arm_relocate_section (bfd * output_bfd,
13166 struct bfd_link_info * info,
13167 bfd * input_bfd,
13168 asection * input_section,
13169 bfd_byte * contents,
13170 Elf_Internal_Rela * relocs,
13171 Elf_Internal_Sym * local_syms,
13172 asection ** local_sections)
13173 {
13174 Elf_Internal_Shdr *symtab_hdr;
13175 struct elf_link_hash_entry **sym_hashes;
13176 Elf_Internal_Rela *rel;
13177 Elf_Internal_Rela *relend;
13178 const char *name;
13179 struct elf32_arm_link_hash_table * globals;
13180
13181 globals = elf32_arm_hash_table (info);
13182 if (globals == NULL)
13183 return FALSE;
13184
13185 symtab_hdr = & elf_symtab_hdr (input_bfd);
13186 sym_hashes = elf_sym_hashes (input_bfd);
13187
13188 rel = relocs;
13189 relend = relocs + input_section->reloc_count;
13190 for (; rel < relend; rel++)
13191 {
13192 int r_type;
13193 reloc_howto_type * howto;
13194 unsigned long r_symndx;
13195 Elf_Internal_Sym * sym;
13196 asection * sec;
13197 struct elf_link_hash_entry * h;
13198 bfd_vma relocation;
13199 bfd_reloc_status_type r;
13200 arelent bfd_reloc;
13201 char sym_type;
13202 bfd_boolean unresolved_reloc = FALSE;
13203 char *error_message = NULL;
13204
13205 r_symndx = ELF32_R_SYM (rel->r_info);
13206 r_type = ELF32_R_TYPE (rel->r_info);
13207 r_type = arm_real_reloc_type (globals, r_type);
13208
13209 if ( r_type == R_ARM_GNU_VTENTRY
13210 || r_type == R_ARM_GNU_VTINHERIT)
13211 continue;
13212
13213 howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
13214
13215 if (howto == NULL)
13216 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
13217
13218 h = NULL;
13219 sym = NULL;
13220 sec = NULL;
13221
13222 if (r_symndx < symtab_hdr->sh_info)
13223 {
13224 sym = local_syms + r_symndx;
13225 sym_type = ELF32_ST_TYPE (sym->st_info);
13226 sec = local_sections[r_symndx];
13227
13228 /* An object file might have a reference to a local
13229 undefined symbol. This is a daft object file, but we
13230 should at least do something about it. V4BX & NONE
13231 relocations do not use the symbol and are explicitly
13232 allowed to use the undefined symbol, so allow those.
13233 Likewise for relocations against STN_UNDEF. */
13234 if (r_type != R_ARM_V4BX
13235 && r_type != R_ARM_NONE
13236 && r_symndx != STN_UNDEF
13237 && bfd_is_und_section (sec)
13238 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
13239 (*info->callbacks->undefined_symbol)
13240 (info, bfd_elf_string_from_elf_section
13241 (input_bfd, symtab_hdr->sh_link, sym->st_name),
13242 input_bfd, input_section,
13243 rel->r_offset, TRUE);
13244
13245 if (globals->use_rel)
13246 {
13247 relocation = (sec->output_section->vma
13248 + sec->output_offset
13249 + sym->st_value);
13250 if (!bfd_link_relocatable (info)
13251 && (sec->flags & SEC_MERGE)
13252 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13253 {
13254 asection *msec;
13255 bfd_vma addend, value;
13256
13257 switch (r_type)
13258 {
13259 case R_ARM_MOVW_ABS_NC:
13260 case R_ARM_MOVT_ABS:
13261 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13262 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
13263 addend = (addend ^ 0x8000) - 0x8000;
13264 break;
13265
13266 case R_ARM_THM_MOVW_ABS_NC:
13267 case R_ARM_THM_MOVT_ABS:
13268 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
13269 << 16;
13270 value |= bfd_get_16 (input_bfd,
13271 contents + rel->r_offset + 2);
13272 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
13273 | ((value & 0x04000000) >> 15);
13274 addend = (addend ^ 0x8000) - 0x8000;
13275 break;
13276
13277 default:
13278 if (howto->rightshift
13279 || (howto->src_mask & (howto->src_mask + 1)))
13280 {
13281 _bfd_error_handler
13282 /* xgettext:c-format */
13283 (_("%pB(%pA+%#" PRIx64 "): "
13284 "%s relocation against SEC_MERGE section"),
13285 input_bfd, input_section,
13286 (uint64_t) rel->r_offset, howto->name);
13287 return FALSE;
13288 }
13289
13290 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13291
13292 /* Get the (signed) value from the instruction. */
13293 addend = value & howto->src_mask;
13294 if (addend & ((howto->src_mask + 1) >> 1))
13295 {
13296 bfd_signed_vma mask;
13297
13298 mask = -1;
13299 mask &= ~ howto->src_mask;
13300 addend |= mask;
13301 }
13302 break;
13303 }
13304
13305 msec = sec;
13306 addend =
13307 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
13308 - relocation;
13309 addend += msec->output_section->vma + msec->output_offset;
13310
13311 /* Cases here must match those in the preceding
13312 switch statement. */
13313 switch (r_type)
13314 {
13315 case R_ARM_MOVW_ABS_NC:
13316 case R_ARM_MOVT_ABS:
13317 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
13318 | (addend & 0xfff);
13319 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13320 break;
13321
13322 case R_ARM_THM_MOVW_ABS_NC:
13323 case R_ARM_THM_MOVT_ABS:
13324 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
13325 | (addend & 0xff) | ((addend & 0x0800) << 15);
13326 bfd_put_16 (input_bfd, value >> 16,
13327 contents + rel->r_offset);
13328 bfd_put_16 (input_bfd, value,
13329 contents + rel->r_offset + 2);
13330 break;
13331
13332 default:
13333 value = (value & ~ howto->dst_mask)
13334 | (addend & howto->dst_mask);
13335 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13336 break;
13337 }
13338 }
13339 }
13340 else
13341 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
13342 }
13343 else
13344 {
13345 bfd_boolean warned, ignored;
13346
13347 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
13348 r_symndx, symtab_hdr, sym_hashes,
13349 h, sec, relocation,
13350 unresolved_reloc, warned, ignored);
13351
13352 sym_type = h->type;
13353 }
13354
13355 if (sec != NULL && discarded_section (sec))
13356 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
13357 rel, 1, relend, howto, 0, contents);
13358
13359 if (bfd_link_relocatable (info))
13360 {
13361 /* This is a relocatable link. We don't have to change
13362 anything, unless the reloc is against a section symbol,
13363 in which case we have to adjust according to where the
13364 section symbol winds up in the output section. */
13365 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13366 {
13367 if (globals->use_rel)
13368 arm_add_to_rel (input_bfd, contents + rel->r_offset,
13369 howto, (bfd_signed_vma) sec->output_offset);
13370 else
13371 rel->r_addend += sec->output_offset;
13372 }
13373 continue;
13374 }
13375
13376 if (h != NULL)
13377 name = h->root.root.string;
13378 else
13379 {
13380 name = (bfd_elf_string_from_elf_section
13381 (input_bfd, symtab_hdr->sh_link, sym->st_name));
13382 if (name == NULL || *name == '\0')
13383 name = bfd_section_name (sec);
13384 }
13385
13386 if (r_symndx != STN_UNDEF
13387 && r_type != R_ARM_NONE
13388 && (h == NULL
13389 || h->root.type == bfd_link_hash_defined
13390 || h->root.type == bfd_link_hash_defweak)
13391 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
13392 {
13393 _bfd_error_handler
13394 ((sym_type == STT_TLS
13395 /* xgettext:c-format */
13396 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
13397 /* xgettext:c-format */
13398 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
13399 input_bfd,
13400 input_section,
13401 (uint64_t) rel->r_offset,
13402 howto->name,
13403 name);
13404 }
13405
13406 /* We call elf32_arm_final_link_relocate unless we're completely
13407 done, i.e., the relaxation produced the final output we want,
13408 and we won't let anybody mess with it. Also, we have to do
13409 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
13410 both in relaxed and non-relaxed cases. */
13411 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
13412 || (IS_ARM_TLS_GNU_RELOC (r_type)
13413 && !((h ? elf32_arm_hash_entry (h)->tls_type :
13414 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
13415 & GOT_TLS_GDESC)))
13416 {
13417 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
13418 contents, rel, h == NULL);
13419 /* This may have been marked unresolved because it came from
13420 a shared library. But we've just dealt with that. */
13421 unresolved_reloc = 0;
13422 }
13423 else
13424 r = bfd_reloc_continue;
13425
13426 if (r == bfd_reloc_continue)
13427 {
13428 unsigned char branch_type =
13429 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
13430 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
13431
13432 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
13433 input_section, contents, rel,
13434 relocation, info, sec, name,
13435 sym_type, branch_type, h,
13436 &unresolved_reloc,
13437 &error_message);
13438 }
13439
13440 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13441 because such sections are not SEC_ALLOC and thus ld.so will
13442 not process them. */
13443 if (unresolved_reloc
13444 && !((input_section->flags & SEC_DEBUGGING) != 0
13445 && h->def_dynamic)
13446 && _bfd_elf_section_offset (output_bfd, info, input_section,
13447 rel->r_offset) != (bfd_vma) -1)
13448 {
13449 _bfd_error_handler
13450 /* xgettext:c-format */
13451 (_("%pB(%pA+%#" PRIx64 "): "
13452 "unresolvable %s relocation against symbol `%s'"),
13453 input_bfd,
13454 input_section,
13455 (uint64_t) rel->r_offset,
13456 howto->name,
13457 h->root.root.string);
13458 return FALSE;
13459 }
13460
13461 if (r != bfd_reloc_ok)
13462 {
13463 switch (r)
13464 {
13465 case bfd_reloc_overflow:
13466 /* If the overflowing reloc was to an undefined symbol,
13467 we have already printed one error message and there
13468 is no point complaining again. */
13469 if (!h || h->root.type != bfd_link_hash_undefined)
13470 (*info->callbacks->reloc_overflow)
13471 (info, (h ? &h->root : NULL), name, howto->name,
13472 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
13473 break;
13474
13475 case bfd_reloc_undefined:
13476 (*info->callbacks->undefined_symbol)
13477 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
13478 break;
13479
13480 case bfd_reloc_outofrange:
13481 error_message = _("out of range");
13482 goto common_error;
13483
13484 case bfd_reloc_notsupported:
13485 error_message = _("unsupported relocation");
13486 goto common_error;
13487
13488 case bfd_reloc_dangerous:
13489 /* error_message should already be set. */
13490 goto common_error;
13491
13492 default:
13493 error_message = _("unknown error");
13494 /* Fall through. */
13495
13496 common_error:
13497 BFD_ASSERT (error_message != NULL);
13498 (*info->callbacks->reloc_dangerous)
13499 (info, error_message, input_bfd, input_section, rel->r_offset);
13500 break;
13501 }
13502 }
13503 }
13504
13505 return TRUE;
13506 }
13507
13508 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
13509 adds the edit to the start of the list. (The list must be built in order of
13510 ascending TINDEX: the function's callers are primarily responsible for
13511 maintaining that condition). */
13512
13513 static void
13514 add_unwind_table_edit (arm_unwind_table_edit **head,
13515 arm_unwind_table_edit **tail,
13516 arm_unwind_edit_type type,
13517 asection *linked_section,
13518 unsigned int tindex)
13519 {
13520 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
13521 xmalloc (sizeof (arm_unwind_table_edit));
13522
13523 new_edit->type = type;
13524 new_edit->linked_section = linked_section;
13525 new_edit->index = tindex;
13526
13527 if (tindex > 0)
13528 {
13529 new_edit->next = NULL;
13530
13531 if (*tail)
13532 (*tail)->next = new_edit;
13533
13534 (*tail) = new_edit;
13535
13536 if (!*head)
13537 (*head) = new_edit;
13538 }
13539 else
13540 {
13541 new_edit->next = *head;
13542
13543 if (!*tail)
13544 *tail = new_edit;
13545
13546 *head = new_edit;
13547 }
13548 }
13549
13550 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
13551
13552 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
13553 static void
13554 adjust_exidx_size(asection *exidx_sec, int adjust)
13555 {
13556 asection *out_sec;
13557
13558 if (!exidx_sec->rawsize)
13559 exidx_sec->rawsize = exidx_sec->size;
13560
13561 bfd_set_section_size (exidx_sec, exidx_sec->size + adjust);
13562 out_sec = exidx_sec->output_section;
13563 /* Adjust size of output section. */
13564 bfd_set_section_size (out_sec, out_sec->size +adjust);
13565 }
13566
13567 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
13568 static void
13569 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
13570 {
13571 struct _arm_elf_section_data *exidx_arm_data;
13572
13573 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13574 add_unwind_table_edit (
13575 &exidx_arm_data->u.exidx.unwind_edit_list,
13576 &exidx_arm_data->u.exidx.unwind_edit_tail,
13577 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
13578
13579 exidx_arm_data->additional_reloc_count++;
13580
13581 adjust_exidx_size(exidx_sec, 8);
13582 }
13583
13584 /* Scan .ARM.exidx tables, and create a list describing edits which should be
13585 made to those tables, such that:
13586
13587 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13588 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13589 codes which have been inlined into the index).
13590
13591 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13592
13593 The edits are applied when the tables are written
13594 (in elf32_arm_write_section). */
13595
13596 bfd_boolean
13597 elf32_arm_fix_exidx_coverage (asection **text_section_order,
13598 unsigned int num_text_sections,
13599 struct bfd_link_info *info,
13600 bfd_boolean merge_exidx_entries)
13601 {
13602 bfd *inp;
13603 unsigned int last_second_word = 0, i;
13604 asection *last_exidx_sec = NULL;
13605 asection *last_text_sec = NULL;
13606 int last_unwind_type = -1;
13607
13608 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13609 text sections. */
13610 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
13611 {
13612 asection *sec;
13613
13614 for (sec = inp->sections; sec != NULL; sec = sec->next)
13615 {
13616 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
13617 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
13618
13619 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
13620 continue;
13621
13622 if (elf_sec->linked_to)
13623 {
13624 Elf_Internal_Shdr *linked_hdr
13625 = &elf_section_data (elf_sec->linked_to)->this_hdr;
13626 struct _arm_elf_section_data *linked_sec_arm_data
13627 = get_arm_elf_section_data (linked_hdr->bfd_section);
13628
13629 if (linked_sec_arm_data == NULL)
13630 continue;
13631
13632 /* Link this .ARM.exidx section back from the text section it
13633 describes. */
13634 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
13635 }
13636 }
13637 }
13638
13639 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
13640 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13641 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
13642
13643 for (i = 0; i < num_text_sections; i++)
13644 {
13645 asection *sec = text_section_order[i];
13646 asection *exidx_sec;
13647 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
13648 struct _arm_elf_section_data *exidx_arm_data;
13649 bfd_byte *contents = NULL;
13650 int deleted_exidx_bytes = 0;
13651 bfd_vma j;
13652 arm_unwind_table_edit *unwind_edit_head = NULL;
13653 arm_unwind_table_edit *unwind_edit_tail = NULL;
13654 Elf_Internal_Shdr *hdr;
13655 bfd *ibfd;
13656
13657 if (arm_data == NULL)
13658 continue;
13659
13660 exidx_sec = arm_data->u.text.arm_exidx_sec;
13661 if (exidx_sec == NULL)
13662 {
13663 /* Section has no unwind data. */
13664 if (last_unwind_type == 0 || !last_exidx_sec)
13665 continue;
13666
13667 /* Ignore zero sized sections. */
13668 if (sec->size == 0)
13669 continue;
13670
13671 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13672 last_unwind_type = 0;
13673 continue;
13674 }
13675
13676 /* Skip /DISCARD/ sections. */
13677 if (bfd_is_abs_section (exidx_sec->output_section))
13678 continue;
13679
13680 hdr = &elf_section_data (exidx_sec)->this_hdr;
13681 if (hdr->sh_type != SHT_ARM_EXIDX)
13682 continue;
13683
13684 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13685 if (exidx_arm_data == NULL)
13686 continue;
13687
13688 ibfd = exidx_sec->owner;
13689
13690 if (hdr->contents != NULL)
13691 contents = hdr->contents;
13692 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
13693 /* An error? */
13694 continue;
13695
13696 if (last_unwind_type > 0)
13697 {
13698 unsigned int first_word = bfd_get_32 (ibfd, contents);
13699 /* Add cantunwind if first unwind item does not match section
13700 start. */
13701 if (first_word != sec->vma)
13702 {
13703 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13704 last_unwind_type = 0;
13705 }
13706 }
13707
13708 for (j = 0; j < hdr->sh_size; j += 8)
13709 {
13710 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
13711 int unwind_type;
13712 int elide = 0;
13713
13714 /* An EXIDX_CANTUNWIND entry. */
13715 if (second_word == 1)
13716 {
13717 if (last_unwind_type == 0)
13718 elide = 1;
13719 unwind_type = 0;
13720 }
13721 /* Inlined unwinding data. Merge if equal to previous. */
13722 else if ((second_word & 0x80000000) != 0)
13723 {
13724 if (merge_exidx_entries
13725 && last_second_word == second_word && last_unwind_type == 1)
13726 elide = 1;
13727 unwind_type = 1;
13728 last_second_word = second_word;
13729 }
13730 /* Normal table entry. In theory we could merge these too,
13731 but duplicate entries are likely to be much less common. */
13732 else
13733 unwind_type = 2;
13734
13735 if (elide && !bfd_link_relocatable (info))
13736 {
13737 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
13738 DELETE_EXIDX_ENTRY, NULL, j / 8);
13739
13740 deleted_exidx_bytes += 8;
13741 }
13742
13743 last_unwind_type = unwind_type;
13744 }
13745
13746 /* Free contents if we allocated it ourselves. */
13747 if (contents != hdr->contents)
13748 free (contents);
13749
13750 /* Record edits to be applied later (in elf32_arm_write_section). */
13751 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
13752 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
13753
13754 if (deleted_exidx_bytes > 0)
13755 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
13756
13757 last_exidx_sec = exidx_sec;
13758 last_text_sec = sec;
13759 }
13760
13761 /* Add terminating CANTUNWIND entry. */
13762 if (!bfd_link_relocatable (info) && last_exidx_sec
13763 && last_unwind_type != 0)
13764 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13765
13766 return TRUE;
13767 }
13768
13769 static bfd_boolean
13770 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
13771 bfd *ibfd, const char *name)
13772 {
13773 asection *sec, *osec;
13774
13775 sec = bfd_get_linker_section (ibfd, name);
13776 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
13777 return TRUE;
13778
13779 osec = sec->output_section;
13780 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
13781 return TRUE;
13782
13783 if (! bfd_set_section_contents (obfd, osec, sec->contents,
13784 sec->output_offset, sec->size))
13785 return FALSE;
13786
13787 return TRUE;
13788 }
13789
13790 static bfd_boolean
13791 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
13792 {
13793 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
13794 asection *sec, *osec;
13795
13796 if (globals == NULL)
13797 return FALSE;
13798
13799 /* Invoke the regular ELF backend linker to do all the work. */
13800 if (!bfd_elf_final_link (abfd, info))
13801 return FALSE;
13802
13803 /* Process stub sections (eg BE8 encoding, ...). */
13804 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
13805 unsigned int i;
13806 for (i=0; i<htab->top_id; i++)
13807 {
13808 sec = htab->stub_group[i].stub_sec;
13809 /* Only process it once, in its link_sec slot. */
13810 if (sec && i == htab->stub_group[i].link_sec->id)
13811 {
13812 osec = sec->output_section;
13813 elf32_arm_write_section (abfd, info, sec, sec->contents);
13814 if (! bfd_set_section_contents (abfd, osec, sec->contents,
13815 sec->output_offset, sec->size))
13816 return FALSE;
13817 }
13818 }
13819
13820 /* Write out any glue sections now that we have created all the
13821 stubs. */
13822 if (globals->bfd_of_glue_owner != NULL)
13823 {
13824 if (! elf32_arm_output_glue_section (info, abfd,
13825 globals->bfd_of_glue_owner,
13826 ARM2THUMB_GLUE_SECTION_NAME))
13827 return FALSE;
13828
13829 if (! elf32_arm_output_glue_section (info, abfd,
13830 globals->bfd_of_glue_owner,
13831 THUMB2ARM_GLUE_SECTION_NAME))
13832 return FALSE;
13833
13834 if (! elf32_arm_output_glue_section (info, abfd,
13835 globals->bfd_of_glue_owner,
13836 VFP11_ERRATUM_VENEER_SECTION_NAME))
13837 return FALSE;
13838
13839 if (! elf32_arm_output_glue_section (info, abfd,
13840 globals->bfd_of_glue_owner,
13841 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
13842 return FALSE;
13843
13844 if (! elf32_arm_output_glue_section (info, abfd,
13845 globals->bfd_of_glue_owner,
13846 ARM_BX_GLUE_SECTION_NAME))
13847 return FALSE;
13848 }
13849
13850 return TRUE;
13851 }
13852
13853 /* Return a best guess for the machine number based on the attributes. */
13854
13855 static unsigned int
13856 bfd_arm_get_mach_from_attributes (bfd * abfd)
13857 {
13858 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
13859
13860 switch (arch)
13861 {
13862 case TAG_CPU_ARCH_PRE_V4: return bfd_mach_arm_3M;
13863 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
13864 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
13865 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
13866
13867 case TAG_CPU_ARCH_V5TE:
13868 {
13869 char * name;
13870
13871 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
13872 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
13873
13874 if (name)
13875 {
13876 if (strcmp (name, "IWMMXT2") == 0)
13877 return bfd_mach_arm_iWMMXt2;
13878
13879 if (strcmp (name, "IWMMXT") == 0)
13880 return bfd_mach_arm_iWMMXt;
13881
13882 if (strcmp (name, "XSCALE") == 0)
13883 {
13884 int wmmx;
13885
13886 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
13887 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
13888 switch (wmmx)
13889 {
13890 case 1: return bfd_mach_arm_iWMMXt;
13891 case 2: return bfd_mach_arm_iWMMXt2;
13892 default: return bfd_mach_arm_XScale;
13893 }
13894 }
13895 }
13896
13897 return bfd_mach_arm_5TE;
13898 }
13899
13900 case TAG_CPU_ARCH_V5TEJ:
13901 return bfd_mach_arm_5TEJ;
13902 case TAG_CPU_ARCH_V6:
13903 return bfd_mach_arm_6;
13904 case TAG_CPU_ARCH_V6KZ:
13905 return bfd_mach_arm_6KZ;
13906 case TAG_CPU_ARCH_V6T2:
13907 return bfd_mach_arm_6T2;
13908 case TAG_CPU_ARCH_V6K:
13909 return bfd_mach_arm_6K;
13910 case TAG_CPU_ARCH_V7:
13911 return bfd_mach_arm_7;
13912 case TAG_CPU_ARCH_V6_M:
13913 return bfd_mach_arm_6M;
13914 case TAG_CPU_ARCH_V6S_M:
13915 return bfd_mach_arm_6SM;
13916 case TAG_CPU_ARCH_V7E_M:
13917 return bfd_mach_arm_7EM;
13918 case TAG_CPU_ARCH_V8:
13919 return bfd_mach_arm_8;
13920 case TAG_CPU_ARCH_V8R:
13921 return bfd_mach_arm_8R;
13922 case TAG_CPU_ARCH_V8M_BASE:
13923 return bfd_mach_arm_8M_BASE;
13924 case TAG_CPU_ARCH_V8M_MAIN:
13925 return bfd_mach_arm_8M_MAIN;
13926 case TAG_CPU_ARCH_V8_1M_MAIN:
13927 return bfd_mach_arm_8_1M_MAIN;
13928
13929 default:
13930 /* Force entry to be added for any new known Tag_CPU_arch value. */
13931 BFD_ASSERT (arch > MAX_TAG_CPU_ARCH);
13932
13933 /* Unknown Tag_CPU_arch value. */
13934 return bfd_mach_arm_unknown;
13935 }
13936 }
13937
13938 /* Set the right machine number. */
13939
13940 static bfd_boolean
13941 elf32_arm_object_p (bfd *abfd)
13942 {
13943 unsigned int mach;
13944
13945 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
13946
13947 if (mach == bfd_mach_arm_unknown)
13948 {
13949 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13950 mach = bfd_mach_arm_ep9312;
13951 else
13952 mach = bfd_arm_get_mach_from_attributes (abfd);
13953 }
13954
13955 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13956 return TRUE;
13957 }
13958
13959 /* Function to keep ARM specific flags in the ELF header. */
13960
13961 static bfd_boolean
13962 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13963 {
13964 if (elf_flags_init (abfd)
13965 && elf_elfheader (abfd)->e_flags != flags)
13966 {
13967 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13968 {
13969 if (flags & EF_ARM_INTERWORK)
13970 _bfd_error_handler
13971 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13972 abfd);
13973 else
13974 _bfd_error_handler
13975 (_("warning: clearing the interworking flag of %pB due to outside request"),
13976 abfd);
13977 }
13978 }
13979 else
13980 {
13981 elf_elfheader (abfd)->e_flags = flags;
13982 elf_flags_init (abfd) = TRUE;
13983 }
13984
13985 return TRUE;
13986 }
13987
13988 /* Copy backend specific data from one object module to another. */
13989
13990 static bfd_boolean
13991 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13992 {
13993 flagword in_flags;
13994 flagword out_flags;
13995
13996 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13997 return TRUE;
13998
13999 in_flags = elf_elfheader (ibfd)->e_flags;
14000 out_flags = elf_elfheader (obfd)->e_flags;
14001
14002 if (elf_flags_init (obfd)
14003 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
14004 && in_flags != out_flags)
14005 {
14006 /* Cannot mix APCS26 and APCS32 code. */
14007 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
14008 return FALSE;
14009
14010 /* Cannot mix float APCS and non-float APCS code. */
14011 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
14012 return FALSE;
14013
14014 /* If the src and dest have different interworking flags
14015 then turn off the interworking bit. */
14016 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
14017 {
14018 if (out_flags & EF_ARM_INTERWORK)
14019 _bfd_error_handler
14020 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
14021 obfd, ibfd);
14022
14023 in_flags &= ~EF_ARM_INTERWORK;
14024 }
14025
14026 /* Likewise for PIC, though don't warn for this case. */
14027 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
14028 in_flags &= ~EF_ARM_PIC;
14029 }
14030
14031 elf_elfheader (obfd)->e_flags = in_flags;
14032 elf_flags_init (obfd) = TRUE;
14033
14034 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
14035 }
14036
14037 /* Values for Tag_ABI_PCS_R9_use. */
14038 enum
14039 {
14040 AEABI_R9_V6,
14041 AEABI_R9_SB,
14042 AEABI_R9_TLS,
14043 AEABI_R9_unused
14044 };
14045
14046 /* Values for Tag_ABI_PCS_RW_data. */
14047 enum
14048 {
14049 AEABI_PCS_RW_data_absolute,
14050 AEABI_PCS_RW_data_PCrel,
14051 AEABI_PCS_RW_data_SBrel,
14052 AEABI_PCS_RW_data_unused
14053 };
14054
14055 /* Values for Tag_ABI_enum_size. */
14056 enum
14057 {
14058 AEABI_enum_unused,
14059 AEABI_enum_short,
14060 AEABI_enum_wide,
14061 AEABI_enum_forced_wide
14062 };
14063
14064 /* Determine whether an object attribute tag takes an integer, a
14065 string or both. */
14066
14067 static int
14068 elf32_arm_obj_attrs_arg_type (int tag)
14069 {
14070 if (tag == Tag_compatibility)
14071 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
14072 else if (tag == Tag_nodefaults)
14073 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
14074 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
14075 return ATTR_TYPE_FLAG_STR_VAL;
14076 else if (tag < 32)
14077 return ATTR_TYPE_FLAG_INT_VAL;
14078 else
14079 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
14080 }
14081
14082 /* The ABI defines that Tag_conformance should be emitted first, and that
14083 Tag_nodefaults should be second (if either is defined). This sets those
14084 two positions, and bumps up the position of all the remaining tags to
14085 compensate. */
14086 static int
14087 elf32_arm_obj_attrs_order (int num)
14088 {
14089 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
14090 return Tag_conformance;
14091 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
14092 return Tag_nodefaults;
14093 if ((num - 2) < Tag_nodefaults)
14094 return num - 2;
14095 if ((num - 1) < Tag_conformance)
14096 return num - 1;
14097 return num;
14098 }
14099
14100 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
14101 static bfd_boolean
14102 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
14103 {
14104 if ((tag & 127) < 64)
14105 {
14106 _bfd_error_handler
14107 (_("%pB: unknown mandatory EABI object attribute %d"),
14108 abfd, tag);
14109 bfd_set_error (bfd_error_bad_value);
14110 return FALSE;
14111 }
14112 else
14113 {
14114 _bfd_error_handler
14115 (_("warning: %pB: unknown EABI object attribute %d"),
14116 abfd, tag);
14117 return TRUE;
14118 }
14119 }
14120
14121 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
14122 Returns -1 if no architecture could be read. */
14123
14124 static int
14125 get_secondary_compatible_arch (bfd *abfd)
14126 {
14127 obj_attribute *attr =
14128 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
14129
14130 /* Note: the tag and its argument below are uleb128 values, though
14131 currently-defined values fit in one byte for each. */
14132 if (attr->s
14133 && attr->s[0] == Tag_CPU_arch
14134 && (attr->s[1] & 128) != 128
14135 && attr->s[2] == 0)
14136 return attr->s[1];
14137
14138 /* This tag is "safely ignorable", so don't complain if it looks funny. */
14139 return -1;
14140 }
14141
14142 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
14143 The tag is removed if ARCH is -1. */
14144
14145 static void
14146 set_secondary_compatible_arch (bfd *abfd, int arch)
14147 {
14148 obj_attribute *attr =
14149 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
14150
14151 if (arch == -1)
14152 {
14153 attr->s = NULL;
14154 return;
14155 }
14156
14157 /* Note: the tag and its argument below are uleb128 values, though
14158 currently-defined values fit in one byte for each. */
14159 if (!attr->s)
14160 attr->s = (char *) bfd_alloc (abfd, 3);
14161 attr->s[0] = Tag_CPU_arch;
14162 attr->s[1] = arch;
14163 attr->s[2] = '\0';
14164 }
14165
14166 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
14167 into account. */
14168
14169 static int
14170 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
14171 int newtag, int secondary_compat)
14172 {
14173 #define T(X) TAG_CPU_ARCH_##X
14174 int tagl, tagh, result;
14175 const int v6t2[] =
14176 {
14177 T(V6T2), /* PRE_V4. */
14178 T(V6T2), /* V4. */
14179 T(V6T2), /* V4T. */
14180 T(V6T2), /* V5T. */
14181 T(V6T2), /* V5TE. */
14182 T(V6T2), /* V5TEJ. */
14183 T(V6T2), /* V6. */
14184 T(V7), /* V6KZ. */
14185 T(V6T2) /* V6T2. */
14186 };
14187 const int v6k[] =
14188 {
14189 T(V6K), /* PRE_V4. */
14190 T(V6K), /* V4. */
14191 T(V6K), /* V4T. */
14192 T(V6K), /* V5T. */
14193 T(V6K), /* V5TE. */
14194 T(V6K), /* V5TEJ. */
14195 T(V6K), /* V6. */
14196 T(V6KZ), /* V6KZ. */
14197 T(V7), /* V6T2. */
14198 T(V6K) /* V6K. */
14199 };
14200 const int v7[] =
14201 {
14202 T(V7), /* PRE_V4. */
14203 T(V7), /* V4. */
14204 T(V7), /* V4T. */
14205 T(V7), /* V5T. */
14206 T(V7), /* V5TE. */
14207 T(V7), /* V5TEJ. */
14208 T(V7), /* V6. */
14209 T(V7), /* V6KZ. */
14210 T(V7), /* V6T2. */
14211 T(V7), /* V6K. */
14212 T(V7) /* V7. */
14213 };
14214 const int v6_m[] =
14215 {
14216 -1, /* PRE_V4. */
14217 -1, /* V4. */
14218 T(V6K), /* V4T. */
14219 T(V6K), /* V5T. */
14220 T(V6K), /* V5TE. */
14221 T(V6K), /* V5TEJ. */
14222 T(V6K), /* V6. */
14223 T(V6KZ), /* V6KZ. */
14224 T(V7), /* V6T2. */
14225 T(V6K), /* V6K. */
14226 T(V7), /* V7. */
14227 T(V6_M) /* V6_M. */
14228 };
14229 const int v6s_m[] =
14230 {
14231 -1, /* PRE_V4. */
14232 -1, /* V4. */
14233 T(V6K), /* V4T. */
14234 T(V6K), /* V5T. */
14235 T(V6K), /* V5TE. */
14236 T(V6K), /* V5TEJ. */
14237 T(V6K), /* V6. */
14238 T(V6KZ), /* V6KZ. */
14239 T(V7), /* V6T2. */
14240 T(V6K), /* V6K. */
14241 T(V7), /* V7. */
14242 T(V6S_M), /* V6_M. */
14243 T(V6S_M) /* V6S_M. */
14244 };
14245 const int v7e_m[] =
14246 {
14247 -1, /* PRE_V4. */
14248 -1, /* V4. */
14249 T(V7E_M), /* V4T. */
14250 T(V7E_M), /* V5T. */
14251 T(V7E_M), /* V5TE. */
14252 T(V7E_M), /* V5TEJ. */
14253 T(V7E_M), /* V6. */
14254 T(V7E_M), /* V6KZ. */
14255 T(V7E_M), /* V6T2. */
14256 T(V7E_M), /* V6K. */
14257 T(V7E_M), /* V7. */
14258 T(V7E_M), /* V6_M. */
14259 T(V7E_M), /* V6S_M. */
14260 T(V7E_M) /* V7E_M. */
14261 };
14262 const int v8[] =
14263 {
14264 T(V8), /* PRE_V4. */
14265 T(V8), /* V4. */
14266 T(V8), /* V4T. */
14267 T(V8), /* V5T. */
14268 T(V8), /* V5TE. */
14269 T(V8), /* V5TEJ. */
14270 T(V8), /* V6. */
14271 T(V8), /* V6KZ. */
14272 T(V8), /* V6T2. */
14273 T(V8), /* V6K. */
14274 T(V8), /* V7. */
14275 T(V8), /* V6_M. */
14276 T(V8), /* V6S_M. */
14277 T(V8), /* V7E_M. */
14278 T(V8) /* V8. */
14279 };
14280 const int v8r[] =
14281 {
14282 T(V8R), /* PRE_V4. */
14283 T(V8R), /* V4. */
14284 T(V8R), /* V4T. */
14285 T(V8R), /* V5T. */
14286 T(V8R), /* V5TE. */
14287 T(V8R), /* V5TEJ. */
14288 T(V8R), /* V6. */
14289 T(V8R), /* V6KZ. */
14290 T(V8R), /* V6T2. */
14291 T(V8R), /* V6K. */
14292 T(V8R), /* V7. */
14293 T(V8R), /* V6_M. */
14294 T(V8R), /* V6S_M. */
14295 T(V8R), /* V7E_M. */
14296 T(V8), /* V8. */
14297 T(V8R), /* V8R. */
14298 };
14299 const int v8m_baseline[] =
14300 {
14301 -1, /* PRE_V4. */
14302 -1, /* V4. */
14303 -1, /* V4T. */
14304 -1, /* V5T. */
14305 -1, /* V5TE. */
14306 -1, /* V5TEJ. */
14307 -1, /* V6. */
14308 -1, /* V6KZ. */
14309 -1, /* V6T2. */
14310 -1, /* V6K. */
14311 -1, /* V7. */
14312 T(V8M_BASE), /* V6_M. */
14313 T(V8M_BASE), /* V6S_M. */
14314 -1, /* V7E_M. */
14315 -1, /* V8. */
14316 -1, /* V8R. */
14317 T(V8M_BASE) /* V8-M BASELINE. */
14318 };
14319 const int v8m_mainline[] =
14320 {
14321 -1, /* PRE_V4. */
14322 -1, /* V4. */
14323 -1, /* V4T. */
14324 -1, /* V5T. */
14325 -1, /* V5TE. */
14326 -1, /* V5TEJ. */
14327 -1, /* V6. */
14328 -1, /* V6KZ. */
14329 -1, /* V6T2. */
14330 -1, /* V6K. */
14331 T(V8M_MAIN), /* V7. */
14332 T(V8M_MAIN), /* V6_M. */
14333 T(V8M_MAIN), /* V6S_M. */
14334 T(V8M_MAIN), /* V7E_M. */
14335 -1, /* V8. */
14336 -1, /* V8R. */
14337 T(V8M_MAIN), /* V8-M BASELINE. */
14338 T(V8M_MAIN) /* V8-M MAINLINE. */
14339 };
14340 const int v8_1m_mainline[] =
14341 {
14342 -1, /* PRE_V4. */
14343 -1, /* V4. */
14344 -1, /* V4T. */
14345 -1, /* V5T. */
14346 -1, /* V5TE. */
14347 -1, /* V5TEJ. */
14348 -1, /* V6. */
14349 -1, /* V6KZ. */
14350 -1, /* V6T2. */
14351 -1, /* V6K. */
14352 T(V8_1M_MAIN), /* V7. */
14353 T(V8_1M_MAIN), /* V6_M. */
14354 T(V8_1M_MAIN), /* V6S_M. */
14355 T(V8_1M_MAIN), /* V7E_M. */
14356 -1, /* V8. */
14357 -1, /* V8R. */
14358 T(V8_1M_MAIN), /* V8-M BASELINE. */
14359 T(V8_1M_MAIN), /* V8-M MAINLINE. */
14360 -1, /* Unused (18). */
14361 -1, /* Unused (19). */
14362 -1, /* Unused (20). */
14363 T(V8_1M_MAIN) /* V8.1-M MAINLINE. */
14364 };
14365 const int v4t_plus_v6_m[] =
14366 {
14367 -1, /* PRE_V4. */
14368 -1, /* V4. */
14369 T(V4T), /* V4T. */
14370 T(V5T), /* V5T. */
14371 T(V5TE), /* V5TE. */
14372 T(V5TEJ), /* V5TEJ. */
14373 T(V6), /* V6. */
14374 T(V6KZ), /* V6KZ. */
14375 T(V6T2), /* V6T2. */
14376 T(V6K), /* V6K. */
14377 T(V7), /* V7. */
14378 T(V6_M), /* V6_M. */
14379 T(V6S_M), /* V6S_M. */
14380 T(V7E_M), /* V7E_M. */
14381 T(V8), /* V8. */
14382 -1, /* V8R. */
14383 T(V8M_BASE), /* V8-M BASELINE. */
14384 T(V8M_MAIN), /* V8-M MAINLINE. */
14385 -1, /* Unused (18). */
14386 -1, /* Unused (19). */
14387 -1, /* Unused (20). */
14388 T(V8_1M_MAIN), /* V8.1-M MAINLINE. */
14389 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
14390 };
14391 const int *comb[] =
14392 {
14393 v6t2,
14394 v6k,
14395 v7,
14396 v6_m,
14397 v6s_m,
14398 v7e_m,
14399 v8,
14400 v8r,
14401 v8m_baseline,
14402 v8m_mainline,
14403 NULL,
14404 NULL,
14405 NULL,
14406 v8_1m_mainline,
14407 /* Pseudo-architecture. */
14408 v4t_plus_v6_m
14409 };
14410
14411 /* Check we've not got a higher architecture than we know about. */
14412
14413 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
14414 {
14415 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd);
14416 return -1;
14417 }
14418
14419 /* Override old tag if we have a Tag_also_compatible_with on the output. */
14420
14421 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
14422 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
14423 oldtag = T(V4T_PLUS_V6_M);
14424
14425 /* And override the new tag if we have a Tag_also_compatible_with on the
14426 input. */
14427
14428 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
14429 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
14430 newtag = T(V4T_PLUS_V6_M);
14431
14432 tagl = (oldtag < newtag) ? oldtag : newtag;
14433 result = tagh = (oldtag > newtag) ? oldtag : newtag;
14434
14435 /* Architectures before V6KZ add features monotonically. */
14436 if (tagh <= TAG_CPU_ARCH_V6KZ)
14437 return result;
14438
14439 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
14440
14441 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
14442 as the canonical version. */
14443 if (result == T(V4T_PLUS_V6_M))
14444 {
14445 result = T(V4T);
14446 *secondary_compat_out = T(V6_M);
14447 }
14448 else
14449 *secondary_compat_out = -1;
14450
14451 if (result == -1)
14452 {
14453 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
14454 ibfd, oldtag, newtag);
14455 return -1;
14456 }
14457
14458 return result;
14459 #undef T
14460 }
14461
14462 /* Query attributes object to see if integer divide instructions may be
14463 present in an object. */
14464 static bfd_boolean
14465 elf32_arm_attributes_accept_div (const obj_attribute *attr)
14466 {
14467 int arch = attr[Tag_CPU_arch].i;
14468 int profile = attr[Tag_CPU_arch_profile].i;
14469
14470 switch (attr[Tag_DIV_use].i)
14471 {
14472 case 0:
14473 /* Integer divide allowed if instruction contained in archetecture. */
14474 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
14475 return TRUE;
14476 else if (arch >= TAG_CPU_ARCH_V7E_M)
14477 return TRUE;
14478 else
14479 return FALSE;
14480
14481 case 1:
14482 /* Integer divide explicitly prohibited. */
14483 return FALSE;
14484
14485 default:
14486 /* Unrecognised case - treat as allowing divide everywhere. */
14487 case 2:
14488 /* Integer divide allowed in ARM state. */
14489 return TRUE;
14490 }
14491 }
14492
14493 /* Query attributes object to see if integer divide instructions are
14494 forbidden to be in the object. This is not the inverse of
14495 elf32_arm_attributes_accept_div. */
14496 static bfd_boolean
14497 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
14498 {
14499 return attr[Tag_DIV_use].i == 1;
14500 }
14501
14502 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
14503 are conflicting attributes. */
14504
14505 static bfd_boolean
14506 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
14507 {
14508 bfd *obfd = info->output_bfd;
14509 obj_attribute *in_attr;
14510 obj_attribute *out_attr;
14511 /* Some tags have 0 = don't care, 1 = strong requirement,
14512 2 = weak requirement. */
14513 static const int order_021[3] = {0, 2, 1};
14514 int i;
14515 bfd_boolean result = TRUE;
14516 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
14517
14518 /* Skip the linker stubs file. This preserves previous behavior
14519 of accepting unknown attributes in the first input file - but
14520 is that a bug? */
14521 if (ibfd->flags & BFD_LINKER_CREATED)
14522 return TRUE;
14523
14524 /* Skip any input that hasn't attribute section.
14525 This enables to link object files without attribute section with
14526 any others. */
14527 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
14528 return TRUE;
14529
14530 if (!elf_known_obj_attributes_proc (obfd)[0].i)
14531 {
14532 /* This is the first object. Copy the attributes. */
14533 _bfd_elf_copy_obj_attributes (ibfd, obfd);
14534
14535 out_attr = elf_known_obj_attributes_proc (obfd);
14536
14537 /* Use the Tag_null value to indicate the attributes have been
14538 initialized. */
14539 out_attr[0].i = 1;
14540
14541 /* We do not output objects with Tag_MPextension_use_legacy - we move
14542 the attribute's value to Tag_MPextension_use. */
14543 if (out_attr[Tag_MPextension_use_legacy].i != 0)
14544 {
14545 if (out_attr[Tag_MPextension_use].i != 0
14546 && out_attr[Tag_MPextension_use_legacy].i
14547 != out_attr[Tag_MPextension_use].i)
14548 {
14549 _bfd_error_handler
14550 (_("Error: %pB has both the current and legacy "
14551 "Tag_MPextension_use attributes"), ibfd);
14552 result = FALSE;
14553 }
14554
14555 out_attr[Tag_MPextension_use] =
14556 out_attr[Tag_MPextension_use_legacy];
14557 out_attr[Tag_MPextension_use_legacy].type = 0;
14558 out_attr[Tag_MPextension_use_legacy].i = 0;
14559 }
14560
14561 return result;
14562 }
14563
14564 in_attr = elf_known_obj_attributes_proc (ibfd);
14565 out_attr = elf_known_obj_attributes_proc (obfd);
14566 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
14567 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
14568 {
14569 /* Ignore mismatches if the object doesn't use floating point or is
14570 floating point ABI independent. */
14571 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
14572 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14573 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
14574 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
14575 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14576 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
14577 {
14578 _bfd_error_handler
14579 (_("error: %pB uses VFP register arguments, %pB does not"),
14580 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
14581 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
14582 result = FALSE;
14583 }
14584 }
14585
14586 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
14587 {
14588 /* Merge this attribute with existing attributes. */
14589 switch (i)
14590 {
14591 case Tag_CPU_raw_name:
14592 case Tag_CPU_name:
14593 /* These are merged after Tag_CPU_arch. */
14594 break;
14595
14596 case Tag_ABI_optimization_goals:
14597 case Tag_ABI_FP_optimization_goals:
14598 /* Use the first value seen. */
14599 break;
14600
14601 case Tag_CPU_arch:
14602 {
14603 int secondary_compat = -1, secondary_compat_out = -1;
14604 unsigned int saved_out_attr = out_attr[i].i;
14605 int arch_attr;
14606 static const char *name_table[] =
14607 {
14608 /* These aren't real CPU names, but we can't guess
14609 that from the architecture version alone. */
14610 "Pre v4",
14611 "ARM v4",
14612 "ARM v4T",
14613 "ARM v5T",
14614 "ARM v5TE",
14615 "ARM v5TEJ",
14616 "ARM v6",
14617 "ARM v6KZ",
14618 "ARM v6T2",
14619 "ARM v6K",
14620 "ARM v7",
14621 "ARM v6-M",
14622 "ARM v6S-M",
14623 "ARM v8",
14624 "",
14625 "ARM v8-M.baseline",
14626 "ARM v8-M.mainline",
14627 };
14628
14629 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
14630 secondary_compat = get_secondary_compatible_arch (ibfd);
14631 secondary_compat_out = get_secondary_compatible_arch (obfd);
14632 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
14633 &secondary_compat_out,
14634 in_attr[i].i,
14635 secondary_compat);
14636
14637 /* Return with error if failed to merge. */
14638 if (arch_attr == -1)
14639 return FALSE;
14640
14641 out_attr[i].i = arch_attr;
14642
14643 set_secondary_compatible_arch (obfd, secondary_compat_out);
14644
14645 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
14646 if (out_attr[i].i == saved_out_attr)
14647 ; /* Leave the names alone. */
14648 else if (out_attr[i].i == in_attr[i].i)
14649 {
14650 /* The output architecture has been changed to match the
14651 input architecture. Use the input names. */
14652 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
14653 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
14654 : NULL;
14655 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
14656 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
14657 : NULL;
14658 }
14659 else
14660 {
14661 out_attr[Tag_CPU_name].s = NULL;
14662 out_attr[Tag_CPU_raw_name].s = NULL;
14663 }
14664
14665 /* If we still don't have a value for Tag_CPU_name,
14666 make one up now. Tag_CPU_raw_name remains blank. */
14667 if (out_attr[Tag_CPU_name].s == NULL
14668 && out_attr[i].i < ARRAY_SIZE (name_table))
14669 out_attr[Tag_CPU_name].s =
14670 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
14671 }
14672 break;
14673
14674 case Tag_ARM_ISA_use:
14675 case Tag_THUMB_ISA_use:
14676 case Tag_WMMX_arch:
14677 case Tag_Advanced_SIMD_arch:
14678 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
14679 case Tag_ABI_FP_rounding:
14680 case Tag_ABI_FP_exceptions:
14681 case Tag_ABI_FP_user_exceptions:
14682 case Tag_ABI_FP_number_model:
14683 case Tag_FP_HP_extension:
14684 case Tag_CPU_unaligned_access:
14685 case Tag_T2EE_use:
14686 case Tag_MPextension_use:
14687 case Tag_MVE_arch:
14688 /* Use the largest value specified. */
14689 if (in_attr[i].i > out_attr[i].i)
14690 out_attr[i].i = in_attr[i].i;
14691 break;
14692
14693 case Tag_ABI_align_preserved:
14694 case Tag_ABI_PCS_RO_data:
14695 /* Use the smallest value specified. */
14696 if (in_attr[i].i < out_attr[i].i)
14697 out_attr[i].i = in_attr[i].i;
14698 break;
14699
14700 case Tag_ABI_align_needed:
14701 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
14702 && (in_attr[Tag_ABI_align_preserved].i == 0
14703 || out_attr[Tag_ABI_align_preserved].i == 0))
14704 {
14705 /* This error message should be enabled once all non-conformant
14706 binaries in the toolchain have had the attributes set
14707 properly.
14708 _bfd_error_handler
14709 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14710 obfd, ibfd);
14711 result = FALSE; */
14712 }
14713 /* Fall through. */
14714 case Tag_ABI_FP_denormal:
14715 case Tag_ABI_PCS_GOT_use:
14716 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14717 value if greater than 2 (for future-proofing). */
14718 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
14719 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
14720 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
14721 out_attr[i].i = in_attr[i].i;
14722 break;
14723
14724 case Tag_Virtualization_use:
14725 /* The virtualization tag effectively stores two bits of
14726 information: the intended use of TrustZone (in bit 0), and the
14727 intended use of Virtualization (in bit 1). */
14728 if (out_attr[i].i == 0)
14729 out_attr[i].i = in_attr[i].i;
14730 else if (in_attr[i].i != 0
14731 && in_attr[i].i != out_attr[i].i)
14732 {
14733 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
14734 out_attr[i].i = 3;
14735 else
14736 {
14737 _bfd_error_handler
14738 (_("error: %pB: unable to merge virtualization attributes "
14739 "with %pB"),
14740 obfd, ibfd);
14741 result = FALSE;
14742 }
14743 }
14744 break;
14745
14746 case Tag_CPU_arch_profile:
14747 if (out_attr[i].i != in_attr[i].i)
14748 {
14749 /* 0 will merge with anything.
14750 'A' and 'S' merge to 'A'.
14751 'R' and 'S' merge to 'R'.
14752 'M' and 'A|R|S' is an error. */
14753 if (out_attr[i].i == 0
14754 || (out_attr[i].i == 'S'
14755 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
14756 out_attr[i].i = in_attr[i].i;
14757 else if (in_attr[i].i == 0
14758 || (in_attr[i].i == 'S'
14759 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
14760 ; /* Do nothing. */
14761 else
14762 {
14763 _bfd_error_handler
14764 (_("error: %pB: conflicting architecture profiles %c/%c"),
14765 ibfd,
14766 in_attr[i].i ? in_attr[i].i : '0',
14767 out_attr[i].i ? out_attr[i].i : '0');
14768 result = FALSE;
14769 }
14770 }
14771 break;
14772
14773 case Tag_DSP_extension:
14774 /* No need to change output value if any of:
14775 - pre (<=) ARMv5T input architecture (do not have DSP)
14776 - M input profile not ARMv7E-M and do not have DSP. */
14777 if (in_attr[Tag_CPU_arch].i <= 3
14778 || (in_attr[Tag_CPU_arch_profile].i == 'M'
14779 && in_attr[Tag_CPU_arch].i != 13
14780 && in_attr[i].i == 0))
14781 ; /* Do nothing. */
14782 /* Output value should be 0 if DSP part of architecture, ie.
14783 - post (>=) ARMv5te architecture output
14784 - A, R or S profile output or ARMv7E-M output architecture. */
14785 else if (out_attr[Tag_CPU_arch].i >= 4
14786 && (out_attr[Tag_CPU_arch_profile].i == 'A'
14787 || out_attr[Tag_CPU_arch_profile].i == 'R'
14788 || out_attr[Tag_CPU_arch_profile].i == 'S'
14789 || out_attr[Tag_CPU_arch].i == 13))
14790 out_attr[i].i = 0;
14791 /* Otherwise, DSP instructions are added and not part of output
14792 architecture. */
14793 else
14794 out_attr[i].i = 1;
14795 break;
14796
14797 case Tag_FP_arch:
14798 {
14799 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14800 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14801 when it's 0. It might mean absence of FP hardware if
14802 Tag_FP_arch is zero. */
14803
14804 #define VFP_VERSION_COUNT 9
14805 static const struct
14806 {
14807 int ver;
14808 int regs;
14809 } vfp_versions[VFP_VERSION_COUNT] =
14810 {
14811 {0, 0},
14812 {1, 16},
14813 {2, 16},
14814 {3, 32},
14815 {3, 16},
14816 {4, 32},
14817 {4, 16},
14818 {8, 32},
14819 {8, 16}
14820 };
14821 int ver;
14822 int regs;
14823 int newval;
14824
14825 /* If the output has no requirement about FP hardware,
14826 follow the requirement of the input. */
14827 if (out_attr[i].i == 0)
14828 {
14829 /* This assert is still reasonable, we shouldn't
14830 produce the suspicious build attribute
14831 combination (See below for in_attr). */
14832 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
14833 out_attr[i].i = in_attr[i].i;
14834 out_attr[Tag_ABI_HardFP_use].i
14835 = in_attr[Tag_ABI_HardFP_use].i;
14836 break;
14837 }
14838 /* If the input has no requirement about FP hardware, do
14839 nothing. */
14840 else if (in_attr[i].i == 0)
14841 {
14842 /* We used to assert that Tag_ABI_HardFP_use was
14843 zero here, but we should never assert when
14844 consuming an object file that has suspicious
14845 build attributes. The single precision variant
14846 of 'no FP architecture' is still 'no FP
14847 architecture', so we just ignore the tag in this
14848 case. */
14849 break;
14850 }
14851
14852 /* Both the input and the output have nonzero Tag_FP_arch.
14853 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
14854
14855 /* If both the input and the output have zero Tag_ABI_HardFP_use,
14856 do nothing. */
14857 if (in_attr[Tag_ABI_HardFP_use].i == 0
14858 && out_attr[Tag_ABI_HardFP_use].i == 0)
14859 ;
14860 /* If the input and the output have different Tag_ABI_HardFP_use,
14861 the combination of them is 0 (implied by Tag_FP_arch). */
14862 else if (in_attr[Tag_ABI_HardFP_use].i
14863 != out_attr[Tag_ABI_HardFP_use].i)
14864 out_attr[Tag_ABI_HardFP_use].i = 0;
14865
14866 /* Now we can handle Tag_FP_arch. */
14867
14868 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14869 pick the biggest. */
14870 if (in_attr[i].i >= VFP_VERSION_COUNT
14871 && in_attr[i].i > out_attr[i].i)
14872 {
14873 out_attr[i] = in_attr[i];
14874 break;
14875 }
14876 /* The output uses the superset of input features
14877 (ISA version) and registers. */
14878 ver = vfp_versions[in_attr[i].i].ver;
14879 if (ver < vfp_versions[out_attr[i].i].ver)
14880 ver = vfp_versions[out_attr[i].i].ver;
14881 regs = vfp_versions[in_attr[i].i].regs;
14882 if (regs < vfp_versions[out_attr[i].i].regs)
14883 regs = vfp_versions[out_attr[i].i].regs;
14884 /* This assumes all possible supersets are also a valid
14885 options. */
14886 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
14887 {
14888 if (regs == vfp_versions[newval].regs
14889 && ver == vfp_versions[newval].ver)
14890 break;
14891 }
14892 out_attr[i].i = newval;
14893 }
14894 break;
14895 case Tag_PCS_config:
14896 if (out_attr[i].i == 0)
14897 out_attr[i].i = in_attr[i].i;
14898 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
14899 {
14900 /* It's sometimes ok to mix different configs, so this is only
14901 a warning. */
14902 _bfd_error_handler
14903 (_("warning: %pB: conflicting platform configuration"), ibfd);
14904 }
14905 break;
14906 case Tag_ABI_PCS_R9_use:
14907 if (in_attr[i].i != out_attr[i].i
14908 && out_attr[i].i != AEABI_R9_unused
14909 && in_attr[i].i != AEABI_R9_unused)
14910 {
14911 _bfd_error_handler
14912 (_("error: %pB: conflicting use of R9"), ibfd);
14913 result = FALSE;
14914 }
14915 if (out_attr[i].i == AEABI_R9_unused)
14916 out_attr[i].i = in_attr[i].i;
14917 break;
14918 case Tag_ABI_PCS_RW_data:
14919 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
14920 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
14921 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
14922 {
14923 _bfd_error_handler
14924 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14925 ibfd);
14926 result = FALSE;
14927 }
14928 /* Use the smallest value specified. */
14929 if (in_attr[i].i < out_attr[i].i)
14930 out_attr[i].i = in_attr[i].i;
14931 break;
14932 case Tag_ABI_PCS_wchar_t:
14933 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
14934 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
14935 {
14936 _bfd_error_handler
14937 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14938 ibfd, in_attr[i].i, out_attr[i].i);
14939 }
14940 else if (in_attr[i].i && !out_attr[i].i)
14941 out_attr[i].i = in_attr[i].i;
14942 break;
14943 case Tag_ABI_enum_size:
14944 if (in_attr[i].i != AEABI_enum_unused)
14945 {
14946 if (out_attr[i].i == AEABI_enum_unused
14947 || out_attr[i].i == AEABI_enum_forced_wide)
14948 {
14949 /* The existing object is compatible with anything.
14950 Use whatever requirements the new object has. */
14951 out_attr[i].i = in_attr[i].i;
14952 }
14953 else if (in_attr[i].i != AEABI_enum_forced_wide
14954 && out_attr[i].i != in_attr[i].i
14955 && !elf_arm_tdata (obfd)->no_enum_size_warning)
14956 {
14957 static const char *aeabi_enum_names[] =
14958 { "", "variable-size", "32-bit", "" };
14959 const char *in_name =
14960 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14961 ? aeabi_enum_names[in_attr[i].i]
14962 : "<unknown>";
14963 const char *out_name =
14964 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14965 ? aeabi_enum_names[out_attr[i].i]
14966 : "<unknown>";
14967 _bfd_error_handler
14968 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14969 ibfd, in_name, out_name);
14970 }
14971 }
14972 break;
14973 case Tag_ABI_VFP_args:
14974 /* Aready done. */
14975 break;
14976 case Tag_ABI_WMMX_args:
14977 if (in_attr[i].i != out_attr[i].i)
14978 {
14979 _bfd_error_handler
14980 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14981 ibfd, obfd);
14982 result = FALSE;
14983 }
14984 break;
14985 case Tag_compatibility:
14986 /* Merged in target-independent code. */
14987 break;
14988 case Tag_ABI_HardFP_use:
14989 /* This is handled along with Tag_FP_arch. */
14990 break;
14991 case Tag_ABI_FP_16bit_format:
14992 if (in_attr[i].i != 0 && out_attr[i].i != 0)
14993 {
14994 if (in_attr[i].i != out_attr[i].i)
14995 {
14996 _bfd_error_handler
14997 (_("error: fp16 format mismatch between %pB and %pB"),
14998 ibfd, obfd);
14999 result = FALSE;
15000 }
15001 }
15002 if (in_attr[i].i != 0)
15003 out_attr[i].i = in_attr[i].i;
15004 break;
15005
15006 case Tag_DIV_use:
15007 /* A value of zero on input means that the divide instruction may
15008 be used if available in the base architecture as specified via
15009 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
15010 the user did not want divide instructions. A value of 2
15011 explicitly means that divide instructions were allowed in ARM
15012 and Thumb state. */
15013 if (in_attr[i].i == out_attr[i].i)
15014 /* Do nothing. */ ;
15015 else if (elf32_arm_attributes_forbid_div (in_attr)
15016 && !elf32_arm_attributes_accept_div (out_attr))
15017 out_attr[i].i = 1;
15018 else if (elf32_arm_attributes_forbid_div (out_attr)
15019 && elf32_arm_attributes_accept_div (in_attr))
15020 out_attr[i].i = in_attr[i].i;
15021 else if (in_attr[i].i == 2)
15022 out_attr[i].i = in_attr[i].i;
15023 break;
15024
15025 case Tag_MPextension_use_legacy:
15026 /* We don't output objects with Tag_MPextension_use_legacy - we
15027 move the value to Tag_MPextension_use. */
15028 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
15029 {
15030 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
15031 {
15032 _bfd_error_handler
15033 (_("%pB has both the current and legacy "
15034 "Tag_MPextension_use attributes"),
15035 ibfd);
15036 result = FALSE;
15037 }
15038 }
15039
15040 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
15041 out_attr[Tag_MPextension_use] = in_attr[i];
15042
15043 break;
15044
15045 case Tag_nodefaults:
15046 /* This tag is set if it exists, but the value is unused (and is
15047 typically zero). We don't actually need to do anything here -
15048 the merge happens automatically when the type flags are merged
15049 below. */
15050 break;
15051 case Tag_also_compatible_with:
15052 /* Already done in Tag_CPU_arch. */
15053 break;
15054 case Tag_conformance:
15055 /* Keep the attribute if it matches. Throw it away otherwise.
15056 No attribute means no claim to conform. */
15057 if (!in_attr[i].s || !out_attr[i].s
15058 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
15059 out_attr[i].s = NULL;
15060 break;
15061
15062 default:
15063 result
15064 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
15065 }
15066
15067 /* If out_attr was copied from in_attr then it won't have a type yet. */
15068 if (in_attr[i].type && !out_attr[i].type)
15069 out_attr[i].type = in_attr[i].type;
15070 }
15071
15072 /* Merge Tag_compatibility attributes and any common GNU ones. */
15073 if (!_bfd_elf_merge_object_attributes (ibfd, info))
15074 return FALSE;
15075
15076 /* Check for any attributes not known on ARM. */
15077 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
15078
15079 return result;
15080 }
15081
15082
15083 /* Return TRUE if the two EABI versions are incompatible. */
15084
15085 static bfd_boolean
15086 elf32_arm_versions_compatible (unsigned iver, unsigned over)
15087 {
15088 /* v4 and v5 are the same spec before and after it was released,
15089 so allow mixing them. */
15090 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
15091 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
15092 return TRUE;
15093
15094 return (iver == over);
15095 }
15096
15097 /* Merge backend specific data from an object file to the output
15098 object file when linking. */
15099
15100 static bfd_boolean
15101 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
15102
15103 /* Display the flags field. */
15104
15105 static bfd_boolean
15106 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
15107 {
15108 FILE * file = (FILE *) ptr;
15109 unsigned long flags;
15110
15111 BFD_ASSERT (abfd != NULL && ptr != NULL);
15112
15113 /* Print normal ELF private data. */
15114 _bfd_elf_print_private_bfd_data (abfd, ptr);
15115
15116 flags = elf_elfheader (abfd)->e_flags;
15117 /* Ignore init flag - it may not be set, despite the flags field
15118 containing valid data. */
15119
15120 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
15121
15122 switch (EF_ARM_EABI_VERSION (flags))
15123 {
15124 case EF_ARM_EABI_UNKNOWN:
15125 /* The following flag bits are GNU extensions and not part of the
15126 official ARM ELF extended ABI. Hence they are only decoded if
15127 the EABI version is not set. */
15128 if (flags & EF_ARM_INTERWORK)
15129 fprintf (file, _(" [interworking enabled]"));
15130
15131 if (flags & EF_ARM_APCS_26)
15132 fprintf (file, " [APCS-26]");
15133 else
15134 fprintf (file, " [APCS-32]");
15135
15136 if (flags & EF_ARM_VFP_FLOAT)
15137 fprintf (file, _(" [VFP float format]"));
15138 else if (flags & EF_ARM_MAVERICK_FLOAT)
15139 fprintf (file, _(" [Maverick float format]"));
15140 else
15141 fprintf (file, _(" [FPA float format]"));
15142
15143 if (flags & EF_ARM_APCS_FLOAT)
15144 fprintf (file, _(" [floats passed in float registers]"));
15145
15146 if (flags & EF_ARM_PIC)
15147 fprintf (file, _(" [position independent]"));
15148
15149 if (flags & EF_ARM_NEW_ABI)
15150 fprintf (file, _(" [new ABI]"));
15151
15152 if (flags & EF_ARM_OLD_ABI)
15153 fprintf (file, _(" [old ABI]"));
15154
15155 if (flags & EF_ARM_SOFT_FLOAT)
15156 fprintf (file, _(" [software FP]"));
15157
15158 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
15159 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
15160 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
15161 | EF_ARM_MAVERICK_FLOAT);
15162 break;
15163
15164 case EF_ARM_EABI_VER1:
15165 fprintf (file, _(" [Version1 EABI]"));
15166
15167 if (flags & EF_ARM_SYMSARESORTED)
15168 fprintf (file, _(" [sorted symbol table]"));
15169 else
15170 fprintf (file, _(" [unsorted symbol table]"));
15171
15172 flags &= ~ EF_ARM_SYMSARESORTED;
15173 break;
15174
15175 case EF_ARM_EABI_VER2:
15176 fprintf (file, _(" [Version2 EABI]"));
15177
15178 if (flags & EF_ARM_SYMSARESORTED)
15179 fprintf (file, _(" [sorted symbol table]"));
15180 else
15181 fprintf (file, _(" [unsorted symbol table]"));
15182
15183 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
15184 fprintf (file, _(" [dynamic symbols use segment index]"));
15185
15186 if (flags & EF_ARM_MAPSYMSFIRST)
15187 fprintf (file, _(" [mapping symbols precede others]"));
15188
15189 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
15190 | EF_ARM_MAPSYMSFIRST);
15191 break;
15192
15193 case EF_ARM_EABI_VER3:
15194 fprintf (file, _(" [Version3 EABI]"));
15195 break;
15196
15197 case EF_ARM_EABI_VER4:
15198 fprintf (file, _(" [Version4 EABI]"));
15199 goto eabi;
15200
15201 case EF_ARM_EABI_VER5:
15202 fprintf (file, _(" [Version5 EABI]"));
15203
15204 if (flags & EF_ARM_ABI_FLOAT_SOFT)
15205 fprintf (file, _(" [soft-float ABI]"));
15206
15207 if (flags & EF_ARM_ABI_FLOAT_HARD)
15208 fprintf (file, _(" [hard-float ABI]"));
15209
15210 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
15211
15212 eabi:
15213 if (flags & EF_ARM_BE8)
15214 fprintf (file, _(" [BE8]"));
15215
15216 if (flags & EF_ARM_LE8)
15217 fprintf (file, _(" [LE8]"));
15218
15219 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
15220 break;
15221
15222 default:
15223 fprintf (file, _(" <EABI version unrecognised>"));
15224 break;
15225 }
15226
15227 flags &= ~ EF_ARM_EABIMASK;
15228
15229 if (flags & EF_ARM_RELEXEC)
15230 fprintf (file, _(" [relocatable executable]"));
15231
15232 if (flags & EF_ARM_PIC)
15233 fprintf (file, _(" [position independent]"));
15234
15235 if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC)
15236 fprintf (file, _(" [FDPIC ABI supplement]"));
15237
15238 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC);
15239
15240 if (flags)
15241 fprintf (file, _("<Unrecognised flag bits set>"));
15242
15243 fputc ('\n', file);
15244
15245 return TRUE;
15246 }
15247
15248 static int
15249 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
15250 {
15251 switch (ELF_ST_TYPE (elf_sym->st_info))
15252 {
15253 case STT_ARM_TFUNC:
15254 return ELF_ST_TYPE (elf_sym->st_info);
15255
15256 case STT_ARM_16BIT:
15257 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
15258 This allows us to distinguish between data used by Thumb instructions
15259 and non-data (which is probably code) inside Thumb regions of an
15260 executable. */
15261 if (type != STT_OBJECT && type != STT_TLS)
15262 return ELF_ST_TYPE (elf_sym->st_info);
15263 break;
15264
15265 default:
15266 break;
15267 }
15268
15269 return type;
15270 }
15271
15272 static asection *
15273 elf32_arm_gc_mark_hook (asection *sec,
15274 struct bfd_link_info *info,
15275 Elf_Internal_Rela *rel,
15276 struct elf_link_hash_entry *h,
15277 Elf_Internal_Sym *sym)
15278 {
15279 if (h != NULL)
15280 switch (ELF32_R_TYPE (rel->r_info))
15281 {
15282 case R_ARM_GNU_VTINHERIT:
15283 case R_ARM_GNU_VTENTRY:
15284 return NULL;
15285 }
15286
15287 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
15288 }
15289
15290 /* Look through the relocs for a section during the first phase. */
15291
15292 static bfd_boolean
15293 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
15294 asection *sec, const Elf_Internal_Rela *relocs)
15295 {
15296 Elf_Internal_Shdr *symtab_hdr;
15297 struct elf_link_hash_entry **sym_hashes;
15298 const Elf_Internal_Rela *rel;
15299 const Elf_Internal_Rela *rel_end;
15300 bfd *dynobj;
15301 asection *sreloc;
15302 struct elf32_arm_link_hash_table *htab;
15303 bfd_boolean call_reloc_p;
15304 bfd_boolean may_become_dynamic_p;
15305 bfd_boolean may_need_local_target_p;
15306 unsigned long nsyms;
15307
15308 if (bfd_link_relocatable (info))
15309 return TRUE;
15310
15311 BFD_ASSERT (is_arm_elf (abfd));
15312
15313 htab = elf32_arm_hash_table (info);
15314 if (htab == NULL)
15315 return FALSE;
15316
15317 sreloc = NULL;
15318
15319 /* Create dynamic sections for relocatable executables so that we can
15320 copy relocations. */
15321 if (htab->root.is_relocatable_executable
15322 && ! htab->root.dynamic_sections_created)
15323 {
15324 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
15325 return FALSE;
15326 }
15327
15328 if (htab->root.dynobj == NULL)
15329 htab->root.dynobj = abfd;
15330 if (!create_ifunc_sections (info))
15331 return FALSE;
15332
15333 dynobj = htab->root.dynobj;
15334
15335 symtab_hdr = & elf_symtab_hdr (abfd);
15336 sym_hashes = elf_sym_hashes (abfd);
15337 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
15338
15339 rel_end = relocs + sec->reloc_count;
15340 for (rel = relocs; rel < rel_end; rel++)
15341 {
15342 Elf_Internal_Sym *isym;
15343 struct elf_link_hash_entry *h;
15344 struct elf32_arm_link_hash_entry *eh;
15345 unsigned int r_symndx;
15346 int r_type;
15347
15348 r_symndx = ELF32_R_SYM (rel->r_info);
15349 r_type = ELF32_R_TYPE (rel->r_info);
15350 r_type = arm_real_reloc_type (htab, r_type);
15351
15352 if (r_symndx >= nsyms
15353 /* PR 9934: It is possible to have relocations that do not
15354 refer to symbols, thus it is also possible to have an
15355 object file containing relocations but no symbol table. */
15356 && (r_symndx > STN_UNDEF || nsyms > 0))
15357 {
15358 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
15359 r_symndx);
15360 return FALSE;
15361 }
15362
15363 h = NULL;
15364 isym = NULL;
15365 if (nsyms > 0)
15366 {
15367 if (r_symndx < symtab_hdr->sh_info)
15368 {
15369 /* A local symbol. */
15370 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
15371 abfd, r_symndx);
15372 if (isym == NULL)
15373 return FALSE;
15374 }
15375 else
15376 {
15377 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
15378 while (h->root.type == bfd_link_hash_indirect
15379 || h->root.type == bfd_link_hash_warning)
15380 h = (struct elf_link_hash_entry *) h->root.u.i.link;
15381 }
15382 }
15383
15384 eh = (struct elf32_arm_link_hash_entry *) h;
15385
15386 call_reloc_p = FALSE;
15387 may_become_dynamic_p = FALSE;
15388 may_need_local_target_p = FALSE;
15389
15390 /* Could be done earlier, if h were already available. */
15391 r_type = elf32_arm_tls_transition (info, r_type, h);
15392 switch (r_type)
15393 {
15394 case R_ARM_GOTOFFFUNCDESC:
15395 {
15396 if (h == NULL)
15397 {
15398 if (!elf32_arm_allocate_local_sym_info (abfd))
15399 return FALSE;
15400 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].gotofffuncdesc_cnt += 1;
15401 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
15402 }
15403 else
15404 {
15405 eh->fdpic_cnts.gotofffuncdesc_cnt++;
15406 }
15407 }
15408 break;
15409
15410 case R_ARM_GOTFUNCDESC:
15411 {
15412 if (h == NULL)
15413 {
15414 /* Such a relocation is not supposed to be generated
15415 by gcc on a static function. */
15416 /* Anyway if needed it could be handled. */
15417 abort();
15418 }
15419 else
15420 {
15421 eh->fdpic_cnts.gotfuncdesc_cnt++;
15422 }
15423 }
15424 break;
15425
15426 case R_ARM_FUNCDESC:
15427 {
15428 if (h == NULL)
15429 {
15430 if (!elf32_arm_allocate_local_sym_info (abfd))
15431 return FALSE;
15432 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_cnt += 1;
15433 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
15434 }
15435 else
15436 {
15437 eh->fdpic_cnts.funcdesc_cnt++;
15438 }
15439 }
15440 break;
15441
15442 case R_ARM_GOT32:
15443 case R_ARM_GOT_PREL:
15444 case R_ARM_TLS_GD32:
15445 case R_ARM_TLS_GD32_FDPIC:
15446 case R_ARM_TLS_IE32:
15447 case R_ARM_TLS_IE32_FDPIC:
15448 case R_ARM_TLS_GOTDESC:
15449 case R_ARM_TLS_DESCSEQ:
15450 case R_ARM_THM_TLS_DESCSEQ:
15451 case R_ARM_TLS_CALL:
15452 case R_ARM_THM_TLS_CALL:
15453 /* This symbol requires a global offset table entry. */
15454 {
15455 int tls_type, old_tls_type;
15456
15457 switch (r_type)
15458 {
15459 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
15460 case R_ARM_TLS_GD32_FDPIC: tls_type = GOT_TLS_GD; break;
15461
15462 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
15463 case R_ARM_TLS_IE32_FDPIC: tls_type = GOT_TLS_IE; break;
15464
15465 case R_ARM_TLS_GOTDESC:
15466 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
15467 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
15468 tls_type = GOT_TLS_GDESC; break;
15469
15470 default: tls_type = GOT_NORMAL; break;
15471 }
15472
15473 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
15474 info->flags |= DF_STATIC_TLS;
15475
15476 if (h != NULL)
15477 {
15478 h->got.refcount++;
15479 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
15480 }
15481 else
15482 {
15483 /* This is a global offset table entry for a local symbol. */
15484 if (!elf32_arm_allocate_local_sym_info (abfd))
15485 return FALSE;
15486 elf_local_got_refcounts (abfd)[r_symndx] += 1;
15487 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
15488 }
15489
15490 /* If a variable is accessed with both tls methods, two
15491 slots may be created. */
15492 if (GOT_TLS_GD_ANY_P (old_tls_type)
15493 && GOT_TLS_GD_ANY_P (tls_type))
15494 tls_type |= old_tls_type;
15495
15496 /* We will already have issued an error message if there
15497 is a TLS/non-TLS mismatch, based on the symbol
15498 type. So just combine any TLS types needed. */
15499 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
15500 && tls_type != GOT_NORMAL)
15501 tls_type |= old_tls_type;
15502
15503 /* If the symbol is accessed in both IE and GDESC
15504 method, we're able to relax. Turn off the GDESC flag,
15505 without messing up with any other kind of tls types
15506 that may be involved. */
15507 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
15508 tls_type &= ~GOT_TLS_GDESC;
15509
15510 if (old_tls_type != tls_type)
15511 {
15512 if (h != NULL)
15513 elf32_arm_hash_entry (h)->tls_type = tls_type;
15514 else
15515 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
15516 }
15517 }
15518 /* Fall through. */
15519
15520 case R_ARM_TLS_LDM32:
15521 case R_ARM_TLS_LDM32_FDPIC:
15522 if (r_type == R_ARM_TLS_LDM32 || r_type == R_ARM_TLS_LDM32_FDPIC)
15523 htab->tls_ldm_got.refcount++;
15524 /* Fall through. */
15525
15526 case R_ARM_GOTOFF32:
15527 case R_ARM_GOTPC:
15528 if (htab->root.sgot == NULL
15529 && !create_got_section (htab->root.dynobj, info))
15530 return FALSE;
15531 break;
15532
15533 case R_ARM_PC24:
15534 case R_ARM_PLT32:
15535 case R_ARM_CALL:
15536 case R_ARM_JUMP24:
15537 case R_ARM_PREL31:
15538 case R_ARM_THM_CALL:
15539 case R_ARM_THM_JUMP24:
15540 case R_ARM_THM_JUMP19:
15541 call_reloc_p = TRUE;
15542 may_need_local_target_p = TRUE;
15543 break;
15544
15545 case R_ARM_ABS12:
15546 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15547 ldr __GOTT_INDEX__ offsets. */
15548 if (!htab->vxworks_p)
15549 {
15550 may_need_local_target_p = TRUE;
15551 break;
15552 }
15553 else goto jump_over;
15554
15555 /* Fall through. */
15556
15557 case R_ARM_MOVW_ABS_NC:
15558 case R_ARM_MOVT_ABS:
15559 case R_ARM_THM_MOVW_ABS_NC:
15560 case R_ARM_THM_MOVT_ABS:
15561 if (bfd_link_pic (info))
15562 {
15563 _bfd_error_handler
15564 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15565 abfd, elf32_arm_howto_table_1[r_type].name,
15566 (h) ? h->root.root.string : "a local symbol");
15567 bfd_set_error (bfd_error_bad_value);
15568 return FALSE;
15569 }
15570
15571 /* Fall through. */
15572 case R_ARM_ABS32:
15573 case R_ARM_ABS32_NOI:
15574 jump_over:
15575 if (h != NULL && bfd_link_executable (info))
15576 {
15577 h->pointer_equality_needed = 1;
15578 }
15579 /* Fall through. */
15580 case R_ARM_REL32:
15581 case R_ARM_REL32_NOI:
15582 case R_ARM_MOVW_PREL_NC:
15583 case R_ARM_MOVT_PREL:
15584 case R_ARM_THM_MOVW_PREL_NC:
15585 case R_ARM_THM_MOVT_PREL:
15586
15587 /* Should the interworking branches be listed here? */
15588 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable
15589 || htab->fdpic_p)
15590 && (sec->flags & SEC_ALLOC) != 0)
15591 {
15592 if (h == NULL
15593 && elf32_arm_howto_from_type (r_type)->pc_relative)
15594 {
15595 /* In shared libraries and relocatable executables,
15596 we treat local relative references as calls;
15597 see the related SYMBOL_CALLS_LOCAL code in
15598 allocate_dynrelocs. */
15599 call_reloc_p = TRUE;
15600 may_need_local_target_p = TRUE;
15601 }
15602 else
15603 /* We are creating a shared library or relocatable
15604 executable, and this is a reloc against a global symbol,
15605 or a non-PC-relative reloc against a local symbol.
15606 We may need to copy the reloc into the output. */
15607 may_become_dynamic_p = TRUE;
15608 }
15609 else
15610 may_need_local_target_p = TRUE;
15611 break;
15612
15613 /* This relocation describes the C++ object vtable hierarchy.
15614 Reconstruct it for later use during GC. */
15615 case R_ARM_GNU_VTINHERIT:
15616 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
15617 return FALSE;
15618 break;
15619
15620 /* This relocation describes which C++ vtable entries are actually
15621 used. Record for later use during GC. */
15622 case R_ARM_GNU_VTENTRY:
15623 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
15624 return FALSE;
15625 break;
15626 }
15627
15628 if (h != NULL)
15629 {
15630 if (call_reloc_p)
15631 /* We may need a .plt entry if the function this reloc
15632 refers to is in a different object, regardless of the
15633 symbol's type. We can't tell for sure yet, because
15634 something later might force the symbol local. */
15635 h->needs_plt = 1;
15636 else if (may_need_local_target_p)
15637 /* If this reloc is in a read-only section, we might
15638 need a copy reloc. We can't check reliably at this
15639 stage whether the section is read-only, as input
15640 sections have not yet been mapped to output sections.
15641 Tentatively set the flag for now, and correct in
15642 adjust_dynamic_symbol. */
15643 h->non_got_ref = 1;
15644 }
15645
15646 if (may_need_local_target_p
15647 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
15648 {
15649 union gotplt_union *root_plt;
15650 struct arm_plt_info *arm_plt;
15651 struct arm_local_iplt_info *local_iplt;
15652
15653 if (h != NULL)
15654 {
15655 root_plt = &h->plt;
15656 arm_plt = &eh->plt;
15657 }
15658 else
15659 {
15660 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
15661 if (local_iplt == NULL)
15662 return FALSE;
15663 root_plt = &local_iplt->root;
15664 arm_plt = &local_iplt->arm;
15665 }
15666
15667 /* If the symbol is a function that doesn't bind locally,
15668 this relocation will need a PLT entry. */
15669 if (root_plt->refcount != -1)
15670 root_plt->refcount += 1;
15671
15672 if (!call_reloc_p)
15673 arm_plt->noncall_refcount++;
15674
15675 /* It's too early to use htab->use_blx here, so we have to
15676 record possible blx references separately from
15677 relocs that definitely need a thumb stub. */
15678
15679 if (r_type == R_ARM_THM_CALL)
15680 arm_plt->maybe_thumb_refcount += 1;
15681
15682 if (r_type == R_ARM_THM_JUMP24
15683 || r_type == R_ARM_THM_JUMP19)
15684 arm_plt->thumb_refcount += 1;
15685 }
15686
15687 if (may_become_dynamic_p)
15688 {
15689 struct elf_dyn_relocs *p, **head;
15690
15691 /* Create a reloc section in dynobj. */
15692 if (sreloc == NULL)
15693 {
15694 sreloc = _bfd_elf_make_dynamic_reloc_section
15695 (sec, dynobj, 2, abfd, ! htab->use_rel);
15696
15697 if (sreloc == NULL)
15698 return FALSE;
15699
15700 /* BPABI objects never have dynamic relocations mapped. */
15701 if (htab->symbian_p)
15702 {
15703 flagword flags;
15704
15705 flags = bfd_section_flags (sreloc);
15706 flags &= ~(SEC_LOAD | SEC_ALLOC);
15707 bfd_set_section_flags (sreloc, flags);
15708 }
15709 }
15710
15711 /* If this is a global symbol, count the number of
15712 relocations we need for this symbol. */
15713 if (h != NULL)
15714 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
15715 else
15716 {
15717 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
15718 if (head == NULL)
15719 return FALSE;
15720 }
15721
15722 p = *head;
15723 if (p == NULL || p->sec != sec)
15724 {
15725 bfd_size_type amt = sizeof *p;
15726
15727 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
15728 if (p == NULL)
15729 return FALSE;
15730 p->next = *head;
15731 *head = p;
15732 p->sec = sec;
15733 p->count = 0;
15734 p->pc_count = 0;
15735 }
15736
15737 if (elf32_arm_howto_from_type (r_type)->pc_relative)
15738 p->pc_count += 1;
15739 p->count += 1;
15740 if (h == NULL && htab->fdpic_p && !bfd_link_pic(info)
15741 && r_type != R_ARM_ABS32 && r_type != R_ARM_ABS32_NOI) {
15742 /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15743 that will become rofixup. */
15744 /* This is due to the fact that we suppose all will become rofixup. */
15745 fprintf(stderr, "FDPIC does not yet support %d relocation to become dynamic for executable\n", r_type);
15746 _bfd_error_handler
15747 (_("FDPIC does not yet support %s relocation"
15748 " to become dynamic for executable"),
15749 elf32_arm_howto_table_1[r_type].name);
15750 abort();
15751 }
15752 }
15753 }
15754
15755 return TRUE;
15756 }
15757
15758 static void
15759 elf32_arm_update_relocs (asection *o,
15760 struct bfd_elf_section_reloc_data *reldata)
15761 {
15762 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
15763 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
15764 const struct elf_backend_data *bed;
15765 _arm_elf_section_data *eado;
15766 struct bfd_link_order *p;
15767 bfd_byte *erela_head, *erela;
15768 Elf_Internal_Rela *irela_head, *irela;
15769 Elf_Internal_Shdr *rel_hdr;
15770 bfd *abfd;
15771 unsigned int count;
15772
15773 eado = get_arm_elf_section_data (o);
15774
15775 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
15776 return;
15777
15778 abfd = o->owner;
15779 bed = get_elf_backend_data (abfd);
15780 rel_hdr = reldata->hdr;
15781
15782 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
15783 {
15784 swap_in = bed->s->swap_reloc_in;
15785 swap_out = bed->s->swap_reloc_out;
15786 }
15787 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
15788 {
15789 swap_in = bed->s->swap_reloca_in;
15790 swap_out = bed->s->swap_reloca_out;
15791 }
15792 else
15793 abort ();
15794
15795 erela_head = rel_hdr->contents;
15796 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
15797 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
15798
15799 erela = erela_head;
15800 irela = irela_head;
15801 count = 0;
15802
15803 for (p = o->map_head.link_order; p; p = p->next)
15804 {
15805 if (p->type == bfd_section_reloc_link_order
15806 || p->type == bfd_symbol_reloc_link_order)
15807 {
15808 (*swap_in) (abfd, erela, irela);
15809 erela += rel_hdr->sh_entsize;
15810 irela++;
15811 count++;
15812 }
15813 else if (p->type == bfd_indirect_link_order)
15814 {
15815 struct bfd_elf_section_reloc_data *input_reldata;
15816 arm_unwind_table_edit *edit_list, *edit_tail;
15817 _arm_elf_section_data *eadi;
15818 bfd_size_type j;
15819 bfd_vma offset;
15820 asection *i;
15821
15822 i = p->u.indirect.section;
15823
15824 eadi = get_arm_elf_section_data (i);
15825 edit_list = eadi->u.exidx.unwind_edit_list;
15826 edit_tail = eadi->u.exidx.unwind_edit_tail;
15827 offset = i->output_offset;
15828
15829 if (eadi->elf.rel.hdr &&
15830 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
15831 input_reldata = &eadi->elf.rel;
15832 else if (eadi->elf.rela.hdr &&
15833 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
15834 input_reldata = &eadi->elf.rela;
15835 else
15836 abort ();
15837
15838 if (edit_list)
15839 {
15840 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15841 {
15842 arm_unwind_table_edit *edit_node, *edit_next;
15843 bfd_vma bias;
15844 bfd_vma reloc_index;
15845
15846 (*swap_in) (abfd, erela, irela);
15847 reloc_index = (irela->r_offset - offset) / 8;
15848
15849 bias = 0;
15850 edit_node = edit_list;
15851 for (edit_next = edit_list;
15852 edit_next && edit_next->index <= reloc_index;
15853 edit_next = edit_node->next)
15854 {
15855 bias++;
15856 edit_node = edit_next;
15857 }
15858
15859 if (edit_node->type != DELETE_EXIDX_ENTRY
15860 || edit_node->index != reloc_index)
15861 {
15862 irela->r_offset -= bias * 8;
15863 irela++;
15864 count++;
15865 }
15866
15867 erela += rel_hdr->sh_entsize;
15868 }
15869
15870 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
15871 {
15872 /* New relocation entity. */
15873 asection *text_sec = edit_tail->linked_section;
15874 asection *text_out = text_sec->output_section;
15875 bfd_vma exidx_offset = offset + i->size - 8;
15876
15877 irela->r_addend = 0;
15878 irela->r_offset = exidx_offset;
15879 irela->r_info = ELF32_R_INFO
15880 (text_out->target_index, R_ARM_PREL31);
15881 irela++;
15882 count++;
15883 }
15884 }
15885 else
15886 {
15887 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15888 {
15889 (*swap_in) (abfd, erela, irela);
15890 erela += rel_hdr->sh_entsize;
15891 irela++;
15892 }
15893
15894 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15895 }
15896 }
15897 }
15898
15899 reldata->count = count;
15900 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15901
15902 erela = erela_head;
15903 irela = irela_head;
15904 while (count > 0)
15905 {
15906 (*swap_out) (abfd, irela, erela);
15907 erela += rel_hdr->sh_entsize;
15908 irela++;
15909 count--;
15910 }
15911
15912 free (irela_head);
15913
15914 /* Hashes are no longer valid. */
15915 free (reldata->hashes);
15916 reldata->hashes = NULL;
15917 }
15918
15919 /* Unwinding tables are not referenced directly. This pass marks them as
15920 required if the corresponding code section is marked. Similarly, ARMv8-M
15921 secure entry functions can only be referenced by SG veneers which are
15922 created after the GC process. They need to be marked in case they reside in
15923 their own section (as would be the case if code was compiled with
15924 -ffunction-sections). */
15925
15926 static bfd_boolean
15927 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15928 elf_gc_mark_hook_fn gc_mark_hook)
15929 {
15930 bfd *sub;
15931 Elf_Internal_Shdr **elf_shdrp;
15932 asection *cmse_sec;
15933 obj_attribute *out_attr;
15934 Elf_Internal_Shdr *symtab_hdr;
15935 unsigned i, sym_count, ext_start;
15936 const struct elf_backend_data *bed;
15937 struct elf_link_hash_entry **sym_hashes;
15938 struct elf32_arm_link_hash_entry *cmse_hash;
15939 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
15940 bfd_boolean debug_sec_need_to_be_marked = FALSE;
15941 asection *isec;
15942
15943 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15944
15945 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15946 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15947 && out_attr[Tag_CPU_arch_profile].i == 'M';
15948
15949 /* Marking EH data may cause additional code sections to be marked,
15950 requiring multiple passes. */
15951 again = TRUE;
15952 while (again)
15953 {
15954 again = FALSE;
15955 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15956 {
15957 asection *o;
15958
15959 if (! is_arm_elf (sub))
15960 continue;
15961
15962 elf_shdrp = elf_elfsections (sub);
15963 for (o = sub->sections; o != NULL; o = o->next)
15964 {
15965 Elf_Internal_Shdr *hdr;
15966
15967 hdr = &elf_section_data (o)->this_hdr;
15968 if (hdr->sh_type == SHT_ARM_EXIDX
15969 && hdr->sh_link
15970 && hdr->sh_link < elf_numsections (sub)
15971 && !o->gc_mark
15972 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15973 {
15974 again = TRUE;
15975 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15976 return FALSE;
15977 }
15978 }
15979
15980 /* Mark section holding ARMv8-M secure entry functions. We mark all
15981 of them so no need for a second browsing. */
15982 if (is_v8m && first_bfd_browse)
15983 {
15984 sym_hashes = elf_sym_hashes (sub);
15985 bed = get_elf_backend_data (sub);
15986 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15987 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15988 ext_start = symtab_hdr->sh_info;
15989
15990 /* Scan symbols. */
15991 for (i = ext_start; i < sym_count; i++)
15992 {
15993 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15994
15995 /* Assume it is a special symbol. If not, cmse_scan will
15996 warn about it and user can do something about it. */
15997 if (CONST_STRNEQ (cmse_hash->root.root.root.string,
15998 CMSE_PREFIX))
15999 {
16000 cmse_sec = cmse_hash->root.root.u.def.section;
16001 if (!cmse_sec->gc_mark
16002 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
16003 return FALSE;
16004 /* The debug sections related to these secure entry
16005 functions are marked on enabling below flag. */
16006 debug_sec_need_to_be_marked = TRUE;
16007 }
16008 }
16009
16010 if (debug_sec_need_to_be_marked)
16011 {
16012 /* Looping over all the sections of the object file containing
16013 Armv8-M secure entry functions and marking all the debug
16014 sections. */
16015 for (isec = sub->sections; isec != NULL; isec = isec->next)
16016 {
16017 /* If not a debug sections, skip it. */
16018 if (!isec->gc_mark && (isec->flags & SEC_DEBUGGING))
16019 isec->gc_mark = 1 ;
16020 }
16021 debug_sec_need_to_be_marked = FALSE;
16022 }
16023 }
16024 }
16025 first_bfd_browse = FALSE;
16026 }
16027
16028 return TRUE;
16029 }
16030
16031 /* Treat mapping symbols as special target symbols. */
16032
16033 static bfd_boolean
16034 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
16035 {
16036 return bfd_is_arm_special_symbol_name (sym->name,
16037 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
16038 }
16039
16040 /* If the ELF symbol SYM might be a function in SEC, return the
16041 function size and set *CODE_OFF to the function's entry point,
16042 otherwise return zero. */
16043
16044 static bfd_size_type
16045 elf32_arm_maybe_function_sym (const asymbol *sym, asection *sec,
16046 bfd_vma *code_off)
16047 {
16048 bfd_size_type size;
16049
16050 if ((sym->flags & (BSF_SECTION_SYM | BSF_FILE | BSF_OBJECT
16051 | BSF_THREAD_LOCAL | BSF_RELC | BSF_SRELC)) != 0
16052 || sym->section != sec)
16053 return 0;
16054
16055 if (!(sym->flags & BSF_SYNTHETIC))
16056 switch (ELF_ST_TYPE (((elf_symbol_type *) sym)->internal_elf_sym.st_info))
16057 {
16058 case STT_FUNC:
16059 case STT_ARM_TFUNC:
16060 case STT_NOTYPE:
16061 break;
16062 default:
16063 return 0;
16064 }
16065
16066 if ((sym->flags & BSF_LOCAL)
16067 && bfd_is_arm_special_symbol_name (sym->name,
16068 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
16069 return 0;
16070
16071 *code_off = sym->value;
16072 size = 0;
16073 if (!(sym->flags & BSF_SYNTHETIC))
16074 size = ((elf_symbol_type *) sym)->internal_elf_sym.st_size;
16075 if (size == 0)
16076 size = 1;
16077 return size;
16078 }
16079
16080 static bfd_boolean
16081 elf32_arm_find_inliner_info (bfd * abfd,
16082 const char ** filename_ptr,
16083 const char ** functionname_ptr,
16084 unsigned int * line_ptr)
16085 {
16086 bfd_boolean found;
16087 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
16088 functionname_ptr, line_ptr,
16089 & elf_tdata (abfd)->dwarf2_find_line_info);
16090 return found;
16091 }
16092
16093 /* Find dynamic relocs for H that apply to read-only sections. */
16094
16095 static asection *
16096 readonly_dynrelocs (struct elf_link_hash_entry *h)
16097 {
16098 struct elf_dyn_relocs *p;
16099
16100 for (p = elf32_arm_hash_entry (h)->dyn_relocs; p != NULL; p = p->next)
16101 {
16102 asection *s = p->sec->output_section;
16103
16104 if (s != NULL && (s->flags & SEC_READONLY) != 0)
16105 return p->sec;
16106 }
16107 return NULL;
16108 }
16109
16110 /* Adjust a symbol defined by a dynamic object and referenced by a
16111 regular object. The current definition is in some section of the
16112 dynamic object, but we're not including those sections. We have to
16113 change the definition to something the rest of the link can
16114 understand. */
16115
16116 static bfd_boolean
16117 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
16118 struct elf_link_hash_entry * h)
16119 {
16120 bfd * dynobj;
16121 asection *s, *srel;
16122 struct elf32_arm_link_hash_entry * eh;
16123 struct elf32_arm_link_hash_table *globals;
16124
16125 globals = elf32_arm_hash_table (info);
16126 if (globals == NULL)
16127 return FALSE;
16128
16129 dynobj = elf_hash_table (info)->dynobj;
16130
16131 /* Make sure we know what is going on here. */
16132 BFD_ASSERT (dynobj != NULL
16133 && (h->needs_plt
16134 || h->type == STT_GNU_IFUNC
16135 || h->is_weakalias
16136 || (h->def_dynamic
16137 && h->ref_regular
16138 && !h->def_regular)));
16139
16140 eh = (struct elf32_arm_link_hash_entry *) h;
16141
16142 /* If this is a function, put it in the procedure linkage table. We
16143 will fill in the contents of the procedure linkage table later,
16144 when we know the address of the .got section. */
16145 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
16146 {
16147 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
16148 symbol binds locally. */
16149 if (h->plt.refcount <= 0
16150 || (h->type != STT_GNU_IFUNC
16151 && (SYMBOL_CALLS_LOCAL (info, h)
16152 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16153 && h->root.type == bfd_link_hash_undefweak))))
16154 {
16155 /* This case can occur if we saw a PLT32 reloc in an input
16156 file, but the symbol was never referred to by a dynamic
16157 object, or if all references were garbage collected. In
16158 such a case, we don't actually need to build a procedure
16159 linkage table, and we can just do a PC24 reloc instead. */
16160 h->plt.offset = (bfd_vma) -1;
16161 eh->plt.thumb_refcount = 0;
16162 eh->plt.maybe_thumb_refcount = 0;
16163 eh->plt.noncall_refcount = 0;
16164 h->needs_plt = 0;
16165 }
16166
16167 return TRUE;
16168 }
16169 else
16170 {
16171 /* It's possible that we incorrectly decided a .plt reloc was
16172 needed for an R_ARM_PC24 or similar reloc to a non-function sym
16173 in check_relocs. We can't decide accurately between function
16174 and non-function syms in check-relocs; Objects loaded later in
16175 the link may change h->type. So fix it now. */
16176 h->plt.offset = (bfd_vma) -1;
16177 eh->plt.thumb_refcount = 0;
16178 eh->plt.maybe_thumb_refcount = 0;
16179 eh->plt.noncall_refcount = 0;
16180 }
16181
16182 /* If this is a weak symbol, and there is a real definition, the
16183 processor independent code will have arranged for us to see the
16184 real definition first, and we can just use the same value. */
16185 if (h->is_weakalias)
16186 {
16187 struct elf_link_hash_entry *def = weakdef (h);
16188 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
16189 h->root.u.def.section = def->root.u.def.section;
16190 h->root.u.def.value = def->root.u.def.value;
16191 return TRUE;
16192 }
16193
16194 /* If there are no non-GOT references, we do not need a copy
16195 relocation. */
16196 if (!h->non_got_ref)
16197 return TRUE;
16198
16199 /* This is a reference to a symbol defined by a dynamic object which
16200 is not a function. */
16201
16202 /* If we are creating a shared library, we must presume that the
16203 only references to the symbol are via the global offset table.
16204 For such cases we need not do anything here; the relocations will
16205 be handled correctly by relocate_section. Relocatable executables
16206 can reference data in shared objects directly, so we don't need to
16207 do anything here. */
16208 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
16209 return TRUE;
16210
16211 /* We must allocate the symbol in our .dynbss section, which will
16212 become part of the .bss section of the executable. There will be
16213 an entry for this symbol in the .dynsym section. The dynamic
16214 object will contain position independent code, so all references
16215 from the dynamic object to this symbol will go through the global
16216 offset table. The dynamic linker will use the .dynsym entry to
16217 determine the address it must put in the global offset table, so
16218 both the dynamic object and the regular object will refer to the
16219 same memory location for the variable. */
16220 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
16221 linker to copy the initial value out of the dynamic object and into
16222 the runtime process image. We need to remember the offset into the
16223 .rel(a).bss section we are going to use. */
16224 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
16225 {
16226 s = globals->root.sdynrelro;
16227 srel = globals->root.sreldynrelro;
16228 }
16229 else
16230 {
16231 s = globals->root.sdynbss;
16232 srel = globals->root.srelbss;
16233 }
16234 if (info->nocopyreloc == 0
16235 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
16236 && h->size != 0)
16237 {
16238 elf32_arm_allocate_dynrelocs (info, srel, 1);
16239 h->needs_copy = 1;
16240 }
16241
16242 return _bfd_elf_adjust_dynamic_copy (info, h, s);
16243 }
16244
16245 /* Allocate space in .plt, .got and associated reloc sections for
16246 dynamic relocs. */
16247
16248 static bfd_boolean
16249 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
16250 {
16251 struct bfd_link_info *info;
16252 struct elf32_arm_link_hash_table *htab;
16253 struct elf32_arm_link_hash_entry *eh;
16254 struct elf_dyn_relocs *p;
16255
16256 if (h->root.type == bfd_link_hash_indirect)
16257 return TRUE;
16258
16259 eh = (struct elf32_arm_link_hash_entry *) h;
16260
16261 info = (struct bfd_link_info *) inf;
16262 htab = elf32_arm_hash_table (info);
16263 if (htab == NULL)
16264 return FALSE;
16265
16266 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
16267 && h->plt.refcount > 0)
16268 {
16269 /* Make sure this symbol is output as a dynamic symbol.
16270 Undefined weak syms won't yet be marked as dynamic. */
16271 if (h->dynindx == -1 && !h->forced_local
16272 && h->root.type == bfd_link_hash_undefweak)
16273 {
16274 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16275 return FALSE;
16276 }
16277
16278 /* If the call in the PLT entry binds locally, the associated
16279 GOT entry should use an R_ARM_IRELATIVE relocation instead of
16280 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
16281 than the .plt section. */
16282 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
16283 {
16284 eh->is_iplt = 1;
16285 if (eh->plt.noncall_refcount == 0
16286 && SYMBOL_REFERENCES_LOCAL (info, h))
16287 /* All non-call references can be resolved directly.
16288 This means that they can (and in some cases, must)
16289 resolve directly to the run-time target, rather than
16290 to the PLT. That in turns means that any .got entry
16291 would be equal to the .igot.plt entry, so there's
16292 no point having both. */
16293 h->got.refcount = 0;
16294 }
16295
16296 if (bfd_link_pic (info)
16297 || eh->is_iplt
16298 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
16299 {
16300 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
16301
16302 /* If this symbol is not defined in a regular file, and we are
16303 not generating a shared library, then set the symbol to this
16304 location in the .plt. This is required to make function
16305 pointers compare as equal between the normal executable and
16306 the shared library. */
16307 if (! bfd_link_pic (info)
16308 && !h->def_regular)
16309 {
16310 h->root.u.def.section = htab->root.splt;
16311 h->root.u.def.value = h->plt.offset;
16312
16313 /* Make sure the function is not marked as Thumb, in case
16314 it is the target of an ABS32 relocation, which will
16315 point to the PLT entry. */
16316 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16317 }
16318
16319 /* VxWorks executables have a second set of relocations for
16320 each PLT entry. They go in a separate relocation section,
16321 which is processed by the kernel loader. */
16322 if (htab->vxworks_p && !bfd_link_pic (info))
16323 {
16324 /* There is a relocation for the initial PLT entry:
16325 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
16326 if (h->plt.offset == htab->plt_header_size)
16327 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
16328
16329 /* There are two extra relocations for each subsequent
16330 PLT entry: an R_ARM_32 relocation for the GOT entry,
16331 and an R_ARM_32 relocation for the PLT entry. */
16332 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
16333 }
16334 }
16335 else
16336 {
16337 h->plt.offset = (bfd_vma) -1;
16338 h->needs_plt = 0;
16339 }
16340 }
16341 else
16342 {
16343 h->plt.offset = (bfd_vma) -1;
16344 h->needs_plt = 0;
16345 }
16346
16347 eh = (struct elf32_arm_link_hash_entry *) h;
16348 eh->tlsdesc_got = (bfd_vma) -1;
16349
16350 if (h->got.refcount > 0)
16351 {
16352 asection *s;
16353 bfd_boolean dyn;
16354 int tls_type = elf32_arm_hash_entry (h)->tls_type;
16355 int indx;
16356
16357 /* Make sure this symbol is output as a dynamic symbol.
16358 Undefined weak syms won't yet be marked as dynamic. */
16359 if (htab->root.dynamic_sections_created && h->dynindx == -1 && !h->forced_local
16360 && h->root.type == bfd_link_hash_undefweak)
16361 {
16362 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16363 return FALSE;
16364 }
16365
16366 if (!htab->symbian_p)
16367 {
16368 s = htab->root.sgot;
16369 h->got.offset = s->size;
16370
16371 if (tls_type == GOT_UNKNOWN)
16372 abort ();
16373
16374 if (tls_type == GOT_NORMAL)
16375 /* Non-TLS symbols need one GOT slot. */
16376 s->size += 4;
16377 else
16378 {
16379 if (tls_type & GOT_TLS_GDESC)
16380 {
16381 /* R_ARM_TLS_DESC needs 2 GOT slots. */
16382 eh->tlsdesc_got
16383 = (htab->root.sgotplt->size
16384 - elf32_arm_compute_jump_table_size (htab));
16385 htab->root.sgotplt->size += 8;
16386 h->got.offset = (bfd_vma) -2;
16387 /* plt.got_offset needs to know there's a TLS_DESC
16388 reloc in the middle of .got.plt. */
16389 htab->num_tls_desc++;
16390 }
16391
16392 if (tls_type & GOT_TLS_GD)
16393 {
16394 /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
16395 consecutive GOT slots. If the symbol is both GD
16396 and GDESC, got.offset may have been
16397 overwritten. */
16398 h->got.offset = s->size;
16399 s->size += 8;
16400 }
16401
16402 if (tls_type & GOT_TLS_IE)
16403 /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
16404 slot. */
16405 s->size += 4;
16406 }
16407
16408 dyn = htab->root.dynamic_sections_created;
16409
16410 indx = 0;
16411 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
16412 bfd_link_pic (info),
16413 h)
16414 && (!bfd_link_pic (info)
16415 || !SYMBOL_REFERENCES_LOCAL (info, h)))
16416 indx = h->dynindx;
16417
16418 if (tls_type != GOT_NORMAL
16419 && (bfd_link_dll (info) || indx != 0)
16420 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16421 || h->root.type != bfd_link_hash_undefweak))
16422 {
16423 if (tls_type & GOT_TLS_IE)
16424 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16425
16426 if (tls_type & GOT_TLS_GD)
16427 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16428
16429 if (tls_type & GOT_TLS_GDESC)
16430 {
16431 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
16432 /* GDESC needs a trampoline to jump to. */
16433 htab->tls_trampoline = -1;
16434 }
16435
16436 /* Only GD needs it. GDESC just emits one relocation per
16437 2 entries. */
16438 if ((tls_type & GOT_TLS_GD) && indx != 0)
16439 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16440 }
16441 else if (((indx != -1) || htab->fdpic_p)
16442 && !SYMBOL_REFERENCES_LOCAL (info, h))
16443 {
16444 if (htab->root.dynamic_sections_created)
16445 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
16446 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16447 }
16448 else if (h->type == STT_GNU_IFUNC
16449 && eh->plt.noncall_refcount == 0)
16450 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16451 they all resolve dynamically instead. Reserve room for the
16452 GOT entry's R_ARM_IRELATIVE relocation. */
16453 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
16454 else if (bfd_link_pic (info)
16455 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16456 || h->root.type != bfd_link_hash_undefweak))
16457 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
16458 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16459 else if (htab->fdpic_p && tls_type == GOT_NORMAL)
16460 /* Reserve room for rofixup for FDPIC executable. */
16461 /* TLS relocs do not need space since they are completely
16462 resolved. */
16463 htab->srofixup->size += 4;
16464 }
16465 }
16466 else
16467 h->got.offset = (bfd_vma) -1;
16468
16469 /* FDPIC support. */
16470 if (eh->fdpic_cnts.gotofffuncdesc_cnt > 0)
16471 {
16472 /* Symbol musn't be exported. */
16473 if (h->dynindx != -1)
16474 abort();
16475
16476 /* We only allocate one function descriptor with its associated relocation. */
16477 if (eh->fdpic_cnts.funcdesc_offset == -1)
16478 {
16479 asection *s = htab->root.sgot;
16480
16481 eh->fdpic_cnts.funcdesc_offset = s->size;
16482 s->size += 8;
16483 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16484 if (bfd_link_pic(info))
16485 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16486 else
16487 htab->srofixup->size += 8;
16488 }
16489 }
16490
16491 if (eh->fdpic_cnts.gotfuncdesc_cnt > 0)
16492 {
16493 asection *s = htab->root.sgot;
16494
16495 if (htab->root.dynamic_sections_created && h->dynindx == -1
16496 && !h->forced_local)
16497 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16498 return FALSE;
16499
16500 if (h->dynindx == -1)
16501 {
16502 /* We only allocate one function descriptor with its associated relocation. q */
16503 if (eh->fdpic_cnts.funcdesc_offset == -1)
16504 {
16505
16506 eh->fdpic_cnts.funcdesc_offset = s->size;
16507 s->size += 8;
16508 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16509 if (bfd_link_pic(info))
16510 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16511 else
16512 htab->srofixup->size += 8;
16513 }
16514 }
16515
16516 /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16517 R_ARM_RELATIVE/rofixup relocation on it. */
16518 eh->fdpic_cnts.gotfuncdesc_offset = s->size;
16519 s->size += 4;
16520 if (h->dynindx == -1 && !bfd_link_pic(info))
16521 htab->srofixup->size += 4;
16522 else
16523 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16524 }
16525
16526 if (eh->fdpic_cnts.funcdesc_cnt > 0)
16527 {
16528 if (htab->root.dynamic_sections_created && h->dynindx == -1
16529 && !h->forced_local)
16530 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16531 return FALSE;
16532
16533 if (h->dynindx == -1)
16534 {
16535 /* We only allocate one function descriptor with its associated relocation. */
16536 if (eh->fdpic_cnts.funcdesc_offset == -1)
16537 {
16538 asection *s = htab->root.sgot;
16539
16540 eh->fdpic_cnts.funcdesc_offset = s->size;
16541 s->size += 8;
16542 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16543 if (bfd_link_pic(info))
16544 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16545 else
16546 htab->srofixup->size += 8;
16547 }
16548 }
16549 if (h->dynindx == -1 && !bfd_link_pic(info))
16550 {
16551 /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */
16552 htab->srofixup->size += 4 * eh->fdpic_cnts.funcdesc_cnt;
16553 }
16554 else
16555 {
16556 /* Will need one dynamic reloc per reference. will be either
16557 R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */
16558 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot,
16559 eh->fdpic_cnts.funcdesc_cnt);
16560 }
16561 }
16562
16563 /* Allocate stubs for exported Thumb functions on v4t. */
16564 if (!htab->use_blx && h->dynindx != -1
16565 && h->def_regular
16566 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
16567 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
16568 {
16569 struct elf_link_hash_entry * th;
16570 struct bfd_link_hash_entry * bh;
16571 struct elf_link_hash_entry * myh;
16572 char name[1024];
16573 asection *s;
16574 bh = NULL;
16575 /* Create a new symbol to regist the real location of the function. */
16576 s = h->root.u.def.section;
16577 sprintf (name, "__real_%s", h->root.root.string);
16578 _bfd_generic_link_add_one_symbol (info, s->owner,
16579 name, BSF_GLOBAL, s,
16580 h->root.u.def.value,
16581 NULL, TRUE, FALSE, &bh);
16582
16583 myh = (struct elf_link_hash_entry *) bh;
16584 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
16585 myh->forced_local = 1;
16586 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
16587 eh->export_glue = myh;
16588 th = record_arm_to_thumb_glue (info, h);
16589 /* Point the symbol at the stub. */
16590 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
16591 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16592 h->root.u.def.section = th->root.u.def.section;
16593 h->root.u.def.value = th->root.u.def.value & ~1;
16594 }
16595
16596 if (eh->dyn_relocs == NULL)
16597 return TRUE;
16598
16599 /* In the shared -Bsymbolic case, discard space allocated for
16600 dynamic pc-relative relocs against symbols which turn out to be
16601 defined in regular objects. For the normal shared case, discard
16602 space for pc-relative relocs that have become local due to symbol
16603 visibility changes. */
16604
16605 if (bfd_link_pic (info) || htab->root.is_relocatable_executable || htab->fdpic_p)
16606 {
16607 /* Relocs that use pc_count are PC-relative forms, which will appear
16608 on something like ".long foo - ." or "movw REG, foo - .". We want
16609 calls to protected symbols to resolve directly to the function
16610 rather than going via the plt. If people want function pointer
16611 comparisons to work as expected then they should avoid writing
16612 assembly like ".long foo - .". */
16613 if (SYMBOL_CALLS_LOCAL (info, h))
16614 {
16615 struct elf_dyn_relocs **pp;
16616
16617 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
16618 {
16619 p->count -= p->pc_count;
16620 p->pc_count = 0;
16621 if (p->count == 0)
16622 *pp = p->next;
16623 else
16624 pp = &p->next;
16625 }
16626 }
16627
16628 if (htab->vxworks_p)
16629 {
16630 struct elf_dyn_relocs **pp;
16631
16632 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
16633 {
16634 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
16635 *pp = p->next;
16636 else
16637 pp = &p->next;
16638 }
16639 }
16640
16641 /* Also discard relocs on undefined weak syms with non-default
16642 visibility. */
16643 if (eh->dyn_relocs != NULL
16644 && h->root.type == bfd_link_hash_undefweak)
16645 {
16646 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16647 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16648 eh->dyn_relocs = NULL;
16649
16650 /* Make sure undefined weak symbols are output as a dynamic
16651 symbol in PIEs. */
16652 else if (htab->root.dynamic_sections_created && h->dynindx == -1
16653 && !h->forced_local)
16654 {
16655 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16656 return FALSE;
16657 }
16658 }
16659
16660 else if (htab->root.is_relocatable_executable && h->dynindx == -1
16661 && h->root.type == bfd_link_hash_new)
16662 {
16663 /* Output absolute symbols so that we can create relocations
16664 against them. For normal symbols we output a relocation
16665 against the section that contains them. */
16666 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16667 return FALSE;
16668 }
16669
16670 }
16671 else
16672 {
16673 /* For the non-shared case, discard space for relocs against
16674 symbols which turn out to need copy relocs or are not
16675 dynamic. */
16676
16677 if (!h->non_got_ref
16678 && ((h->def_dynamic
16679 && !h->def_regular)
16680 || (htab->root.dynamic_sections_created
16681 && (h->root.type == bfd_link_hash_undefweak
16682 || h->root.type == bfd_link_hash_undefined))))
16683 {
16684 /* Make sure this symbol is output as a dynamic symbol.
16685 Undefined weak syms won't yet be marked as dynamic. */
16686 if (h->dynindx == -1 && !h->forced_local
16687 && h->root.type == bfd_link_hash_undefweak)
16688 {
16689 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16690 return FALSE;
16691 }
16692
16693 /* If that succeeded, we know we'll be keeping all the
16694 relocs. */
16695 if (h->dynindx != -1)
16696 goto keep;
16697 }
16698
16699 eh->dyn_relocs = NULL;
16700
16701 keep: ;
16702 }
16703
16704 /* Finally, allocate space. */
16705 for (p = eh->dyn_relocs; p != NULL; p = p->next)
16706 {
16707 asection *sreloc = elf_section_data (p->sec)->sreloc;
16708
16709 if (h->type == STT_GNU_IFUNC
16710 && eh->plt.noncall_refcount == 0
16711 && SYMBOL_REFERENCES_LOCAL (info, h))
16712 elf32_arm_allocate_irelocs (info, sreloc, p->count);
16713 else if (h->dynindx != -1 && (!bfd_link_pic(info) || !info->symbolic || !h->def_regular))
16714 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16715 else if (htab->fdpic_p && !bfd_link_pic(info))
16716 htab->srofixup->size += 4 * p->count;
16717 else
16718 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16719 }
16720
16721 return TRUE;
16722 }
16723
16724 /* Set DF_TEXTREL if we find any dynamic relocs that apply to
16725 read-only sections. */
16726
16727 static bfd_boolean
16728 maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p)
16729 {
16730 asection *sec;
16731
16732 if (h->root.type == bfd_link_hash_indirect)
16733 return TRUE;
16734
16735 sec = readonly_dynrelocs (h);
16736 if (sec != NULL)
16737 {
16738 struct bfd_link_info *info = (struct bfd_link_info *) info_p;
16739
16740 info->flags |= DF_TEXTREL;
16741 info->callbacks->minfo
16742 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
16743 sec->owner, h->root.root.string, sec);
16744
16745 /* Not an error, just cut short the traversal. */
16746 return FALSE;
16747 }
16748
16749 return TRUE;
16750 }
16751
16752 void
16753 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
16754 int byteswap_code)
16755 {
16756 struct elf32_arm_link_hash_table *globals;
16757
16758 globals = elf32_arm_hash_table (info);
16759 if (globals == NULL)
16760 return;
16761
16762 globals->byteswap_code = byteswap_code;
16763 }
16764
16765 /* Set the sizes of the dynamic sections. */
16766
16767 static bfd_boolean
16768 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
16769 struct bfd_link_info * info)
16770 {
16771 bfd * dynobj;
16772 asection * s;
16773 bfd_boolean plt;
16774 bfd_boolean relocs;
16775 bfd *ibfd;
16776 struct elf32_arm_link_hash_table *htab;
16777
16778 htab = elf32_arm_hash_table (info);
16779 if (htab == NULL)
16780 return FALSE;
16781
16782 dynobj = elf_hash_table (info)->dynobj;
16783 BFD_ASSERT (dynobj != NULL);
16784 check_use_blx (htab);
16785
16786 if (elf_hash_table (info)->dynamic_sections_created)
16787 {
16788 /* Set the contents of the .interp section to the interpreter. */
16789 if (bfd_link_executable (info) && !info->nointerp)
16790 {
16791 s = bfd_get_linker_section (dynobj, ".interp");
16792 BFD_ASSERT (s != NULL);
16793 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
16794 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
16795 }
16796 }
16797
16798 /* Set up .got offsets for local syms, and space for local dynamic
16799 relocs. */
16800 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16801 {
16802 bfd_signed_vma *local_got;
16803 bfd_signed_vma *end_local_got;
16804 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
16805 char *local_tls_type;
16806 bfd_vma *local_tlsdesc_gotent;
16807 bfd_size_type locsymcount;
16808 Elf_Internal_Shdr *symtab_hdr;
16809 asection *srel;
16810 bfd_boolean is_vxworks = htab->vxworks_p;
16811 unsigned int symndx;
16812 struct fdpic_local *local_fdpic_cnts;
16813
16814 if (! is_arm_elf (ibfd))
16815 continue;
16816
16817 for (s = ibfd->sections; s != NULL; s = s->next)
16818 {
16819 struct elf_dyn_relocs *p;
16820
16821 for (p = (struct elf_dyn_relocs *)
16822 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
16823 {
16824 if (!bfd_is_abs_section (p->sec)
16825 && bfd_is_abs_section (p->sec->output_section))
16826 {
16827 /* Input section has been discarded, either because
16828 it is a copy of a linkonce section or due to
16829 linker script /DISCARD/, so we'll be discarding
16830 the relocs too. */
16831 }
16832 else if (is_vxworks
16833 && strcmp (p->sec->output_section->name,
16834 ".tls_vars") == 0)
16835 {
16836 /* Relocations in vxworks .tls_vars sections are
16837 handled specially by the loader. */
16838 }
16839 else if (p->count != 0)
16840 {
16841 srel = elf_section_data (p->sec)->sreloc;
16842 if (htab->fdpic_p && !bfd_link_pic(info))
16843 htab->srofixup->size += 4 * p->count;
16844 else
16845 elf32_arm_allocate_dynrelocs (info, srel, p->count);
16846 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
16847 info->flags |= DF_TEXTREL;
16848 }
16849 }
16850 }
16851
16852 local_got = elf_local_got_refcounts (ibfd);
16853 if (!local_got)
16854 continue;
16855
16856 symtab_hdr = & elf_symtab_hdr (ibfd);
16857 locsymcount = symtab_hdr->sh_info;
16858 end_local_got = local_got + locsymcount;
16859 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
16860 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
16861 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
16862 local_fdpic_cnts = elf32_arm_local_fdpic_cnts (ibfd);
16863 symndx = 0;
16864 s = htab->root.sgot;
16865 srel = htab->root.srelgot;
16866 for (; local_got < end_local_got;
16867 ++local_got, ++local_iplt_ptr, ++local_tls_type,
16868 ++local_tlsdesc_gotent, ++symndx, ++local_fdpic_cnts)
16869 {
16870 *local_tlsdesc_gotent = (bfd_vma) -1;
16871 local_iplt = *local_iplt_ptr;
16872
16873 /* FDPIC support. */
16874 if (local_fdpic_cnts->gotofffuncdesc_cnt > 0)
16875 {
16876 if (local_fdpic_cnts->funcdesc_offset == -1)
16877 {
16878 local_fdpic_cnts->funcdesc_offset = s->size;
16879 s->size += 8;
16880
16881 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16882 if (bfd_link_pic(info))
16883 elf32_arm_allocate_dynrelocs (info, srel, 1);
16884 else
16885 htab->srofixup->size += 8;
16886 }
16887 }
16888
16889 if (local_fdpic_cnts->funcdesc_cnt > 0)
16890 {
16891 if (local_fdpic_cnts->funcdesc_offset == -1)
16892 {
16893 local_fdpic_cnts->funcdesc_offset = s->size;
16894 s->size += 8;
16895
16896 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16897 if (bfd_link_pic(info))
16898 elf32_arm_allocate_dynrelocs (info, srel, 1);
16899 else
16900 htab->srofixup->size += 8;
16901 }
16902
16903 /* We will add n R_ARM_RELATIVE relocations or n rofixups. */
16904 if (bfd_link_pic(info))
16905 elf32_arm_allocate_dynrelocs (info, srel, local_fdpic_cnts->funcdesc_cnt);
16906 else
16907 htab->srofixup->size += 4 * local_fdpic_cnts->funcdesc_cnt;
16908 }
16909
16910 if (local_iplt != NULL)
16911 {
16912 struct elf_dyn_relocs *p;
16913
16914 if (local_iplt->root.refcount > 0)
16915 {
16916 elf32_arm_allocate_plt_entry (info, TRUE,
16917 &local_iplt->root,
16918 &local_iplt->arm);
16919 if (local_iplt->arm.noncall_refcount == 0)
16920 /* All references to the PLT are calls, so all
16921 non-call references can resolve directly to the
16922 run-time target. This means that the .got entry
16923 would be the same as the .igot.plt entry, so there's
16924 no point creating both. */
16925 *local_got = 0;
16926 }
16927 else
16928 {
16929 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
16930 local_iplt->root.offset = (bfd_vma) -1;
16931 }
16932
16933 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
16934 {
16935 asection *psrel;
16936
16937 psrel = elf_section_data (p->sec)->sreloc;
16938 if (local_iplt->arm.noncall_refcount == 0)
16939 elf32_arm_allocate_irelocs (info, psrel, p->count);
16940 else
16941 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
16942 }
16943 }
16944 if (*local_got > 0)
16945 {
16946 Elf_Internal_Sym *isym;
16947
16948 *local_got = s->size;
16949 if (*local_tls_type & GOT_TLS_GD)
16950 /* TLS_GD relocs need an 8-byte structure in the GOT. */
16951 s->size += 8;
16952 if (*local_tls_type & GOT_TLS_GDESC)
16953 {
16954 *local_tlsdesc_gotent = htab->root.sgotplt->size
16955 - elf32_arm_compute_jump_table_size (htab);
16956 htab->root.sgotplt->size += 8;
16957 *local_got = (bfd_vma) -2;
16958 /* plt.got_offset needs to know there's a TLS_DESC
16959 reloc in the middle of .got.plt. */
16960 htab->num_tls_desc++;
16961 }
16962 if (*local_tls_type & GOT_TLS_IE)
16963 s->size += 4;
16964
16965 if (*local_tls_type & GOT_NORMAL)
16966 {
16967 /* If the symbol is both GD and GDESC, *local_got
16968 may have been overwritten. */
16969 *local_got = s->size;
16970 s->size += 4;
16971 }
16972
16973 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
16974 if (isym == NULL)
16975 return FALSE;
16976
16977 /* If all references to an STT_GNU_IFUNC PLT are calls,
16978 then all non-call references, including this GOT entry,
16979 resolve directly to the run-time target. */
16980 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
16981 && (local_iplt == NULL
16982 || local_iplt->arm.noncall_refcount == 0))
16983 elf32_arm_allocate_irelocs (info, srel, 1);
16984 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC || htab->fdpic_p)
16985 {
16986 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC)))
16987 elf32_arm_allocate_dynrelocs (info, srel, 1);
16988 else if (htab->fdpic_p && *local_tls_type & GOT_NORMAL)
16989 htab->srofixup->size += 4;
16990
16991 if ((bfd_link_pic (info) || htab->fdpic_p)
16992 && *local_tls_type & GOT_TLS_GDESC)
16993 {
16994 elf32_arm_allocate_dynrelocs (info,
16995 htab->root.srelplt, 1);
16996 htab->tls_trampoline = -1;
16997 }
16998 }
16999 }
17000 else
17001 *local_got = (bfd_vma) -1;
17002 }
17003 }
17004
17005 if (htab->tls_ldm_got.refcount > 0)
17006 {
17007 /* Allocate two GOT entries and one dynamic relocation (if necessary)
17008 for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
17009 htab->tls_ldm_got.offset = htab->root.sgot->size;
17010 htab->root.sgot->size += 8;
17011 if (bfd_link_pic (info))
17012 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
17013 }
17014 else
17015 htab->tls_ldm_got.offset = -1;
17016
17017 /* At the very end of the .rofixup section is a pointer to the GOT,
17018 reserve space for it. */
17019 if (htab->fdpic_p && htab->srofixup != NULL)
17020 htab->srofixup->size += 4;
17021
17022 /* Allocate global sym .plt and .got entries, and space for global
17023 sym dynamic relocs. */
17024 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
17025
17026 /* Here we rummage through the found bfds to collect glue information. */
17027 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
17028 {
17029 if (! is_arm_elf (ibfd))
17030 continue;
17031
17032 /* Initialise mapping tables for code/data. */
17033 bfd_elf32_arm_init_maps (ibfd);
17034
17035 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
17036 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
17037 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
17038 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd);
17039 }
17040
17041 /* Allocate space for the glue sections now that we've sized them. */
17042 bfd_elf32_arm_allocate_interworking_sections (info);
17043
17044 /* For every jump slot reserved in the sgotplt, reloc_count is
17045 incremented. However, when we reserve space for TLS descriptors,
17046 it's not incremented, so in order to compute the space reserved
17047 for them, it suffices to multiply the reloc count by the jump
17048 slot size. */
17049 if (htab->root.srelplt)
17050 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
17051
17052 if (htab->tls_trampoline)
17053 {
17054 if (htab->root.splt->size == 0)
17055 htab->root.splt->size += htab->plt_header_size;
17056
17057 htab->tls_trampoline = htab->root.splt->size;
17058 htab->root.splt->size += htab->plt_entry_size;
17059
17060 /* If we're not using lazy TLS relocations, don't generate the
17061 PLT and GOT entries they require. */
17062 if (!(info->flags & DF_BIND_NOW))
17063 {
17064 htab->dt_tlsdesc_got = htab->root.sgot->size;
17065 htab->root.sgot->size += 4;
17066
17067 htab->dt_tlsdesc_plt = htab->root.splt->size;
17068 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
17069 }
17070 }
17071
17072 /* The check_relocs and adjust_dynamic_symbol entry points have
17073 determined the sizes of the various dynamic sections. Allocate
17074 memory for them. */
17075 plt = FALSE;
17076 relocs = FALSE;
17077 for (s = dynobj->sections; s != NULL; s = s->next)
17078 {
17079 const char * name;
17080
17081 if ((s->flags & SEC_LINKER_CREATED) == 0)
17082 continue;
17083
17084 /* It's OK to base decisions on the section name, because none
17085 of the dynobj section names depend upon the input files. */
17086 name = bfd_section_name (s);
17087
17088 if (s == htab->root.splt)
17089 {
17090 /* Remember whether there is a PLT. */
17091 plt = s->size != 0;
17092 }
17093 else if (CONST_STRNEQ (name, ".rel"))
17094 {
17095 if (s->size != 0)
17096 {
17097 /* Remember whether there are any reloc sections other
17098 than .rel(a).plt and .rela.plt.unloaded. */
17099 if (s != htab->root.srelplt && s != htab->srelplt2)
17100 relocs = TRUE;
17101
17102 /* We use the reloc_count field as a counter if we need
17103 to copy relocs into the output file. */
17104 s->reloc_count = 0;
17105 }
17106 }
17107 else if (s != htab->root.sgot
17108 && s != htab->root.sgotplt
17109 && s != htab->root.iplt
17110 && s != htab->root.igotplt
17111 && s != htab->root.sdynbss
17112 && s != htab->root.sdynrelro
17113 && s != htab->srofixup)
17114 {
17115 /* It's not one of our sections, so don't allocate space. */
17116 continue;
17117 }
17118
17119 if (s->size == 0)
17120 {
17121 /* If we don't need this section, strip it from the
17122 output file. This is mostly to handle .rel(a).bss and
17123 .rel(a).plt. We must create both sections in
17124 create_dynamic_sections, because they must be created
17125 before the linker maps input sections to output
17126 sections. The linker does that before
17127 adjust_dynamic_symbol is called, and it is that
17128 function which decides whether anything needs to go
17129 into these sections. */
17130 s->flags |= SEC_EXCLUDE;
17131 continue;
17132 }
17133
17134 if ((s->flags & SEC_HAS_CONTENTS) == 0)
17135 continue;
17136
17137 /* Allocate memory for the section contents. */
17138 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
17139 if (s->contents == NULL)
17140 return FALSE;
17141 }
17142
17143 if (elf_hash_table (info)->dynamic_sections_created)
17144 {
17145 /* Add some entries to the .dynamic section. We fill in the
17146 values later, in elf32_arm_finish_dynamic_sections, but we
17147 must add the entries now so that we get the correct size for
17148 the .dynamic section. The DT_DEBUG entry is filled in by the
17149 dynamic linker and used by the debugger. */
17150 #define add_dynamic_entry(TAG, VAL) \
17151 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
17152
17153 if (bfd_link_executable (info))
17154 {
17155 if (!add_dynamic_entry (DT_DEBUG, 0))
17156 return FALSE;
17157 }
17158
17159 if (plt)
17160 {
17161 if ( !add_dynamic_entry (DT_PLTGOT, 0)
17162 || !add_dynamic_entry (DT_PLTRELSZ, 0)
17163 || !add_dynamic_entry (DT_PLTREL,
17164 htab->use_rel ? DT_REL : DT_RELA)
17165 || !add_dynamic_entry (DT_JMPREL, 0))
17166 return FALSE;
17167
17168 if (htab->dt_tlsdesc_plt
17169 && (!add_dynamic_entry (DT_TLSDESC_PLT,0)
17170 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
17171 return FALSE;
17172 }
17173
17174 if (relocs)
17175 {
17176 if (htab->use_rel)
17177 {
17178 if (!add_dynamic_entry (DT_REL, 0)
17179 || !add_dynamic_entry (DT_RELSZ, 0)
17180 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
17181 return FALSE;
17182 }
17183 else
17184 {
17185 if (!add_dynamic_entry (DT_RELA, 0)
17186 || !add_dynamic_entry (DT_RELASZ, 0)
17187 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
17188 return FALSE;
17189 }
17190 }
17191
17192 /* If any dynamic relocs apply to a read-only section,
17193 then we need a DT_TEXTREL entry. */
17194 if ((info->flags & DF_TEXTREL) == 0)
17195 elf_link_hash_traverse (&htab->root, maybe_set_textrel, info);
17196
17197 if ((info->flags & DF_TEXTREL) != 0)
17198 {
17199 if (!add_dynamic_entry (DT_TEXTREL, 0))
17200 return FALSE;
17201 }
17202 if (htab->vxworks_p
17203 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
17204 return FALSE;
17205 }
17206 #undef add_dynamic_entry
17207
17208 return TRUE;
17209 }
17210
17211 /* Size sections even though they're not dynamic. We use it to setup
17212 _TLS_MODULE_BASE_, if needed. */
17213
17214 static bfd_boolean
17215 elf32_arm_always_size_sections (bfd *output_bfd,
17216 struct bfd_link_info *info)
17217 {
17218 asection *tls_sec;
17219 struct elf32_arm_link_hash_table *htab;
17220
17221 htab = elf32_arm_hash_table (info);
17222
17223 if (bfd_link_relocatable (info))
17224 return TRUE;
17225
17226 tls_sec = elf_hash_table (info)->tls_sec;
17227
17228 if (tls_sec)
17229 {
17230 struct elf_link_hash_entry *tlsbase;
17231
17232 tlsbase = elf_link_hash_lookup
17233 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
17234
17235 if (tlsbase)
17236 {
17237 struct bfd_link_hash_entry *bh = NULL;
17238 const struct elf_backend_data *bed
17239 = get_elf_backend_data (output_bfd);
17240
17241 if (!(_bfd_generic_link_add_one_symbol
17242 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
17243 tls_sec, 0, NULL, FALSE,
17244 bed->collect, &bh)))
17245 return FALSE;
17246
17247 tlsbase->type = STT_TLS;
17248 tlsbase = (struct elf_link_hash_entry *)bh;
17249 tlsbase->def_regular = 1;
17250 tlsbase->other = STV_HIDDEN;
17251 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
17252 }
17253 }
17254
17255 if (htab->fdpic_p && !bfd_link_relocatable (info)
17256 && !bfd_elf_stack_segment_size (output_bfd, info,
17257 "__stacksize", DEFAULT_STACK_SIZE))
17258 return FALSE;
17259
17260 return TRUE;
17261 }
17262
17263 /* Finish up dynamic symbol handling. We set the contents of various
17264 dynamic sections here. */
17265
17266 static bfd_boolean
17267 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
17268 struct bfd_link_info * info,
17269 struct elf_link_hash_entry * h,
17270 Elf_Internal_Sym * sym)
17271 {
17272 struct elf32_arm_link_hash_table *htab;
17273 struct elf32_arm_link_hash_entry *eh;
17274
17275 htab = elf32_arm_hash_table (info);
17276 if (htab == NULL)
17277 return FALSE;
17278
17279 eh = (struct elf32_arm_link_hash_entry *) h;
17280
17281 if (h->plt.offset != (bfd_vma) -1)
17282 {
17283 if (!eh->is_iplt)
17284 {
17285 BFD_ASSERT (h->dynindx != -1);
17286 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
17287 h->dynindx, 0))
17288 return FALSE;
17289 }
17290
17291 if (!h->def_regular)
17292 {
17293 /* Mark the symbol as undefined, rather than as defined in
17294 the .plt section. */
17295 sym->st_shndx = SHN_UNDEF;
17296 /* If the symbol is weak we need to clear the value.
17297 Otherwise, the PLT entry would provide a definition for
17298 the symbol even if the symbol wasn't defined anywhere,
17299 and so the symbol would never be NULL. Leave the value if
17300 there were any relocations where pointer equality matters
17301 (this is a clue for the dynamic linker, to make function
17302 pointer comparisons work between an application and shared
17303 library). */
17304 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
17305 sym->st_value = 0;
17306 }
17307 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
17308 {
17309 /* At least one non-call relocation references this .iplt entry,
17310 so the .iplt entry is the function's canonical address. */
17311 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
17312 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
17313 sym->st_shndx = (_bfd_elf_section_from_bfd_section
17314 (output_bfd, htab->root.iplt->output_section));
17315 sym->st_value = (h->plt.offset
17316 + htab->root.iplt->output_section->vma
17317 + htab->root.iplt->output_offset);
17318 }
17319 }
17320
17321 if (h->needs_copy)
17322 {
17323 asection * s;
17324 Elf_Internal_Rela rel;
17325
17326 /* This symbol needs a copy reloc. Set it up. */
17327 BFD_ASSERT (h->dynindx != -1
17328 && (h->root.type == bfd_link_hash_defined
17329 || h->root.type == bfd_link_hash_defweak));
17330
17331 rel.r_addend = 0;
17332 rel.r_offset = (h->root.u.def.value
17333 + h->root.u.def.section->output_section->vma
17334 + h->root.u.def.section->output_offset);
17335 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
17336 if (h->root.u.def.section == htab->root.sdynrelro)
17337 s = htab->root.sreldynrelro;
17338 else
17339 s = htab->root.srelbss;
17340 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
17341 }
17342
17343 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
17344 and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute:
17345 it is relative to the ".got" section. */
17346 if (h == htab->root.hdynamic
17347 || (!htab->fdpic_p && !htab->vxworks_p && h == htab->root.hgot))
17348 sym->st_shndx = SHN_ABS;
17349
17350 return TRUE;
17351 }
17352
17353 static void
17354 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17355 void *contents,
17356 const unsigned long *template, unsigned count)
17357 {
17358 unsigned ix;
17359
17360 for (ix = 0; ix != count; ix++)
17361 {
17362 unsigned long insn = template[ix];
17363
17364 /* Emit mov pc,rx if bx is not permitted. */
17365 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
17366 insn = (insn & 0xf000000f) | 0x01a0f000;
17367 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
17368 }
17369 }
17370
17371 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
17372 other variants, NaCl needs this entry in a static executable's
17373 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
17374 zero. For .iplt really only the last bundle is useful, and .iplt
17375 could have a shorter first entry, with each individual PLT entry's
17376 relative branch calculated differently so it targets the last
17377 bundle instead of the instruction before it (labelled .Lplt_tail
17378 above). But it's simpler to keep the size and layout of PLT0
17379 consistent with the dynamic case, at the cost of some dead code at
17380 the start of .iplt and the one dead store to the stack at the start
17381 of .Lplt_tail. */
17382 static void
17383 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17384 asection *plt, bfd_vma got_displacement)
17385 {
17386 unsigned int i;
17387
17388 put_arm_insn (htab, output_bfd,
17389 elf32_arm_nacl_plt0_entry[0]
17390 | arm_movw_immediate (got_displacement),
17391 plt->contents + 0);
17392 put_arm_insn (htab, output_bfd,
17393 elf32_arm_nacl_plt0_entry[1]
17394 | arm_movt_immediate (got_displacement),
17395 plt->contents + 4);
17396
17397 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
17398 put_arm_insn (htab, output_bfd,
17399 elf32_arm_nacl_plt0_entry[i],
17400 plt->contents + (i * 4));
17401 }
17402
17403 /* Finish up the dynamic sections. */
17404
17405 static bfd_boolean
17406 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
17407 {
17408 bfd * dynobj;
17409 asection * sgot;
17410 asection * sdyn;
17411 struct elf32_arm_link_hash_table *htab;
17412
17413 htab = elf32_arm_hash_table (info);
17414 if (htab == NULL)
17415 return FALSE;
17416
17417 dynobj = elf_hash_table (info)->dynobj;
17418
17419 sgot = htab->root.sgotplt;
17420 /* A broken linker script might have discarded the dynamic sections.
17421 Catch this here so that we do not seg-fault later on. */
17422 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
17423 return FALSE;
17424 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
17425
17426 if (elf_hash_table (info)->dynamic_sections_created)
17427 {
17428 asection *splt;
17429 Elf32_External_Dyn *dyncon, *dynconend;
17430
17431 splt = htab->root.splt;
17432 BFD_ASSERT (splt != NULL && sdyn != NULL);
17433 BFD_ASSERT (htab->symbian_p || sgot != NULL);
17434
17435 dyncon = (Elf32_External_Dyn *) sdyn->contents;
17436 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
17437
17438 for (; dyncon < dynconend; dyncon++)
17439 {
17440 Elf_Internal_Dyn dyn;
17441 const char * name;
17442 asection * s;
17443
17444 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
17445
17446 switch (dyn.d_tag)
17447 {
17448 unsigned int type;
17449
17450 default:
17451 if (htab->vxworks_p
17452 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
17453 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17454 break;
17455
17456 case DT_HASH:
17457 name = ".hash";
17458 goto get_vma_if_bpabi;
17459 case DT_STRTAB:
17460 name = ".dynstr";
17461 goto get_vma_if_bpabi;
17462 case DT_SYMTAB:
17463 name = ".dynsym";
17464 goto get_vma_if_bpabi;
17465 case DT_VERSYM:
17466 name = ".gnu.version";
17467 goto get_vma_if_bpabi;
17468 case DT_VERDEF:
17469 name = ".gnu.version_d";
17470 goto get_vma_if_bpabi;
17471 case DT_VERNEED:
17472 name = ".gnu.version_r";
17473 goto get_vma_if_bpabi;
17474
17475 case DT_PLTGOT:
17476 name = htab->symbian_p ? ".got" : ".got.plt";
17477 goto get_vma;
17478 case DT_JMPREL:
17479 name = RELOC_SECTION (htab, ".plt");
17480 get_vma:
17481 s = bfd_get_linker_section (dynobj, name);
17482 if (s == NULL)
17483 {
17484 _bfd_error_handler
17485 (_("could not find section %s"), name);
17486 bfd_set_error (bfd_error_invalid_operation);
17487 return FALSE;
17488 }
17489 if (!htab->symbian_p)
17490 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
17491 else
17492 /* In the BPABI, tags in the PT_DYNAMIC section point
17493 at the file offset, not the memory address, for the
17494 convenience of the post linker. */
17495 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
17496 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17497 break;
17498
17499 get_vma_if_bpabi:
17500 if (htab->symbian_p)
17501 goto get_vma;
17502 break;
17503
17504 case DT_PLTRELSZ:
17505 s = htab->root.srelplt;
17506 BFD_ASSERT (s != NULL);
17507 dyn.d_un.d_val = s->size;
17508 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17509 break;
17510
17511 case DT_RELSZ:
17512 case DT_RELASZ:
17513 case DT_REL:
17514 case DT_RELA:
17515 /* In the BPABI, the DT_REL tag must point at the file
17516 offset, not the VMA, of the first relocation
17517 section. So, we use code similar to that in
17518 elflink.c, but do not check for SHF_ALLOC on the
17519 relocation section, since relocation sections are
17520 never allocated under the BPABI. PLT relocs are also
17521 included. */
17522 if (htab->symbian_p)
17523 {
17524 unsigned int i;
17525 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
17526 ? SHT_REL : SHT_RELA);
17527 dyn.d_un.d_val = 0;
17528 for (i = 1; i < elf_numsections (output_bfd); i++)
17529 {
17530 Elf_Internal_Shdr *hdr
17531 = elf_elfsections (output_bfd)[i];
17532 if (hdr->sh_type == type)
17533 {
17534 if (dyn.d_tag == DT_RELSZ
17535 || dyn.d_tag == DT_RELASZ)
17536 dyn.d_un.d_val += hdr->sh_size;
17537 else if ((ufile_ptr) hdr->sh_offset
17538 <= dyn.d_un.d_val - 1)
17539 dyn.d_un.d_val = hdr->sh_offset;
17540 }
17541 }
17542 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17543 }
17544 break;
17545
17546 case DT_TLSDESC_PLT:
17547 s = htab->root.splt;
17548 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17549 + htab->dt_tlsdesc_plt);
17550 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17551 break;
17552
17553 case DT_TLSDESC_GOT:
17554 s = htab->root.sgot;
17555 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17556 + htab->dt_tlsdesc_got);
17557 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17558 break;
17559
17560 /* Set the bottom bit of DT_INIT/FINI if the
17561 corresponding function is Thumb. */
17562 case DT_INIT:
17563 name = info->init_function;
17564 goto get_sym;
17565 case DT_FINI:
17566 name = info->fini_function;
17567 get_sym:
17568 /* If it wasn't set by elf_bfd_final_link
17569 then there is nothing to adjust. */
17570 if (dyn.d_un.d_val != 0)
17571 {
17572 struct elf_link_hash_entry * eh;
17573
17574 eh = elf_link_hash_lookup (elf_hash_table (info), name,
17575 FALSE, FALSE, TRUE);
17576 if (eh != NULL
17577 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
17578 == ST_BRANCH_TO_THUMB)
17579 {
17580 dyn.d_un.d_val |= 1;
17581 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17582 }
17583 }
17584 break;
17585 }
17586 }
17587
17588 /* Fill in the first entry in the procedure linkage table. */
17589 if (splt->size > 0 && htab->plt_header_size)
17590 {
17591 const bfd_vma *plt0_entry;
17592 bfd_vma got_address, plt_address, got_displacement;
17593
17594 /* Calculate the addresses of the GOT and PLT. */
17595 got_address = sgot->output_section->vma + sgot->output_offset;
17596 plt_address = splt->output_section->vma + splt->output_offset;
17597
17598 if (htab->vxworks_p)
17599 {
17600 /* The VxWorks GOT is relocated by the dynamic linker.
17601 Therefore, we must emit relocations rather than simply
17602 computing the values now. */
17603 Elf_Internal_Rela rel;
17604
17605 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
17606 put_arm_insn (htab, output_bfd, plt0_entry[0],
17607 splt->contents + 0);
17608 put_arm_insn (htab, output_bfd, plt0_entry[1],
17609 splt->contents + 4);
17610 put_arm_insn (htab, output_bfd, plt0_entry[2],
17611 splt->contents + 8);
17612 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
17613
17614 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
17615 rel.r_offset = plt_address + 12;
17616 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17617 rel.r_addend = 0;
17618 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
17619 htab->srelplt2->contents);
17620 }
17621 else if (htab->nacl_p)
17622 arm_nacl_put_plt0 (htab, output_bfd, splt,
17623 got_address + 8 - (plt_address + 16));
17624 else if (using_thumb_only (htab))
17625 {
17626 got_displacement = got_address - (plt_address + 12);
17627
17628 plt0_entry = elf32_thumb2_plt0_entry;
17629 put_arm_insn (htab, output_bfd, plt0_entry[0],
17630 splt->contents + 0);
17631 put_arm_insn (htab, output_bfd, plt0_entry[1],
17632 splt->contents + 4);
17633 put_arm_insn (htab, output_bfd, plt0_entry[2],
17634 splt->contents + 8);
17635
17636 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
17637 }
17638 else
17639 {
17640 got_displacement = got_address - (plt_address + 16);
17641
17642 plt0_entry = elf32_arm_plt0_entry;
17643 put_arm_insn (htab, output_bfd, plt0_entry[0],
17644 splt->contents + 0);
17645 put_arm_insn (htab, output_bfd, plt0_entry[1],
17646 splt->contents + 4);
17647 put_arm_insn (htab, output_bfd, plt0_entry[2],
17648 splt->contents + 8);
17649 put_arm_insn (htab, output_bfd, plt0_entry[3],
17650 splt->contents + 12);
17651
17652 #ifdef FOUR_WORD_PLT
17653 /* The displacement value goes in the otherwise-unused
17654 last word of the second entry. */
17655 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
17656 #else
17657 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
17658 #endif
17659 }
17660 }
17661
17662 /* UnixWare sets the entsize of .plt to 4, although that doesn't
17663 really seem like the right value. */
17664 if (splt->output_section->owner == output_bfd)
17665 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
17666
17667 if (htab->dt_tlsdesc_plt)
17668 {
17669 bfd_vma got_address
17670 = sgot->output_section->vma + sgot->output_offset;
17671 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
17672 + htab->root.sgot->output_offset);
17673 bfd_vma plt_address
17674 = splt->output_section->vma + splt->output_offset;
17675
17676 arm_put_trampoline (htab, output_bfd,
17677 splt->contents + htab->dt_tlsdesc_plt,
17678 dl_tlsdesc_lazy_trampoline, 6);
17679
17680 bfd_put_32 (output_bfd,
17681 gotplt_address + htab->dt_tlsdesc_got
17682 - (plt_address + htab->dt_tlsdesc_plt)
17683 - dl_tlsdesc_lazy_trampoline[6],
17684 splt->contents + htab->dt_tlsdesc_plt + 24);
17685 bfd_put_32 (output_bfd,
17686 got_address - (plt_address + htab->dt_tlsdesc_plt)
17687 - dl_tlsdesc_lazy_trampoline[7],
17688 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
17689 }
17690
17691 if (htab->tls_trampoline)
17692 {
17693 arm_put_trampoline (htab, output_bfd,
17694 splt->contents + htab->tls_trampoline,
17695 tls_trampoline, 3);
17696 #ifdef FOUR_WORD_PLT
17697 bfd_put_32 (output_bfd, 0x00000000,
17698 splt->contents + htab->tls_trampoline + 12);
17699 #endif
17700 }
17701
17702 if (htab->vxworks_p
17703 && !bfd_link_pic (info)
17704 && htab->root.splt->size > 0)
17705 {
17706 /* Correct the .rel(a).plt.unloaded relocations. They will have
17707 incorrect symbol indexes. */
17708 int num_plts;
17709 unsigned char *p;
17710
17711 num_plts = ((htab->root.splt->size - htab->plt_header_size)
17712 / htab->plt_entry_size);
17713 p = htab->srelplt2->contents + RELOC_SIZE (htab);
17714
17715 for (; num_plts; num_plts--)
17716 {
17717 Elf_Internal_Rela rel;
17718
17719 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17720 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17721 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17722 p += RELOC_SIZE (htab);
17723
17724 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17725 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
17726 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17727 p += RELOC_SIZE (htab);
17728 }
17729 }
17730 }
17731
17732 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
17733 /* NaCl uses a special first entry in .iplt too. */
17734 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
17735
17736 /* Fill in the first three entries in the global offset table. */
17737 if (sgot)
17738 {
17739 if (sgot->size > 0)
17740 {
17741 if (sdyn == NULL)
17742 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
17743 else
17744 bfd_put_32 (output_bfd,
17745 sdyn->output_section->vma + sdyn->output_offset,
17746 sgot->contents);
17747 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
17748 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
17749 }
17750
17751 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
17752 }
17753
17754 /* At the very end of the .rofixup section is a pointer to the GOT. */
17755 if (htab->fdpic_p && htab->srofixup != NULL)
17756 {
17757 struct elf_link_hash_entry *hgot = htab->root.hgot;
17758
17759 bfd_vma got_value = hgot->root.u.def.value
17760 + hgot->root.u.def.section->output_section->vma
17761 + hgot->root.u.def.section->output_offset;
17762
17763 arm_elf_add_rofixup(output_bfd, htab->srofixup, got_value);
17764
17765 /* Make sure we allocated and generated the same number of fixups. */
17766 BFD_ASSERT (htab->srofixup->reloc_count * 4 == htab->srofixup->size);
17767 }
17768
17769 return TRUE;
17770 }
17771
17772 static bfd_boolean
17773 elf32_arm_init_file_header (bfd *abfd, struct bfd_link_info *link_info)
17774 {
17775 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
17776 struct elf32_arm_link_hash_table *globals;
17777 struct elf_segment_map *m;
17778
17779 if (!_bfd_elf_init_file_header (abfd, link_info))
17780 return FALSE;
17781
17782 i_ehdrp = elf_elfheader (abfd);
17783
17784 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
17785 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
17786 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
17787
17788 if (link_info)
17789 {
17790 globals = elf32_arm_hash_table (link_info);
17791 if (globals != NULL && globals->byteswap_code)
17792 i_ehdrp->e_flags |= EF_ARM_BE8;
17793
17794 if (globals->fdpic_p)
17795 i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC;
17796 }
17797
17798 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
17799 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
17800 {
17801 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
17802 if (abi == AEABI_VFP_args_vfp)
17803 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
17804 else
17805 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
17806 }
17807
17808 /* Scan segment to set p_flags attribute if it contains only sections with
17809 SHF_ARM_PURECODE flag. */
17810 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
17811 {
17812 unsigned int j;
17813
17814 if (m->count == 0)
17815 continue;
17816 for (j = 0; j < m->count; j++)
17817 {
17818 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
17819 break;
17820 }
17821 if (j == m->count)
17822 {
17823 m->p_flags = PF_X;
17824 m->p_flags_valid = 1;
17825 }
17826 }
17827 return TRUE;
17828 }
17829
17830 static enum elf_reloc_type_class
17831 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
17832 const asection *rel_sec ATTRIBUTE_UNUSED,
17833 const Elf_Internal_Rela *rela)
17834 {
17835 switch ((int) ELF32_R_TYPE (rela->r_info))
17836 {
17837 case R_ARM_RELATIVE:
17838 return reloc_class_relative;
17839 case R_ARM_JUMP_SLOT:
17840 return reloc_class_plt;
17841 case R_ARM_COPY:
17842 return reloc_class_copy;
17843 case R_ARM_IRELATIVE:
17844 return reloc_class_ifunc;
17845 default:
17846 return reloc_class_normal;
17847 }
17848 }
17849
17850 static void
17851 arm_final_write_processing (bfd *abfd)
17852 {
17853 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
17854 }
17855
17856 static bfd_boolean
17857 elf32_arm_final_write_processing (bfd *abfd)
17858 {
17859 arm_final_write_processing (abfd);
17860 return _bfd_elf_final_write_processing (abfd);
17861 }
17862
17863 /* Return TRUE if this is an unwinding table entry. */
17864
17865 static bfd_boolean
17866 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
17867 {
17868 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
17869 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
17870 }
17871
17872
17873 /* Set the type and flags for an ARM section. We do this by
17874 the section name, which is a hack, but ought to work. */
17875
17876 static bfd_boolean
17877 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
17878 {
17879 const char * name;
17880
17881 name = bfd_section_name (sec);
17882
17883 if (is_arm_elf_unwind_section_name (abfd, name))
17884 {
17885 hdr->sh_type = SHT_ARM_EXIDX;
17886 hdr->sh_flags |= SHF_LINK_ORDER;
17887 }
17888
17889 if (sec->flags & SEC_ELF_PURECODE)
17890 hdr->sh_flags |= SHF_ARM_PURECODE;
17891
17892 return TRUE;
17893 }
17894
17895 /* Handle an ARM specific section when reading an object file. This is
17896 called when bfd_section_from_shdr finds a section with an unknown
17897 type. */
17898
17899 static bfd_boolean
17900 elf32_arm_section_from_shdr (bfd *abfd,
17901 Elf_Internal_Shdr * hdr,
17902 const char *name,
17903 int shindex)
17904 {
17905 /* There ought to be a place to keep ELF backend specific flags, but
17906 at the moment there isn't one. We just keep track of the
17907 sections by their name, instead. Fortunately, the ABI gives
17908 names for all the ARM specific sections, so we will probably get
17909 away with this. */
17910 switch (hdr->sh_type)
17911 {
17912 case SHT_ARM_EXIDX:
17913 case SHT_ARM_PREEMPTMAP:
17914 case SHT_ARM_ATTRIBUTES:
17915 break;
17916
17917 default:
17918 return FALSE;
17919 }
17920
17921 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
17922 return FALSE;
17923
17924 return TRUE;
17925 }
17926
17927 static _arm_elf_section_data *
17928 get_arm_elf_section_data (asection * sec)
17929 {
17930 if (sec && sec->owner && is_arm_elf (sec->owner))
17931 return elf32_arm_section_data (sec);
17932 else
17933 return NULL;
17934 }
17935
17936 typedef struct
17937 {
17938 void *flaginfo;
17939 struct bfd_link_info *info;
17940 asection *sec;
17941 int sec_shndx;
17942 int (*func) (void *, const char *, Elf_Internal_Sym *,
17943 asection *, struct elf_link_hash_entry *);
17944 } output_arch_syminfo;
17945
17946 enum map_symbol_type
17947 {
17948 ARM_MAP_ARM,
17949 ARM_MAP_THUMB,
17950 ARM_MAP_DATA
17951 };
17952
17953
17954 /* Output a single mapping symbol. */
17955
17956 static bfd_boolean
17957 elf32_arm_output_map_sym (output_arch_syminfo *osi,
17958 enum map_symbol_type type,
17959 bfd_vma offset)
17960 {
17961 static const char *names[3] = {"$a", "$t", "$d"};
17962 Elf_Internal_Sym sym;
17963
17964 sym.st_value = osi->sec->output_section->vma
17965 + osi->sec->output_offset
17966 + offset;
17967 sym.st_size = 0;
17968 sym.st_other = 0;
17969 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
17970 sym.st_shndx = osi->sec_shndx;
17971 sym.st_target_internal = 0;
17972 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
17973 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
17974 }
17975
17976 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
17977 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
17978
17979 static bfd_boolean
17980 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
17981 bfd_boolean is_iplt_entry_p,
17982 union gotplt_union *root_plt,
17983 struct arm_plt_info *arm_plt)
17984 {
17985 struct elf32_arm_link_hash_table *htab;
17986 bfd_vma addr, plt_header_size;
17987
17988 if (root_plt->offset == (bfd_vma) -1)
17989 return TRUE;
17990
17991 htab = elf32_arm_hash_table (osi->info);
17992 if (htab == NULL)
17993 return FALSE;
17994
17995 if (is_iplt_entry_p)
17996 {
17997 osi->sec = htab->root.iplt;
17998 plt_header_size = 0;
17999 }
18000 else
18001 {
18002 osi->sec = htab->root.splt;
18003 plt_header_size = htab->plt_header_size;
18004 }
18005 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
18006 (osi->info->output_bfd, osi->sec->output_section));
18007
18008 addr = root_plt->offset & -2;
18009 if (htab->symbian_p)
18010 {
18011 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
18012 return FALSE;
18013 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
18014 return FALSE;
18015 }
18016 else if (htab->vxworks_p)
18017 {
18018 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
18019 return FALSE;
18020 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
18021 return FALSE;
18022 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
18023 return FALSE;
18024 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
18025 return FALSE;
18026 }
18027 else if (htab->nacl_p)
18028 {
18029 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
18030 return FALSE;
18031 }
18032 else if (htab->fdpic_p)
18033 {
18034 enum map_symbol_type type = using_thumb_only(htab)
18035 ? ARM_MAP_THUMB
18036 : ARM_MAP_ARM;
18037
18038 if (elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt))
18039 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
18040 return FALSE;
18041 if (!elf32_arm_output_map_sym (osi, type, addr))
18042 return FALSE;
18043 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 16))
18044 return FALSE;
18045 if (htab->plt_entry_size == 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry))
18046 if (!elf32_arm_output_map_sym (osi, type, addr + 24))
18047 return FALSE;
18048 }
18049 else if (using_thumb_only (htab))
18050 {
18051 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
18052 return FALSE;
18053 }
18054 else
18055 {
18056 bfd_boolean thumb_stub_p;
18057
18058 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
18059 if (thumb_stub_p)
18060 {
18061 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
18062 return FALSE;
18063 }
18064 #ifdef FOUR_WORD_PLT
18065 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
18066 return FALSE;
18067 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
18068 return FALSE;
18069 #else
18070 /* A three-word PLT with no Thumb thunk contains only Arm code,
18071 so only need to output a mapping symbol for the first PLT entry and
18072 entries with thumb thunks. */
18073 if (thumb_stub_p || addr == plt_header_size)
18074 {
18075 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
18076 return FALSE;
18077 }
18078 #endif
18079 }
18080
18081 return TRUE;
18082 }
18083
18084 /* Output mapping symbols for PLT entries associated with H. */
18085
18086 static bfd_boolean
18087 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
18088 {
18089 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
18090 struct elf32_arm_link_hash_entry *eh;
18091
18092 if (h->root.type == bfd_link_hash_indirect)
18093 return TRUE;
18094
18095 if (h->root.type == bfd_link_hash_warning)
18096 /* When warning symbols are created, they **replace** the "real"
18097 entry in the hash table, thus we never get to see the real
18098 symbol in a hash traversal. So look at it now. */
18099 h = (struct elf_link_hash_entry *) h->root.u.i.link;
18100
18101 eh = (struct elf32_arm_link_hash_entry *) h;
18102 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
18103 &h->plt, &eh->plt);
18104 }
18105
18106 /* Bind a veneered symbol to its veneer identified by its hash entry
18107 STUB_ENTRY. The veneered location thus loose its symbol. */
18108
18109 static void
18110 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
18111 {
18112 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
18113
18114 BFD_ASSERT (hash);
18115 hash->root.root.u.def.section = stub_entry->stub_sec;
18116 hash->root.root.u.def.value = stub_entry->stub_offset;
18117 hash->root.size = stub_entry->stub_size;
18118 }
18119
18120 /* Output a single local symbol for a generated stub. */
18121
18122 static bfd_boolean
18123 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
18124 bfd_vma offset, bfd_vma size)
18125 {
18126 Elf_Internal_Sym sym;
18127
18128 sym.st_value = osi->sec->output_section->vma
18129 + osi->sec->output_offset
18130 + offset;
18131 sym.st_size = size;
18132 sym.st_other = 0;
18133 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
18134 sym.st_shndx = osi->sec_shndx;
18135 sym.st_target_internal = 0;
18136 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
18137 }
18138
18139 static bfd_boolean
18140 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
18141 void * in_arg)
18142 {
18143 struct elf32_arm_stub_hash_entry *stub_entry;
18144 asection *stub_sec;
18145 bfd_vma addr;
18146 char *stub_name;
18147 output_arch_syminfo *osi;
18148 const insn_sequence *template_sequence;
18149 enum stub_insn_type prev_type;
18150 int size;
18151 int i;
18152 enum map_symbol_type sym_type;
18153
18154 /* Massage our args to the form they really have. */
18155 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18156 osi = (output_arch_syminfo *) in_arg;
18157
18158 stub_sec = stub_entry->stub_sec;
18159
18160 /* Ensure this stub is attached to the current section being
18161 processed. */
18162 if (stub_sec != osi->sec)
18163 return TRUE;
18164
18165 addr = (bfd_vma) stub_entry->stub_offset;
18166 template_sequence = stub_entry->stub_template;
18167
18168 if (arm_stub_sym_claimed (stub_entry->stub_type))
18169 arm_stub_claim_sym (stub_entry);
18170 else
18171 {
18172 stub_name = stub_entry->output_name;
18173 switch (template_sequence[0].type)
18174 {
18175 case ARM_TYPE:
18176 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
18177 stub_entry->stub_size))
18178 return FALSE;
18179 break;
18180 case THUMB16_TYPE:
18181 case THUMB32_TYPE:
18182 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
18183 stub_entry->stub_size))
18184 return FALSE;
18185 break;
18186 default:
18187 BFD_FAIL ();
18188 return 0;
18189 }
18190 }
18191
18192 prev_type = DATA_TYPE;
18193 size = 0;
18194 for (i = 0; i < stub_entry->stub_template_size; i++)
18195 {
18196 switch (template_sequence[i].type)
18197 {
18198 case ARM_TYPE:
18199 sym_type = ARM_MAP_ARM;
18200 break;
18201
18202 case THUMB16_TYPE:
18203 case THUMB32_TYPE:
18204 sym_type = ARM_MAP_THUMB;
18205 break;
18206
18207 case DATA_TYPE:
18208 sym_type = ARM_MAP_DATA;
18209 break;
18210
18211 default:
18212 BFD_FAIL ();
18213 return FALSE;
18214 }
18215
18216 if (template_sequence[i].type != prev_type)
18217 {
18218 prev_type = template_sequence[i].type;
18219 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
18220 return FALSE;
18221 }
18222
18223 switch (template_sequence[i].type)
18224 {
18225 case ARM_TYPE:
18226 case THUMB32_TYPE:
18227 size += 4;
18228 break;
18229
18230 case THUMB16_TYPE:
18231 size += 2;
18232 break;
18233
18234 case DATA_TYPE:
18235 size += 4;
18236 break;
18237
18238 default:
18239 BFD_FAIL ();
18240 return FALSE;
18241 }
18242 }
18243
18244 return TRUE;
18245 }
18246
18247 /* Output mapping symbols for linker generated sections,
18248 and for those data-only sections that do not have a
18249 $d. */
18250
18251 static bfd_boolean
18252 elf32_arm_output_arch_local_syms (bfd *output_bfd,
18253 struct bfd_link_info *info,
18254 void *flaginfo,
18255 int (*func) (void *, const char *,
18256 Elf_Internal_Sym *,
18257 asection *,
18258 struct elf_link_hash_entry *))
18259 {
18260 output_arch_syminfo osi;
18261 struct elf32_arm_link_hash_table *htab;
18262 bfd_vma offset;
18263 bfd_size_type size;
18264 bfd *input_bfd;
18265
18266 htab = elf32_arm_hash_table (info);
18267 if (htab == NULL)
18268 return FALSE;
18269
18270 check_use_blx (htab);
18271
18272 osi.flaginfo = flaginfo;
18273 osi.info = info;
18274 osi.func = func;
18275
18276 /* Add a $d mapping symbol to data-only sections that
18277 don't have any mapping symbol. This may result in (harmless) redundant
18278 mapping symbols. */
18279 for (input_bfd = info->input_bfds;
18280 input_bfd != NULL;
18281 input_bfd = input_bfd->link.next)
18282 {
18283 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
18284 for (osi.sec = input_bfd->sections;
18285 osi.sec != NULL;
18286 osi.sec = osi.sec->next)
18287 {
18288 if (osi.sec->output_section != NULL
18289 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
18290 != 0)
18291 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
18292 == SEC_HAS_CONTENTS
18293 && get_arm_elf_section_data (osi.sec) != NULL
18294 && get_arm_elf_section_data (osi.sec)->mapcount == 0
18295 && osi.sec->size > 0
18296 && (osi.sec->flags & SEC_EXCLUDE) == 0)
18297 {
18298 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18299 (output_bfd, osi.sec->output_section);
18300 if (osi.sec_shndx != (int)SHN_BAD)
18301 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
18302 }
18303 }
18304 }
18305
18306 /* ARM->Thumb glue. */
18307 if (htab->arm_glue_size > 0)
18308 {
18309 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18310 ARM2THUMB_GLUE_SECTION_NAME);
18311
18312 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18313 (output_bfd, osi.sec->output_section);
18314 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
18315 || htab->pic_veneer)
18316 size = ARM2THUMB_PIC_GLUE_SIZE;
18317 else if (htab->use_blx)
18318 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
18319 else
18320 size = ARM2THUMB_STATIC_GLUE_SIZE;
18321
18322 for (offset = 0; offset < htab->arm_glue_size; offset += size)
18323 {
18324 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
18325 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
18326 }
18327 }
18328
18329 /* Thumb->ARM glue. */
18330 if (htab->thumb_glue_size > 0)
18331 {
18332 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18333 THUMB2ARM_GLUE_SECTION_NAME);
18334
18335 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18336 (output_bfd, osi.sec->output_section);
18337 size = THUMB2ARM_GLUE_SIZE;
18338
18339 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
18340 {
18341 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
18342 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
18343 }
18344 }
18345
18346 /* ARMv4 BX veneers. */
18347 if (htab->bx_glue_size > 0)
18348 {
18349 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18350 ARM_BX_GLUE_SECTION_NAME);
18351
18352 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18353 (output_bfd, osi.sec->output_section);
18354
18355 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
18356 }
18357
18358 /* Long calls stubs. */
18359 if (htab->stub_bfd && htab->stub_bfd->sections)
18360 {
18361 asection* stub_sec;
18362
18363 for (stub_sec = htab->stub_bfd->sections;
18364 stub_sec != NULL;
18365 stub_sec = stub_sec->next)
18366 {
18367 /* Ignore non-stub sections. */
18368 if (!strstr (stub_sec->name, STUB_SUFFIX))
18369 continue;
18370
18371 osi.sec = stub_sec;
18372
18373 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18374 (output_bfd, osi.sec->output_section);
18375
18376 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
18377 }
18378 }
18379
18380 /* Finally, output mapping symbols for the PLT. */
18381 if (htab->root.splt && htab->root.splt->size > 0)
18382 {
18383 osi.sec = htab->root.splt;
18384 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18385 (output_bfd, osi.sec->output_section));
18386
18387 /* Output mapping symbols for the plt header. SymbianOS does not have a
18388 plt header. */
18389 if (htab->vxworks_p)
18390 {
18391 /* VxWorks shared libraries have no PLT header. */
18392 if (!bfd_link_pic (info))
18393 {
18394 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18395 return FALSE;
18396 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18397 return FALSE;
18398 }
18399 }
18400 else if (htab->nacl_p)
18401 {
18402 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18403 return FALSE;
18404 }
18405 else if (using_thumb_only (htab) && !htab->fdpic_p)
18406 {
18407 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
18408 return FALSE;
18409 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18410 return FALSE;
18411 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
18412 return FALSE;
18413 }
18414 else if (!htab->symbian_p && !htab->fdpic_p)
18415 {
18416 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18417 return FALSE;
18418 #ifndef FOUR_WORD_PLT
18419 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
18420 return FALSE;
18421 #endif
18422 }
18423 }
18424 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
18425 {
18426 /* NaCl uses a special first entry in .iplt too. */
18427 osi.sec = htab->root.iplt;
18428 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18429 (output_bfd, osi.sec->output_section));
18430 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18431 return FALSE;
18432 }
18433 if ((htab->root.splt && htab->root.splt->size > 0)
18434 || (htab->root.iplt && htab->root.iplt->size > 0))
18435 {
18436 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
18437 for (input_bfd = info->input_bfds;
18438 input_bfd != NULL;
18439 input_bfd = input_bfd->link.next)
18440 {
18441 struct arm_local_iplt_info **local_iplt;
18442 unsigned int i, num_syms;
18443
18444 local_iplt = elf32_arm_local_iplt (input_bfd);
18445 if (local_iplt != NULL)
18446 {
18447 num_syms = elf_symtab_hdr (input_bfd).sh_info;
18448 for (i = 0; i < num_syms; i++)
18449 if (local_iplt[i] != NULL
18450 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
18451 &local_iplt[i]->root,
18452 &local_iplt[i]->arm))
18453 return FALSE;
18454 }
18455 }
18456 }
18457 if (htab->dt_tlsdesc_plt != 0)
18458 {
18459 /* Mapping symbols for the lazy tls trampoline. */
18460 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
18461 return FALSE;
18462
18463 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18464 htab->dt_tlsdesc_plt + 24))
18465 return FALSE;
18466 }
18467 if (htab->tls_trampoline != 0)
18468 {
18469 /* Mapping symbols for the tls trampoline. */
18470 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
18471 return FALSE;
18472 #ifdef FOUR_WORD_PLT
18473 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18474 htab->tls_trampoline + 12))
18475 return FALSE;
18476 #endif
18477 }
18478
18479 return TRUE;
18480 }
18481
18482 /* Filter normal symbols of CMSE entry functions of ABFD to include in
18483 the import library. All SYMCOUNT symbols of ABFD can be examined
18484 from their pointers in SYMS. Pointers of symbols to keep should be
18485 stored continuously at the beginning of that array.
18486
18487 Returns the number of symbols to keep. */
18488
18489 static unsigned int
18490 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18491 struct bfd_link_info *info,
18492 asymbol **syms, long symcount)
18493 {
18494 size_t maxnamelen;
18495 char *cmse_name;
18496 long src_count, dst_count = 0;
18497 struct elf32_arm_link_hash_table *htab;
18498
18499 htab = elf32_arm_hash_table (info);
18500 if (!htab->stub_bfd || !htab->stub_bfd->sections)
18501 symcount = 0;
18502
18503 maxnamelen = 128;
18504 cmse_name = (char *) bfd_malloc (maxnamelen);
18505 BFD_ASSERT (cmse_name);
18506
18507 for (src_count = 0; src_count < symcount; src_count++)
18508 {
18509 struct elf32_arm_link_hash_entry *cmse_hash;
18510 asymbol *sym;
18511 flagword flags;
18512 char *name;
18513 size_t namelen;
18514
18515 sym = syms[src_count];
18516 flags = sym->flags;
18517 name = (char *) bfd_asymbol_name (sym);
18518
18519 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
18520 continue;
18521 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
18522 continue;
18523
18524 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
18525 if (namelen > maxnamelen)
18526 {
18527 cmse_name = (char *)
18528 bfd_realloc (cmse_name, namelen);
18529 maxnamelen = namelen;
18530 }
18531 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
18532 cmse_hash = (struct elf32_arm_link_hash_entry *)
18533 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
18534
18535 if (!cmse_hash
18536 || (cmse_hash->root.root.type != bfd_link_hash_defined
18537 && cmse_hash->root.root.type != bfd_link_hash_defweak)
18538 || cmse_hash->root.type != STT_FUNC)
18539 continue;
18540
18541 syms[dst_count++] = sym;
18542 }
18543 free (cmse_name);
18544
18545 syms[dst_count] = NULL;
18546
18547 return dst_count;
18548 }
18549
18550 /* Filter symbols of ABFD to include in the import library. All
18551 SYMCOUNT symbols of ABFD can be examined from their pointers in
18552 SYMS. Pointers of symbols to keep should be stored continuously at
18553 the beginning of that array.
18554
18555 Returns the number of symbols to keep. */
18556
18557 static unsigned int
18558 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18559 struct bfd_link_info *info,
18560 asymbol **syms, long symcount)
18561 {
18562 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
18563
18564 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18565 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18566 library to be a relocatable object file. */
18567 BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
18568 if (globals->cmse_implib)
18569 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
18570 else
18571 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
18572 }
18573
18574 /* Allocate target specific section data. */
18575
18576 static bfd_boolean
18577 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
18578 {
18579 if (!sec->used_by_bfd)
18580 {
18581 _arm_elf_section_data *sdata;
18582 bfd_size_type amt = sizeof (*sdata);
18583
18584 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
18585 if (sdata == NULL)
18586 return FALSE;
18587 sec->used_by_bfd = sdata;
18588 }
18589
18590 return _bfd_elf_new_section_hook (abfd, sec);
18591 }
18592
18593
18594 /* Used to order a list of mapping symbols by address. */
18595
18596 static int
18597 elf32_arm_compare_mapping (const void * a, const void * b)
18598 {
18599 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
18600 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
18601
18602 if (amap->vma > bmap->vma)
18603 return 1;
18604 else if (amap->vma < bmap->vma)
18605 return -1;
18606 else if (amap->type > bmap->type)
18607 /* Ensure results do not depend on the host qsort for objects with
18608 multiple mapping symbols at the same address by sorting on type
18609 after vma. */
18610 return 1;
18611 else if (amap->type < bmap->type)
18612 return -1;
18613 else
18614 return 0;
18615 }
18616
18617 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
18618
18619 static unsigned long
18620 offset_prel31 (unsigned long addr, bfd_vma offset)
18621 {
18622 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
18623 }
18624
18625 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18626 relocations. */
18627
18628 static void
18629 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
18630 {
18631 unsigned long first_word = bfd_get_32 (output_bfd, from);
18632 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
18633
18634 /* High bit of first word is supposed to be zero. */
18635 if ((first_word & 0x80000000ul) == 0)
18636 first_word = offset_prel31 (first_word, offset);
18637
18638 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18639 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
18640 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
18641 second_word = offset_prel31 (second_word, offset);
18642
18643 bfd_put_32 (output_bfd, first_word, to);
18644 bfd_put_32 (output_bfd, second_word, to + 4);
18645 }
18646
18647 /* Data for make_branch_to_a8_stub(). */
18648
18649 struct a8_branch_to_stub_data
18650 {
18651 asection *writing_section;
18652 bfd_byte *contents;
18653 };
18654
18655
18656 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
18657 places for a particular section. */
18658
18659 static bfd_boolean
18660 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
18661 void *in_arg)
18662 {
18663 struct elf32_arm_stub_hash_entry *stub_entry;
18664 struct a8_branch_to_stub_data *data;
18665 bfd_byte *contents;
18666 unsigned long branch_insn;
18667 bfd_vma veneered_insn_loc, veneer_entry_loc;
18668 bfd_signed_vma branch_offset;
18669 bfd *abfd;
18670 unsigned int loc;
18671
18672 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18673 data = (struct a8_branch_to_stub_data *) in_arg;
18674
18675 if (stub_entry->target_section != data->writing_section
18676 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
18677 return TRUE;
18678
18679 contents = data->contents;
18680
18681 /* We use target_section as Cortex-A8 erratum workaround stubs are only
18682 generated when both source and target are in the same section. */
18683 veneered_insn_loc = stub_entry->target_section->output_section->vma
18684 + stub_entry->target_section->output_offset
18685 + stub_entry->source_value;
18686
18687 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
18688 + stub_entry->stub_sec->output_offset
18689 + stub_entry->stub_offset;
18690
18691 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
18692 veneered_insn_loc &= ~3u;
18693
18694 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
18695
18696 abfd = stub_entry->target_section->owner;
18697 loc = stub_entry->source_value;
18698
18699 /* We attempt to avoid this condition by setting stubs_always_after_branch
18700 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18701 This check is just to be on the safe side... */
18702 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
18703 {
18704 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18705 "allocated in unsafe location"), abfd);
18706 return FALSE;
18707 }
18708
18709 switch (stub_entry->stub_type)
18710 {
18711 case arm_stub_a8_veneer_b:
18712 case arm_stub_a8_veneer_b_cond:
18713 branch_insn = 0xf0009000;
18714 goto jump24;
18715
18716 case arm_stub_a8_veneer_blx:
18717 branch_insn = 0xf000e800;
18718 goto jump24;
18719
18720 case arm_stub_a8_veneer_bl:
18721 {
18722 unsigned int i1, j1, i2, j2, s;
18723
18724 branch_insn = 0xf000d000;
18725
18726 jump24:
18727 if (branch_offset < -16777216 || branch_offset > 16777214)
18728 {
18729 /* There's not much we can do apart from complain if this
18730 happens. */
18731 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18732 "of range (input file too large)"), abfd);
18733 return FALSE;
18734 }
18735
18736 /* i1 = not(j1 eor s), so:
18737 not i1 = j1 eor s
18738 j1 = (not i1) eor s. */
18739
18740 branch_insn |= (branch_offset >> 1) & 0x7ff;
18741 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
18742 i2 = (branch_offset >> 22) & 1;
18743 i1 = (branch_offset >> 23) & 1;
18744 s = (branch_offset >> 24) & 1;
18745 j1 = (!i1) ^ s;
18746 j2 = (!i2) ^ s;
18747 branch_insn |= j2 << 11;
18748 branch_insn |= j1 << 13;
18749 branch_insn |= s << 26;
18750 }
18751 break;
18752
18753 default:
18754 BFD_FAIL ();
18755 return FALSE;
18756 }
18757
18758 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
18759 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
18760
18761 return TRUE;
18762 }
18763
18764 /* Beginning of stm32l4xx work-around. */
18765
18766 /* Functions encoding instructions necessary for the emission of the
18767 fix-stm32l4xx-629360.
18768 Encoding is extracted from the
18769 ARM (C) Architecture Reference Manual
18770 ARMv7-A and ARMv7-R edition
18771 ARM DDI 0406C.b (ID072512). */
18772
18773 static inline bfd_vma
18774 create_instruction_branch_absolute (int branch_offset)
18775 {
18776 /* A8.8.18 B (A8-334)
18777 B target_address (Encoding T4). */
18778 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
18779 /* jump offset is: S:I1:I2:imm10:imm11:0. */
18780 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
18781
18782 int s = ((branch_offset & 0x1000000) >> 24);
18783 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
18784 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
18785
18786 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
18787 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
18788
18789 bfd_vma patched_inst = 0xf0009000
18790 | s << 26 /* S. */
18791 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
18792 | j1 << 13 /* J1. */
18793 | j2 << 11 /* J2. */
18794 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
18795
18796 return patched_inst;
18797 }
18798
18799 static inline bfd_vma
18800 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
18801 {
18802 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18803 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
18804 bfd_vma patched_inst = 0xe8900000
18805 | (/*W=*/wback << 21)
18806 | (base_reg << 16)
18807 | (reg_mask & 0x0000ffff);
18808
18809 return patched_inst;
18810 }
18811
18812 static inline bfd_vma
18813 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
18814 {
18815 /* A8.8.60 LDMDB/LDMEA (A8-402)
18816 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
18817 bfd_vma patched_inst = 0xe9100000
18818 | (/*W=*/wback << 21)
18819 | (base_reg << 16)
18820 | (reg_mask & 0x0000ffff);
18821
18822 return patched_inst;
18823 }
18824
18825 static inline bfd_vma
18826 create_instruction_mov (int target_reg, int source_reg)
18827 {
18828 /* A8.8.103 MOV (register) (A8-486)
18829 MOV Rd, Rm (Encoding T1). */
18830 bfd_vma patched_inst = 0x4600
18831 | (target_reg & 0x7)
18832 | ((target_reg & 0x8) >> 3) << 7
18833 | (source_reg << 3);
18834
18835 return patched_inst;
18836 }
18837
18838 static inline bfd_vma
18839 create_instruction_sub (int target_reg, int source_reg, int value)
18840 {
18841 /* A8.8.221 SUB (immediate) (A8-708)
18842 SUB Rd, Rn, #value (Encoding T3). */
18843 bfd_vma patched_inst = 0xf1a00000
18844 | (target_reg << 8)
18845 | (source_reg << 16)
18846 | (/*S=*/0 << 20)
18847 | ((value & 0x800) >> 11) << 26
18848 | ((value & 0x700) >> 8) << 12
18849 | (value & 0x0ff);
18850
18851 return patched_inst;
18852 }
18853
18854 static inline bfd_vma
18855 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
18856 int first_reg)
18857 {
18858 /* A8.8.332 VLDM (A8-922)
18859 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
18860 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
18861 | (/*W=*/wback << 21)
18862 | (base_reg << 16)
18863 | (num_words & 0x000000ff)
18864 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
18865 | (first_reg & 0x00000001) << 22;
18866
18867 return patched_inst;
18868 }
18869
18870 static inline bfd_vma
18871 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
18872 int first_reg)
18873 {
18874 /* A8.8.332 VLDM (A8-922)
18875 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
18876 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
18877 | (base_reg << 16)
18878 | (num_words & 0x000000ff)
18879 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
18880 | (first_reg & 0x00000001) << 22;
18881
18882 return patched_inst;
18883 }
18884
18885 static inline bfd_vma
18886 create_instruction_udf_w (int value)
18887 {
18888 /* A8.8.247 UDF (A8-758)
18889 Undefined (Encoding T2). */
18890 bfd_vma patched_inst = 0xf7f0a000
18891 | (value & 0x00000fff)
18892 | (value & 0x000f0000) << 16;
18893
18894 return patched_inst;
18895 }
18896
18897 static inline bfd_vma
18898 create_instruction_udf (int value)
18899 {
18900 /* A8.8.247 UDF (A8-758)
18901 Undefined (Encoding T1). */
18902 bfd_vma patched_inst = 0xde00
18903 | (value & 0xff);
18904
18905 return patched_inst;
18906 }
18907
18908 /* Functions writing an instruction in memory, returning the next
18909 memory position to write to. */
18910
18911 static inline bfd_byte *
18912 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
18913 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18914 {
18915 put_thumb2_insn (htab, output_bfd, insn, pt);
18916 return pt + 4;
18917 }
18918
18919 static inline bfd_byte *
18920 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
18921 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18922 {
18923 put_thumb_insn (htab, output_bfd, insn, pt);
18924 return pt + 2;
18925 }
18926
18927 /* Function filling up a region in memory with T1 and T2 UDFs taking
18928 care of alignment. */
18929
18930 static bfd_byte *
18931 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
18932 bfd * output_bfd,
18933 const bfd_byte * const base_stub_contents,
18934 bfd_byte * const from_stub_contents,
18935 const bfd_byte * const end_stub_contents)
18936 {
18937 bfd_byte *current_stub_contents = from_stub_contents;
18938
18939 /* Fill the remaining of the stub with deterministic contents : UDF
18940 instructions.
18941 Check if realignment is needed on modulo 4 frontier using T1, to
18942 further use T2. */
18943 if ((current_stub_contents < end_stub_contents)
18944 && !((current_stub_contents - base_stub_contents) % 2)
18945 && ((current_stub_contents - base_stub_contents) % 4))
18946 current_stub_contents =
18947 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18948 create_instruction_udf (0));
18949
18950 for (; current_stub_contents < end_stub_contents;)
18951 current_stub_contents =
18952 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18953 create_instruction_udf_w (0));
18954
18955 return current_stub_contents;
18956 }
18957
18958 /* Functions writing the stream of instructions equivalent to the
18959 derived sequence for ldmia, ldmdb, vldm respectively. */
18960
18961 static void
18962 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
18963 bfd * output_bfd,
18964 const insn32 initial_insn,
18965 const bfd_byte *const initial_insn_addr,
18966 bfd_byte *const base_stub_contents)
18967 {
18968 int wback = (initial_insn & 0x00200000) >> 21;
18969 int ri, rn = (initial_insn & 0x000F0000) >> 16;
18970 int insn_all_registers = initial_insn & 0x0000ffff;
18971 int insn_low_registers, insn_high_registers;
18972 int usable_register_mask;
18973 int nb_registers = elf32_arm_popcount (insn_all_registers);
18974 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18975 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18976 bfd_byte *current_stub_contents = base_stub_contents;
18977
18978 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
18979
18980 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18981 smaller than 8 registers load sequences that do not cause the
18982 hardware issue. */
18983 if (nb_registers <= 8)
18984 {
18985 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18986 current_stub_contents =
18987 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18988 initial_insn);
18989
18990 /* B initial_insn_addr+4. */
18991 if (!restore_pc)
18992 current_stub_contents =
18993 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18994 create_instruction_branch_absolute
18995 (initial_insn_addr - current_stub_contents));
18996
18997 /* Fill the remaining of the stub with deterministic contents. */
18998 current_stub_contents =
18999 stm32l4xx_fill_stub_udf (htab, output_bfd,
19000 base_stub_contents, current_stub_contents,
19001 base_stub_contents +
19002 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19003
19004 return;
19005 }
19006
19007 /* - reg_list[13] == 0. */
19008 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
19009
19010 /* - reg_list[14] & reg_list[15] != 1. */
19011 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
19012
19013 /* - if (wback==1) reg_list[rn] == 0. */
19014 BFD_ASSERT (!wback || !restore_rn);
19015
19016 /* - nb_registers > 8. */
19017 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
19018
19019 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
19020
19021 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
19022 - One with the 7 lowest registers (register mask 0x007F)
19023 This LDM will finally contain between 2 and 7 registers
19024 - One with the 7 highest registers (register mask 0xDF80)
19025 This ldm will finally contain between 2 and 7 registers. */
19026 insn_low_registers = insn_all_registers & 0x007F;
19027 insn_high_registers = insn_all_registers & 0xDF80;
19028
19029 /* A spare register may be needed during this veneer to temporarily
19030 handle the base register. This register will be restored with the
19031 last LDM operation.
19032 The usable register may be any general purpose register (that
19033 excludes PC, SP, LR : register mask is 0x1FFF). */
19034 usable_register_mask = 0x1FFF;
19035
19036 /* Generate the stub function. */
19037 if (wback)
19038 {
19039 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
19040 current_stub_contents =
19041 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19042 create_instruction_ldmia
19043 (rn, /*wback=*/1, insn_low_registers));
19044
19045 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
19046 current_stub_contents =
19047 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19048 create_instruction_ldmia
19049 (rn, /*wback=*/1, insn_high_registers));
19050 if (!restore_pc)
19051 {
19052 /* B initial_insn_addr+4. */
19053 current_stub_contents =
19054 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19055 create_instruction_branch_absolute
19056 (initial_insn_addr - current_stub_contents));
19057 }
19058 }
19059 else /* if (!wback). */
19060 {
19061 ri = rn;
19062
19063 /* If Rn is not part of the high-register-list, move it there. */
19064 if (!(insn_high_registers & (1 << rn)))
19065 {
19066 /* Choose a Ri in the high-register-list that will be restored. */
19067 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19068
19069 /* MOV Ri, Rn. */
19070 current_stub_contents =
19071 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19072 create_instruction_mov (ri, rn));
19073 }
19074
19075 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
19076 current_stub_contents =
19077 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19078 create_instruction_ldmia
19079 (ri, /*wback=*/1, insn_low_registers));
19080
19081 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
19082 current_stub_contents =
19083 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19084 create_instruction_ldmia
19085 (ri, /*wback=*/0, insn_high_registers));
19086
19087 if (!restore_pc)
19088 {
19089 /* B initial_insn_addr+4. */
19090 current_stub_contents =
19091 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19092 create_instruction_branch_absolute
19093 (initial_insn_addr - current_stub_contents));
19094 }
19095 }
19096
19097 /* Fill the remaining of the stub with deterministic contents. */
19098 current_stub_contents =
19099 stm32l4xx_fill_stub_udf (htab, output_bfd,
19100 base_stub_contents, current_stub_contents,
19101 base_stub_contents +
19102 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19103 }
19104
19105 static void
19106 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
19107 bfd * output_bfd,
19108 const insn32 initial_insn,
19109 const bfd_byte *const initial_insn_addr,
19110 bfd_byte *const base_stub_contents)
19111 {
19112 int wback = (initial_insn & 0x00200000) >> 21;
19113 int ri, rn = (initial_insn & 0x000f0000) >> 16;
19114 int insn_all_registers = initial_insn & 0x0000ffff;
19115 int insn_low_registers, insn_high_registers;
19116 int usable_register_mask;
19117 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
19118 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
19119 int nb_registers = elf32_arm_popcount (insn_all_registers);
19120 bfd_byte *current_stub_contents = base_stub_contents;
19121
19122 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
19123
19124 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19125 smaller than 8 registers load sequences that do not cause the
19126 hardware issue. */
19127 if (nb_registers <= 8)
19128 {
19129 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
19130 current_stub_contents =
19131 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19132 initial_insn);
19133
19134 /* B initial_insn_addr+4. */
19135 current_stub_contents =
19136 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19137 create_instruction_branch_absolute
19138 (initial_insn_addr - current_stub_contents));
19139
19140 /* Fill the remaining of the stub with deterministic contents. */
19141 current_stub_contents =
19142 stm32l4xx_fill_stub_udf (htab, output_bfd,
19143 base_stub_contents, current_stub_contents,
19144 base_stub_contents +
19145 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19146
19147 return;
19148 }
19149
19150 /* - reg_list[13] == 0. */
19151 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
19152
19153 /* - reg_list[14] & reg_list[15] != 1. */
19154 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
19155
19156 /* - if (wback==1) reg_list[rn] == 0. */
19157 BFD_ASSERT (!wback || !restore_rn);
19158
19159 /* - nb_registers > 8. */
19160 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
19161
19162 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
19163
19164 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
19165 - One with the 7 lowest registers (register mask 0x007F)
19166 This LDM will finally contain between 2 and 7 registers
19167 - One with the 7 highest registers (register mask 0xDF80)
19168 This ldm will finally contain between 2 and 7 registers. */
19169 insn_low_registers = insn_all_registers & 0x007F;
19170 insn_high_registers = insn_all_registers & 0xDF80;
19171
19172 /* A spare register may be needed during this veneer to temporarily
19173 handle the base register. This register will be restored with
19174 the last LDM operation.
19175 The usable register may be any general purpose register (that excludes
19176 PC, SP, LR : register mask is 0x1FFF). */
19177 usable_register_mask = 0x1FFF;
19178
19179 /* Generate the stub function. */
19180 if (!wback && !restore_pc && !restore_rn)
19181 {
19182 /* Choose a Ri in the low-register-list that will be restored. */
19183 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19184
19185 /* MOV Ri, Rn. */
19186 current_stub_contents =
19187 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19188 create_instruction_mov (ri, rn));
19189
19190 /* LDMDB Ri!, {R-high-register-list}. */
19191 current_stub_contents =
19192 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19193 create_instruction_ldmdb
19194 (ri, /*wback=*/1, insn_high_registers));
19195
19196 /* LDMDB Ri, {R-low-register-list}. */
19197 current_stub_contents =
19198 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19199 create_instruction_ldmdb
19200 (ri, /*wback=*/0, insn_low_registers));
19201
19202 /* B initial_insn_addr+4. */
19203 current_stub_contents =
19204 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19205 create_instruction_branch_absolute
19206 (initial_insn_addr - current_stub_contents));
19207 }
19208 else if (wback && !restore_pc && !restore_rn)
19209 {
19210 /* LDMDB Rn!, {R-high-register-list}. */
19211 current_stub_contents =
19212 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19213 create_instruction_ldmdb
19214 (rn, /*wback=*/1, insn_high_registers));
19215
19216 /* LDMDB Rn!, {R-low-register-list}. */
19217 current_stub_contents =
19218 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19219 create_instruction_ldmdb
19220 (rn, /*wback=*/1, insn_low_registers));
19221
19222 /* B initial_insn_addr+4. */
19223 current_stub_contents =
19224 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19225 create_instruction_branch_absolute
19226 (initial_insn_addr - current_stub_contents));
19227 }
19228 else if (!wback && restore_pc && !restore_rn)
19229 {
19230 /* Choose a Ri in the high-register-list that will be restored. */
19231 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19232
19233 /* SUB Ri, Rn, #(4*nb_registers). */
19234 current_stub_contents =
19235 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19236 create_instruction_sub (ri, rn, (4 * nb_registers)));
19237
19238 /* LDMIA Ri!, {R-low-register-list}. */
19239 current_stub_contents =
19240 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19241 create_instruction_ldmia
19242 (ri, /*wback=*/1, insn_low_registers));
19243
19244 /* LDMIA Ri, {R-high-register-list}. */
19245 current_stub_contents =
19246 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19247 create_instruction_ldmia
19248 (ri, /*wback=*/0, insn_high_registers));
19249 }
19250 else if (wback && restore_pc && !restore_rn)
19251 {
19252 /* Choose a Ri in the high-register-list that will be restored. */
19253 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19254
19255 /* SUB Rn, Rn, #(4*nb_registers) */
19256 current_stub_contents =
19257 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19258 create_instruction_sub (rn, rn, (4 * nb_registers)));
19259
19260 /* MOV Ri, Rn. */
19261 current_stub_contents =
19262 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19263 create_instruction_mov (ri, rn));
19264
19265 /* LDMIA Ri!, {R-low-register-list}. */
19266 current_stub_contents =
19267 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19268 create_instruction_ldmia
19269 (ri, /*wback=*/1, insn_low_registers));
19270
19271 /* LDMIA Ri, {R-high-register-list}. */
19272 current_stub_contents =
19273 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19274 create_instruction_ldmia
19275 (ri, /*wback=*/0, insn_high_registers));
19276 }
19277 else if (!wback && !restore_pc && restore_rn)
19278 {
19279 ri = rn;
19280 if (!(insn_low_registers & (1 << rn)))
19281 {
19282 /* Choose a Ri in the low-register-list that will be restored. */
19283 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19284
19285 /* MOV Ri, Rn. */
19286 current_stub_contents =
19287 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19288 create_instruction_mov (ri, rn));
19289 }
19290
19291 /* LDMDB Ri!, {R-high-register-list}. */
19292 current_stub_contents =
19293 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19294 create_instruction_ldmdb
19295 (ri, /*wback=*/1, insn_high_registers));
19296
19297 /* LDMDB Ri, {R-low-register-list}. */
19298 current_stub_contents =
19299 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19300 create_instruction_ldmdb
19301 (ri, /*wback=*/0, insn_low_registers));
19302
19303 /* B initial_insn_addr+4. */
19304 current_stub_contents =
19305 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19306 create_instruction_branch_absolute
19307 (initial_insn_addr - current_stub_contents));
19308 }
19309 else if (!wback && restore_pc && restore_rn)
19310 {
19311 ri = rn;
19312 if (!(insn_high_registers & (1 << rn)))
19313 {
19314 /* Choose a Ri in the high-register-list that will be restored. */
19315 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19316 }
19317
19318 /* SUB Ri, Rn, #(4*nb_registers). */
19319 current_stub_contents =
19320 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19321 create_instruction_sub (ri, rn, (4 * nb_registers)));
19322
19323 /* LDMIA Ri!, {R-low-register-list}. */
19324 current_stub_contents =
19325 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19326 create_instruction_ldmia
19327 (ri, /*wback=*/1, insn_low_registers));
19328
19329 /* LDMIA Ri, {R-high-register-list}. */
19330 current_stub_contents =
19331 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19332 create_instruction_ldmia
19333 (ri, /*wback=*/0, insn_high_registers));
19334 }
19335 else if (wback && restore_rn)
19336 {
19337 /* The assembler should not have accepted to encode this. */
19338 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
19339 "undefined behavior.\n");
19340 }
19341
19342 /* Fill the remaining of the stub with deterministic contents. */
19343 current_stub_contents =
19344 stm32l4xx_fill_stub_udf (htab, output_bfd,
19345 base_stub_contents, current_stub_contents,
19346 base_stub_contents +
19347 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19348
19349 }
19350
19351 static void
19352 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
19353 bfd * output_bfd,
19354 const insn32 initial_insn,
19355 const bfd_byte *const initial_insn_addr,
19356 bfd_byte *const base_stub_contents)
19357 {
19358 int num_words = initial_insn & 0xff;
19359 bfd_byte *current_stub_contents = base_stub_contents;
19360
19361 BFD_ASSERT (is_thumb2_vldm (initial_insn));
19362
19363 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19364 smaller than 8 words load sequences that do not cause the
19365 hardware issue. */
19366 if (num_words <= 8)
19367 {
19368 /* Untouched instruction. */
19369 current_stub_contents =
19370 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19371 initial_insn);
19372
19373 /* B initial_insn_addr+4. */
19374 current_stub_contents =
19375 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19376 create_instruction_branch_absolute
19377 (initial_insn_addr - current_stub_contents));
19378 }
19379 else
19380 {
19381 bfd_boolean is_dp = /* DP encoding. */
19382 (initial_insn & 0xfe100f00) == 0xec100b00;
19383 bfd_boolean is_ia_nobang = /* (IA without !). */
19384 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
19385 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
19386 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
19387 bfd_boolean is_db_bang = /* (DB with !). */
19388 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
19389 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
19390 /* d = UInt (Vd:D);. */
19391 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
19392 | (((unsigned int)initial_insn << 9) >> 31);
19393
19394 /* Compute the number of 8-words chunks needed to split. */
19395 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
19396 int chunk;
19397
19398 /* The test coverage has been done assuming the following
19399 hypothesis that exactly one of the previous is_ predicates is
19400 true. */
19401 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
19402 && !(is_ia_nobang & is_ia_bang & is_db_bang));
19403
19404 /* We treat the cutting of the words in one pass for all
19405 cases, then we emit the adjustments:
19406
19407 vldm rx, {...}
19408 -> vldm rx!, {8_words_or_less} for each needed 8_word
19409 -> sub rx, rx, #size (list)
19410
19411 vldm rx!, {...}
19412 -> vldm rx!, {8_words_or_less} for each needed 8_word
19413 This also handles vpop instruction (when rx is sp)
19414
19415 vldmd rx!, {...}
19416 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
19417 for (chunk = 0; chunk < chunks; ++chunk)
19418 {
19419 bfd_vma new_insn = 0;
19420
19421 if (is_ia_nobang || is_ia_bang)
19422 {
19423 new_insn = create_instruction_vldmia
19424 (base_reg,
19425 is_dp,
19426 /*wback= . */1,
19427 chunks - (chunk + 1) ?
19428 8 : num_words - chunk * 8,
19429 first_reg + chunk * 8);
19430 }
19431 else if (is_db_bang)
19432 {
19433 new_insn = create_instruction_vldmdb
19434 (base_reg,
19435 is_dp,
19436 chunks - (chunk + 1) ?
19437 8 : num_words - chunk * 8,
19438 first_reg + chunk * 8);
19439 }
19440
19441 if (new_insn)
19442 current_stub_contents =
19443 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19444 new_insn);
19445 }
19446
19447 /* Only this case requires the base register compensation
19448 subtract. */
19449 if (is_ia_nobang)
19450 {
19451 current_stub_contents =
19452 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19453 create_instruction_sub
19454 (base_reg, base_reg, 4*num_words));
19455 }
19456
19457 /* B initial_insn_addr+4. */
19458 current_stub_contents =
19459 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19460 create_instruction_branch_absolute
19461 (initial_insn_addr - current_stub_contents));
19462 }
19463
19464 /* Fill the remaining of the stub with deterministic contents. */
19465 current_stub_contents =
19466 stm32l4xx_fill_stub_udf (htab, output_bfd,
19467 base_stub_contents, current_stub_contents,
19468 base_stub_contents +
19469 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
19470 }
19471
19472 static void
19473 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
19474 bfd * output_bfd,
19475 const insn32 wrong_insn,
19476 const bfd_byte *const wrong_insn_addr,
19477 bfd_byte *const stub_contents)
19478 {
19479 if (is_thumb2_ldmia (wrong_insn))
19480 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
19481 wrong_insn, wrong_insn_addr,
19482 stub_contents);
19483 else if (is_thumb2_ldmdb (wrong_insn))
19484 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
19485 wrong_insn, wrong_insn_addr,
19486 stub_contents);
19487 else if (is_thumb2_vldm (wrong_insn))
19488 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
19489 wrong_insn, wrong_insn_addr,
19490 stub_contents);
19491 }
19492
19493 /* End of stm32l4xx work-around. */
19494
19495
19496 /* Do code byteswapping. Return FALSE afterwards so that the section is
19497 written out as normal. */
19498
19499 static bfd_boolean
19500 elf32_arm_write_section (bfd *output_bfd,
19501 struct bfd_link_info *link_info,
19502 asection *sec,
19503 bfd_byte *contents)
19504 {
19505 unsigned int mapcount, errcount;
19506 _arm_elf_section_data *arm_data;
19507 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
19508 elf32_arm_section_map *map;
19509 elf32_vfp11_erratum_list *errnode;
19510 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
19511 bfd_vma ptr;
19512 bfd_vma end;
19513 bfd_vma offset = sec->output_section->vma + sec->output_offset;
19514 bfd_byte tmp;
19515 unsigned int i;
19516
19517 if (globals == NULL)
19518 return FALSE;
19519
19520 /* If this section has not been allocated an _arm_elf_section_data
19521 structure then we cannot record anything. */
19522 arm_data = get_arm_elf_section_data (sec);
19523 if (arm_data == NULL)
19524 return FALSE;
19525
19526 mapcount = arm_data->mapcount;
19527 map = arm_data->map;
19528 errcount = arm_data->erratumcount;
19529
19530 if (errcount != 0)
19531 {
19532 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
19533
19534 for (errnode = arm_data->erratumlist; errnode != 0;
19535 errnode = errnode->next)
19536 {
19537 bfd_vma target = errnode->vma - offset;
19538
19539 switch (errnode->type)
19540 {
19541 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
19542 {
19543 bfd_vma branch_to_veneer;
19544 /* Original condition code of instruction, plus bit mask for
19545 ARM B instruction. */
19546 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
19547 | 0x0a000000;
19548
19549 /* The instruction is before the label. */
19550 target -= 4;
19551
19552 /* Above offset included in -4 below. */
19553 branch_to_veneer = errnode->u.b.veneer->vma
19554 - errnode->vma - 4;
19555
19556 if ((signed) branch_to_veneer < -(1 << 25)
19557 || (signed) branch_to_veneer >= (1 << 25))
19558 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19559 "range"), output_bfd);
19560
19561 insn |= (branch_to_veneer >> 2) & 0xffffff;
19562 contents[endianflip ^ target] = insn & 0xff;
19563 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19564 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19565 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19566 }
19567 break;
19568
19569 case VFP11_ERRATUM_ARM_VENEER:
19570 {
19571 bfd_vma branch_from_veneer;
19572 unsigned int insn;
19573
19574 /* Take size of veneer into account. */
19575 branch_from_veneer = errnode->u.v.branch->vma
19576 - errnode->vma - 12;
19577
19578 if ((signed) branch_from_veneer < -(1 << 25)
19579 || (signed) branch_from_veneer >= (1 << 25))
19580 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19581 "range"), output_bfd);
19582
19583 /* Original instruction. */
19584 insn = errnode->u.v.branch->u.b.vfp_insn;
19585 contents[endianflip ^ target] = insn & 0xff;
19586 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19587 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19588 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19589
19590 /* Branch back to insn after original insn. */
19591 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
19592 contents[endianflip ^ (target + 4)] = insn & 0xff;
19593 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
19594 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
19595 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
19596 }
19597 break;
19598
19599 default:
19600 abort ();
19601 }
19602 }
19603 }
19604
19605 if (arm_data->stm32l4xx_erratumcount != 0)
19606 {
19607 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
19608 stm32l4xx_errnode != 0;
19609 stm32l4xx_errnode = stm32l4xx_errnode->next)
19610 {
19611 bfd_vma target = stm32l4xx_errnode->vma - offset;
19612
19613 switch (stm32l4xx_errnode->type)
19614 {
19615 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
19616 {
19617 unsigned int insn;
19618 bfd_vma branch_to_veneer =
19619 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
19620
19621 if ((signed) branch_to_veneer < -(1 << 24)
19622 || (signed) branch_to_veneer >= (1 << 24))
19623 {
19624 bfd_vma out_of_range =
19625 ((signed) branch_to_veneer < -(1 << 24)) ?
19626 - branch_to_veneer - (1 << 24) :
19627 ((signed) branch_to_veneer >= (1 << 24)) ?
19628 branch_to_veneer - (1 << 24) : 0;
19629
19630 _bfd_error_handler
19631 (_("%pB(%#" PRIx64 "): error: "
19632 "cannot create STM32L4XX veneer; "
19633 "jump out of range by %" PRId64 " bytes; "
19634 "cannot encode branch instruction"),
19635 output_bfd,
19636 (uint64_t) (stm32l4xx_errnode->vma - 4),
19637 (int64_t) out_of_range);
19638 continue;
19639 }
19640
19641 insn = create_instruction_branch_absolute
19642 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
19643
19644 /* The instruction is before the label. */
19645 target -= 4;
19646
19647 put_thumb2_insn (globals, output_bfd,
19648 (bfd_vma) insn, contents + target);
19649 }
19650 break;
19651
19652 case STM32L4XX_ERRATUM_VENEER:
19653 {
19654 bfd_byte * veneer;
19655 bfd_byte * veneer_r;
19656 unsigned int insn;
19657
19658 veneer = contents + target;
19659 veneer_r = veneer
19660 + stm32l4xx_errnode->u.b.veneer->vma
19661 - stm32l4xx_errnode->vma - 4;
19662
19663 if ((signed) (veneer_r - veneer -
19664 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
19665 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
19666 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
19667 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
19668 || (signed) (veneer_r - veneer) >= (1 << 24))
19669 {
19670 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19671 "veneer"), output_bfd);
19672 continue;
19673 }
19674
19675 /* Original instruction. */
19676 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
19677
19678 stm32l4xx_create_replacing_stub
19679 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
19680 }
19681 break;
19682
19683 default:
19684 abort ();
19685 }
19686 }
19687 }
19688
19689 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
19690 {
19691 arm_unwind_table_edit *edit_node
19692 = arm_data->u.exidx.unwind_edit_list;
19693 /* Now, sec->size is the size of the section we will write. The original
19694 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19695 markers) was sec->rawsize. (This isn't the case if we perform no
19696 edits, then rawsize will be zero and we should use size). */
19697 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
19698 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
19699 unsigned int in_index, out_index;
19700 bfd_vma add_to_offsets = 0;
19701
19702 if (edited_contents == NULL)
19703 return FALSE;
19704 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
19705 {
19706 if (edit_node)
19707 {
19708 unsigned int edit_index = edit_node->index;
19709
19710 if (in_index < edit_index && in_index * 8 < input_size)
19711 {
19712 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19713 contents + in_index * 8, add_to_offsets);
19714 out_index++;
19715 in_index++;
19716 }
19717 else if (in_index == edit_index
19718 || (in_index * 8 >= input_size
19719 && edit_index == UINT_MAX))
19720 {
19721 switch (edit_node->type)
19722 {
19723 case DELETE_EXIDX_ENTRY:
19724 in_index++;
19725 add_to_offsets += 8;
19726 break;
19727
19728 case INSERT_EXIDX_CANTUNWIND_AT_END:
19729 {
19730 asection *text_sec = edit_node->linked_section;
19731 bfd_vma text_offset = text_sec->output_section->vma
19732 + text_sec->output_offset
19733 + text_sec->size;
19734 bfd_vma exidx_offset = offset + out_index * 8;
19735 unsigned long prel31_offset;
19736
19737 /* Note: this is meant to be equivalent to an
19738 R_ARM_PREL31 relocation. These synthetic
19739 EXIDX_CANTUNWIND markers are not relocated by the
19740 usual BFD method. */
19741 prel31_offset = (text_offset - exidx_offset)
19742 & 0x7ffffffful;
19743 if (bfd_link_relocatable (link_info))
19744 {
19745 /* Here relocation for new EXIDX_CANTUNWIND is
19746 created, so there is no need to
19747 adjust offset by hand. */
19748 prel31_offset = text_sec->output_offset
19749 + text_sec->size;
19750 }
19751
19752 /* First address we can't unwind. */
19753 bfd_put_32 (output_bfd, prel31_offset,
19754 &edited_contents[out_index * 8]);
19755
19756 /* Code for EXIDX_CANTUNWIND. */
19757 bfd_put_32 (output_bfd, 0x1,
19758 &edited_contents[out_index * 8 + 4]);
19759
19760 out_index++;
19761 add_to_offsets -= 8;
19762 }
19763 break;
19764 }
19765
19766 edit_node = edit_node->next;
19767 }
19768 }
19769 else
19770 {
19771 /* No more edits, copy remaining entries verbatim. */
19772 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19773 contents + in_index * 8, add_to_offsets);
19774 out_index++;
19775 in_index++;
19776 }
19777 }
19778
19779 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
19780 bfd_set_section_contents (output_bfd, sec->output_section,
19781 edited_contents,
19782 (file_ptr) sec->output_offset, sec->size);
19783
19784 return TRUE;
19785 }
19786
19787 /* Fix code to point to Cortex-A8 erratum stubs. */
19788 if (globals->fix_cortex_a8)
19789 {
19790 struct a8_branch_to_stub_data data;
19791
19792 data.writing_section = sec;
19793 data.contents = contents;
19794
19795 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
19796 & data);
19797 }
19798
19799 if (mapcount == 0)
19800 return FALSE;
19801
19802 if (globals->byteswap_code)
19803 {
19804 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
19805
19806 ptr = map[0].vma;
19807 for (i = 0; i < mapcount; i++)
19808 {
19809 if (i == mapcount - 1)
19810 end = sec->size;
19811 else
19812 end = map[i + 1].vma;
19813
19814 switch (map[i].type)
19815 {
19816 case 'a':
19817 /* Byte swap code words. */
19818 while (ptr + 3 < end)
19819 {
19820 tmp = contents[ptr];
19821 contents[ptr] = contents[ptr + 3];
19822 contents[ptr + 3] = tmp;
19823 tmp = contents[ptr + 1];
19824 contents[ptr + 1] = contents[ptr + 2];
19825 contents[ptr + 2] = tmp;
19826 ptr += 4;
19827 }
19828 break;
19829
19830 case 't':
19831 /* Byte swap code halfwords. */
19832 while (ptr + 1 < end)
19833 {
19834 tmp = contents[ptr];
19835 contents[ptr] = contents[ptr + 1];
19836 contents[ptr + 1] = tmp;
19837 ptr += 2;
19838 }
19839 break;
19840
19841 case 'd':
19842 /* Leave data alone. */
19843 break;
19844 }
19845 ptr = end;
19846 }
19847 }
19848
19849 free (map);
19850 arm_data->mapcount = -1;
19851 arm_data->mapsize = 0;
19852 arm_data->map = NULL;
19853
19854 return FALSE;
19855 }
19856
19857 /* Mangle thumb function symbols as we read them in. */
19858
19859 static bfd_boolean
19860 elf32_arm_swap_symbol_in (bfd * abfd,
19861 const void *psrc,
19862 const void *pshn,
19863 Elf_Internal_Sym *dst)
19864 {
19865 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
19866 return FALSE;
19867 dst->st_target_internal = 0;
19868
19869 /* New EABI objects mark thumb function symbols by setting the low bit of
19870 the address. */
19871 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
19872 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
19873 {
19874 if (dst->st_value & 1)
19875 {
19876 dst->st_value &= ~(bfd_vma) 1;
19877 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
19878 ST_BRANCH_TO_THUMB);
19879 }
19880 else
19881 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
19882 }
19883 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
19884 {
19885 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
19886 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
19887 }
19888 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
19889 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
19890 else
19891 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
19892
19893 return TRUE;
19894 }
19895
19896
19897 /* Mangle thumb function symbols as we write them out. */
19898
19899 static void
19900 elf32_arm_swap_symbol_out (bfd *abfd,
19901 const Elf_Internal_Sym *src,
19902 void *cdst,
19903 void *shndx)
19904 {
19905 Elf_Internal_Sym newsym;
19906
19907 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19908 of the address set, as per the new EABI. We do this unconditionally
19909 because objcopy does not set the elf header flags until after
19910 it writes out the symbol table. */
19911 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
19912 {
19913 newsym = *src;
19914 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
19915 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
19916 if (newsym.st_shndx != SHN_UNDEF)
19917 {
19918 /* Do this only for defined symbols. At link type, the static
19919 linker will simulate the work of dynamic linker of resolving
19920 symbols and will carry over the thumbness of found symbols to
19921 the output symbol table. It's not clear how it happens, but
19922 the thumbness of undefined symbols can well be different at
19923 runtime, and writing '1' for them will be confusing for users
19924 and possibly for dynamic linker itself.
19925 */
19926 newsym.st_value |= 1;
19927 }
19928
19929 src = &newsym;
19930 }
19931 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
19932 }
19933
19934 /* Add the PT_ARM_EXIDX program header. */
19935
19936 static bfd_boolean
19937 elf32_arm_modify_segment_map (bfd *abfd,
19938 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19939 {
19940 struct elf_segment_map *m;
19941 asection *sec;
19942
19943 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19944 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19945 {
19946 /* If there is already a PT_ARM_EXIDX header, then we do not
19947 want to add another one. This situation arises when running
19948 "strip"; the input binary already has the header. */
19949 m = elf_seg_map (abfd);
19950 while (m && m->p_type != PT_ARM_EXIDX)
19951 m = m->next;
19952 if (!m)
19953 {
19954 m = (struct elf_segment_map *)
19955 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
19956 if (m == NULL)
19957 return FALSE;
19958 m->p_type = PT_ARM_EXIDX;
19959 m->count = 1;
19960 m->sections[0] = sec;
19961
19962 m->next = elf_seg_map (abfd);
19963 elf_seg_map (abfd) = m;
19964 }
19965 }
19966
19967 return TRUE;
19968 }
19969
19970 /* We may add a PT_ARM_EXIDX program header. */
19971
19972 static int
19973 elf32_arm_additional_program_headers (bfd *abfd,
19974 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19975 {
19976 asection *sec;
19977
19978 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19979 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19980 return 1;
19981 else
19982 return 0;
19983 }
19984
19985 /* Hook called by the linker routine which adds symbols from an object
19986 file. */
19987
19988 static bfd_boolean
19989 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
19990 Elf_Internal_Sym *sym, const char **namep,
19991 flagword *flagsp, asection **secp, bfd_vma *valp)
19992 {
19993 if (elf32_arm_hash_table (info) == NULL)
19994 return FALSE;
19995
19996 if (elf32_arm_hash_table (info)->vxworks_p
19997 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
19998 flagsp, secp, valp))
19999 return FALSE;
20000
20001 return TRUE;
20002 }
20003
20004 /* We use this to override swap_symbol_in and swap_symbol_out. */
20005 const struct elf_size_info elf32_arm_size_info =
20006 {
20007 sizeof (Elf32_External_Ehdr),
20008 sizeof (Elf32_External_Phdr),
20009 sizeof (Elf32_External_Shdr),
20010 sizeof (Elf32_External_Rel),
20011 sizeof (Elf32_External_Rela),
20012 sizeof (Elf32_External_Sym),
20013 sizeof (Elf32_External_Dyn),
20014 sizeof (Elf_External_Note),
20015 4,
20016 1,
20017 32, 2,
20018 ELFCLASS32, EV_CURRENT,
20019 bfd_elf32_write_out_phdrs,
20020 bfd_elf32_write_shdrs_and_ehdr,
20021 bfd_elf32_checksum_contents,
20022 bfd_elf32_write_relocs,
20023 elf32_arm_swap_symbol_in,
20024 elf32_arm_swap_symbol_out,
20025 bfd_elf32_slurp_reloc_table,
20026 bfd_elf32_slurp_symbol_table,
20027 bfd_elf32_swap_dyn_in,
20028 bfd_elf32_swap_dyn_out,
20029 bfd_elf32_swap_reloc_in,
20030 bfd_elf32_swap_reloc_out,
20031 bfd_elf32_swap_reloca_in,
20032 bfd_elf32_swap_reloca_out
20033 };
20034
20035 static bfd_vma
20036 read_code32 (const bfd *abfd, const bfd_byte *addr)
20037 {
20038 /* V7 BE8 code is always little endian. */
20039 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
20040 return bfd_getl32 (addr);
20041
20042 return bfd_get_32 (abfd, addr);
20043 }
20044
20045 static bfd_vma
20046 read_code16 (const bfd *abfd, const bfd_byte *addr)
20047 {
20048 /* V7 BE8 code is always little endian. */
20049 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
20050 return bfd_getl16 (addr);
20051
20052 return bfd_get_16 (abfd, addr);
20053 }
20054
20055 /* Return size of plt0 entry starting at ADDR
20056 or (bfd_vma) -1 if size can not be determined. */
20057
20058 static bfd_vma
20059 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
20060 {
20061 bfd_vma first_word;
20062 bfd_vma plt0_size;
20063
20064 first_word = read_code32 (abfd, addr);
20065
20066 if (first_word == elf32_arm_plt0_entry[0])
20067 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
20068 else if (first_word == elf32_thumb2_plt0_entry[0])
20069 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
20070 else
20071 /* We don't yet handle this PLT format. */
20072 return (bfd_vma) -1;
20073
20074 return plt0_size;
20075 }
20076
20077 /* Return size of plt entry starting at offset OFFSET
20078 of plt section located at address START
20079 or (bfd_vma) -1 if size can not be determined. */
20080
20081 static bfd_vma
20082 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
20083 {
20084 bfd_vma first_insn;
20085 bfd_vma plt_size = 0;
20086 const bfd_byte *addr = start + offset;
20087
20088 /* PLT entry size if fixed on Thumb-only platforms. */
20089 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
20090 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
20091
20092 /* Respect Thumb stub if necessary. */
20093 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
20094 {
20095 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
20096 }
20097
20098 /* Strip immediate from first add. */
20099 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
20100
20101 #ifdef FOUR_WORD_PLT
20102 if (first_insn == elf32_arm_plt_entry[0])
20103 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
20104 #else
20105 if (first_insn == elf32_arm_plt_entry_long[0])
20106 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
20107 else if (first_insn == elf32_arm_plt_entry_short[0])
20108 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
20109 #endif
20110 else
20111 /* We don't yet handle this PLT format. */
20112 return (bfd_vma) -1;
20113
20114 return plt_size;
20115 }
20116
20117 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
20118
20119 static long
20120 elf32_arm_get_synthetic_symtab (bfd *abfd,
20121 long symcount ATTRIBUTE_UNUSED,
20122 asymbol **syms ATTRIBUTE_UNUSED,
20123 long dynsymcount,
20124 asymbol **dynsyms,
20125 asymbol **ret)
20126 {
20127 asection *relplt;
20128 asymbol *s;
20129 arelent *p;
20130 long count, i, n;
20131 size_t size;
20132 Elf_Internal_Shdr *hdr;
20133 char *names;
20134 asection *plt;
20135 bfd_vma offset;
20136 bfd_byte *data;
20137
20138 *ret = NULL;
20139
20140 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
20141 return 0;
20142
20143 if (dynsymcount <= 0)
20144 return 0;
20145
20146 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
20147 if (relplt == NULL)
20148 return 0;
20149
20150 hdr = &elf_section_data (relplt)->this_hdr;
20151 if (hdr->sh_link != elf_dynsymtab (abfd)
20152 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
20153 return 0;
20154
20155 plt = bfd_get_section_by_name (abfd, ".plt");
20156 if (plt == NULL)
20157 return 0;
20158
20159 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
20160 return -1;
20161
20162 data = plt->contents;
20163 if (data == NULL)
20164 {
20165 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
20166 return -1;
20167 bfd_cache_section_contents((asection *) plt, data);
20168 }
20169
20170 count = relplt->size / hdr->sh_entsize;
20171 size = count * sizeof (asymbol);
20172 p = relplt->relocation;
20173 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
20174 {
20175 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
20176 if (p->addend != 0)
20177 size += sizeof ("+0x") - 1 + 8;
20178 }
20179
20180 s = *ret = (asymbol *) bfd_malloc (size);
20181 if (s == NULL)
20182 return -1;
20183
20184 offset = elf32_arm_plt0_size (abfd, data);
20185 if (offset == (bfd_vma) -1)
20186 return -1;
20187
20188 names = (char *) (s + count);
20189 p = relplt->relocation;
20190 n = 0;
20191 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
20192 {
20193 size_t len;
20194
20195 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
20196 if (plt_size == (bfd_vma) -1)
20197 break;
20198
20199 *s = **p->sym_ptr_ptr;
20200 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
20201 we are defining a symbol, ensure one of them is set. */
20202 if ((s->flags & BSF_LOCAL) == 0)
20203 s->flags |= BSF_GLOBAL;
20204 s->flags |= BSF_SYNTHETIC;
20205 s->section = plt;
20206 s->value = offset;
20207 s->name = names;
20208 s->udata.p = NULL;
20209 len = strlen ((*p->sym_ptr_ptr)->name);
20210 memcpy (names, (*p->sym_ptr_ptr)->name, len);
20211 names += len;
20212 if (p->addend != 0)
20213 {
20214 char buf[30], *a;
20215
20216 memcpy (names, "+0x", sizeof ("+0x") - 1);
20217 names += sizeof ("+0x") - 1;
20218 bfd_sprintf_vma (abfd, buf, p->addend);
20219 for (a = buf; *a == '0'; ++a)
20220 ;
20221 len = strlen (a);
20222 memcpy (names, a, len);
20223 names += len;
20224 }
20225 memcpy (names, "@plt", sizeof ("@plt"));
20226 names += sizeof ("@plt");
20227 ++s, ++n;
20228 offset += plt_size;
20229 }
20230
20231 return n;
20232 }
20233
20234 static bfd_boolean
20235 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
20236 {
20237 if (hdr->sh_flags & SHF_ARM_PURECODE)
20238 *flags |= SEC_ELF_PURECODE;
20239 return TRUE;
20240 }
20241
20242 static flagword
20243 elf32_arm_lookup_section_flags (char *flag_name)
20244 {
20245 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
20246 return SHF_ARM_PURECODE;
20247
20248 return SEC_NO_FLAGS;
20249 }
20250
20251 static unsigned int
20252 elf32_arm_count_additional_relocs (asection *sec)
20253 {
20254 struct _arm_elf_section_data *arm_data;
20255 arm_data = get_arm_elf_section_data (sec);
20256
20257 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
20258 }
20259
20260 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
20261 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
20262 FALSE otherwise. ISECTION is the best guess matching section from the
20263 input bfd IBFD, but it might be NULL. */
20264
20265 static bfd_boolean
20266 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
20267 bfd *obfd ATTRIBUTE_UNUSED,
20268 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
20269 Elf_Internal_Shdr *osection)
20270 {
20271 switch (osection->sh_type)
20272 {
20273 case SHT_ARM_EXIDX:
20274 {
20275 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
20276 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
20277 unsigned i = 0;
20278
20279 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
20280 osection->sh_info = 0;
20281
20282 /* The sh_link field must be set to the text section associated with
20283 this index section. Unfortunately the ARM EHABI does not specify
20284 exactly how to determine this association. Our caller does try
20285 to match up OSECTION with its corresponding input section however
20286 so that is a good first guess. */
20287 if (isection != NULL
20288 && osection->bfd_section != NULL
20289 && isection->bfd_section != NULL
20290 && isection->bfd_section->output_section != NULL
20291 && isection->bfd_section->output_section == osection->bfd_section
20292 && iheaders != NULL
20293 && isection->sh_link > 0
20294 && isection->sh_link < elf_numsections (ibfd)
20295 && iheaders[isection->sh_link]->bfd_section != NULL
20296 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
20297 )
20298 {
20299 for (i = elf_numsections (obfd); i-- > 0;)
20300 if (oheaders[i]->bfd_section
20301 == iheaders[isection->sh_link]->bfd_section->output_section)
20302 break;
20303 }
20304
20305 if (i == 0)
20306 {
20307 /* Failing that we have to find a matching section ourselves. If
20308 we had the output section name available we could compare that
20309 with input section names. Unfortunately we don't. So instead
20310 we use a simple heuristic and look for the nearest executable
20311 section before this one. */
20312 for (i = elf_numsections (obfd); i-- > 0;)
20313 if (oheaders[i] == osection)
20314 break;
20315 if (i == 0)
20316 break;
20317
20318 while (i-- > 0)
20319 if (oheaders[i]->sh_type == SHT_PROGBITS
20320 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
20321 == (SHF_ALLOC | SHF_EXECINSTR))
20322 break;
20323 }
20324
20325 if (i)
20326 {
20327 osection->sh_link = i;
20328 /* If the text section was part of a group
20329 then the index section should be too. */
20330 if (oheaders[i]->sh_flags & SHF_GROUP)
20331 osection->sh_flags |= SHF_GROUP;
20332 return TRUE;
20333 }
20334 }
20335 break;
20336
20337 case SHT_ARM_PREEMPTMAP:
20338 osection->sh_flags = SHF_ALLOC;
20339 break;
20340
20341 case SHT_ARM_ATTRIBUTES:
20342 case SHT_ARM_DEBUGOVERLAY:
20343 case SHT_ARM_OVERLAYSECTION:
20344 default:
20345 break;
20346 }
20347
20348 return FALSE;
20349 }
20350
20351 /* Returns TRUE if NAME is an ARM mapping symbol.
20352 Traditionally the symbols $a, $d and $t have been used.
20353 The ARM ELF standard also defines $x (for A64 code). It also allows a
20354 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
20355 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
20356 not support them here. $t.x indicates the start of ThumbEE instructions. */
20357
20358 static bfd_boolean
20359 is_arm_mapping_symbol (const char * name)
20360 {
20361 return name != NULL /* Paranoia. */
20362 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
20363 the mapping symbols could have acquired a prefix.
20364 We do not support this here, since such symbols no
20365 longer conform to the ARM ELF ABI. */
20366 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
20367 && (name[2] == 0 || name[2] == '.');
20368 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
20369 any characters that follow the period are legal characters for the body
20370 of a symbol's name. For now we just assume that this is the case. */
20371 }
20372
20373 /* Make sure that mapping symbols in object files are not removed via the
20374 "strip --strip-unneeded" tool. These symbols are needed in order to
20375 correctly generate interworking veneers, and for byte swapping code
20376 regions. Once an object file has been linked, it is safe to remove the
20377 symbols as they will no longer be needed. */
20378
20379 static void
20380 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
20381 {
20382 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
20383 && sym->section != bfd_abs_section_ptr
20384 && is_arm_mapping_symbol (sym->name))
20385 sym->flags |= BSF_KEEP;
20386 }
20387
20388 #undef elf_backend_copy_special_section_fields
20389 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
20390
20391 #define ELF_ARCH bfd_arch_arm
20392 #define ELF_TARGET_ID ARM_ELF_DATA
20393 #define ELF_MACHINE_CODE EM_ARM
20394 #ifdef __QNXTARGET__
20395 #define ELF_MAXPAGESIZE 0x1000
20396 #else
20397 #define ELF_MAXPAGESIZE 0x10000
20398 #endif
20399 #define ELF_MINPAGESIZE 0x1000
20400 #define ELF_COMMONPAGESIZE 0x1000
20401
20402 #define bfd_elf32_mkobject elf32_arm_mkobject
20403
20404 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
20405 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
20406 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
20407 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
20408 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
20409 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
20410 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
20411 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
20412 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
20413 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
20414 #define bfd_elf32_bfd_final_link elf32_arm_final_link
20415 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
20416
20417 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
20418 #define elf_backend_maybe_function_sym elf32_arm_maybe_function_sym
20419 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
20420 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
20421 #define elf_backend_check_relocs elf32_arm_check_relocs
20422 #define elf_backend_update_relocs elf32_arm_update_relocs
20423 #define elf_backend_relocate_section elf32_arm_relocate_section
20424 #define elf_backend_write_section elf32_arm_write_section
20425 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
20426 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
20427 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
20428 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
20429 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
20430 #define elf_backend_always_size_sections elf32_arm_always_size_sections
20431 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
20432 #define elf_backend_init_file_header elf32_arm_init_file_header
20433 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
20434 #define elf_backend_object_p elf32_arm_object_p
20435 #define elf_backend_fake_sections elf32_arm_fake_sections
20436 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
20437 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20438 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
20439 #define elf_backend_size_info elf32_arm_size_info
20440 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20441 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
20442 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
20443 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
20444 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
20445 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
20446 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
20447 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
20448
20449 #define elf_backend_can_refcount 1
20450 #define elf_backend_can_gc_sections 1
20451 #define elf_backend_plt_readonly 1
20452 #define elf_backend_want_got_plt 1
20453 #define elf_backend_want_plt_sym 0
20454 #define elf_backend_want_dynrelro 1
20455 #define elf_backend_may_use_rel_p 1
20456 #define elf_backend_may_use_rela_p 0
20457 #define elf_backend_default_use_rela_p 0
20458 #define elf_backend_dtrel_excludes_plt 1
20459
20460 #define elf_backend_got_header_size 12
20461 #define elf_backend_extern_protected_data 1
20462
20463 #undef elf_backend_obj_attrs_vendor
20464 #define elf_backend_obj_attrs_vendor "aeabi"
20465 #undef elf_backend_obj_attrs_section
20466 #define elf_backend_obj_attrs_section ".ARM.attributes"
20467 #undef elf_backend_obj_attrs_arg_type
20468 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
20469 #undef elf_backend_obj_attrs_section_type
20470 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
20471 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
20472 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
20473
20474 #undef elf_backend_section_flags
20475 #define elf_backend_section_flags elf32_arm_section_flags
20476 #undef elf_backend_lookup_section_flags_hook
20477 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20478
20479 #define elf_backend_linux_prpsinfo32_ugid16 TRUE
20480
20481 #include "elf32-target.h"
20482
20483 /* Native Client targets. */
20484
20485 #undef TARGET_LITTLE_SYM
20486 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
20487 #undef TARGET_LITTLE_NAME
20488 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
20489 #undef TARGET_BIG_SYM
20490 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
20491 #undef TARGET_BIG_NAME
20492 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
20493
20494 /* Like elf32_arm_link_hash_table_create -- but overrides
20495 appropriately for NaCl. */
20496
20497 static struct bfd_link_hash_table *
20498 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
20499 {
20500 struct bfd_link_hash_table *ret;
20501
20502 ret = elf32_arm_link_hash_table_create (abfd);
20503 if (ret)
20504 {
20505 struct elf32_arm_link_hash_table *htab
20506 = (struct elf32_arm_link_hash_table *) ret;
20507
20508 htab->nacl_p = 1;
20509
20510 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
20511 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
20512 }
20513 return ret;
20514 }
20515
20516 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
20517 really need to use elf32_arm_modify_segment_map. But we do it
20518 anyway just to reduce gratuitous differences with the stock ARM backend. */
20519
20520 static bfd_boolean
20521 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
20522 {
20523 return (elf32_arm_modify_segment_map (abfd, info)
20524 && nacl_modify_segment_map (abfd, info));
20525 }
20526
20527 static bfd_boolean
20528 elf32_arm_nacl_final_write_processing (bfd *abfd)
20529 {
20530 arm_final_write_processing (abfd);
20531 return nacl_final_write_processing (abfd);
20532 }
20533
20534 static bfd_vma
20535 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
20536 const arelent *rel ATTRIBUTE_UNUSED)
20537 {
20538 return plt->vma
20539 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
20540 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
20541 }
20542
20543 #undef elf32_bed
20544 #define elf32_bed elf32_arm_nacl_bed
20545 #undef bfd_elf32_bfd_link_hash_table_create
20546 #define bfd_elf32_bfd_link_hash_table_create \
20547 elf32_arm_nacl_link_hash_table_create
20548 #undef elf_backend_plt_alignment
20549 #define elf_backend_plt_alignment 4
20550 #undef elf_backend_modify_segment_map
20551 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
20552 #undef elf_backend_modify_headers
20553 #define elf_backend_modify_headers nacl_modify_headers
20554 #undef elf_backend_final_write_processing
20555 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
20556 #undef bfd_elf32_get_synthetic_symtab
20557 #undef elf_backend_plt_sym_val
20558 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
20559 #undef elf_backend_copy_special_section_fields
20560
20561 #undef ELF_MINPAGESIZE
20562 #undef ELF_COMMONPAGESIZE
20563
20564
20565 #include "elf32-target.h"
20566
20567 /* Reset to defaults. */
20568 #undef elf_backend_plt_alignment
20569 #undef elf_backend_modify_segment_map
20570 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20571 #undef elf_backend_modify_headers
20572 #undef elf_backend_final_write_processing
20573 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20574 #undef ELF_MINPAGESIZE
20575 #define ELF_MINPAGESIZE 0x1000
20576 #undef ELF_COMMONPAGESIZE
20577 #define ELF_COMMONPAGESIZE 0x1000
20578
20579
20580 /* FDPIC Targets. */
20581
20582 #undef TARGET_LITTLE_SYM
20583 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
20584 #undef TARGET_LITTLE_NAME
20585 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
20586 #undef TARGET_BIG_SYM
20587 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
20588 #undef TARGET_BIG_NAME
20589 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
20590 #undef elf_match_priority
20591 #define elf_match_priority 128
20592 #undef ELF_OSABI
20593 #define ELF_OSABI ELFOSABI_ARM_FDPIC
20594
20595 /* Like elf32_arm_link_hash_table_create -- but overrides
20596 appropriately for FDPIC. */
20597
20598 static struct bfd_link_hash_table *
20599 elf32_arm_fdpic_link_hash_table_create (bfd *abfd)
20600 {
20601 struct bfd_link_hash_table *ret;
20602
20603 ret = elf32_arm_link_hash_table_create (abfd);
20604 if (ret)
20605 {
20606 struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret;
20607
20608 htab->fdpic_p = 1;
20609 }
20610 return ret;
20611 }
20612
20613 /* We need dynamic symbols for every section, since segments can
20614 relocate independently. */
20615 static bfd_boolean
20616 elf32_arm_fdpic_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED,
20617 struct bfd_link_info *info
20618 ATTRIBUTE_UNUSED,
20619 asection *p ATTRIBUTE_UNUSED)
20620 {
20621 switch (elf_section_data (p)->this_hdr.sh_type)
20622 {
20623 case SHT_PROGBITS:
20624 case SHT_NOBITS:
20625 /* If sh_type is yet undecided, assume it could be
20626 SHT_PROGBITS/SHT_NOBITS. */
20627 case SHT_NULL:
20628 return FALSE;
20629
20630 /* There shouldn't be section relative relocations
20631 against any other section. */
20632 default:
20633 return TRUE;
20634 }
20635 }
20636
20637 #undef elf32_bed
20638 #define elf32_bed elf32_arm_fdpic_bed
20639
20640 #undef bfd_elf32_bfd_link_hash_table_create
20641 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
20642
20643 #undef elf_backend_omit_section_dynsym
20644 #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym
20645
20646 #include "elf32-target.h"
20647
20648 #undef elf_match_priority
20649 #undef ELF_OSABI
20650 #undef elf_backend_omit_section_dynsym
20651
20652 /* VxWorks Targets. */
20653
20654 #undef TARGET_LITTLE_SYM
20655 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
20656 #undef TARGET_LITTLE_NAME
20657 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
20658 #undef TARGET_BIG_SYM
20659 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
20660 #undef TARGET_BIG_NAME
20661 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
20662
20663 /* Like elf32_arm_link_hash_table_create -- but overrides
20664 appropriately for VxWorks. */
20665
20666 static struct bfd_link_hash_table *
20667 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
20668 {
20669 struct bfd_link_hash_table *ret;
20670
20671 ret = elf32_arm_link_hash_table_create (abfd);
20672 if (ret)
20673 {
20674 struct elf32_arm_link_hash_table *htab
20675 = (struct elf32_arm_link_hash_table *) ret;
20676 htab->use_rel = 0;
20677 htab->vxworks_p = 1;
20678 }
20679 return ret;
20680 }
20681
20682 static bfd_boolean
20683 elf32_arm_vxworks_final_write_processing (bfd *abfd)
20684 {
20685 arm_final_write_processing (abfd);
20686 return elf_vxworks_final_write_processing (abfd);
20687 }
20688
20689 #undef elf32_bed
20690 #define elf32_bed elf32_arm_vxworks_bed
20691
20692 #undef bfd_elf32_bfd_link_hash_table_create
20693 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
20694 #undef elf_backend_final_write_processing
20695 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
20696 #undef elf_backend_emit_relocs
20697 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
20698
20699 #undef elf_backend_may_use_rel_p
20700 #define elf_backend_may_use_rel_p 0
20701 #undef elf_backend_may_use_rela_p
20702 #define elf_backend_may_use_rela_p 1
20703 #undef elf_backend_default_use_rela_p
20704 #define elf_backend_default_use_rela_p 1
20705 #undef elf_backend_want_plt_sym
20706 #define elf_backend_want_plt_sym 1
20707 #undef ELF_MAXPAGESIZE
20708 #define ELF_MAXPAGESIZE 0x1000
20709
20710 #include "elf32-target.h"
20711
20712
20713 /* Merge backend specific data from an object file to the output
20714 object file when linking. */
20715
20716 static bfd_boolean
20717 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
20718 {
20719 bfd *obfd = info->output_bfd;
20720 flagword out_flags;
20721 flagword in_flags;
20722 bfd_boolean flags_compatible = TRUE;
20723 asection *sec;
20724
20725 /* Check if we have the same endianness. */
20726 if (! _bfd_generic_verify_endian_match (ibfd, info))
20727 return FALSE;
20728
20729 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
20730 return TRUE;
20731
20732 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
20733 return FALSE;
20734
20735 /* The input BFD must have had its flags initialised. */
20736 /* The following seems bogus to me -- The flags are initialized in
20737 the assembler but I don't think an elf_flags_init field is
20738 written into the object. */
20739 /* BFD_ASSERT (elf_flags_init (ibfd)); */
20740
20741 in_flags = elf_elfheader (ibfd)->e_flags;
20742 out_flags = elf_elfheader (obfd)->e_flags;
20743
20744 /* In theory there is no reason why we couldn't handle this. However
20745 in practice it isn't even close to working and there is no real
20746 reason to want it. */
20747 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
20748 && !(ibfd->flags & DYNAMIC)
20749 && (in_flags & EF_ARM_BE8))
20750 {
20751 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20752 ibfd);
20753 return FALSE;
20754 }
20755
20756 if (!elf_flags_init (obfd))
20757 {
20758 /* If the input is the default architecture and had the default
20759 flags then do not bother setting the flags for the output
20760 architecture, instead allow future merges to do this. If no
20761 future merges ever set these flags then they will retain their
20762 uninitialised values, which surprise surprise, correspond
20763 to the default values. */
20764 if (bfd_get_arch_info (ibfd)->the_default
20765 && elf_elfheader (ibfd)->e_flags == 0)
20766 return TRUE;
20767
20768 elf_flags_init (obfd) = TRUE;
20769 elf_elfheader (obfd)->e_flags = in_flags;
20770
20771 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
20772 && bfd_get_arch_info (obfd)->the_default)
20773 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
20774
20775 return TRUE;
20776 }
20777
20778 /* Determine what should happen if the input ARM architecture
20779 does not match the output ARM architecture. */
20780 if (! bfd_arm_merge_machines (ibfd, obfd))
20781 return FALSE;
20782
20783 /* Identical flags must be compatible. */
20784 if (in_flags == out_flags)
20785 return TRUE;
20786
20787 /* Check to see if the input BFD actually contains any sections. If
20788 not, its flags may not have been initialised either, but it
20789 cannot actually cause any incompatiblity. Do not short-circuit
20790 dynamic objects; their section list may be emptied by
20791 elf_link_add_object_symbols.
20792
20793 Also check to see if there are no code sections in the input.
20794 In this case there is no need to check for code specific flags.
20795 XXX - do we need to worry about floating-point format compatability
20796 in data sections ? */
20797 if (!(ibfd->flags & DYNAMIC))
20798 {
20799 bfd_boolean null_input_bfd = TRUE;
20800 bfd_boolean only_data_sections = TRUE;
20801
20802 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
20803 {
20804 /* Ignore synthetic glue sections. */
20805 if (strcmp (sec->name, ".glue_7")
20806 && strcmp (sec->name, ".glue_7t"))
20807 {
20808 if ((bfd_section_flags (sec)
20809 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20810 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20811 only_data_sections = FALSE;
20812
20813 null_input_bfd = FALSE;
20814 break;
20815 }
20816 }
20817
20818 if (null_input_bfd || only_data_sections)
20819 return TRUE;
20820 }
20821
20822 /* Complain about various flag mismatches. */
20823 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
20824 EF_ARM_EABI_VERSION (out_flags)))
20825 {
20826 _bfd_error_handler
20827 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20828 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
20829 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
20830 return FALSE;
20831 }
20832
20833 /* Not sure what needs to be checked for EABI versions >= 1. */
20834 /* VxWorks libraries do not use these flags. */
20835 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
20836 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
20837 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
20838 {
20839 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
20840 {
20841 _bfd_error_handler
20842 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20843 ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
20844 obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
20845 flags_compatible = FALSE;
20846 }
20847
20848 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
20849 {
20850 if (in_flags & EF_ARM_APCS_FLOAT)
20851 _bfd_error_handler
20852 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20853 ibfd, obfd);
20854 else
20855 _bfd_error_handler
20856 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20857 ibfd, obfd);
20858
20859 flags_compatible = FALSE;
20860 }
20861
20862 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
20863 {
20864 if (in_flags & EF_ARM_VFP_FLOAT)
20865 _bfd_error_handler
20866 (_("error: %pB uses %s instructions, whereas %pB does not"),
20867 ibfd, "VFP", obfd);
20868 else
20869 _bfd_error_handler
20870 (_("error: %pB uses %s instructions, whereas %pB does not"),
20871 ibfd, "FPA", obfd);
20872
20873 flags_compatible = FALSE;
20874 }
20875
20876 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
20877 {
20878 if (in_flags & EF_ARM_MAVERICK_FLOAT)
20879 _bfd_error_handler
20880 (_("error: %pB uses %s instructions, whereas %pB does not"),
20881 ibfd, "Maverick", obfd);
20882 else
20883 _bfd_error_handler
20884 (_("error: %pB does not use %s instructions, whereas %pB does"),
20885 ibfd, "Maverick", obfd);
20886
20887 flags_compatible = FALSE;
20888 }
20889
20890 #ifdef EF_ARM_SOFT_FLOAT
20891 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
20892 {
20893 /* We can allow interworking between code that is VFP format
20894 layout, and uses either soft float or integer regs for
20895 passing floating point arguments and results. We already
20896 know that the APCS_FLOAT flags match; similarly for VFP
20897 flags. */
20898 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
20899 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
20900 {
20901 if (in_flags & EF_ARM_SOFT_FLOAT)
20902 _bfd_error_handler
20903 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20904 ibfd, obfd);
20905 else
20906 _bfd_error_handler
20907 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20908 ibfd, obfd);
20909
20910 flags_compatible = FALSE;
20911 }
20912 }
20913 #endif
20914
20915 /* Interworking mismatch is only a warning. */
20916 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
20917 {
20918 if (in_flags & EF_ARM_INTERWORK)
20919 {
20920 _bfd_error_handler
20921 (_("warning: %pB supports interworking, whereas %pB does not"),
20922 ibfd, obfd);
20923 }
20924 else
20925 {
20926 _bfd_error_handler
20927 (_("warning: %pB does not support interworking, whereas %pB does"),
20928 ibfd, obfd);
20929 }
20930 }
20931 }
20932
20933 return flags_compatible;
20934 }
20935
20936
20937 /* Symbian OS Targets. */
20938
20939 #undef TARGET_LITTLE_SYM
20940 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
20941 #undef TARGET_LITTLE_NAME
20942 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
20943 #undef TARGET_BIG_SYM
20944 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
20945 #undef TARGET_BIG_NAME
20946 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
20947
20948 /* Like elf32_arm_link_hash_table_create -- but overrides
20949 appropriately for Symbian OS. */
20950
20951 static struct bfd_link_hash_table *
20952 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
20953 {
20954 struct bfd_link_hash_table *ret;
20955
20956 ret = elf32_arm_link_hash_table_create (abfd);
20957 if (ret)
20958 {
20959 struct elf32_arm_link_hash_table *htab
20960 = (struct elf32_arm_link_hash_table *)ret;
20961 /* There is no PLT header for Symbian OS. */
20962 htab->plt_header_size = 0;
20963 /* The PLT entries are each one instruction and one word. */
20964 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
20965 htab->symbian_p = 1;
20966 /* Symbian uses armv5t or above, so use_blx is always true. */
20967 htab->use_blx = 1;
20968 htab->root.is_relocatable_executable = 1;
20969 }
20970 return ret;
20971 }
20972
20973 static const struct bfd_elf_special_section
20974 elf32_arm_symbian_special_sections[] =
20975 {
20976 /* In a BPABI executable, the dynamic linking sections do not go in
20977 the loadable read-only segment. The post-linker may wish to
20978 refer to these sections, but they are not part of the final
20979 program image. */
20980 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
20981 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
20982 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
20983 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
20984 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
20985 /* These sections do not need to be writable as the SymbianOS
20986 postlinker will arrange things so that no dynamic relocation is
20987 required. */
20988 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
20989 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
20990 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
20991 { NULL, 0, 0, 0, 0 }
20992 };
20993
20994 static void
20995 elf32_arm_symbian_begin_write_processing (bfd *abfd,
20996 struct bfd_link_info *link_info)
20997 {
20998 /* BPABI objects are never loaded directly by an OS kernel; they are
20999 processed by a postlinker first, into an OS-specific format. If
21000 the D_PAGED bit is set on the file, BFD will align segments on
21001 page boundaries, so that an OS can directly map the file. With
21002 BPABI objects, that just results in wasted space. In addition,
21003 because we clear the D_PAGED bit, map_sections_to_segments will
21004 recognize that the program headers should not be mapped into any
21005 loadable segment. */
21006 abfd->flags &= ~D_PAGED;
21007 elf32_arm_begin_write_processing (abfd, link_info);
21008 }
21009
21010 static bfd_boolean
21011 elf32_arm_symbian_modify_segment_map (bfd *abfd,
21012 struct bfd_link_info *info)
21013 {
21014 struct elf_segment_map *m;
21015 asection *dynsec;
21016
21017 /* BPABI shared libraries and executables should have a PT_DYNAMIC
21018 segment. However, because the .dynamic section is not marked
21019 with SEC_LOAD, the generic ELF code will not create such a
21020 segment. */
21021 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
21022 if (dynsec)
21023 {
21024 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
21025 if (m->p_type == PT_DYNAMIC)
21026 break;
21027
21028 if (m == NULL)
21029 {
21030 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
21031 m->next = elf_seg_map (abfd);
21032 elf_seg_map (abfd) = m;
21033 }
21034 }
21035
21036 /* Also call the generic arm routine. */
21037 return elf32_arm_modify_segment_map (abfd, info);
21038 }
21039
21040 /* Return address for Ith PLT stub in section PLT, for relocation REL
21041 or (bfd_vma) -1 if it should not be included. */
21042
21043 static bfd_vma
21044 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
21045 const arelent *rel ATTRIBUTE_UNUSED)
21046 {
21047 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
21048 }
21049
21050 #undef elf32_bed
21051 #define elf32_bed elf32_arm_symbian_bed
21052
21053 /* The dynamic sections are not allocated on SymbianOS; the postlinker
21054 will process them and then discard them. */
21055 #undef ELF_DYNAMIC_SEC_FLAGS
21056 #define ELF_DYNAMIC_SEC_FLAGS \
21057 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
21058
21059 #undef elf_backend_emit_relocs
21060
21061 #undef bfd_elf32_bfd_link_hash_table_create
21062 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
21063 #undef elf_backend_special_sections
21064 #define elf_backend_special_sections elf32_arm_symbian_special_sections
21065 #undef elf_backend_begin_write_processing
21066 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
21067 #undef elf_backend_final_write_processing
21068 #define elf_backend_final_write_processing elf32_arm_final_write_processing
21069
21070 #undef elf_backend_modify_segment_map
21071 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
21072
21073 /* There is no .got section for BPABI objects, and hence no header. */
21074 #undef elf_backend_got_header_size
21075 #define elf_backend_got_header_size 0
21076
21077 /* Similarly, there is no .got.plt section. */
21078 #undef elf_backend_want_got_plt
21079 #define elf_backend_want_got_plt 0
21080
21081 #undef elf_backend_plt_sym_val
21082 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
21083
21084 #undef elf_backend_may_use_rel_p
21085 #define elf_backend_may_use_rel_p 1
21086 #undef elf_backend_may_use_rela_p
21087 #define elf_backend_may_use_rela_p 0
21088 #undef elf_backend_default_use_rela_p
21089 #define elf_backend_default_use_rela_p 0
21090 #undef elf_backend_want_plt_sym
21091 #define elf_backend_want_plt_sym 0
21092 #undef elf_backend_dtrel_excludes_plt
21093 #define elf_backend_dtrel_excludes_plt 0
21094 #undef ELF_MAXPAGESIZE
21095 #define ELF_MAXPAGESIZE 0x8000
21096
21097 #include "elf32-target.h"
GDB Binutils - Deliverables
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