+2019-12-17 Alan Modra <amodra@gmail.com>
+
+ * nds32-dis.c (nds32_mask_opcode): Avoid signed overflow.
+ (print_insn_nds32): Use uint64_t for "given" and "given1".
+
+2019-12-17 Alan Modra <amodra@gmail.com>
+
+ * tic80-dis.c: Delete file.
+ * tic80-opc.c: Delete file.
+ * disassemble.c: Remove tic80 support.
+ * disassemble.h: Likewise.
+ * Makefile.am: Likewise.
+ * configure.ac: Likewise.
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
+2019-12-17 Alan Modra <amodra@gmail.com>
+
+ * bpf-ibld.c: Regenerate.
+
+2019-12-16 Alan Modra <amodra@gmail.com>
+
+ * aarch64-dis.c (sign_extend): Return uint64_t. Rewrite without
+ conditional.
+ (aarch64_ext_imm): Avoid signed overflow.
+
+2019-12-16 Alan Modra <amodra@gmail.com>
+
+ * microblaze-dis.c (read_insn_microblaze): Avoid signed overflow.
+
+2019-12-16 Alan Modra <amodra@gmail.com>
+
+ * nios2-dis.c (nios2_print_insn_arg): Avoid signed overflow
+
+2019-12-16 Alan Modra <amodra@gmail.com>
+
+ * xstormy16-ibld.c: Regenerate.
+
+2019-12-16 Alan Modra <amodra@gmail.com>
+
+ * score-dis.c (print_insn_score16): Move rpush/rpop imm field
+ value adjustment so that it doesn't affect reg field too.
+
+2019-12-16 Alan Modra <amodra@gmail.com>
+
+ * crx-dis.c (EXTRACT, SBM): Avoid signed overflow.
+ (get_number_of_operands, getargtype, getbits, getregname),
+ (getcopregname, getprocregname, gettrapstring, getcinvstring),
+ (getregliststring, get_word_at_PC, get_words_at_PC, build_mask),
+ (powerof2, match_opcode, make_instruction, print_arguments),
+ (print_arg): Delete forward declarations, moving static to..
+ (getregname, getcopregname, getregliststring): ..these definitions.
+ (build_mask): Return unsigned int mask.
+ (match_opcode): Use unsigned int vars.
+
+2019-12-16 Alan Modra <amodra@gmail.com>
+
+ * bfin-dis.c (fmtconst, fmtconst_val): Avoid signed overflow.
+
+2019-12-16 Alan Modra <amodra@gmail.com>
+
+ * nds32-dis.c (print_insn16, print_insn32): Remove forward decls.
+ (struct objdump_disasm_info): Delete.
+ (nds32_parse_audio_ext, nds32_parse_opcode): Cast result of
+ N32_IMMS to unsigned before shifting left.
+
+2019-12-16 Alan Modra <amodra@gmail.com>
+
+ * moxie-dis.c (INST2OFFSET): Don't left shift a signed value.
+ (print_insn_moxie): Remove unnecessary cast.
+
+2019-12-12 Alan Modra <amodra@gmail.com>
+
+ * csky-dis.c (csky_chars_to_number): Remove abort and unnecessary
+ mask.
+
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ * arc-dis.c (BITS): Don't truncate high bits with shifts.
+ * nios2-dis.c (nios2_print_insn_arg): Don't sign extend with shifts.
+ * tic54x-dis.c (print_instruction): Likewise.
+ * tilegx-opc.c (parse_insn_tilegx): Likewise.
+ * tilepro-opc.c (parse_insn_tilepro): Likewise.
+ * visium-dis.c (disassem_class0): Likewise.
+ * pdp11-dis.c (sign_extend): Likewise.
+ (SIGN_BITS): Delete.
+ * epiphany-ibld.c: Regenerate.
+ * lm32-ibld.c: Regenerate.
+ * m32c-ibld.c: Regenerate.
+
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ * ns32k-dis.c (sign_extend): Correct last patch.
+
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ * vax-dis.c (NEXTLONG): Avoid signed overflow.
+
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ * v850-dis.c (get_operand_value): Use unsigned arithmetic. Don't
+ sign extend using shifts.
+
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ * tic6x-dis.c (tic6x_extract_32): Avoid signed overflow.
+
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ * tic4x-dis.c (tic4x_print_register): Formatting. Don't segfault
+ on NULL registertable entry.
+ (tic4x_hash_opcode): Use unsigned arithmetic.
+
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ * s12z-opc.c (z_decode_signed_value): Avoid signed overflow.
+
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ * ns32k-dis.c (bit_extract): Use unsigned arithmetic.
+ (bit_extract_simple, sign_extend): Likewise.
+
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ * nios2-dis.c (nios2_print_insn_arg): Use 1u << 31.
+
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ * moxie-dis.c (INST2OFFSET): Don't sign extend using shifts.
+
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ * m68k-dis.c (COERCE32): Cast value first.
+ (NEXTLONG, NEXTULONG): Avoid signed overflow.
+
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ * h8300-dis.c (extract_immediate): Avoid signed overflow.
+ (bfd_h8_disassemble): Likewise.
+
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ * d30v-dis.c (print_insn): Make opind unsigned. Don't access
+ past end of operands array.
+
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ * csky-dis.c (csky_chars_to_number): Rewrite. Avoid signed
+ overflow when collecting bytes of a number.
+
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ * cris-dis.c (print_with_operands): Avoid signed integer
+ overflow when collecting bytes of a 32-bit integer.
+
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ * cr16-dis.c (EXTRACT, SBM): Rewrite.
+ (cr16_match_opcode): Delete duplicate bcond test.
+
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ * bfin-dis.c (HOST_LONG_WORD_SIZE, XFIELD): Delete.
+ (SIGNBIT): New.
+ (MASKBITS, SIGNEXTEND): Rewrite.
+ (fmtconst): Don't use ? expression now that SIGNEXTEND uses
+ unsigned arithmetic, instead assign result of SIGNEXTEND back
+ to x.
+ (fmtconst_val): Use 1u in shift expression.
+
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ * arc-dis.c (find_format_from_table): Use ull constant when
+ shifting by up to 32.
+
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ PR 25270
+ * aarch64-dis.c (aarch64_decode_variant_using_iclass): Return
+ false when field is zero for sve_size_tsz_bhs.
+
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ * epiphany-ibld.c: Regenerate.
+
+2019-12-10 Alan Modra <amodra@gmail.com>
+
+ PR 24960
+ * disassemble.c (disassemble_free_target): New function.
+
+2019-12-10 Alan Modra <amodra@gmail.com>
+
+ * cgen-dis.in (print_insn_@arch@): Replace insn_sets with private_data.
+ * disassemble.c (disassemble_init_for_target): Likewise.
+ * bpf-dis.c: Regenerate.
+ * epiphany-dis.c: Regenerate.
+ * fr30-dis.c: Regenerate.
+ * frv-dis.c: Regenerate.
+ * ip2k-dis.c: Regenerate.
+ * iq2000-dis.c: Regenerate.
+ * lm32-dis.c: Regenerate.
+ * m32c-dis.c: Regenerate.
+ * m32r-dis.c: Regenerate.
+ * mep-dis.c: Regenerate.
+ * mt-dis.c: Regenerate.
+ * or1k-dis.c: Regenerate.
+ * xc16x-dis.c: Regenerate.
+ * xstormy16-dis.c: Regenerate.
+
+2019-12-10 Alan Modra <amodra@gmail.com>
+
+ * ppc-dis.c (private): Delete variable.
+ (get_powerpc_dialect): Don't segfault on NULL info->private_data.
+ (powerpc_init_dialect): Don't use global private.
+
+2019-12-10 Alan Modra <amodra@gmail.com>
+
+ * s12z-opc.c: Formatting.
+
+2019-12-08 Alan Modra <amodra@gmail.com>
+
+ * s12z-opc.c (exg_sex_discrim): Don't leak memory on invalid
+ registers.
+
+2019-12-05 Jan Beulich <jbeulich@suse.com>
+
+ * aarch64-tbl.h (aarch64_feature_crypto,
+ aarch64_feature_crypto_v8_2, CRYPTO, CRYPTO_V8_2, CRYP_INSN,
+ CRYPTO_V8_2_INSN): Delete.
+
+2019-12-05 Alan Modra <amodra@gmail.com>
+
+ PR 25249
+ * microblaze-dis.c (NUM_STRBUFS, STRBUF_SIZE): Define.
+ (struct string_buf): New.
+ (strbuf): New function.
+ (get_field): Use strbuf rather than strdup of local temp.
+ (get_field_imm, get_field_imm5, get_field_imm5_mbar): Likewise.
+ (get_field_rfsl, get_field_imm15): Likewise.
+ (get_field_rd, get_field_r1, get_field_r2): Update macros.
+ (get_field_special): Likewise. Don't strcpy spr. Formatting.
+ (print_insn_microblaze): Formatting. Init and pass string_buf to
+ get_field functions.
+
+2019-12-04 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (lfs, lgs, lss): Drop No_qSuf.
+ * i386-tbl.h: Re-generate.
+
+2019-12-04 Jan Beulich <jbeulich@suse.com>
+
+ * i386-dis.c (mod_table): Use Ev instead of Em for movdiri.
+
+2019-12-04 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (push, pop): Drop DefaultSize from GPR-only
+ forms.
+ (xbegin): Drop DefaultSize.
+ * i386-tbl.h: Re-generate.
+
+2019-11-22 Mihail Ionescu <mihail.ionescu@arm.com>
+
+ * opcodes/arm-dis.c (arm_opcodes, thumb32_opcodes):
+ Change the coproc CRC conditions to use the extension
+ feature set, second word, base on ARM_EXT2_CRC.
+
+2019-11-14 Jan Beulich <jbeulich@suse.com>
+
+ * i386-opc.tbl (syscall, sysret): Drop Cpu64 forms.
+ * i386-tbl.h: Re-generate.
+
+2019-11-14 Jan Beulich <jbeulich@suse.com>
+
+ * i386-gen.c (opcode_modifiers): Remove JumpDword, JumpByte,
+ JumpInterSegment, and JumpAbsolute entries.
+ * i386-opc.h (JUMP, JUMP_DWORD, JUMP_BYTE, JUMP_INTERSEGMENT,
+ JUMP_ABSOLUTE): Define.
+ (struct i386_opcode_modifier): Extend jump field to 3 bits.
+ Remove jumpdword, jumpbyte, jumpintersegment, and jumpabsolute
+ fields.
+ * i386-opc.tbl (JumpByte, JumpDword, JumpAbsolute,
+ JumpInterSegment): Define.
+ * i386-tbl.h: Re-generate.
+
+2019-11-14 Jan Beulich <jbeulich@suse.com>
+
+ * i386-gen.c (operand_type_init): Remove
+ OPERAND_TYPE_JUMPABSOLUTE entry.
+ (opcode_modifiers): Add JumpAbsolute entry.
+ (operand_types): Remove JumpAbsolute entry.
+ * i386-opc.h (JumpAbsolute): Move between enums.
+ (struct i386_opcode_modifier): Add jumpabsolute field.
+ (union i386_operand_type): Remove jumpabsolute field.
+ * i386-opc.tbl (call, lcall, jmp, ljmp): Move JumpAbsolute.
+ * i386-init.h, i386-tbl.h: Re-generate.
+
+2019-11-14 Jan Beulich <jbeulich@suse.com>
+
+ * i386-gen.c (opcode_modifiers): Add AnySize entry.
+ (operand_types): Remove AnySize entry.
+ * i386-opc.h (AnySize): Move between enums.
+ (struct i386_opcode_modifier): Add anysize field.
+ (OTUnused): Un-comment.
+ (union i386_operand_type): Remove anysize field.
+ * i386-opc.tbl (lea, invlpg, clflush, prefetchnta, prefetcht0,
+ prefetcht1, prefetcht2, prefetchtw, bndmk, bndcl, bndcu, bndcn,
+ bndstx, bndldx, prefetchwt1, clflushopt, clwb, cldemote): Move
+ AnySize.
+ * i386-tbl.h: Re-generate.
+
+2019-11-12 Nelson Chu <nelson.chu@sifive.com>
+
+ * riscv-opc.c (riscv_insn_types): Replace the INSN_CLASS_I with
+ INSN_CLASS_F and the INSN_CLASS_C with INSN_CLASS_F_AND_C if we
+ use the floating point register (FPR).
+
+2019-11-12 Mihail Ionescu <mihail.ionescu@arm.com>
+
+ * opcodes/arm-dis.c (mve_opcodes): Enable VMOV imm to vec with
+ cmode 1101.
+ (is_mve_encoding_conflict): Update cmode conflict checks for
+ MVE_VMVN_IMM.
+
+2019-11-12 Jan Beulich <jbeulich@suse.com>
+
+ * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_ESSEG
+ entry.
+ (operand_types): Remove EsSeg entry.
+ (main): Replace stale use of OTMax.
+ * i386-opc.h (IS_STRING_ES_OP0, IS_STRING_ES_OP1): Define.
+ (struct i386_opcode_modifier): Expand isstring field to 2 bits.
+ (EsSeg): Delete.
+ (OTUnused): Comment out.
+ (union i386_operand_type): Remove esseg field.
+ * i386-opc.tbl (IsStringEsOp0, IsStringEsOp1): Define.
+ (cmps, scmp, scas, ssca, cmpsd): Add IsStringEsOp0.
+ (ins, movs, smov, movsd): Add IsStringEsOpOp1.
+ (stos, ssto): Add IsStringEsOp0/IsStringEsOpOp1.
+ * i386-init.h, i386-tbl.h: Re-generate.
+
+2019-11-12 Jan Beulich <jbeulich@suse.com>
+
+ * i386-gen.c (operand_instances): Add RegB entry.
+ * i386-opc.h (enum operand_instance): Add RegB.
+ * i386-opc.tbl (RegC, RegD, RegB): Define.
+ (Acc, ShiftCount, InOutPortReg): Adjust definitions.
+ (monitor, mwait, invlpga, skinit, vmload, vmrun, vmsave, clzero,
+ monitorx, mwaitx): Drop ImmExt and convert encodings
+ accordingly.
+ * i386-reg.tbl (ecx, rcx): Add Instance=RegC.
+ (edx, rdx): Add Instance=RegD.
+ (ebx, rbx): Add Instance=RegB.
+ * i386-tbl.h: Re-generate.
+
+2019-11-12 Jan Beulich <jbeulich@suse.com>
+
+ * i386-gen.c (operand_type_init): Adjust
+ OPERAND_TYPE_INOUTPORTREG, OPERAND_TYPE_SHIFTCOUNT,
+ OPERAND_TYPE_FLOATACC, OPERAND_TYPE_ACC8, OPERAND_TYPE_ACC16,
+ OPERAND_TYPE_ACC32, and OPERAND_TYPE_ACC64 entries.
+ (operand_instances): New.
+ (operand_types): Drop InOutPortReg, ShiftCount, and Acc entries.
+ (output_operand_type): New parameter "instance". Process it.
+ (process_i386_operand_type): New local variable "instance".
+ (main): Adjust static assertions.
+ * i386-opc.h (INSTANCE_WIDTH): Define.
+ (enum operand_instance): New.
+ (Acc, InOutPortReg, ShiftCount): Replace by ClassInstance.
+ (union i386_operand_type): Replace acc, inoutportreg, and
+ shiftcount by instance.
+ * i386-opc.tbl (Acc, InOutPortReg, ShiftCount): Define.
+ * i386-reg.tbl (st, al, cl, ax, dx, eax, rax, xmm0, st(0)):
+ Add Instance=.
+ * i386-init.h, i386-tbl.h: Re-generate.
+
+2019-11-11 Jan Beulich <jbeulich@suse.com>
+
+ * aarch64-tbl.h (aarch64_opcode_table): Switch SVE2's
+ smaxp/sminp entries' "tied_operand" field to 2.
+
+2019-11-11 Jan Beulich <jbeulich@suse.com>
+
+ * aarch64-opc.c (operand_general_constraint_met_p): Replace
+ "index" local variable by that of the already existing "num".
+
+2019-11-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/25167
+ * i386-opc.tbl: Remove IgnoreSize from cmpsd and movsd.
+ * i386-tbl.h: Regenerated.
+
+2019-11-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-gen.c (operand_type_init): Add Class= to
+ OPERAND_TYPE_REGMASK and OPERAND_TYPE_REGBND entries. Move up
+ OPERAND_TYPE_REGBND entry.
+ (operand_classes): Add RegMask and RegBND entries.
+ (operand_types): Drop RegMask and RegBND entry.
+ * i386-opc.h (enum operand_class): Add RegMask and RegBND.
+ (RegMask, RegBND): Delete.
+ (union i386_operand_type): Remove regmask and regbnd fields.
+ * i386-opc.tbl (RegMask, RegBND): Define.
+ * i386-reg.tbl: Replace RegMask by Class=RegMask and RegBND by
+ Class=RegBND.
+ * i386-init.h, i386-tbl.h: Re-generate.
+
+2019-11-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-gen.c (operand_type_init): Add Class= to
+ OPERAND_TYPE_REGMMX, OPERAND_TYPE_REGXMM, OPERAND_TYPE_REGYMM, and
+ OPERAND_TYPE_REGZMM entries.
+ (operand_classes): Add RegMMX and RegSIMD entries.
+ (operand_types): Drop RegMMX and RegSIMD entries.
+ * i386-opc.h (enum operand_class): Add RegMMX and RegSIMD.
+ (RegMMX, RegSIMD): Delete.
+ (union i386_operand_type): Remove regmmx and regsimd fields.
+ * i386-opc.tbl (RegMMX): Define.
+ (RegXMM, RegYMM, RegZMM): Add Class=.
+ * i386-reg.tbl: Replace RegMMX by Class=RegMMX and RegSIMD by
+ Class=RegSIMD.
+ * i386-init.h, i386-tbl.h: Re-generate.
+
+2019-11-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-gen.c (operand_type_init): Add Class= to
+ OPERAND_TYPE_CONTROL, OPERAND_TYPE_TEST, and OPERAND_TYPE_DEBUG
+ entries.
+ (operand_classes): Add RegCR, RegDR, and RegTR entries.
+ (operand_types): Drop Control, Debug, and Test entries.
+ * i386-opc.h (enum operand_class): Add RegCR, RegDR, and RegTR.
+ (Control, Debug, Test): Delete.
+ (union i386_operand_type): Remove control, debug, and test
+ fields.
+ * i386-opc.tbl (Control, Debug, Test): Define.
+ * i386-reg.tbl: Replace Control by Class=RegCR, Debug by
+ Class=RegDR, and Test by Class=RegTR.
+ * i386-init.h, i386-tbl.h: Re-generate.
+
+2019-11-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-gen.c (operand_type_init): Add Class= to
+ OPERAND_TYPE_SREG entry.
+ (operand_classes): Add SReg entry.
+ (operand_types): Drop SReg entry.
+ * i386-opc.h (enum operand_class): Add SReg.
+ (SReg): Delete.
+ (union i386_operand_type): Remove sreg field.
+ * i386-opc.tbl (SReg): Define.
+ * i386-reg.tbl: Replace SReg by Class=SReg.
+ * i386-init.h, i386-tbl.h: Re-generate.
+
+2019-11-08 Jan Beulich <jbeulich@suse.com>
+
+ * i386-gen.c (operand_type_init): Add Class=. New
+ OPERAND_TYPE_ANYIMM entry.
+ (operand_classes): New.
+ (operand_types): Drop Reg entry.
+ (output_operand_type): New parameter "class". Process it.
+ (process_i386_operand_type): New local variable "class".
+ (main): Adjust static assertions.
+ * i386-opc.h (CLASS_WIDTH): Define.
+ (enum operand_class): New.
+ (Reg): Replace by Class. Adjust comment.
+ (union i386_operand_type): Replace reg by class.
+ * i386-opc.tbl (Reg8, Reg16, Reg32, Reg64, FloatReg): Add
+ Class=.
+ * i386-reg.tbl: Replace Reg by Class=Reg.
+ * i386-init.h: Re-generate.
+
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
* opcodes/aarch64-tbl.h (V8_6_INSN): New macro for v8.6 instructions.
projects / deliverable / binutils-gdb.git / blobdiff