x86: SYSENTER/SYSEXIT are unavailable in 64-bit mode on AMD

[deliverable/binutils-gdb.git] / opcodes / i386-dis.c

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 6b08dd6bde87ba340085bcfe1c14cd8462ad38c9..5d24fb5cecf42ef5d4b28d2845d13b862e99933d 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1,5 +1,5 @@
 /* Print i386 instructions for GDB, the GNU debugger.
-   Copyright (C) 1988-2019 Free Software Foundation, Inc.
+   Copyright (C) 1988-2020 Free Software Foundation, Inc.
 
    This file is part of the GNU opcodes library.
 
@@ -107,6 +107,7 @@ static void OP_3DNowSuffix (int, int);
 static void CMP_Fixup (int, int);
 static void BadOp (void);
 static void REP_Fixup (int, int);
+static void SEP_Fixup (int, int);
 static void BND_Fixup (int, int);
 static void NOTRACK_Fixup (int, int);
 static void HLE_Fixup1 (int, int);
@@ -296,6 +297,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
 #define I1 { OP_I, const_1_mode }
 #define Jb { OP_J, b_mode }
 #define Jv { OP_J, v_mode }
+#define Jdqw { OP_J, dqw_mode }
 #define Cm { OP_C, m_mode }
 #define Dm { OP_D, m_mode }
 #define Td { OP_T, d_mode }
@@ -411,6 +413,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
 #define EMCq { OP_EMC, q_mode }
 #define MXC { OP_MXC, 0 }
 #define OPSUF { OP_3DNowSuffix, 0 }
+#define SEP { SEP_Fixup, 0 }
 #define CMP { CMP_Fixup, 0 }
 #define XMM0 { XMM_Fixup, 0 }
 #define FXSAVE { FXSAVE_Fixup, 0 }
@@ -558,7 +561,8 @@ enum
   v_bndmk_mode,
   /* operand size depends on REX prefixes.  */
   dq_mode,
-  /* registers like dq_mode, memory like w_mode.  */
+  /* registers like dq_mode, memory like w_mode, displacements like
+     v_mode without considering Intel64 ISA.  */
   dqw_mode,
   /* bounds operand */
   bnd_mode,
@@ -2711,8 +2715,8 @@ static const struct dis386 dis386_twobyte[] = {
   { "rdtsc",           { XX }, 0 },
   { "rdmsr",           { XX }, 0 },
   { "rdpmc",           { XX }, 0 },
-  { "sysenter",                { XX }, 0 },
-  { "sysexit",         { XX }, 0 },
+  { "sysenter",                { SEP }, 0 },
+  { "sysexit",         { SEP }, 0 },
   { Bad_Opcode },
   { "getsec",          { XX }, 0 },
   /* 38 */
@@ -10522,7 +10526,7 @@ static const struct dis386 mod_table[][2] = {
   },
   {
     /* MOD_0F38F9_PREFIX_0 */
-    { "movdiri",       { Em, Gv }, PREFIX_OPCODE },
+    { "movdiri",       { Ev, Gv }, PREFIX_OPCODE },
   },
   {
     /* MOD_62_32BIT */
@@ -10969,7 +10973,7 @@ static const struct dis386 rm_table[][8] = {
   },
   {
     /* RM_C7_REG_7 */
-    { "xbeginT",       { Skip_MODRM, Jv }, 0 },
+    { "xbeginT",       { Skip_MODRM, Jdqw }, 0 },
   },
   {
     /* RM_0F01_REG_0 */
@@ -11314,7 +11318,7 @@ static char scale_char;
 
 enum x86_64_isa
 {
-  amd64 = 0,
+  amd64 = 1,
   intel64
 };
 
@@ -14827,11 +14831,13 @@ OP_J (int bytemode, int sizeflag)
        disp -= 0x100;
       break;
     case v_mode:
-      if (isa64 == amd64)
+      if (isa64 != intel64)
+    case dqw_mode:
        USED_REX (REX_W);
       if ((sizeflag & DFLAG)
          || (address_mode == mode_64bit
-             && (isa64 != amd64 || (rex & REX_W))))
+             && ((isa64 == intel64 && bytemode != dqw_mode)
+                 || (rex & REX_W))))
        disp = get32s ();
       else
        {
@@ -14848,7 +14854,7 @@ OP_J (int bytemode, int sizeflag)
                       & ~((bfd_vma) 0xffff));
        }
       if (address_mode != mode_64bit
-         || (isa64 == amd64 && !(rex & REX_W)))
+         || (isa64 != intel64 && !(rex & REX_W)))
        used_prefixes |= (prefixes & PREFIX_DATA);
       break;
     default:
@@ -15598,6 +15604,18 @@ REP_Fixup (int bytemode, int sizeflag)
     }
 }
 
+static void
+SEP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
+{
+  if ( isa64 != amd64 )
+    return;
+
+  obufp = obuf;
+  BadOp ();
+  mnemonicendp = obufp;
+  ++codep;
+}
+
 /* For BND-prefixed instructions 0xF2 prefix should be displayed as
    "bnd".  */