x86: various XOP insns lack L and/or W bit decoding

x86: various XOP insns lack L and/or W bit decoding

While some insns support both XOP.W based operand swapping and 256-bit
operation (XOP.L=1), many others don't support one or both.

For {L,S}LWPCB also fix the so far not decoded ModRM.mod == 3
restriction.

Take the opportunity and replace the custom OP_LWP_E() and OP_LWPCB_E()
routines by suitable other, non-custom operanbd specifiers.